Optical link topology and method suitable for direct current transmission redundant valve control system

Abstract

The invention relates to an optical link topology and method suitable for a direct current transmission redundant valve control system. The optical link topology comprises a valve control system, a spot coupler, a first photon chip and a converter valve which are connected in sequence, and a second photon chip connected with the converter valve, the valve control system is used for driving the emitting plate to emit an optical signal; an optical signal is emitted through a valve control system, and the optical signal enters a first photon chip after being coupled by a spot-size coupler; the input optical power is equally divided through a first photon chip to obtain a plurality of output waveguides, one part of the plurality of output waveguides is transmitted to a converter valve to control synchronous triggering of thyristors in the converter valve, and the other part of the plurality of output waveguides is transmitted to a valve control system as a re-inspection signal; the output end of the converter valve is connected with the valve control system through the second photon chip to form a TE return link, and the state information is transmitted back to the main control board A and the main control board B through the TE return link. According to the invention, equal division of optical signals is realized, the problem of optical fiber butt joint is reduced, and low-loss coupling is realized; and the reliability is improved.

Description

Technical Field

[0001] The present invention relates to the field of photonic chip control transmission, and in particular to an optical link topology and method suitable for a direct current transmission redundant valve control system. Background Art

[0002] Ultra-high voltage direct current (UHVDC) transmission projects play a crucial role in the power industry. During their construction, ensuring the stable operation of converter valve control systems is crucial. One of the core components of UHVDC systems is the converter valve, which converts AC power into DC power. The converter valve control system is a critical system for triggering, monitoring, and protecting the converter valves. In UHVDC transmission projects, the stability and reliability of the converter valve control system are directly related to the safe operation of the entire transmission system.

[0003] With the vigorous development of clean energy and the continuous optimization of power grid structures, the number and scale of UHVDC transmission projects continues to grow. To improve the reliability and stability of converter valve control systems, researchers have conducted in-depth research on redundant valve control systems. Redundant valve control systems utilize a dual-system configuration: a primary system and a backup system. While functionally identical, in actual operation, only the primary system performs control tasks, while the backup system operates in hot standby mode. If the primary system fails, the backup system immediately switches to primary mode, ensuring continuous operation of the converter valve control system.

[0004] While the design of the UHV redundant valve control system incorporates numerous advanced technologies to ensure reliability and stability, some shortcomings remain, particularly in terms of connectivity. Traditional independent fiber-optic triggering methods suffer from inconsistent thyristor triggering times, and the need to connect multiple optical fibers from the main control board to the transmitter board results in a bulky VBE valve control system. Independent fiber-optic connections place high demands on connection technology, as each fiber must be precisely docked to ensure stable and reliable signal transmission.

[0005] Each optical fiber may have slight differences in physical length, quality, and connection method. These differences may affect the signal transmission delay, thereby affecting the timing accuracy of triggering the thyristor and making maintenance and debugging more complicated.

[0006] The different turn-on times of individual thyristors cause significant variations in the electrical stress experienced by the valve components. These components inherently have weak overvoltage tolerances and limited dv / dt and di / dt tolerances. This can damage a thyristor, impacting the reliable operation of the converter valve and even causing unforeseen losses. Therefore, minimizing the timing differences caused by fiber optic differences facilitates simultaneous turn-on of the thyristors in a series valve, reducing the electrical stress experienced by individual thyristors and ensuring their safe operation. Summary of the Invention

[0007] To address the issues of different thyristor triggering times in traditional independent optical fiber triggering methods and the need for the main control board to connect multiple optical fibers to the transmitter board, resulting in a bulky VBE valve control system, the present invention proposes an optical link topology suitable for a DC power transmission redundant valve control system, comprising: a valve control system, a spot coupler, a first photonic chip, and a converter valve connected in sequence, and a second photonic chip connected to the converter valve;

[0008] The valve control system includes a main control board A and a main control board B that form redundant backups, both of which are used to drive the transmitter board to emit optical signals;

[0009] The second photonic chip is connected to the valve control system, and is used to receive the optical power fed back by the converter valve, and divide the fed back optical power into two equal parts, and transmit the divided optical power to the main control board A and the main control board B respectively;

[0010] The spot mode coupler is used to couple the optical signal emitted by the transmitting board and transmit the coupled light to the first photonic chip;

[0011] The first photonic chip is used to divide the input optical power into equal parts, transmit the divided optical power part to the converter valve, and transmit the other part as a return check signal to the main control board A and the main control board B;

[0012] The second photonic chip is used to receive the optical power fed back by the converter valve, and to divide the fed-back optical power into two equal parts, and transmit the divided optical power to the main control board A and the main control board B respectively;

[0013] The commutation valve is used to receive the optical power equally divided by the first photonic chip and control the synchronous triggering of the thyristors in the commutation valve.

[0014] Optionally, the first photonic chip includes: a 5×16 optical beam splitter;

[0015] The four input ends of the 5×16 optical beam splitter are connected to the input ends of the main control board A and the main control board B, the 13 output ends are connected to the converter valve, and the two output ends are connected to the receiving board A of the main control board A and the receiving board B of the main control board B respectively;

[0016] The 5×16 optical beam splitter is used to divide the optical power input from the input end into 16 equal parts, and transmit the divided optical power to the converter valve, receiving board A and receiving board B.

[0017] Optionally, the second photonic chip includes: a 1×2 optical beam splitter;

[0018] The input end of the 1×2 optical beam splitter is connected to the converter valve, and the two output ends are connected to the receiving board A and the receiving board B respectively, for receiving the optical power fed back by the converter valve, dividing the optical power into two equal parts, and transmitting the divided optical power to the main control board A and the main control board B respectively.

[0019] Optionally, the pattern spot coupler comprises: a coupling region (16), a tapered gradient region (17), a straight waveguide buffer region (18), and a rectangular waveguide (19) sequentially arranged along the light transmission direction;

[0020] The coupling region (16) and the tapered gradient region (17) are seamlessly connected via a waveguide structure, the tapered gradient region (17) and the straight waveguide buffer region (18) are connected via a waveguide structure with a smooth transition, and the straight waveguide buffer region (18) and the rectangular waveguide (19) are connected via end-face direct coupling.

[0021] The coupling region (16) is used to preliminarily couple the input optical signal with the waveguide structure;

[0022] The tapered gradient region (17) is used to adjust the mode spot size of the optical signal;

[0023] The straight waveguide buffer (18) is used to stabilize the transmission state of the optical signal so that the optical signal reaches a stable transmission condition before entering the rectangular waveguide;

[0024] The output end of the rectangular waveguide (19) is connected to the first photonic chip and is used to output an optical signal of a standard rectangular silicon waveguide structure to the first photonic chip.

[0025] Optionally, the 5×16 optical beam splitter includes an input waveguide (12), a tapered transition structure (13), a multimode interference region (14), and an output waveguide (15);

[0026] An optical signal is input through the input end of the input waveguide (12), and the optical signal is stably transmitted to the tapered transition structure (13). The optical mode spot is adjusted through the tapered transition structure (13), and the optical signal after the optical mode spot is adjusted is transmitted to the multimode interference region (14). The optical signal after the optical mode spot is adjusted is evenly split by the self-image effect in the multimode interference region (14), and the split optical signal is transmitted to the output waveguide (15).

[0027] Optionally, the multimode interference region (14) is 120 μm wide and 5487 μm long.

[0028] Optionally, the converter valve includes a thyristor electronic board and a thyristor;

[0029] The thyristor is located on the thyristor electronic board and is controlled by the thyristor electronic board;

[0030] The thyristor electronic board is connected to 13 output terminals of the 5×16 optical beam splitter to trigger the thyristor electronic board;

[0031] The output end of the thyristor electronic board is connected to the input end of the second photonic chip, and is used to feed back the optical power of the thyristor electronic board to the second photonic chip.

[0032] Optionally, the rectangular waveguide (19) is a four-layer structure, comprising, from top to bottom, a waveguide core layer (8), a silicon dioxide cladding layer (9), a buried oxide layer (10), and a silicon substrate (11);

[0033] The silicon substrate (11) is used as the bottom base of the rectangular waveguide, supporting the buried oxide layer (10), the silicon dioxide cladding layer (9) and the waveguide core layer (8) above;

[0034] The buried oxide layer (10) is used to isolate the silicon dioxide cladding layer (9) and the silicon substrate (11), confine the light field to be transmitted in the waveguide core layer (8), and prevent light from leaking into the silicon substrate;

[0035] The silica cladding (9) utilizes the refractive index difference to achieve total reflection confinement of the light field, thereby ensuring low-loss transmission of the light signal in the waveguide core layer (8);

[0036] The waveguide core layer (8) is used to transmit the optical signal over a long distance with low loss to the first photonic chip.

[0037] In another aspect, the present invention further provides a method for optical signal transmission using the optical link topology described above, comprising:

[0038] The valve control system includes: main control board A and main control board B that form redundant backup;

[0039] The optical signal is sent out through the main control board A and the main control board B, coupled by the spot mode coupler, and then enters the first photonic chip;

[0040] The input optical power is equally divided by the first photonic chip to obtain multiple output waveguides, a portion of the multiple output waveguides is transmitted to the converter valve to control the synchronous triggering of the thyristors in the converter valve, and the other portion is transmitted to the main control board A and the main control board B as a feedback signal;

[0041] The output end of the converter valve is connected to the main control board A and the main control board B through the second photonic chip to form a TE feedback link, and the status information is transmitted back to the main control board A and the main control board B through the TE feedback link.

[0042] Optionally, the optical signal is sent out through the main control board A and the main control board B, is coupled through the spot mode coupler, and then enters the photonic chip, including:

[0043] The optical signals sent by the main control board A and the main control board B are coupled to the optical signals of the optical fibers through the coupling region (16) in sequence, the optical signals are mode-converted through the tapered gradient region (17), the transmission mode of the optical signals is stabilized through the straight waveguide buffer (18), and the optical signals are converted into a standard rectangular silicon waveguide structure through the rectangular waveguide (19), and then enter the first photonic chip.

[0044] Optionally, the first photonic chip equally divides the input optical power to obtain a plurality of output waveguides, transmits a portion of the plurality of output waveguides to a converter valve to control synchronous triggering of thyristors in the converter valve, and transmits the other portion as a check signal to main control board A and main control board B, including:

[0045] The input optical power is equally divided by a 5×16 optical beam splitter to obtain 16 output waveguides. Thirteen of the output waveguides are transmitted to the converter valve to control the synchronous triggering of the thyristors in the converter valve. Two of the output waveguides are used to transmit the return signal to the main control board A and the main control board B, and the other output waveguide is used as a backup channel.

[0046] Optionally, the input optical power is equally divided by a 5×16 optical beam splitter to obtain 16 output waveguides, including:

[0047] An optical signal is input through an input waveguide (12) in a 5×16 optical beam splitter, and is sequentially transmitted through a tapered transition structure (13) in the 5×16 optical beam splitter to adjust the optical mode spot and then transmitted to a multimode interference region (14) in the 5×16 optical beam splitter. The optical signal is evenly split using a self-image effect to obtain 16 output waveguides.

[0048] Optionally, the output end of the converter valve is connected to the main control board A and the main control board B through the second photonic chip to form a TE feedback link, and the status information is transmitted back to the main control board A and the main control board B through the TE feedback link, including:

[0049] The output end of the converter valve is connected to the receiving board A of the main control board A and the receiving board B of the main control board B through a 1×2 optical splitter to form a TE feedback link;

[0050] The status information is transmitted back to receiving boards A and B through the TE reporting link.

[0051] In another aspect, the present application further provides an electronic device, comprising: at least one processor and a memory; the memory and the processor are connected via a bus;

[0052] The memory is used to store one or more programs;

[0053] When the one or more programs are executed by the at least one processor, the method for manufacturing a silicon photonic chip as described above is implemented.

[0054] On the other hand, the present application also provides a readable storage medium having an execution program stored thereon, which, when executed, implements the method for manufacturing a silicon photonic chip as described above.

[0055] Compared with the prior art, the present invention has the following beneficial effects:

[0056] An optical link topology suitable for a redundant valve-controlled system for direct current transmission comprises: a valve-controlled system, a spot coupler, a first photonic chip, and a converter valve connected in sequence, and a second photonic chip connected to the converter valve. The valve-controlled system comprises a main control board A and a main control board B forming a redundant backup, both configured to drive a transmitter board to emit an optical signal. The second photonic chip is connected to the valve-controlled system and configured to receive optical power feedback from the converter valve, split the feedback optical power into two equal parts, and transmit the resulting light to the main control board A and the main control board B, respectively. The spot coupler couples the optical signal emitted by the transmitter board and transmits the coupled light to the first photonic chip. The first photonic chip splits the input optical power into two equal parts, transmitting a portion of the split optical power to the converter valve and the remaining portion as a check signal to the main control board A and the main control board B. The converter valve receives the split optical power from the first photonic chip and controls the synchronous triggering of thyristors in the converter valve. The present invention adopts a first photonic chip and a second photonic chip to realize equal division of optical signals, reduce the problem of optical fiber docking, reduce the system volume, and realize low-loss coupling of multi-mode optical fiber and single-mode optical fiber; and adopts a multiple redundancy design to improve the reliability of the power system. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] Figure 1 This is a topological structure diagram of an optical link applicable to a DC power transmission redundant valve control system of the present invention;

[0058] Figure 2 Schematic diagram of waveguide cross section;

[0059] Figure 3 Schematic diagram of the multimode interference coupler structure;

[0060] Figure 4 Schematic diagram of tapered transition structure;

[0061] Figure 5 Schematic diagram of the pattern coupler structure;

[0062] Figure 6 Schematic diagram of MMI light field transmission;

[0063] Figure 7 Taper structure simulation diagram;

[0064] Figure 8 This is a schematic structural diagram of an electronic device according to the present invention;

[0065] Among them, 1-valve control system, 2-transmitter board, 3-5×16 optical beam splitter, 4-thyristor electronic board, 5-thyristor, 6-1×2 optical beam splitter, 7-receiving board, 8-waveguide core layer, 9-silicon dioxide cladding, 10-buried oxide layer, 11-silicon substrate, 12-input waveguide, 13-tapered transition structure, 14-multimode interference region, 15-output waveguide, 16-coupling region, 17-tapered gradient region, 18-straight waveguide buffer, 19-rectangular waveguide. DETAILED DESCRIPTION

[0066] Compared to traditional one-to-one fiber optic connections, multimode interference couplers (MMIs) achieve efficient power distribution through the principle of multimode interference, reducing losses caused by connectors and coupling in traditional fiber optic connections and improving optical transmission efficiency. Furthermore, MMIs offer a compact structure that can be integrated at the chip level, significantly reducing system size. Furthermore, their integrated structure is less sensitive to external mechanical vibrations and temperature changes, offering enhanced anti-interference capabilities and reliability, making them particularly suitable for scenarios requiring efficient multi-port optical distribution.

[0067] The present invention proposes an optical link topology suitable for a DC power transmission redundant valve control system, and realizes dual redundancy of the input and output ports of the valve control system by designing a new 5×16 optical beam splitter 3.

[0068] In order to better understand the present invention, the present invention will be further described below with reference to the accompanying drawings and embodiments.

[0069] Example 1:

[0070] An optical link topology suitable for DC transmission redundant valve control system, such as Figure 1 As shown, it includes: a valve control system 1, a mode spot coupler, a first photonic chip and a converter valve connected in sequence, and a second photonic chip connected to the converter valve;

[0071] The valve control system 1 includes a main control board A and a main control board B that form redundant backups, both of which are used to drive the transmitter board to emit optical signals;

[0072] The second photonic chip is connected to the valve control system, and is used to receive the optical power fed back by the converter valve, and divide the fed back optical power into two equal parts, and transmit the divided optical power to the main control board A and the main control board B respectively;

[0073] The spot mode coupler is used to couple the optical signal emitted by the transmitting board and transmit the coupled light to the first photonic chip;

[0074] The first photonic chip is used to divide the input optical power into equal parts, transmit the divided optical power part to the converter valve, and transmit the other part as a return check signal to the main control board A and the main control board B;

[0075] The commutation valve is used to receive the optical power equally divided by the first photonic chip and control the synchronous triggering of the thyristors in the commutation valve.

[0076] like Figure 1 As shown, the present invention provides a photonic chip and an optical link topology system for designing an ultra-high voltage fully redundant valve control system, including a valve control system, a mode spot coupler, a first photonic chip, a second photonic chip and a converter valve. The first photonic chip includes a 5×16 optical beam splitter 3, and the second photonic chip includes: a 1×2 optical beam splitter 6.

[0077] The system operates as follows: The main control system consists of main control boards A and B, forming a redundant backup mechanism to ensure system reliability. Under normal circumstances, main control board A is responsible for primary control tasks, including driving transmitter boards A1 and A2 to emit optical signals. Meanwhile, main control board B serves as a backup controller, maintaining hot standby status. Main control boards A and B monitor each other and automatically take over system control tasks if main control board A fails. The optical signal power emitted by the transmitter board is divided equally by a 5×16 optical splitter 16 times, which controls the synchronous triggering of 13 thyristors 5 on the thyristor electronic board 4 (TE board). Simultaneously, two feedback signals monitor the system's transmission quality in real time. The main control board can adjust the transmitter board's output based on the feedback signals from the MSC. Furthermore, the TE module transmits status information back to the main control system via a feedback link (i.e., the TE feedback link). Based on this feedback, the main control board adjusts the transmit signal in real time to ensure stable system operation. Receiver board 7, consisting of receiver board A and receiver board B, receives optical signal feedback and transmits this information to the corresponding main control boards A and B, implementing closed-loop feedback control. This dual-redundant design ensures the system can maintain normal operation even if a component fails, ensuring high reliability, high performance, and low failure rate. Transmitter board 2 refers to transmitter boards A1, A2, B1, and B2, while receiver board 7 refers to receiver boards A and B.

[0078] The optical link topology includes main control board A, main control board B, mode spot coupler, first photonic chip, second photonic chip, single-mode optical fiber and commutation valve;

[0079] The main control board A includes the transmitting board A1, transmitting board A2 and receiving board A; the main control board B includes the transmitting board B1, transmitting board B2 and receiving board B;

[0080] The first photonic chip includes: a 5×16 optical beam splitter 3 .

[0081] The second photonic chip includes: a 1×2 optical beam splitter 6 .

[0082] The spot coupler includes: a coupling region 16, a tapered gradient region 17, a straight waveguide buffer region 18 and a rectangular waveguide 19 arranged in sequence along the light transmission direction;

[0083] The coupling region 16 and the tapered gradient region 17 are seamlessly connected through a waveguide structure. The tapered gradient region 17 and the straight waveguide buffer region 18 are connected through a smooth transition waveguide structure. The straight waveguide buffer region 18 and the rectangular waveguide 19 are connected by end-face direct coupling.

[0084] The output end of the rectangular waveguide 19 is connected to the first photonic chip, that is, connected to the input end of the 5×16 optical beam splitter.

[0085] The coupling region 16 is used to achieve preliminary coupling between the input optical signal and the waveguide structure. The coupling region 16 and the tapered gradient region 17 are seamlessly connected through the waveguide structure, allowing the optical signal to be transmitted from the coupling region 16 to the tapered gradient region 17 without loss. The tapered gradient region 17 is used to adjust the mode spot size of the optical signal. Through its gradient waveguide structure, the mode spot size of the optical signal is gradually changed to a size suitable for subsequent transmission. The tapered gradient region 17 is connected to the straight waveguide buffer region 18 through a smooth transition waveguide structure, ensuring that the optical signal can be smoothly transmitted to the straight waveguide buffer region 18 after the size adjustment. The straight waveguide buffer region 18 is used to stabilize the transmission state of the optical signal, so that the optical signal reaches a stable transmission condition before entering the rectangular waveguide 19. The straight waveguide buffer region 18 and the rectangular waveguide 19 are connected by end-face direct coupling. The rectangular waveguide 19 is used to output an optical signal in a stable transmission state. The output end of the rectangular waveguide 19 is connected to the first photonic chip, and the optical signal is transmitted to the first photonic chip for subsequent processing.

[0086] After transmitting through a multimode fiber, the optical signal from transmitter board A1 is tapered to achieve low-loss coupling between the multimode fiber and the single-mode fiber. Light entering the single-mode fiber is coupled into the rectangular waveguide 19 via the spot coupler's coupling region 16, the tapered transition region 17, and the straight waveguide buffer 18. The light then enters the first photonic chip, the 5×16 optical beam splitter, virtually lossless. After a tapered transition through the taper structure 13, it enters the interference region 14 of the multimode interference coupler, where it undergoes a self-image effect. The output splits the input optical power into 16 equal parts. The optical signals from 13 of the output ports serve as trigger signals to control the switching of thyristors 5. Two of these signals serve as check signals, along with the TE return link optical signals split by the 1×2 optical beam splitter, and are received by receiver board A and returned to main control board A1. The optical signal links for transmitter boards A2, B1, and B2 are identical, forming a fully redundant multi-link transmission design. This optical link topology monitors the optical output power and signal integrity, ensuring the stability and reliability of the valve control system.

[0087] The spot coupler is located between the optical fiber and the photonic chip, and is used to connect the two and improve the coupling efficiency between the optical fiber and the optical chip. Figure 3The tapered gradient structure 13 is located between the input waveguide 12 and the multimode interference region 14 of the photonic chip, and serves to reduce the optical loss caused by the sudden change in size.

[0088] The standard rectangular waveguide 19 is as follows Figure 2 As shown, the four-layer structure comprises, from bottom to top, a waveguide core layer 8, a silica cladding layer 9, a buried oxide layer 10, and a silicon substrate 11. Made of SOI material, the silicon substrate 11 is 725 μm thick and 1 mm wide. The silica cladding layer 9 has a thickness of 0.55 μm and a refractive index of 1.4447. The waveguide core layer 8 is made of Si, with a thickness of 0.22 μm, a width of 0.5 μm, and a refractive index of 3.5457. Due to the refractive index difference, light is confined to the core layer, where it receives the optical signal passing through the end coupler.

[0089] like Figure 5 As shown, the spot coupler consists of four regions: a coupling region 16, a tapered gradient region 17, a straight waveguide buffer region 18, and a rectangular waveguide 19. The entire waveguide device is 2 mm long, 1 mm wide, and 1.2 mm thick. The total length of the spot coupler is 18 μm, the width is 0.5 μm, and the waveguide length is 9 μm and the width is 0.5 μm. The spot coupler structure is a tapered gradient structure. The entire device can be divided into three regions according to the coupling process: the coupling region 16, the tapered gradient region 17, and the straight waveguide buffer region 18. After passing through the coupling region 16, the light enters the tapered gradient region 17 and then the straight waveguide buffer region 18. The silicon waveguide becomes a standard rectangular silicon waveguide structure and connects to the multimode interference coupler at the rear. The core waveguide thickness of the three regions is 0.22 μm, the length of the coupling region is 392 μm, and the cladding material of the three regions is silicon dioxide.

[0090] The coupling region 16 is the distance between the optical fiber and the mode spot coupler. This distance is called the coupling region, and its function is to match the mode field sizes of the two, thereby reducing optical loss.

[0091] The multimode interference coupler 3 , as the core component of the present invention, is the key to achieving multi-link transmission and full redundancy of the valve control system. It includes: an input waveguide 12 , a tapered transition (Taper) structure 13 , a multimode interference region 14 , and an output waveguide 15 .

[0092] In this embodiment, the multimode interference coupler (MMI) used is a 5×16 multi-input multi-output device, such as Figure 3As shown, it mainly consists of three parts: an input waveguide 12, a multimode interference region 14, and an output waveguide 15. The multimode interference region 14 is 120 μm wide and 5487 μm long. A tapered transition structure (Taper structure) 13 is used to couple the multimode interference region 14 with the input waveguide 12 and the output waveguide 15. The Taper structure 13 achieves smooth mode conversion through a gradually changing geometric shape, which can effectively reduce the coupling loss caused by mode mismatch. In addition, the tapered structure also significantly reduces the reflection and scattering loss of light during propagation, thereby further improving the overall coupling efficiency.

[0093] When the light field enters the multimode interference region from the input waveguide, it excites multiple guided modes within the region, typically more than three. Within the multimode interference region, these guided modes interfere with each other to form self-images, and the light field periodically replicates the light field characteristics of the input waveguide at specific locations within the multimode interference region. By placing output waveguides at specific locations within the self-images, the input light field power can be distributed proportionally. This design, based on the principle of multimode interference, not only achieves high power distribution accuracy but also exhibits excellent flexibility and stability in device integration and manufacturing.

[0094] Figure 6 This is the MMI light field transmission diagram of the multimode interference coupler, which can intuitively observe the 16 equal divisions of the input optical power. Among them, x represents the lateral dimension of the MMI waveguide, z represents the longitudinal dimension, and the spatial distribution of the light spot represents the amplitude or intensity of the light field. Figure 7 This is a simulation result diagram of a tapered tapered structure, where x represents the lateral position of light during transmission, y represents the longitudinal position of light during transmission, and the color mapping represents the intensity of the optical power (red represents high light intensity, corresponding to the darker part of the light transmission process in the figure, and blue represents low light intensity, corresponding to the brighter part of the light transmission process in the figure). By gradually changing the width of the waveguide, the mode matching between different waveguides is smoothly transitioned, reducing the optical loss caused by mode matching, thereby effectively improving the coupling efficiency and enhancing the overall performance of the system.

[0095] The following is an introduction to the manufacturing process of silicon photonic chips:

[0096] Based on actual production conditions, a silicon photonics device with a 5×16 multimode interference (MMI) coupler is fabricated on an SOI (Silicon-On-Insulator) material platform using a mature micro-nanofabrication process. The process includes key steps such as material preparation, photolithography, etching, waveguide formation, and packaging and testing. First, a high-quality SOI wafer is selected as the substrate material. The thickness of the silicon layer and the BOX (buried oxide) layer must be precisely selected according to design requirements to ensure that the waveguide can support the required mode transmission characteristics. After the wafer surface is cleaned, the photolithography process begins. During the photolithography process, photoresist is first evenly coated on the wafer surface. The designed 5×16 MMI device pattern is then transferred onto the photoresist using electron beam lithography or deep ultraviolet lithography. After the pattern transfer is complete, a developer is used to remove the unexposed photoresist, forming a photoresist mask on the wafer surface.

[0097] Next is the etching step, which usually uses reactive ion etching (RIE) technology to perform precise anisotropic etching on the silicon layer, etching the pattern on the photoresist mask into the silicon material, thereby forming the required waveguide structure and MMI area. During the etching process, the etching parameters (such as gas ratio, power, time, etc.) need to be strictly controlled to ensure the smoothness of the waveguide edge and reduce optical loss. After the waveguide structure is completed, the photoresist is removed and further surface treatment is performed as needed, such as passivation, oxide coating, etc., and vapor deposition, such as enhanced chemical vapor deposition (CVD), can also be performed to obtain a silicon dioxide cladding to further optimize the optical properties and improve device performance and stability.

[0098] Finally, the device undergoes a dicing and cleavage process to form individual chips, which are then precisely aligned with optical fibers or other input / output components and packaged. Submicron alignment techniques can be incorporated into the packaging process to minimize coupling losses. The completed device undergoes optical testing and characterization to verify that key performance indicators, such as multimode interference performance, power sharing accuracy, and insertion loss, meet design requirements. The entire process emphasizes high precision and quality control to ensure the reliability and consistency of the 5×16 MMI coupler's performance.

[0099] The present invention provides an optical link topology suitable for a redundant valve control system for direct current transmission, and proposes a design concept of using a 5×16 optical beam splitter as a photonic chip of the valve control system and a core component of the optical link topology. Other embodiments of the valve control system designed based on the above principles or photonic chip devices, obtained without creative work, such as using optical beam splitters of different proportions or changing the configuration of optical beam splitters or using multiple photonic chips in the optical link, all fall within the scope of protection of the present invention.

[0100] The present invention designs an optical link topology suitable for a redundant valve-controlled system for direct current transmission. The topology is based on a multimode interference coupler (MMI) and is designed using a 5×16 optical beam splitter as an example. Other optical link topologies designed based on this principle, such as simply replacing the 5×16 optical beam splitter with optical beam splitters of other ratios, fall within the scope of protection of the present invention without inventive work.

[0101] The present invention effectively solves the fiber optic docking problem and reduces the size of the system by designing a 5×16 optical beam splitter, achieving uniform distribution of optical power, reducing external influences, achieving synchronization of the triggering of the thyristor 5, and improving the reliability and efficiency of the system. Compared with the traditional independent optical fiber triggering method, the optical beam splitter used in this patent can achieve dual redundancy of the input and output ports. Each input and output end has one port as a backup channel, realizing multi-path transmission and redundant backup of signals to enhance the flexibility and fault tolerance of the system. At the same time, two ports are reserved at the output end as return channels to ensure the reliability and maintainability of the system. The design of the self-test function can monitor the status of each channel in real time, such as the optical output power and the integrity of the optical signal. If there is a problem with the optical signal of a certain channel, the self-test function can quickly identify and report the fault, facilitating timely maintenance. The redundant design of the optical coupler ensures that even if part of the optical link fails, the system can still transmit signals through other paths.

[0102] Example 2:

[0103] The present invention based on the same inventive concept further provides a method for optical signal transmission using the optical link topology described above, comprising:

[0104] The valve control system includes: main control board A and main control board B that form redundant backup;

[0105] The optical signal is sent out through the main control board A and the main control board B, coupled by the spot mode coupler, and then enters the first photonic chip;

[0106] The input optical power is equally divided by the first photonic chip to obtain multiple output waveguides, a portion of the multiple output waveguides is transmitted to the converter valve to control the synchronous triggering of the thyristors in the converter valve, and the other portion is transmitted to the main control board A and the main control board B as a feedback signal;

[0107] The output end of the converter valve is connected to the main control board A and the main control board B through the second photonic chip to form a TE feedback link, and the status information is transmitted back to the main control board A and the main control board B through the TE feedback link.

[0108] Optionally, the optical signal is sent out through the main control board A and the main control board B, is coupled through the spot mode coupler, and then enters the photonic chip, including:

[0109] The optical signal emitted by the main control board A and the main control board B is coupled to the optical signal of the optical fiber through the coupling region 16 in turn, the optical signal is mode-converted through the tapered gradient region 17, the transmission mode of the optical signal is stabilized through the straight waveguide buffer 18, and the optical signal is converted into a standard rectangular silicon waveguide structure through the rectangular waveguide 19, and then enters the first photonic chip.

[0110] Optionally, the first photonic chip equally divides the input optical power to obtain a plurality of output waveguides, transmits a portion of the plurality of output waveguides to a converter valve to control synchronous triggering of thyristors in the converter valve, and transmits the other portion as a check signal to main control board A and main control board B, including:

[0111] The input optical power is equally divided by a 5×16 optical beam splitter to obtain 16 output waveguides. Thirteen of the output waveguides are transmitted to the converter valve to control the synchronous triggering of the thyristors in the converter valve. Two of the output waveguides are used to transmit the return signal to the main control board A and the main control board B, and the other output waveguide is used as a backup channel.

[0112] Optionally, the input optical power is equally divided by a 5×16 optical beam splitter to obtain 16 output waveguides, including:

[0113] The optical signal is input through the input waveguide 12 in the 5×16 optical beam splitter, and is sequentially transmitted through the tapered transition structure 13 in the 5×16 optical beam splitter to adjust the optical mode spot and then transmitted to the multimode interference region 14 in the 5×16 optical beam splitter. The optical signal is evenly split using the self-imaging effect to obtain 16 output waveguides.

[0114] Optionally, the output end of the converter valve is connected to the main control board A and the main control board B through the second photonic chip to form a TE feedback link, and the status information is transmitted back to the main control board A and the main control board B through the TE feedback link, including:

[0115] The output end of the converter valve is connected to the receiving board A of the main control board A and the receiving board B of the main control board B through a 1×2 optical splitter to form a TE feedback link;

[0116] The status information is transmitted back to receiving boards A and B through the TE reporting link.

[0117] Below we introduce the manufacturing method of silicon photonic chips, including:

[0118] Select SOI wafer as the substrate material and clean the wafer surface;

[0119] After cleaning, the wafer surface is evenly coated with photoresist. The designed 5×16 MMI device pattern is transferred to the photoresist by electron beam lithography or deep ultraviolet lithography. After the pattern transfer is completed, the unexposed photoresist is removed with a developer to form a photoresist mask on the wafer surface.

[0120] Reactive ion etching (RIE) is used to perform precise anisotropic etching on the silicon layer in the SOI wafer, etching the pattern on the photoresist mask into the silicon material to form the required waveguide structure and MMI region.

[0121] The SOI wafer with the required waveguide structure and MMI region is cut and cleaved to form a silicon photonic chip.

[0122] Based on actual production conditions, a silicon photonics device with a 5×16 multimode interference (MMI) coupler is fabricated on an SOI (Silicon-On-Insulator) material platform using a mature micro-nanofabrication process. The process includes key steps such as material preparation, photolithography, etching, waveguide formation, and packaging and testing. First, a high-quality SOI wafer is selected as the substrate material. The thickness of the silicon layer and the BOX (buried oxide) layer must be precisely selected according to design requirements to ensure that the waveguide can support the required mode transmission characteristics. After the wafer surface is cleaned, the photolithography process begins. During the photolithography process, photoresist is first evenly coated on the wafer surface. The designed 5×16 MMI device pattern is then transferred onto the photoresist using electron beam lithography or deep ultraviolet lithography. After the pattern transfer is complete, a developer is used to remove the unexposed photoresist, forming a photoresist mask on the wafer surface.

[0123] Next is the etching step, which usually uses reactive ion etching (RIE) technology to perform precise anisotropic etching on the silicon layer, etching the pattern on the photoresist mask into the silicon material, thereby forming the required waveguide structure and MMI area. During the etching process, the etching parameters (such as gas ratio, power, time, etc.) need to be strictly controlled to ensure the smoothness of the waveguide edge and reduce optical loss. After the waveguide structure is completed, the photoresist is removed and further surface treatment is performed as needed, such as passivation, oxide coating, etc., and vapor deposition, such as enhanced chemical vapor deposition (CVD), can also be performed to obtain a silicon dioxide cladding to further optimize the optical properties and improve device performance and stability.

[0124] Finally, the device undergoes a dicing and cleavage process to form individual chips, which are then precisely aligned with optical fibers or other input / output components and packaged. Submicron alignment techniques can be incorporated into the packaging process to minimize coupling losses. The completed device undergoes optical testing and characterization to verify that key performance indicators, such as multimode interference performance, power sharing accuracy, and insertion loss, meet design requirements. The entire process emphasizes high precision and quality control to ensure the reliability and consistency of the 5×16 MMI coupler's performance.

[0125] Example 3

[0126] like Figure 8As shown, the present invention also provides an electronic device, which may be a computer, a single-chip microcomputer, a smart mobile device, or the like. The electronic device in this embodiment may include a processor, a memory, a transceiver component, and the like. The memory, processor, and transceiver component are connected via a bus; the memory may be used to store an execution program, which may include instructions; and the processor may be used to execute the instructions stored in the memory. The memory may also be used to store data, which may be accessed and / or modified during the execution of the instructions.

[0127] The processor may be a central processing unit (CPU), or it may be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. It is the computing core and control core of the terminal, which is suitable for implementing one or more instructions, specifically suitable for loading and executing one or more instructions in the storage medium to implement the corresponding method flow or corresponding function, so as to realize the steps of a method for manufacturing a silicon photonic chip in the above embodiment.

[0128] Example 4

[0129] Based on the same inventive concept, the present invention also provides a readable storage medium, specifically an electronic device readable storage medium (Memory), which is a memory device in an electronic device for storing programs and data. It can be understood that the storage medium here can include both built-in storage media in the electronic device and, of course, extended storage media supported by the electronic device. The storage medium provides a storage space, which stores the operating system of the terminal. In addition, one or more instructions suitable for being loaded and executed by the processor are also stored in the storage space. These instructions can be one or more execution programs (including program codes). It should be noted that the storage medium here can be a high-speed RAM memory or a non-volatile memory, such as at least one disk storage. The processor loads and executes one or more instructions stored in the storage medium to implement the steps of a method for manufacturing a silicon photonic chip in the above embodiment.

[0130] It will be understood by those skilled in the art that embodiments of the present invention may be provided as methods, systems, or computer program products. Thus, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0131] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowcharts and / or block diagrams, as well as combinations of processes and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowcharts and / or block diagrams. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0132] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0133] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0134] The above are merely embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention are included in the scope of the claims of the present invention to be approved.

Claims

1. An optical link topology suitable for a DC power transmission redundant valve control system, characterized in that: include: A valve control system, a mode spot coupler, a first photonic chip and a converter valve connected in sequence, and a second photonic chip connected to the converter valve; The valve control system includes a main control board A and a main control board B that form redundant backups, both of which are used to drive the transmitter board to emit optical signals; The second photonic chip is connected to the valve control system, and is used to receive the optical power fed back by the converter valve, and divide the fed back optical power into two equal parts, and transmit the divided optical power to the main control board A and the main control board B respectively; The spot mode coupler is used to couple the optical signal emitted by the transmitting board and transmit the coupled light to the first photonic chip; The first photonic chip is used to divide the input optical power into equal parts, transmit the divided optical power part to the converter valve, and transmit the other part as a return check signal to the main control board A and the main control board B; The commutation valve is used to receive the optical power equally divided by the first photonic chip and control the synchronous triggering of the thyristors in the commutation valve.

2. The optical link topology according to claim 1, wherein: The first photonic chip includes: a 5×16 optical beam splitter; The four input ends of the 5×16 optical beam splitter are connected to the input ends of the main control board A and the main control board B, the 13 output ends are connected to the converter valve, and the two output ends are connected to the receiving board A of the main control board A and the receiving board B of the main control board B respectively; The 5×16 optical beam splitter is used to divide the optical power input from the input end into 16 equal parts, and transmit the divided optical power to the converter valve, receiving board A and receiving board B.

3. The optical link topology according to claim 2, wherein: The second photonic chip includes: a 1×2 optical beam splitter; The input end of the 1×2 optical beam splitter is connected to the converter valve, and the two output ends are connected to the receiving board A and the receiving board B respectively, for receiving the optical power fed back by the converter valve, dividing the optical power into two equal parts, and transmitting the divided optical power to the receiving board A and the receiving board B respectively.

4. The optical link topology according to claim 1, wherein: The pattern spot coupler comprises: a coupling region (16), a tapered gradient region (17), a straight waveguide buffer region (18), and a rectangular waveguide (19) arranged in sequence along the light transmission direction; The coupling region (16) and the tapered gradient region (17) are seamlessly connected via a waveguide structure, the tapered gradient region (17) and the straight waveguide buffer region (18) are connected via a waveguide structure with a smooth transition, and the straight waveguide buffer region (18) and the rectangular waveguide (19) are connected via end-face direct coupling. The coupling region (16) is used to preliminarily couple the input optical signal with the waveguide structure; The tapered gradient region (17) is used to adjust the mode spot size of the optical signal; The straight waveguide buffer (18) is used to stabilize the transmission state of the optical signal so that the optical signal reaches a stable transmission condition before entering the rectangular waveguide; The output end of the rectangular waveguide (19) is connected to the first photonic chip and is used to output an optical signal of a standard rectangular silicon waveguide structure to the first photonic chip.

5. The optical link topology according to claim 2, wherein: The 5×16 optical beam splitter includes an input waveguide (12), a tapered transition structure (13), a multimode interference region (14), and an output waveguide (15); An optical signal is input through the input end of the input waveguide (12), and the optical signal is stably transmitted to the tapered transition structure (13). The optical mode spot is adjusted through the tapered transition structure (13), and the optical signal after the optical mode spot is adjusted is transmitted to the multimode interference region (14). The optical signal after the optical mode spot is adjusted is evenly split by the self-image effect in the multimode interference region (14), and the split optical signal is transmitted to the output waveguide (15).

6. The optical link topology according to claim 5, wherein: The multimode interference region (14) is 120 μm wide and 5487 μm long.

7. The optical link topology according to claim 2, wherein: The converter valve includes a thyristor electronic board and a thyristor; The thyristor is located on the thyristor electronic board and is controlled by the thyristor electronic board; The thyristor electronic board is connected to 13 output terminals of the 5×16 optical beam splitter to trigger the thyristor electronic board; The output end of the thyristor electronic board is connected to the input end of the second photonic chip, and is used to feed back the optical power of the thyristor electronic board to the second photonic chip.

8. The optical link topology according to claim 4, wherein: The rectangular waveguide (19) is a four-layer structure, which comprises, from top to bottom, a waveguide core layer (8), a silicon dioxide cladding layer (9), a buried oxide layer (10) and a silicon substrate (11); The silicon substrate (11) is used as the bottom base of the rectangular waveguide, supporting the buried oxide layer (10), the silicon dioxide cladding layer (9) and the waveguide core layer (8) above; The buried oxide layer (10) is used to isolate the silicon dioxide cladding layer (9) and the silicon substrate (11), confine the light field to be transmitted in the waveguide core layer (8), and prevent light from leaking into the silicon substrate; The silica cladding (9) utilizes the refractive index difference to achieve total reflection confinement of the light field, thereby ensuring low-loss transmission of the light signal in the waveguide core layer (8); The waveguide core layer (8) is used to transmit the optical signal over a long distance with low loss to the first photonic chip.

9. A method for optical signal transmission using the optical link topology according to any one of claims 1 to 8, characterized in that: include: The valve control system includes: main control board A and main control board B that form redundant backup; The optical signal is sent out through the main control board A and the main control board B, coupled by the spot mode coupler, and then enters the first photonic chip; The input optical power is equally divided by the first photonic chip to obtain multiple output waveguides, a portion of the multiple output waveguides is transmitted to the converter valve to control the synchronous triggering of the thyristors in the converter valve, and the other portion is transmitted to the main control board A and the main control board B as a feedback signal; The output end of the converter valve is connected to the main control board A and the main control board B through the second photonic chip to form a TE feedback link, and the status information is transmitted back to the main control board A and the main control board B through the TE feedback link.

10. The method according to claim 9, wherein The optical signal is sent out through the main control board A and the main control board B, is coupled through the spot mode coupler, and then enters the first photonic chip, including: The optical signals sent by the main control board A and the main control board B are coupled to the optical signals of the optical fibers through the coupling region (16) in sequence, the optical signals are mode-converted through the tapered gradient region (17), the transmission mode of the optical signals is stabilized through the straight waveguide buffer (18), and the optical signals are converted into a standard rectangular silicon waveguide structure through the rectangular waveguide (19), and then enter the first photonic chip.

11. The method according to claim 8, wherein The first photonic chip equally divides the input optical power to obtain multiple output waveguides, transmits part of the multiple output waveguides to the converter valve to control the synchronous triggering of the thyristors in the converter valve, and transmits the other part as a return check signal to the main control board A and the main control board B, including: The input optical power is equally divided by a 5×16 optical beam splitter to obtain 16 output waveguides. Thirteen of the output waveguides are transmitted to the converter valve to control the synchronous triggering of the thyristors in the converter valve. Two of the output waveguides are used to transmit the return signal to the main control board A and the main control board B, and the other output waveguide is used as a backup channel.

12. The method according to claim 11, wherein The input optical power is equally divided by a 5×16 optical beam splitter to obtain 16 output waveguides, including: An optical signal is input through an input waveguide (12) in a 5×16 optical beam splitter, and is sequentially transmitted through a tapered transition structure (13) in the 5×16 optical beam splitter to adjust the optical mode spot and then transmitted to a multimode interference region (14) in the 5×16 optical beam splitter. The optical signal is evenly split using a self-image effect to obtain 16 output waveguides.

13. The method according to claim 9, wherein The output end of the converter valve is connected to the main control board A and the main control board B through the second photonic chip to form a TE feedback link, and the status information is transmitted back to the main control board A and the main control board B through the TE feedback link, including: The output end of the converter valve is connected to the receiving board A of the main control board A and the receiving board B of the main control board B through a 1×2 optical splitter to form a TE feedback link; The status information is transmitted back to receiving boards A and B through the TE reporting link.

14. An electronic device, characterized in that: include: at least one processor and memory; The memory and the processor are connected via a bus; The memory is used to store one or more programs; When the one or more programs are executed by the at least one processor, a method for optical signal transmission using an optical link topology according to any one of claims 9 to 13 is implemented.

15. A readable storage medium, characterized in that An execution program is stored thereon, and when the execution program is executed, a method for optical signal transmission using an optical link topology according to any one of claims 9 to 13 is implemented.

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