Etching method of resistive random access memory

By removing the organic film layer during the resistive random access memory etching process and using argon-containing gas and pulse mode for lower electrode power control, the problem of residual byproducts on the sidewalls of the metal iridium film layer was solved, thereby improving the product yield.

CN120751924APending Publication Date: 2025-10-03BEIJING INTEGRATED CIRCUIT EQUIPMENT INNOVATION CENTER CO LTD
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Patent Information

Application Number
CN202510812884.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-17
Publication Date
2025-10-03

AI Technical Summary

Technical Problem

In the existing resistive random access memory etching process, byproducts are easily left on the sidewalls of the metal iridium film layer, causing device failure and reducing product yield.

Method used

The organic film layer is removed before etching the metal iridium film layer, and argon-containing gas and pulse mode lower electrode power control are used to avoid the adhesion of by-products. The etching process is optimized by controlling the chamber pressure and gas composition.

Benefits of technology

It effectively improves the sidewall morphology of the metal iridium film layer, avoids device failure, and improves product yield.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides an etching method of a resistive random access memory. The etching method of the resistive random access memory comprises the following steps: providing a preset substrate; wherein the preset substrate comprises an organic film layer, a medium anti-reflection layer and a metal iridium film layer which are sequentially arranged from top to bottom; an organic film layer removal step: before the metal iridium film layer is etched, introducing oxygen-containing gas into the chamber so as to etch and remove the organic film layer; a metal iridium film layer etching step: controlling a lower electrode power application mode to be a pulse mode, introducing a first etching gas into the chamber, and etching the metal iridium film layer by taking the etched dielectric anti-reflection layer as a mask until a next film layer is exposed; wherein the first etching gas comprises argon-containing gas, and the first etching gas does not comprise chlorine-containing gas. According to the method, more byproducts generated during etching can be prevented from being attached to the side wall, the shape of the side wall of the metal iridium film layer after etching can be effectively improved, device failure is avoided, and the product yield is improved.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to an etching method for a resistive random access memory. Background Art

[0002] With the rapid development of computer technology, the requirements for memory read speed and access capacity are becoming increasingly higher. Traditional fast flash memory, due to its inherent limitations, can no longer meet the needs of the rapid development of integrated circuit technology. On the one hand, the programming voltage cannot be reduced proportionally, and on the other hand, as device size decreases, the tunnel oxide layer becomes thinner, and the charge retention performance decreases. Currently, research on new memory technologies is gaining increasing attention, and research on resistive random access memory (RRAM) technology, which changes the material resistance, has gradually become a focus. RRAM uses metal oxide as the storage medium. By changing the voltage applied to the metal oxide layer, the memory switches between high and low resistance states, thereby enabling data erasing and writing, opening or blocking current channels, and storing data. RRAM has the remarkable characteristics of high speed, low power consumption, and low cost.

[0003] The basic memory cell of a resistive random access memory (RRAM) consists of a top electrode, a resistive switching layer, and a bottom electrode. The voltage-dependent resistance of the resistive switching layer is key to achieving resistance switching in RRAM. During the RRAM resistive switching process, the top electrode may participate in redox reactions (such as the migration of oxygen ions in the RRAM) for extended periods, leading to device failure. Therefore, a barrier layer is required between the top electrode and the RRAM to improve device lifespan. Iridium (IR) is commonly used as a barrier layer between the top electrode and the RRAM due to its stable chemical properties, excellent oxidation resistance, corrosion resistance, and high-temperature resistance.

[0004] In the relevant resistive random access memory etching process, when etching the metal iridium film layer, an etching gas including argon and chlorine-containing gas is usually used to continuously etch the metal iridium. However, after the argon gas bombards the highly dense iridium into small particles of iridium, it is easy to form Ir-Cl compounds with chlorine and accumulate on the side walls, which will be difficult to remove later. After the etching is completed, there are usually a large amount of residues on the side walls of the metal iridium film layer and the film layers above and below it. In addition, during etching, the organic film layer above the metal iridium film layer is easily mixed with the by-products produced by etching the metal iridium, resulting in an increase in polymers on the side walls, which can easily lead to device failure and reduce product yield. Summary of the Invention

[0005] In view of this, the purpose of the present invention is to provide an etching method for resistive random access memory, which can avoid the generation of a large number of by-products adhering to the side walls during etching, effectively improve the side wall morphology of the metal iridium film layer after etching, avoid device failure, and improve product yield.

[0006] In order to achieve the above objectives, the technical solutions adopted in the embodiments of the present invention are as follows:

[0007] In a first aspect, an embodiment of the present invention provides an etching method for a resistive random access memory, comprising:

[0008] Providing a preset substrate; wherein the preset substrate comprises an organic film layer, a dielectric anti-reflection layer and a metal iridium film layer arranged in sequence from top to bottom;

[0009] an organic film layer removal step, before etching the metal iridium film layer, introducing an oxygen-containing gas into the chamber to etch and remove the organic film layer;

[0010] In the metal iridium film layer etching step, the power application mode of the lower electrode is controlled to be in pulse mode, a first etching gas is introduced into the chamber, and the metal iridium film layer is etched using the etched dielectric anti-reflection layer as a mask until the next film layer is exposed; wherein, the first etching gas includes argon-containing gas, and the first etching gas does not include chlorine-containing gas.

[0011] Furthermore, an embodiment of the present invention provides a first possible implementation of the first aspect, wherein the first etching gas further includes a bromine-containing gas, a nitrogen-containing gas, and an oxygen-containing gas.

[0012] Furthermore, an embodiment of the present invention provides a second possible implementation of the first aspect, wherein, in the metal iridium film etching step, the duty cycle of the plasma in the pulse mode is 15% to 30%.

[0013] Furthermore, an embodiment of the present invention provides a third possible implementation of the first aspect, wherein, in the metal iridium film layer etching step, the pressure control valve controlling the chamber is in a fully open mode.

[0014] Furthermore, an embodiment of the present invention provides a fourth possible implementation of the first aspect, wherein the predetermined substrate further includes a patterned photoresist layer and an organic anti-reflection layer, the photoresist layer is located above the organic film layer, and the organic anti-reflection layer is located between the photoresist layer and the organic film layer; and before the organic film layer removal step, the resistive random access memory etching method further includes:

[0015] In the organic anti-reflection layer etching step, the power application mode of the lower electrode is controlled to be a pulse mode, a fluorine-containing gas is introduced into the chamber, and the organic anti-reflection layer is etched using the patterned photoresist layer as a mask until the organic film layer is exposed.

[0016] Furthermore, an embodiment of the present invention provides a fifth possible implementation of the first aspect, wherein, after the organic anti-reflective layer etching step, the resistive random access memory etching method further includes:

[0017] In the organic film layer etching step, oxygen-containing gas is introduced into the chamber, and the organic film layer is etched using the organic anti-reflection layer as a mask until the dielectric anti-reflection layer is exposed.

[0018] Furthermore, an embodiment of the present invention provides a sixth possible implementation of the first aspect, wherein, before the organic film layer removal step, the method further includes:

[0019] In the dielectric anti-reflection layer etching step, fluorine-containing gas and carbon-containing gas are introduced into the chamber, and the dielectric anti-reflection layer is etched using the etched organic film layer as a mask until the next film layer is exposed.

[0020] Furthermore, an embodiment of the present invention provides a seventh possible implementation of the first aspect, wherein the predetermined substrate further includes a top electrode layer, the top electrode layer being located between the dielectric anti-reflection layer and the metal iridium film layer, and before the organic film layer removal step, further comprising:

[0021] In the top electrode layer etching step, chlorine-containing gas is introduced into the chamber, and the top electrode layer is etched using the etched organic film layer as a mask until the metal iridium film layer is exposed.

[0022] Furthermore, an embodiment of the present invention provides an eighth possible implementation manner of the first aspect, wherein the preset substrate further includes a resistive switching layer, the resistive switching layer is located below the metal iridium film layer, and after the metal iridium film layer etching step, the method further includes:

[0023] In the resistive switching layer etching step, chlorine-containing gas is introduced into the chamber, and the resistive switching layer is etched using the etched dielectric anti-reflection layer as a mask until the next film layer is exposed.

[0024] Furthermore, an embodiment of the present invention provides a ninth possible implementation of the first aspect, wherein the predetermined substrate further includes a bottom electrode layer and an etch stop layer, and after the resistive layer etching step, further comprising:

[0025] In the bottom electrode layer etching step, chlorine-containing gas is introduced into the chamber, and the bottom electrode layer is etched using the dielectric anti-reflection layer as a mask until the etch stop layer is exposed.

[0026] An embodiment of the present invention provides an etching method for a resistive random access memory, which includes: providing a preset substrate; wherein the preset substrate includes an organic film layer, a dielectric anti-reflection layer, and a metal iridium film layer arranged in sequence from top to bottom; an organic film layer removal step, before etching the metal iridium film layer, introducing an oxygen-containing gas into a chamber to etch and remove the organic film layer; a metal iridium film layer etching step, controlling the power application mode of the lower electrode to be in a pulse mode, introducing a first etching gas into the chamber, and etching the metal iridium film layer using the etched dielectric anti-reflection layer as a mask until the next film layer is exposed; wherein the first etching gas includes an argon-containing gas, and the first etching gas does not include a chlorine-containing gas. The present invention removes the organic film layer above the metal iridium film layer before etching the metal iridium film layer, thereby avoiding the increase of polymer on the side wall due to the mixing of the organic film layer and the by-products generated by etching the metal iridium film layer. When etching the metal iridium film layer, argon-containing gas is introduced into the chamber instead of chlorine-containing gas, and the power application mode of the lower electrode is controlled to be in a pulse mode. This can avoid the generation of a large number of by-products adhering to the side wall during etching, effectively improve the side wall morphology of the metal iridium film layer after etching, avoid device failure, and improve product yield.

[0027] Other features and advantages of the embodiments of the present invention will be described in the following description, or some features and advantages can be inferred or determined without doubt from the description, or can be learned by implementing the above-mentioned technologies of the embodiments of the present invention.

[0028] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0030] Figure 1 A flow chart of an etching method for a resistive random access memory provided by an embodiment of the present invention is shown;

[0031] Figure 2a A schematic diagram of a preset base structure provided by an embodiment of the present invention is shown;

[0032] Figure 2b to Figure 2i The etching flow chart of an iridium-containing resistive random access memory provided by an embodiment of the present invention is shown;

[0033] Figure 3aThe figure shows the morphology of the basic memory cell after etching using the etching technology of the related resistive random access memory;

[0034] Figure 3b The figure shows the topography of a basic memory cell after etching using the etching method of the resistive random access memory provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0035] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be described below with reference to the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.

[0036] Currently, iridium metal is difficult to etch using both wet and dry etching. Resistive random access memory (RRAM) etching techniques typically employ a gaseous chemical mixture of Ar, O2, and Cl to continuously etch iridium. The Cl gas component can be replaced by BCl, CCl4, SiCl4, or a combination thereof. The total gas flow rate is approximately between 20 sccm and 100 sccm, with a preferred range of approximately 40 sccm to 70 sccm. The process pressure is maintained at approximately 1 mtorr. The top electrode power is approximately between 400 W and 1000 W, and the substrate RF bias power is approximately between 10 W and 1000 W. However, experiments have shown that after Ar bombards the highly dense iridium into small particles, they easily react with chlorine to form Ir-Cl compounds that accumulate on the sidewalls and cannot be removed later. Continuous etching of iridium causes IR-containing byproducts to adhere to the sidewalls, leading to device failure. Furthermore, using the organic film as a mask to etch the iridium film, and using a high bottom electrode power during etching, the carbon-containing polymers in the organic film mix with the byproducts of etching the IR, leading to an increase in polymer buildup on the top electrode sidewalls. Consequently, current IR-containing RRAMs are prone to significant residue buildup on the top electrode, IR layer, and resistive switching layer sidewalls after the etching process, leading to device failure and near-zero wafer yield.

[0037] In order to improve the above problems, an embodiment of the present invention provides an etching method for a resistive random access memory, which is described in detail below.

[0038] This embodiment provides a resistive random access memory etching method, see Figure 1 The etching method flow chart of the resistive random access memory shown in FIG. 1 mainly includes the following steps:

[0039] Step S102, providing a preset substrate;

[0040] See for example Figure 2a The schematic diagram of the preset substrate structure shown in FIG. 1 includes an organic film layer 23 , a dielectric anti-reflection layer 24 and a metal iridium film layer 26 arranged in sequence from top to bottom.

[0041] Step S104, an organic film layer removal step, before etching the metal iridium film layer, introducing an oxygen-containing gas into the chamber to etch and remove the organic film layer;

[0042] Since IR etching requires high bottom electrode power, if the organic film layer is used as a mask layer for IR etching, its carbon polymer will mix with the byproducts produced by IR etching, resulting in an increase in sidewall polymer. To avoid the organic film layer and the byproducts produced by etching the metal iridium film during the etching process, which will cause an increase in sidewall polymer, the upper organic film layer is removed before etching the metal iridium film layer.

[0043] The main components of the organic film layer are C and O. An oxygen-containing gas is introduced into the chamber, reacting with C to produce gases such as CO and CO2, which are then discharged from the chamber. During the etching of the organic film layer, the chamber pressure is controlled at 3-10 mT, the upper electrode power is controlled at 500-800 W, and the lower electrode power is controlled at 50-100 W. The lower electrode power is applied in a continuous wave (CW) mode. The upper electrode power current density is distributed at 0.4-0.6, and the etching time is 70-100 seconds. In one embodiment, 100-300 sccm O2 and 50-100 sccm N2 can be introduced into the chamber as the primary etching gases.

[0044] Step S106, etching the metal iridium film layer, controlling the power application mode of the lower electrode to be in pulse mode, introducing the first etching gas into the chamber, and etching the metal iridium film layer using the etched dielectric anti-reflection layer as a mask until the next film layer is exposed;

[0045] Iridium films serve as high-temperature stable electrodes, oxygen diffusion barriers, and interface optimization layers in resistive random access memory (RRAM). Their combined performance advantages (high melting point, low oxygen permeability, and high conductivity) significantly enhance RRAM durability and anti-interference capabilities. Selecting the appropriate etching gas for the iridium film is crucial for preventing IR byproducts from adhering to the sidewalls and improving product yield.

[0046] When etching the metal iridium film layer, the first etching gas introduced includes argon-containing gas, Ar is used as the main etching gas, Ar bombards the highly dense iridium into small particles of iridium, and the first etching gas does not include chlorine-containing gas to prevent the metal iridium and chlorine from forming Ir-Cl compounds that accumulate on the side walls.

[0047] During the etching process, the upper electrode power is controlled to be 300-500W, the lower electrode power is controlled to be 250-350W, the upper electrode power current density is distributed to be 0.4-0.6, and the etching time is related to the thickness of the metal iridium film layer, for example, it can be 15-25 seconds. In one embodiment, the argon-containing gas introduced is Ar, and 200-300 sccm of Ar is introduced into the chamber as the main etching gas. Iridium atoms are stripped by high-energy bombardment, achieving layer-by-layer atomic-level removal.

[0048] In one embodiment, the first etching gas provided in this embodiment further includes a bromine-containing gas, a nitrogen-containing gas, and an oxygen-containing gas.

[0049] The bromine-containing gas can be HBr. As an active etching gas, the bromine-containing gas generates iridium bromide through chemical reaction, which can assist physical sputtering to increase the etching rate of the metal iridium film layer; the nitrogen-containing gas can be nitrogen, which is used as a passivation protection gas to suppress lateral etching and improve anisotropy; the oxygen-containing gas can be oxygen, which is used as a residue removal and plasma enhancement gas. Oxygen plasma can activate the etching surface and increase the chemical activity of HBr.

[0050] In one embodiment, in the first etching gas, argon-containing gas is used as the main etching gas, the flow ratio of argon-containing gas may be 70%-90%, and the flow ratio of bromine-containing gas, nitrogen-containing gas and oxygen-containing gas may be 2%-20%.

[0051] In one embodiment, 200-300 sccm Ar, 30-80 sccm N2, 20-50 sccm HBr, and 10-30 sccm O2 may be introduced into the chamber.

[0052] In one embodiment, in the metal iridium film etching step provided in this embodiment, the power application mode of the lower electrode power can be a new pulse mode, the plasma duty cycle is 15% to 30%, and the pulse frequency is 200 Hz. By controlling the power application mode of the lower electrode power to be a pulse mode, the energy of the plasma can be reduced. On the one hand, continuous high-power etching can be avoided to cause IR sputtering to the side wall. In the pulse-off stage, the by-products can be removed in time through the exhaust system to avoid re-deposition. On the other hand, the etching uniformity and selectivity can be improved. During the IR etching process, the pulse energy can peel off the material layer by layer, reducing the surface roughness caused by continuous etching. By matching the pulse parameters with the material reaction threshold, the etching selectivity ratio of the IR film layer to the hard mask can be improved.

[0053] In one embodiment, during the iridium film etching step provided in this embodiment, the chamber's pressure control valve is controlled to be fully open. By fully opening the chamber's pressure control valve (i.e., the exhaust valve of the exhaust system), the chamber pressure can be kept low, allowing the exhaust system to promptly remove byproducts, preventing redeposition and thereby reducing polymer adhesion on the sidewalls.

[0054] The etching method for the resistive random access memory provided in this embodiment removes the organic film layer above the metal iridium film layer before etching the metal iridium film layer, thereby preventing the organic film layer from mixing with the byproducts produced by etching the metal iridium film layer during etching, thereby preventing an increase in polymer on the sidewalls. When etching the metal iridium film layer, argon-containing gas is introduced into the chamber instead of chlorine-containing gas, and the power application mode of the lower electrode is controlled in a pulse mode. This can prevent a large number of byproducts from adhering to the sidewalls during etching, effectively improve the sidewall morphology of the metal iridium film layer after etching, avoid device failure, and improve product yield.

[0055] like Figure 2a As shown, the preset substrate provided in this embodiment further includes a patterned photoresist layer 21, an organic anti-reflection layer 22, a top electrode layer 25, a resistive layer 27, a bottom electrode layer 28 and an etch stop layer 29 arranged in sequence from top to bottom.

[0056] In one embodiment, the etching method provided in this embodiment further includes:

[0057] The photoresist layer etching step primarily utilizes a mixture of oxygen and inert gases to laterally etch the patterned photoresist layer to adjust critical dimensions. During the etching process, the chamber pressure is controlled at 8-15 mT. Because excessive top electrode power can significantly consume photoresist, resulting in insufficient masking during subsequent etching, the top electrode power is set at 300-600W. No bottom electrode power is used to reduce photoresist consumption. The top electrode power current density is distributed between 0.3-0.7. In one embodiment, 15-30 sccm of O₂ can be introduced into the chamber as the main etching gas, and 100-200 sccm of N₂ can be introduced as the dilution and passivation gas. The etching time is 10-30 seconds.

[0058] In one embodiment, before the organic film layer removal step, the etching method provided in this embodiment further includes:

[0059] In the organic anti-reflection layer etching step, the power application mode of the lower electrode is controlled to be a pulse mode, a fluorine-containing gas is introduced into the chamber, and the organic anti-reflection layer is etched using the patterned photoresist layer as a mask until the organic film layer is exposed.

[0060] The main components of the organic anti-reflection layer are C, N and Si (14% to 40%). Fluorine-containing gas is introduced into the chamber as the main etching gas. The main reaction between the fluorine-containing gas and the organic anti-reflection layer is:

[0061] Si+4F→SiF4↑

[0062] During the etching process, process parameters used may include: chamber pressure of 10-15 mT; upper electrode power of 500-700 W; lower electrode power of 50-100 W; and etching time related to the thickness of the organic anti-reflective layer, such as 30-50 seconds. In a specific embodiment, 50-100 sccm of CF4 and 50-100 sccm of CHF3 can be introduced into the chamber as the main etching gas, with the CF4 flow ratio ranging from 20% to 80%. The critical dimension can be improved by adjusting the CF4 / CHF3 ratio. 60-100 sccm of N2 gas is introduced into the chamber as a dilution gas to remove byproducts generated during the etching process.

[0063] In one embodiment, during the etching process of the organic anti-reflective layer, the power application method of the lower electrode power can be a new pulse mode (Pulse), with a plasma duty cycle of 15% to 30% and a pulse frequency of 100 Hz. This can reduce the energy of the plasma, reduce the dissociation of molecules in the plasma, reduce its chemical molecular activity, reduce the thickness of the graphite-like layer on the surface of the photoresist, and also reduce the consumption of the photoresist, thereby optimizing the line width roughness.

[0064] In one embodiment, after the organic anti-reflective layer etching step, the etching method provided in this embodiment further includes:

[0065] In the organic film layer etching step, oxygen-containing gas is introduced into the chamber, and the organic film layer is etched using the organic anti-reflection layer as a mask until the dielectric anti-reflection layer is exposed.

[0066] The main components of the organic film layer are C and O. The photoresist layer, organic anti-reflection layer and organic film layer form a famous sandwich structure. This is mainly to solve the problem of inability to accurately transfer patterns when the photoresist thickness is insufficient. During the etching process, oxygen-containing gas is introduced into the chamber as the main etching gas to etch the organic film layer. The etching reaction is:

[0067] C+O2→CO2↑

[0068] 2C+O2→2CO↑

[0069] During the etching process, the process parameters of the chamber can be set to: chamber pressure 3-10mT; upper electrode power 300-600W; lower electrode power 100-300W, and the power application mode of the lower electrode power is continuous wave (CW); the upper electrode power current density distribution is 0.3-0.7, and the process time is related to the thickness of the organic film layer, such as 50-80s.

[0070] In one embodiment, 90-150 sccm of oxidizing gas O2 may be introduced into the chamber as a main etching gas; 30-80 sccm of N2, HBr, and Cl2 may be introduced into the chamber as passivation gases to adjust the angle of the organic film layer.

[0071] In one embodiment, before the organic film layer removal step, the etching method provided in this embodiment further includes:

[0072] In the dielectric anti-reflection layer etching step, fluorine-containing gas and carbon-containing gas are introduced into the chamber, and the dielectric anti-reflection layer is etched using the etched organic film layer as a mask until the next film layer is exposed.

[0073] The dielectric anti-reflection layer is mainly used as a hard mask layer for etching iridium and a stop layer for chemical mechanical polishing. During the etching process, fluorine-containing gas and carbon-containing gas are introduced into the chamber as the main etching gas. The etching reaction is as follows:

[0074] SiO2+4F→SiF4↑+O2↑

[0075] SiO2+2CF2→SiF4↑+2CO↑

[0076] During the etching process, the process parameters of the chamber can be set to: chamber pressure 3-10mT; upper electrode power 400-700W; lower electrode power 80-160W, and the power application mode of the lower electrode power is continuous wave (CW); upper electrode power current density distribution (i.e. current ratio) is 0.3-0.8; process time is related to the thickness of the dielectric anti-reflection layer, such as 30-50s.

[0077] In one embodiment, 80-120 sccm CF4 and 20-40 sccm CHF3 may be introduced into the chamber as main etching gases; and 80-120 sccm He may be introduced as a dilution gas.

[0078] In one embodiment, before the organic film layer removal step, the etching method provided in this embodiment further includes:

[0079] In the top electrode layer etching step, chlorine-containing gas is introduced into the chamber, and the top electrode layer is etched using the etched organic film layer as a mask until the metal iridium film layer is exposed.

[0080] The top electrode layer, as the upper electrode structure of the resistive random access memory, not only serves as the physical interface for voltage input, but also directly affects the performance of the resistive random access memory through material properties and electrical design. During the etching process, chlorine-containing gas is introduced into the chamber as the main etching gas. The generated plasma can react with TiN, the main component of the electrode, and ultimately generate volatile TiCl4 and N2, which are extracted by the vacuum pump. The etching reaction is as follows:

[0081] Ti3N4+6Cl2→3TiCl4↑+2N2↑

[0082] During the etching process, the process parameters of the chamber can be set to: chamber pressure 5-10mT; upper electrode power 600-800W; lower electrode power 60-100W, and the power application mode of the lower electrode power is continuous wave (CW); upper electrode power current density distribution is 0.4-0.6; process time is related to the thickness of the top electrode layer, such as 25-40s.

[0083] In one embodiment, 150-100 sccm Cl2 can be introduced into the chamber as the main etching gas, and 30-50 sccm CH4 can be introduced as the etching protection gas. Under the action of plasma, CH4 can react with substances such as Ti and O in the chamber to generate non-volatile by-products that adhere to the side walls of the metal hard mask, thereby protecting the side walls of the metal hard mask and preventing the metal hard mask from lateral depression. 50-100 sccm Ar can also be introduced as a dilution and bombardment gas.

[0084] In one embodiment, after the metal iridium film layer etching step, the etching method provided in this embodiment further includes:

[0085] In the resistive layer etching step, chlorine-containing gas is introduced into the chamber, and the resistive layer is etched using the etched dielectric anti-reflection layer as a mask until the next film layer is exposed.

[0086] The resistive switching layer plays a key role in the reversible conversion of resistance states and is the physical basis for data storage. During the etching process, chlorine-containing gas is introduced into the chamber as the main etching gas. The generated plasma reacts with Ta2O5 to produce volatile TaCl5 and O2, which are pumped away. The chlorine-containing gas can include Cl2 and BCl3. The etching reaction is as follows:

[0087] 2Ta2O5+10Cl2→4TaCl5↑+5O2↑

[0088] 3Ta2O5+10BCl3→6TaCl5↑+5B2O3↑

[0089] During the etching process, the process parameters of the chamber can be set to: chamber pressure 5-10mT; upper electrode power 600-800W; lower electrode power 70-100W, and the power application mode of the lower electrode power is continuous wave (CW); upper electrode power current density distribution is 0.4-0.6; process time is related to the thickness of the resistive layer, such as 15-30s.

[0090] In one embodiment, 80-100 sccm Cl2 can be introduced into the chamber as the main etching gas, and 100-150 sccm BCl3 can be introduced as a gas to remove oxygen impurities and improve reaction efficiency. The generated plasma reacts with Ta2O5, and finally generates volatile TaCl5 and B2O3, which are pumped away. In addition, the Cl- free radicals generated by the decomposition of BCl3 can enhance the chemical activity of Cl2 and improve the overall etching rate. 50-100 sccm Ar is introduced as a dilution and bombardment gas to remove the passivation layer and enhance the plasma stability.

[0091] In one embodiment, after the resistive layer etching step, the etching method provided in this embodiment further includes:

[0092] In the bottom electrode layer etching step, chlorine-containing gas is introduced into the chamber, and the bottom electrode layer is etched using the dielectric anti-reflection layer as a mask until the etch stop layer is exposed.

[0093] The bottom electrode layer, as the lower electrode structure of the resistive random access memory, is the ground terminal of the circuit. It applies an electric field together with the top electrode layer to drive ion migration and defect recombination within the resistive random access layer. During the etching process, chlorine-containing gas is introduced into the chamber as the main etching gas. The generated plasma can react with TaN, the main component of the electrode, to produce volatile TaCl5 and N2, which are pumped away. The etching reaction is as follows:

[0094] 2TaN+5Cl2→2TaCl5↑+N2↑

[0095] During the etching process, the process parameters of the chamber can be set to: chamber pressure 8-12mT; upper electrode power 500-700W; lower electrode power 60-100W, and the power application mode of the lower electrode power is continuous wave (CW); upper electrode power current density distribution is 0.4-0.6; process time is related to the thickness of the bottom electrode layer, such as 15-20s.

[0096] In one embodiment, 150-200 sccm Cl2 can be introduced into the chamber as the main etching gas, and 20-40 sccm BCl3 can be introduced as the etching reaction gas. BCl3 can neutralize the surface charge and reduce plasma damage. The byproducts containing B form a protective layer on the sidewall, inhibiting lateral etching and improving anisotropy. 100-200 sccm Ar can also be introduced into the chamber as a dilution and bombardment gas.

[0097] The etching method for the resistive random access memory provided in this embodiment optimizes the etching process menu and adopts a hard mask layer when etching IR to avoid mixing the carbon polymer in the organic film layer with the byproducts generated by etching IR, which leads to an increase in the sidewall polymer. By adopting an advanced pulse mode when etching IR, the energy of the plasma can be reduced, which not only avoids continuous high-power etching that causes IR and its byproducts to be sputtered onto the sidewall, but also can timely remove the byproducts through the exhaust system during the pulse-off stage to avoid re-deposition, and also can improve the etching uniformity and selectivity. By adopting a pressure control mode and a fully open pressure control valve mode when etching IR, it can be ensured that the byproducts generated by the reaction can be efficiently removed. The comprehensive optimization in various aspects can effectively remove the IR-containing byproducts and obtain a clean sidewall after etching, thereby improving the device performance and the product yield.

[0098] Based on the above embodiment, this embodiment provides an example of applying the above etching method for resistive random access memory to etch an iridium-containing resistive random access memory. The steps are as follows:

[0099] Step 1: Photoresist layer etching step. During the etching process, the chamber pressure is controlled at 8-15mT; the upper electrode power is 300-600W; there is no lower electrode power; the upper electrode power current density is distributed at 0.3-0.7; 15-30sccm O2 is introduced into the chamber as the main etching gas, and 100-200sccm N2 is introduced as the dilution gas and passivation gas; the etching time is 10-30s.

[0100] See for example Figure 2a As shown in the schematic structural diagram of the preset substrate, the photoresist layer 21 is laterally etched using a mixed gas of oxygen and inert gas to adjust the critical dimension.

[0101] Step 2, organic anti-reflection layer etching step, see Figure 2b to Figure 2i In the etching flow chart of the iridium-containing resistive random access memory, the organic anti-reflection layer 22 is etched using the patterned photoresist layer 21 as a mask until the organic film layer 23 is exposed.

[0102] During the etching process, the process parameters are set as follows: chamber pressure 10-15mT; upper electrode power 500-700W; lower electrode power 50-100W, the power application mode of the lower electrode power can be a new pulse mode (Pulse), the plasma duty cycle is 15% to 30%, and the pulse frequency is 100Hz; the etching time is 30-50s; 50-100sccm CF4 and 50-100sccm CHF3 are introduced into the chamber as the main etching gas, and 60-100sccm N2 gas is introduced into the chamber as a dilution gas to remove by-products generated during the etching process.

[0103] Step 3, organic film layer etching step, such as Figure 2c As shown, the organic film layer 23 is etched using the organic anti-reflection layer 22 as a mask until the dielectric anti-reflection layer 24 is exposed. The photoresist layer 21 is consumed when etching the organic film layer 23 .

[0104] During the etching process, the process parameters are set as follows: chamber pressure 3-10mT; upper electrode power 300-600W; lower electrode power 100-300W, and the power application mode of the lower electrode power is continuous wave (CW); the upper electrode power current density distribution is 0.3-0.7, and the process time is 50-80s; 90-150sccm of oxidizing gas O2 is introduced into the chamber as the main etching gas; 30-80sccm of N2, HBr and Cl2 are introduced as passivation gases to adjust the angle of the organic film layer.

[0105] Step 4, dielectric anti-reflection layer etching step, such as Figure 2d As shown, the dielectric anti-reflection layer 24 is etched using the organic film layer 23 as a mask until the top electrode layer 25 is exposed.

[0106] During the etching process, the process parameters are set as follows: chamber pressure 3-10mT; upper electrode power 400-700W; lower electrode power 80-160W, and the power application mode of the lower electrode power is continuous wave (CW); upper electrode power current density distribution (i.e., current ratio) is 0.3-0.8; process time is 30-50s; 80-120sccm CF4 and 20-40sccm CHF3 are introduced into the chamber as main etching gases; 80-120sccm He is introduced as a dilution gas.

[0107] Step 5, top electrode layer etching step, such as Figure 2e As shown, the top electrode layer 25 is etched using the organic film layer 23 as a mask until the metal iridium film layer 26 is exposed.

[0108] During the etching process, the process parameters are set as follows: chamber pressure 5-10mT; upper electrode power 600-800W; lower electrode power 60-100W, and the power application mode of the lower electrode power is continuous wave (CW); the upper electrode power current density distribution is 0.4-0.6; the process time is 25-40s; 150-100sccm Cl2 is introduced into the chamber as the main etching gas, and 30-50sccm CH4 is introduced as the etching protection gas. Under the action of plasma, CH4 can react with Ti and O and other substances in the chamber to generate non-volatile by-products that adhere to the side walls of the metal hard mask, thereby protecting the side walls of the metal hard mask and preventing the metal hard mask from lateral depression; 50-100sccm Ar is introduced as a dilution and bombardment gas.

[0109] Step 6, organic film removal step, such as Figure 2f As shown, the organic film layer 23 is removed by etching.

[0110] Since IR etching requires high bottom electrode power, if an organic film layer is used as a mask layer for IR etching, its carbon polymer will mix with the byproducts produced by IR etching, resulting in an increase in sidewall polymer. Therefore, the organic film layer is removed before IR etching. During the etching process, the process parameters are set as follows: chamber pressure is 3-10mT, the top electrode power is controlled at 500-800W, the bottom electrode power is 50-100W, and the bottom electrode power is applied in a continuous wave (CW) mode; the top electrode power current density is distributed at 0.4-0.6; the etching time is 70-100s; 100-300sccm O2 and 50-100sccm N2 are introduced into the chamber as the main etching gases.

[0111] Step 7, the metal iridium film layer etching step, such as Figure 2g As shown, the metal iridium film layer 26 is etched using the dielectric anti-reflection layer 24 as a mask until the resistive switching layer 27 is exposed.

[0112] During the etching process, the process parameters are set as follows: the upper electrode power is 300-500W, the lower electrode power is 250-350W, the power application mode of the lower electrode power is a new pulse mode (Pulse), the plasma duty cycle is 15% to 30%, the pulse frequency is 200Hz, the upper electrode power current density distribution is 0.4-0.6, and the etching time is 15-25s; 200-300sccm Ar is introduced as the main etching gas, and iridium atoms are stripped by high-energy bombardment to achieve layer-by-layer atomic-level removal; 30-80sccm N2 gas is introduced as a passivation protection gas to inhibit lateral etching and improve anisotropy; 20-50sccm HBr gas is introduced as an active etching gas to generate iridium bromide through chemical reaction, assisting physical sputtering to improve the etching rate; 10-30sccm O2 is introduced as a residue removal and plasma enhancement gas, and oxygen plasma can activate the etching surface and improve the chemical activity of HBr.

[0113] Step 8, resistive layer etching step, such as Figure 2h As shown, the resistive layer 27 is etched using the dielectric anti-reflection layer 24 as a mask until the bottom electrode layer 28 is exposed.

[0114] During the etching process, the process parameters are set as follows: chamber pressure 5-10mT; upper electrode power 600-800W; lower electrode power 70-100W, and the power application mode of the lower electrode power is continuous wave (CW); the upper electrode power current density distribution is 0.4-0.6; the process time is 15-30s; 80-100sccm Cl2 is introduced into the chamber as the main etching gas, and 100-150sccm BCl3 is introduced as a gas to remove oxygen impurities and improve reaction efficiency. The generated plasma reacts with Ta2O5, and finally generates volatile TaCl5 and B2O3, which are pumped away. In addition, the Cl- free radicals generated by the decomposition of BCl3 can enhance the chemical activity of Cl2 and improve the overall etching rate. 50-100sccm Ar is introduced as a dilution and bombardment gas to remove the passivation layer and enhance the plasma stability.

[0115] Step 9, bottom electrode layer etching step, such as Figure 2i As shown, the bottom electrode layer 28 is etched using the dielectric anti-reflection layer 24 as a mask until the etch stop layer 29 is exposed.

[0116] During the etching process, the process parameters are set as follows: chamber pressure 8-12mT; upper electrode power 500-700W; lower electrode power 60-100W, and the power application mode of the lower electrode power is continuous wave (CW); the upper electrode power current density distribution is 0.4-0.6; the process time is 15-20s; 150-200sccm Cl2 is introduced into the chamber as the main etching gas, and 20-40sccm BCl3 is introduced as the etching reaction gas. BCl3 can neutralize surface charge and reduce plasma damage. The byproducts containing B form a protective layer on the side wall, inhibiting lateral etching and improving anisotropy. 100-200sccm Ar can also be introduced into the chamber as a dilution and bombardment gas.

[0117] For example, see Figure 3a The basic memory cell morphology after etching of the related resistive random access memory shown in the figure and Figure 3b The basic memory cell morphology after etching of the resistive random access memory provided by the embodiment of the present invention is shown in FIG. Figure 3a and Figure 3b It can be seen that the etching method of the resistive random access memory provided in this embodiment can effectively reduce the residue on the sidewall after etching by optimizing the etching process, so as to obtain a clean sidewall after etching.

[0118] In addition, in the description of the embodiments of the present invention, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they may refer to fixed connections, detachable connections, or integral connections; they may refer to mechanical connections or electrical connections; they may refer to direct connections or indirect connections through an intermediate medium; and they may refer to internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on the specific circumstances.

[0119] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0120] In the description of the present invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely to facilitate and simplify the description of the present invention. They are not intended to indicate or imply that the devices or components referred to must have, be constructed, or operate in a specific orientation, and therefore should not be construed as limitations on the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0121] Finally, it should be noted that the above-described embodiments are only specific implementations of the present invention, which are used to illustrate the technical solutions of the present invention, rather than to limit them. The scope of protection of the present invention is not limited thereto. Although the present invention has been described in detail with reference to the above-described embodiments, those skilled in the art should understand that any person skilled in the art can modify or easily conceive of changes to the technical solutions described in the above-described embodiments within the technical scope disclosed by the present invention, or replace some of the technical features therein with equivalents. Such modifications, changes, or replacements do not deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A resistive random access memory etching method, characterized in that: include: Providing a preset substrate; wherein the preset substrate comprises an organic film layer, a dielectric anti-reflection layer and a metal iridium film layer arranged in sequence from top to bottom; an organic film layer removal step, before etching the metal iridium film layer, introducing an oxygen-containing gas into the chamber to etch and remove the organic film layer; In the metal iridium film layer etching step, the power application mode of the lower electrode is controlled to be in pulse mode, a first etching gas is introduced into the chamber, and the metal iridium film layer is etched using the etched dielectric anti-reflection layer as a mask until the next film layer is exposed; wherein, the first etching gas includes argon-containing gas, and the first etching gas does not include chlorine-containing gas.

2. The etching method of resistive random access memory according to claim 1, wherein: The first etching gas further includes a bromine-containing gas, a nitrogen-containing gas and an oxygen-containing gas.

3. The etching method of resistive random access memory according to claim 1, wherein: In the metal iridium film etching step, the duty cycle of the plasma in the pulse mode is 15% to 30%.

4. The etching method of resistive random access memory according to claim 1, wherein: During the metal iridium film etching step, the pressure control valve controlling the chamber is in a fully open mode.

5. The etching method of resistive random access memory according to claim 1, wherein: The predetermined substrate further includes a patterned photoresist layer and an organic anti-reflection layer, wherein the photoresist layer is located above the organic film layer, and the organic anti-reflection layer is located between the photoresist layer and the organic film layer; before the organic film layer removal step, the etching method of the resistive random access memory further includes: In the organic anti-reflection layer etching step, the power application mode of the lower electrode is controlled to be a pulse mode, a fluorine-containing gas is introduced into the chamber, and the organic anti-reflection layer is etched using the patterned photoresist layer as a mask until the organic film layer is exposed.

6. The etching method of resistive random access memory according to claim 5, characterized in that: After the organic anti-reflection layer etching step, the resistive random access memory etching method further includes: In the organic film layer etching step, oxygen-containing gas is introduced into the chamber, and the organic film layer is etched using the organic anti-reflection layer as a mask until the dielectric anti-reflection layer is exposed.

7. The etching method of resistive random access memory according to claim 1, wherein: Before the organic film layer removal step, the method further includes: In the dielectric anti-reflection layer etching step, fluorine-containing gas and carbon-containing gas are introduced into the chamber, and the dielectric anti-reflection layer is etched using the etched organic film layer as a mask until the next film layer is exposed.

8. The etching method of resistive random access memory according to claim 1, wherein: The preset substrate further includes a top electrode layer, and the top electrode layer is located between the dielectric anti-reflection layer and the metal iridium film layer. Before the organic film layer removal step, the method further includes: In the top electrode layer etching step, chlorine-containing gas is introduced into the chamber, and the top electrode layer is etched using the etched organic film layer as a mask until the metal iridium film layer is exposed.

9. The etching method of resistive random access memory according to claim 1, wherein: The preset substrate further includes a resistive switching layer, which is located below the metal iridium film layer. After the metal iridium film layer etching step, the method further includes: In the resistive switching layer etching step, chlorine-containing gas is introduced into the chamber, and the resistive switching layer is etched using the etched dielectric anti-reflection layer as a mask until the next film layer is exposed.

10. The method according to claim 9, characterized in that The preset substrate further includes a bottom electrode layer and an etching stop layer, and after the resistive switching layer etching step, further includes: In the bottom electrode layer etching step, chlorine-containing gas is introduced into the chamber, and the bottom electrode layer is etched using the dielectric anti-reflection layer as a mask until the etch stop layer is exposed.

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