Clock adjustment method and device, electronic equipment, storage medium and product

Abstract

The invention discloses a clock adjustment method and device, electronic equipment, a storage medium and a product. The method comprises the following steps: generating a clock adjustment strategy table according to clock performance parameters of each clock source; the clock sources comprise network clocks and system clocks of the network ports, the clock adjustment strategy table at least comprises allowed synchronization source sets corresponding to the clock sources, and the allowed synchronization source sets represent clock source sets which are configured for the clock sources and are allowed to serve as clock synchronization references; determining a reference clock and a to-be-adjusted clock corresponding to the clock adjustment instruction; and based on the clock adjustment strategy table, when the reference clock belongs to the allowed synchronization source set of the to-be-adjusted clock, synchronizing the to-be-adjusted clock to the reference clock. According to the scheme, the clock performance parameters of all the clock sources in the terminal equipment and the allowed synchronization source set are integrated through the clock adjustment strategy table, so that clock adjustment operation is managed in a unified mode, it is ensured that the to-be-adjusted clock is adjusted to the clock with higher performance, and therefore high-precision and high-reliability clock synchronization is achieved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of communication, in particular to a clock adjustment method and device, electronic equipment, storage medium and product. BACKGROUND

[0002] Time Sensitive Networking (TSN) can provide deterministic performance for Ethernet, which is essentially a deterministic Ethernet extension set to meet the low latency, low jitter, high reliability and other requirements of industrial automation, Internet of Vehicles and other applications for transmission network. Clock synchronization is the premise of TSN network to realize deterministic transmission, and many functions of TSN network are based on clock synchronization, which uses IEEE802.1AS protocol to provide clock synchronization function for a domain in the network.

[0003] When there are multiple network interfaces supporting TSN clock synchronization in a terminal device in a TSN network, since IEEE802.1AS protocol is a network clock synchronization at the network interface level, when different network interfaces are in different clock synchronization domains, each network interface performs network clock synchronization for Precision Time Protocol (PTP) clock in the domain it belongs to, which may result in different clock roles or PTP clocks of different network interfaces, but the local clock of the terminal device is unique. If adjustment between network clock and system clock is needed, the system clock or network clock may be adjusted to a clock with poor performance, thereby affecting the accuracy and reliability of clock synchronization, and further causing the deterministic transmission characteristics of TSN network to be unable to be guaranteed. SUMMARY

[0004] The present application provides a clock adjustment method, device, electronic equipment, storage medium and product to solve the problem of affecting accuracy and reliability of the prior art clock adjustment method.

[0005] According to an aspect of the present application, a clock adjustment method is provided, which comprises:

[0006] generating a clock adjustment strategy table according to clock performance parameters of each clock source; the clock source includes a network clock of each network interface and a system clock, and the clock adjustment strategy table at least includes a set of allowed synchronization sources corresponding to each clock source, which is represented as a set of clock sources configured by each clock source to be allowed as a clock synchronization reference;

[0007] determining a reference clock and a clock to be adjusted corresponding to the clock adjustment instruction;

[0008] based on the clock adjustment strategy table, when the reference clock belongs to the set of allowed synchronization sources of the clock to be adjusted, synchronizing the clock to be adjusted to the reference clock.

[0009] According to another aspect of the present application, there is provided a clock adjustment apparatus, comprising:

[0010] a policy table generating module configured to generate a clock adjustment policy table according to clock performance parameters of each clock source, wherein the clock sources comprise network clocks of each network port and a system clock, and the clock adjustment policy table comprises at least a set of allowed synchronization sources corresponding to each clock source, wherein the set of allowed synchronization sources represents a set of clock sources configured to be allowed to serve as a clock synchronization reference for each clock source;

[0011] a clock determining module configured to determine a reference clock and a clock to be adjusted corresponding to a clock adjustment instruction;

[0012] a clock adjustment module configured to synchronize the clock to be adjusted to the reference clock when the reference clock belongs to the set of allowed synchronization sources of the clock to be adjusted based on the clock adjustment policy table.

[0013] According to another aspect of the present application, there is provided an electronic device, comprising:

[0014] at least one processor; and

[0015] a memory connected to the at least one processor in communication; wherein

[0016] the memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor to enable the at least one processor to perform the clock adjustment method according to any one of the embodiments of the present application.

[0017] According to another aspect of the present application, there is provided a computer readable storage medium storing computer instructions for causing a processor to perform the clock adjustment method according to any one of the embodiments of the present application.

[0018] According to another aspect of the present application, there is provided a computer program product comprising a computer program, which, when executed by a processor, performs the clock adjustment method according to any one of the embodiments of the present application.

[0019] The clock adjustment method provided in the embodiment of the present application generates a clock adjustment strategy table according to clock performance parameters of each clock source; the clock source includes a network clock of each network port and a system clock, and the clock adjustment strategy table at least includes a set of allowed synchronization sources corresponding to each clock source, which is represented as a set of clock sources configured by each clock source and allowed to be used as a clock synchronization reference; a reference clock and a clock to be adjusted corresponding to a clock adjustment instruction are determined; and when the reference clock belongs to the set of allowed synchronization sources of the clock to be adjusted, the clock to be adjusted is synchronized to the reference clock based on the clock adjustment strategy table. The technical solution integrates the clock performance parameters and the set of allowed synchronization sources of each clock source in the terminal device through the clock adjustment strategy table, and uniformly manages the clock adjustment operation of the terminal device by using the clock adjustment strategy table, so as to ensure that all clock adjustment operations are from a low-performance clock to a high-performance clock, thereby realizing high-precision and high-reliability clock synchronization.

[0020] It should be understood that the content described in this part is not intended to identify key or important features of the embodiments of the present application, nor is it used to limit the scope of the present application. Other features of the present application will become apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0022] Figure 1 is a schematic diagram of clock adjustment of a dual-network port terminal device according to the first embodiment of the present application;

[0023] Figure 2 is a flowchart of a clock adjustment method according to the first embodiment of the present application;

[0024] Figure 3 is a flowchart of a clock adjustment method according to the second embodiment of the present application;

[0025] Figure 4 is a flowchart of a clock adjustment method according to the third embodiment of the present application;

[0026] Figure 5 is a schematic diagram of clock adjustment of a triple-network port terminal device according to the third embodiment of the present application;

[0027] Figure 6 is a structural schematic diagram of a clock adjustment device according to the fourth embodiment of the present application;

[0028] Figure 7The figure is a schematic structural diagram of an electronic device for implementing the clock adjustment method according to an embodiment of the present invention. DETAILED DESCRIPTION

[0029] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0030] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0031] Example 1

[0032] Figure 1 Schematic diagram of clock adjustment of dual network port terminal device provided by embodiment 1 of the present invention. Figure 1 As shown in the figure, when a terminal device in a TSN network has multiple network ports that support TSN clock synchronization, since the IEEE802.1AS protocol is network clock synchronization at the network port level, when different network ports are in different clock synchronization domains, each network port synchronizes the Precision Time Protocol (PTP) clock within its own domain. This may result in different clock roles or different PTP clocks for different network ports, but the local clock of the terminal device is unique. If adjustment is required between the network clock and the system clock, the system clock or network clock may be adjusted to a clock with poor performance, thereby affecting the accuracy and reliability of clock synchronization, and further causing the deterministic transmission characteristics of the TSN network to be unable to be guaranteed.

[0033] To solve the above problems, Figure 2A flowchart of a clock adjustment method provided for Embodiment One of the present application, which can be applicable to the case where a terminal device (single network interface or multiple network interfaces) in a TSN network adjusts a network clock and a system clock, can be executed by a clock adjustment apparatus, which can be implemented in the form of hardware and / or software, and can be configured in an electronic device. As shown in Figure 2 The clock adjustment method provided in Embodiment One specifically includes the following steps:

[0034] S110, generating a clock adjustment strategy table according to the clock performance parameters of each clock source.

[0035] The clock source can refer to an entity participating in clock synchronization in the terminal device, i.e., a physical or logical entity that can provide a clock signal in the system, which can specifically include network clocks such as PTP clocks of each network interface, and a system clock, i.e., a local clock of the terminal device.

[0036] The clock performance parameter can refer to an index for measuring the performance of the clock source, which can include clock priority, clock accuracy, etc. The clock adjustment strategy table can be understood as a data table for guiding clock synchronization operations, which integrates the key information of each clock source, such as the clock source identifier, clock performance parameter, and allowed synchronization source set of each clock source, and is the basis for the system to make clock adjustment decisions.

[0037] The allowed synchronization source set can refer to a set of clock sources configured for each clock source and allowed to serve as a clock synchronization reference for the clock source, and the clock performance of each clock source in the set is better than the current clock source, to ensure that the current clock source (i.e., the clock to be adjusted) can obtain clock synchronization information (such as clock frequency and time value) from the clock source with better performance during clock adjustment, thereby achieving high-precision and high-reliability clock synchronization. In an embodiment, the allowed synchronization source set can also be understood as a clock adjustment mode specified for each clock source, i.e., only when the clock source in the allowed synchronization source set serves as the reference clock for the clock to be adjusted, the clock adjustment process will be normally executed, otherwise the process will be terminated.

[0038] In the embodiment of the present application, the terminal device can obtain the clock performance parameters of each clock source through means not limited to protocol analysis, system interface calling, etc.; by comparing the clock performance parameters of each clock source, it can filter out high-performance clock sources with better clock performance than the current clock source, thereby determining the allowed synchronization source set corresponding to each clock source, i.e., the above high-performance clock sources can all serve as the clock synchronization reference for the current clock source; finally, the clock source identifier, clock performance parameter, and corresponding allowed synchronization source set of each clock source are integrated, and the final clock adjustment strategy table is generated according to the specified data structure and format, which will serve as an important basis for subsequent clock adjustment decisions.

[0039] It needs to be understood that in the embodiments of the present application, the PTP clock is equivalent to the network clock, and the local clock is equivalent to the system clock.

[0040] S120, determining the reference clock and the clock to be adjusted corresponding to the clock adjustment instruction.

[0041] The clock adjustment instruction can be a command triggered by a user or a system to indicate a synchronization or adjustment operation on a specified clock in the system, and the clock adjustment instruction can be triggered manually (such as administrator operation) or automatically (such as clock offset exceeding a preset threshold), which is not limited in the embodiment. The reference clock can be a clock source that serves as a reference standard for clock synchronization in the clock adjustment process, and its clock frequency and time value will be used as a basis for adjusting other clocks. It can be understood that the reference clock is usually a clock source with better performance, higher time accuracy and stability. The clock to be adjusted can be a clock source that needs to be calibrated in time value and frequency according to the reference clock.

[0042] In the embodiments of the present application, after the system monitors the clock adjustment instruction, the reference clock identifier and the clock to be adjusted identifier can be extracted by performing instruction analysis, and the clock source entries matched with the clock source identifiers in the clock adjustment strategy table can be searched according to the above clock source identifiers. If the related entries can be matched, the clock sources corresponding to the reference clock identifier and the clock to be adjusted identifier are determined as the reference clock and the clock to be adjusted respectively. If the related entries cannot be matched, it means that the clock source identifier is invalid, and the subsequent operation can be terminated and an error prompt can be returned.

[0043] S130, based on the clock adjustment strategy table, if the reference clock belongs to the allowed synchronization source set of the clock to be adjusted, synchronizing the clock to be adjusted to the reference clock.

[0044] In the embodiments of the present application, the corresponding clock source entry can be retrieved in the clock adjustment strategy table according to the clock source identifier of the clock to be adjusted, and the allowed synchronization source set can be extracted from the entry. Then it is checked whether the reference clock exists in the allowed synchronization source set, if it exists, the clock to be adjusted is synchronized to the reference clock, for example, the clock frequency and time value of the clock to be adjusted can be adjusted to be consistent with the reference clock, and the like. If it does not exist, the subsequent clock adjustment process is terminated, and an error prompt is returned.

[0045] The clock adjustment method proposed in an embodiment of the present invention generates a clock adjustment policy table based on the clock performance parameters of each clock source; the clock source includes the network clock of each network port and the system clock, and the clock adjustment policy table includes at least a set of allowed synchronization sources corresponding to each clock source, where the allowed synchronization source set represents a set of clock sources configured for each clock source that are allowed to serve as a clock synchronization reference; the reference clock and the clock to be adjusted corresponding to the clock adjustment instruction are determined; based on the clock adjustment policy table, when the reference clock belongs to the allowed synchronization source set of the clock to be adjusted, the clock to be adjusted is synchronized to the reference clock. This technical solution integrates the clock performance parameters and allowed synchronization source set of each clock source in the terminal device through the clock adjustment policy table, and uses the clock adjustment policy table to uniformly manage the clock adjustment operations of the terminal device, ensuring that all clock adjustment operations are adjusted from low-performance clocks to high-performance clocks, thereby achieving high-precision and high-reliability clock synchronization.

[0046] Example 2

[0047] Figure 3 The flowchart of a clock adjustment method provided in the second embodiment of the present invention is further optimized and expanded based on the above embodiment, and can be combined with various optional technical solutions in the above embodiment. Figure 3 As shown, the clock adjustment method provided in the second embodiment includes the following steps:

[0048] S210: Collect clock performance parameters of each network clock and system clock.

[0049] Among them, clock performance parameters may include at least: first priority, second priority, and clock accuracy. First priority (Priority 1) can be the primary indicator for master clock election, which determines the authority of the clock source in the TSN network. The smaller the value, the higher the priority for becoming the master clock. Second priority (Priority 2) can be an auxiliary indicator for master clock election. It serves as the basis for decision-making when the first priority is the same. The smaller the value, the better. Clock accuracy (Accuracy) can indicate the time deviation range of the clock source. The smaller the value, the smaller the time error.

[0050] In this embodiment of the present invention, the network clock performance parameters of each network port can be obtained by parsing Announce messages based on the IEEE802.1AS protocol. The clock performance parameters of the local system clock of the terminal device can be obtained by calling a preset system interface or reading a related configuration file. The clock performance parameters may include at least: first priority, second priority, and clock accuracy.

[0051] S220 : Sort the clock sources by performance according to the clock performance parameters.

[0052] In the embodiment of the present application, based on the first priority, the second priority and the clock accuracy of each clock source, the performance of the clock source can be ranked according to the following rules:

[0053] ① For each clock source, first compare the first priority, the smaller the value of the clock source, the better the clock performance;

[0054] ② If the first priority is the same, compare the second priority, the smaller the value of the clock source, the better the clock performance;

[0055] ③ If the first priority and the second priority are the same, compare the clock accuracy, the smaller the value of the clock source, the better the clock performance.

[0056] S230, traverse each clock source, and add the clock source identifier of all high-performance clock sources whose clock performance is better than the current clock source to the allowed synchronization source set corresponding to the current clock source.

[0057] In the embodiment of the present application, after the performance of each clock source is ranked, the high-performance clock source corresponding to each clock source, i.e. all other clock sources whose clock performance is better than the current clock source, can be obtained, and then the clock source identifier of each high-performance clock source is added to the allowed synchronization source set corresponding to the clock source. If the clock performance of a certain clock source is currently the best, the allowed synchronization source set corresponding to the clock source is an empty set.

[0058] Further, each clock source included in the allowed synchronization source set can be out of order or sorted (e.g. arranged in descending or ascending order of clock performance), which is not limited in the embodiment.

[0059] S240, generating a clock adjustment strategy table based on the clock source identifier, the clock performance parameter and the allowed synchronization source set of each clock source.

[0060] In the embodiment of the present application, the clock source identifier, the clock performance parameter and the allowed synchronization source set of each clock source can be associated and stored in the clock adjustment strategy table. In an embodiment, the clock adjustment strategy table can be stored in a key-value pair data structure; wherein the key in the key-value pair data structure is the clock source identifier, and the value corresponding to each key includes at least the following fields: clock performance parameter and allowed synchronization source set. For example, the clock adjustment strategy table can include the following information:

[0061] {

[0062] ptp1:{clock_params:{prio1:128,prio2:128,accu:2},allowed_sources:[system_clock]},

[0063] system_clock:{clock_params:{prio1:122,prio2:130,accu:1},allowed_sources:[null]}

[0064] }

[0065] Wherein, the ptp1 represents the network clock of the network interface eth1, that is, the PTP clock; the system_clock represents the system clock; the clock_params represents the clock performance parameter; the allowed_sources represents the allowed synchronization source set; the prio1, the prio2 and the accu respectively represent the first priority, the second priority and the clock accuracy, and the smaller the value is, the better the clock performance is.

[0066] S250, in response to the clock adjustment instruction, the reference clock identifier and the to-be-adjusted clock identifier carried in the clock adjustment instruction are parsed, and the clock sources corresponding to the reference clock identifier and the to-be-adjusted clock identifier are determined as the reference clock and the to-be-adjusted clock respectively.

[0067] In the embodiment of the application, the system can continuously listen to the input of the clock adjustment instruction through a preset interface (such as a network port, a system call interface, etc.), when the clock adjustment instruction is received, the reference clock identifier and the to-be-adjusted clock identifier are extracted by performing instruction analysis; then the validity of the clock source identifier is verified, that is, whether the reference clock identifier and the to-be-adjusted clock identifier exist in the clock adjustment strategy table is checked, if they exist, the clock sources corresponding to the reference clock identifier and the to-be-adjusted clock identifier are determined as the reference clock and the to-be-adjusted clock respectively; if they do not exist, it means that the clock source identifier is invalid, and the subsequent operation can be terminated and an error code is returned.

[0068] S260, the allowed synchronization source set corresponding to the to-be-adjusted clock is extracted in the clock adjustment strategy table.

[0069] In the embodiment of the application, the clock source entry corresponding to the to-be-adjusted clock identifier can be searched in the clock adjustment strategy table, and the allowed synchronization source set is extracted from the entry.

[0070] S270, whether the reference clock exists in the allowed synchronization source set is determined.

[0071] In the embodiment of the application, after the allowed synchronization source set corresponding to the to-be-adjusted clock is extracted, whether the reference clock exists in the allowed synchronization source set can be further determined.

[0072] S280, if yes, the clock frequency and the time value of the to-be-adjusted clock are adjusted to be consistent with the reference clock.

[0073] In an embodiment of the present invention, if the reference clock exists in the set of allowed synchronization sources of the clock to be adjusted, the clock frequency and time value of the clock to be adjusted can be adjusted to be consistent with the reference clock. Specifically, the current states of the reference clock and the clock to be adjusted can be obtained respectively, including: the clock frequency and time value corresponding to the reference clock and the clock to be adjusted; if the difference between the two clock frequencies exceeds a preset threshold, the clock frequency of the clock to be adjusted is first adjusted to be consistent with the reference clock (such as adjusting the crystal oscillator frequency through a phase-locked loop, etc.); after the clock frequencies are synchronized, the time value of the clock to be adjusted is further adjusted according to the difference between the two time values, that is, if the difference between the two time values ​​is small, the time value of the clock to be adjusted is directly set to be consistent with the reference clock; if the difference between the two time values ​​is large, the time value of the clock to be adjusted is gradually adjusted to be consistent with the reference clock through a smoothing calibration algorithm such as linear interpolation to avoid clock jumps.

[0074] S290: If not, terminate the execution of the clock adjustment instruction and return an error code.

[0075] In an embodiment of the present invention, if the reference clock does not exist in the set of allowed synchronization sources of the clock to be adjusted, it means that the clock performance of the clock to be adjusted is better than or equal to the clock performance of the reference clock. At this time, the subsequent clock adjustment process will be terminated and an error code will be returned to avoid the situation where a clock with better performance is adjusted to a clock with worse performance, thereby ensuring the accuracy and reliability of clock synchronization.

[0076] Furthermore, based on the above-mentioned embodiments of the invention, the clock adjustment method provided in this embodiment further includes:

[0077] The clock adjustment policy table is updated when any of the following events are detected:

[0078] The clock role of any clock source changes;

[0079] The clock performance parameters of any clock source are changed;

[0080] The preset policy table update cycle is reached;

[0081] Added a new network port to enable the network clock synchronization function.

[0082] In an embodiment of the present invention, when the system detects any of the following events, the clock adjustment policy table update process is executed:

[0083] ① Any clock source clock role change, that is, detect whether the master-slave state of each network port network clock and system clock changes, for example, the master-slave state of each network port network clock can be obtained in real time by analyzing the clock role negotiation message (such as PTPAnnounce message) of IEEE 802.1AS protocol, and the system clock can also be judged by monitoring the local configuration file whether it is reset as a synchronization reference (such as switching from a master clock to a slave clock).

[0084] ② Any clock source clock performance parameter change, that is, detect whether the priority and clock accuracy of each network port network clock and system clock changes.

[0085] ③ Reach the preset policy table update period, that is, when the system running time reaches the preset period, a periodic trigger signal will be generated.

[0086] ④ New network port enables network clock synchronization function, that is, it is detected that the terminal device has a new network port that enables network clock synchronization function.

[0087] After detecting the above event trigger, the terminal device can reacquire the clock performance parameters of each network port network clock and system clock, and update the related contents in the clock adjustment strategy table. The specific process can refer to the above embodiment, which will not be described here.

[0088] The clock adjustment method provided by the embodiment of the application integrates the clock performance parameters of each clock source in the terminal device and the allowed synchronization source set through the clock adjustment strategy table, and uniformly manages the clock adjustment mode of each network clock and system clock in the terminal device based on the clock adjustment strategy table, solves the problem of possible clock performance degradation between multiple clock sources in the multi-network port terminal device when they are synchronized with each other, can automatically intercept all clock adjustment instructions that cause clock performance degradation, ensures that all clock adjustment operations are from low-performance clock to high-performance clock, and thus realizes high-precision and high-reliability clock synchronization, and further guarantees the deterministic transmission characteristics of the TSN network.

[0089] Embodiment three

[0090] Figure 4 A flowchart of a clock adjustment method provided by the third embodiment of the application, the embodiment provides an implementation of the clock adjustment method based on the above embodiments, which can realize high precision and high reliability of clock adjustment in a multi-network port terminal device. As shown in Figure 4 The clock adjustment method provided by the third embodiment of the application specifically includes the following steps:

[0091] S310, when the terminal device is powered on, start the clock synchronization manager.

[0092] The clock synchronization manager can be understood as a software module configured by the embodiment of the application for managing clock synchronization related operations, which is responsible for periodically collecting performance parameters of each clock source, generating a clock adjustment strategy table, controlling a clock synchronization process, and the like, and is a core component for implementing a device clock synchronization function.

[0093] The embodiment of the application creatively proposes to add a clock synchronization manager in a TSN network multi-network port terminal device, which can automatically start and initialize after the device is powered on, such as allocating memory space, establishing a data buffer area, initializing configuration parameters, and the like, and prepare to start performing a clock synchronization management task.

[0094] S320, periodically collecting network clock of each network port and clock performance parameters of a system clock by calling the clock synchronization manager, and generating a clock adjustment strategy table according to the clock performance parameters.

[0095] In the embodiment of the application, the clock synchronization manager can start a timer, trigger a data collection task according to a preset collection period, and obtain clock performance parameters of each network clock and system clock, wherein the clock performance parameters can at least include a first priority, a second priority and a clock accuracy; and the clock adjustment strategy table is generated by integrating the clock performance parameters of each clock source, and the table is stored in a system specified path in a file format such as json or xml. In an embodiment, the clock adjustment strategy table can be stored in a key-value pair data structure; wherein the key in the key-value pair data structure is a clock source identifier, and the value corresponding to each key at least includes the following fields: clock performance parameters and a set of allowed synchronization sources.

[0096] It can be understood that in the initialization stage of the clock synchronization manager, a clock adjustment strategy table is generated, and if the clock performance parameters of the related clock source collected are missing, the related content in the generated clock adjustment strategy table is empty. With the running of the TSN network, different network ports start the clock synchronization process, which will perform clock synchronization according to the IEEE802.1AS protocol. The clock roles of different network ports can be the same or different, which are master clock or slave clock. With the running of the device, the clock synchronization manager will periodically collect data and update the related content in the clock adjustment strategy table.

[0097] S330, in response to the clock adjustment instruction, the reference clock identifier and the to-be-adjusted clock identifier carried in the clock adjustment instruction are parsed, and the clock sources corresponding to the reference clock identifier and the to-be-adjusted clock identifier are determined as the reference clock and the to-be-adjusted clock respectively.

[0098] S340, extracting the set of allowed synchronization sources corresponding to the to-be-adjusted clock in the clock adjustment strategy table.

[0099] S350: When the reference clock exists in the set of allowed synchronization sources, adjust the clock frequency and time value of the clock to be adjusted to be consistent with the reference clock.

[0100] S360: When the reference clock does not exist in the allowed synchronization source set, terminate the execution of the clock adjustment instruction and return an error code.

[0101] In an embodiment of the present invention, when the clock adjustment instruction of the clock synchronization process of each network port is executed, the content of the clock adjustment policy table stored in the specified system path is read to obtain the clock adjustment method, that is, the set of allowed synchronization sources corresponding to the clock to be adjusted; if the reference clock in the clock adjustment instruction exists in the above-mentioned set of allowed synchronization sources, that is, the clock adjustment method in the clock adjustment policy table is consistent with the meaning of the clock adjustment instruction, then the clock to be adjusted will be synchronized to the reference clock, otherwise the execution of the clock adjustment instruction is terminated. After the clock adjustment instruction is successfully executed, the clock frequency and time value of the clock to be adjusted should be consistent with that of the reference clock.

[0102] Furthermore, the clock synchronization manager will update the clock adjustment policy table when it detects any of the following events: ① The clock role of any clock source changes; ② The clock performance parameters of any clock source change; ③ The preset policy table update cycle is reached; ④ A new network port is added to enable the network clock synchronization function.

[0103] The clock adjustment method proposed in an embodiment of the present invention adds a clock synchronization manager to a multi-network port terminal device and generates a clock adjustment policy table to maintain the clock performance parameters of each clock source and the set of allowed synchronization sources. When the clock synchronization processes of different network ports execute a clock adjustment instruction, the contents of the clock adjustment policy table determine whether to perform the adjustment, thereby determining the clock information to which each network port's PTP clock and the system clock should be adjusted. This method ensures that, when adjusting clock information, lower-performing clocks are adjusted to higher-performing clocks, avoiding the situation where higher-performing clocks are adjusted to lower-performing clocks, thereby ensuring that the accuracy and reliability of clock synchronization meet requirements.

[0104] To help those skilled in the art better understand the clock adjustment method proposed in the embodiment of the present invention, a specific example is provided below to illustrate the method.

[0105] Example 1: The terminal device has a single network port eth1

[0106] S1. When the device is initially powered on, the clock synchronization manager is started.

[0107] S2. The clock synchronization manager collects clock information of eth1 and the system, including clock performance parameters and time values. The clock parameters include at least the first priority, the second priority, and clock accuracy.

[0108] S3, the clock synchronization manager generates a clock adjustment strategy table and stores it in a specified system path. At this time, since the network interface eth1 does not start the clock synchronization function, there is no PTP clock, and the clock information of eth1 cannot be collected, so the related content in the clock adjustment strategy table is empty at this time. Thereafter, the clock synchronization manager will periodically collect the clock information of eth1 and the system, and update the clock adjustment strategy table.

[0109] S4, the network interface eth1 starts the clock synchronization process and starts to synchronize the clock according to the IEEE802.1AS protocol. At this time, the PTP clock ptp1 corresponding to eth1 exists.

[0110] S5, the clock synchronization manager collects the information of ptp1 and the system clock, and generates and updates the clock adjustment strategy table by comparing the clock performance parameters of them. Exemplarily, the clock adjustment strategy table at this time can contain the following information:

[0111] {

[0112] ptp1:{clock_params:{prio1:128,prio2:128,accu:2},allowed_sources:[system_clock]},

[0113] system_clock:{clock_params:{prio1:122,prio2:130,accu:1},allowed_sources:[null]}

[0114] }

[0115] Among them, the smaller the clock performance parameter value, the higher the clock performance and the higher the priority.

[0116] S6, as the TSN network runs, the user needs to adjust the PTP clock of eth1 to the system clock. The clock synchronization process of eth1 is called to generate a clock adjustment instruction to adjust the PTP clock to the system clock.

[0117] S7, the clock synchronization process of eth1 reads the clock adjustment strategy table stored in the specified path, parses and finds that the clock performance parameter of ptp1 is worse than that of the system clock, and the allowed synchronization source set of ptp1 contains the system clock system_clock, that is, the clock adjustment mode is consistent with the instruction meaning, then starts to execute the instruction, completes the adjustment of the clock information, including the adjustment of the clock frequency and the time value.

[0118] S8, with the running of the TSN network, the user needs to adjust the system clock to the PTP clock of eth1. The clock synchronization process of eth1 is called to generate a clock adjustment instruction to adjust the system clock to the PTP clock.

[0119] S9, the clock synchronization process of eth1 reads the clock adjustment strategy table stored in the specified path, and analyzes that the clock performance parameter of the system clock is better than that of ptp1, and the allowed synchronization source set of the system clock is null, that is, the adjustment of the system clock is not supported, which is contrary to the instruction meaning, so the instruction is not executed, and the adjustment of the system clock information is not performed.

[0120] Example II: Compared with example I, the difference is that the terminal device has dual network interfaces eth1 and eth2, and both support the clock synchronization function specified in IEEE 802.1AS protocol, and the clock adjustment process can refer to Figure 1 .

[0121] S1, the clock synchronization manager collects the clock information of eth1, eth2 and the system, and generates a clock adjustment strategy table. At this time, since the clock synchronization function of the dual network interfaces is not started, there is no PTP clock, and the clock information of eth1 and eth2 cannot be collected, so the related content in the clock adjustment strategy table at this time is empty. Thereafter, the clock synchronization manager periodically collects the clock information of eth1, eth2 and the system, and updates the clock adjustment strategy table.

[0122] S2, with the running of the TSN network, eth1 in the dual network interfaces starts the clock synchronization process. The clock synchronization manager collects the information of ptp1 and the system clock, and updates the clock adjustment strategy table by comparing the clock performance parameters thereof. Exemplarily, the clock adjustment strategy table at this time can contain the following information:

[0123] {

[0124] ptp1:{clock_params:{prio1:128,prio2:128,accu:2},allowed_sources:[system_clock]},

[0125] system_clock:{clock_params:{prio1:122,prio2:130,accu:1},allowed_sources:[null]}

[0126] }

[0127] S3, with the running of the TSN network, the user needs to adjust the PTP clock of eth2 to the system clock. The clock synchronization process of eth2 is called to generate a clock adjustment instruction to adjust the PTP clock to the system clock.

[0128] S4, since the clock synchronization process of eth2 is not started, there is no PTP clock, the instruction returns failure.

[0129] S5, the clock synchronization process of eth2 in the dual-network port is started, at this time there is a PTP clock ptp2. The clock synchronization manager collects the information of ptp2, re-compare the clock performance parameters of eth1, eth2 and the system, and update the clock adjustment strategy table. Exemplarily, the clock adjustment strategy table at this time can contain the following information:

[0130] {

[0131] ptp1:{clock_params:{prio1:128,prio2:128,accu:2},allowed_sources:[system_clock,ptp2]

[0132] },

[0133] ptp2:{clock_params:{prio1:120,prio2:118,accu:1},allowed_sources:[null]},

[0134] system_clock:{clock_params:{prio1:122,prio2:130,accu:1},allowed_sources:[ptp2]}

[0135] }

[0136] S6, as the TSN network runs, the user needs to adjust the PTP clock of eth1 to the PTP clock of eth2. Call the clock synchronization process of eth1 to generate the clock adjustment instruction to adjust the PTP clock to the PTP clock of eth2.

[0137] S7, the clock synchronization process of eth1 reads the clock adjustment strategy table stored in the specified path, parses to find that the clock performance parameters of ptp1 are worse than ptp2, and the allowed synchronization source set of ptp1 contains ptp2, and the clock adjustment mode is consistent with the instruction meaning, then start to execute the instruction, complete the adjustment of the clock information.

[0138] S8, as the TSN network runs, the user needs to adjust the system clock to the PTP clock of eth2. Call the clock synchronization process of eth2 to generate the clock adjustment instruction to adjust the system clock to the PTP clock of eth2.

[0139] S9, the clock synchronization process of eth2 reads the clock adjustment strategy table stored in the specified path, finds that the clock performance parameters of ptp2 are better than those of the system clock, the allowed synchronization source set of the system clock contains ptp2, and the clock adjustment mode is consistent with the instruction meaning, then the instruction is started to be executed, and the adjustment of the clock information is completed.

[0140] Example three: compared with example two, the difference is that the terminal device has three network interfaces eth1, eth2 and eth3, and all support the clock synchronization function specified in IEEE802.1AS protocol, and the clock adjustment process can refer to Figure 5 .

[0141] In addition, compared with example two, the difference is also that when all the three network interfaces are started, the clock synchronization process exists at the same time, the system clock, the PTP clock ptp1 of eth1, the PTP clock ptp2 of eth2 and the PTP clock ptp3 of eth3. The clock synchronization manager recompares the clock performance parameters of eth1, eth2, eth3 and the system, and updates the clock adjustment strategy table. Exemplarily, the clock adjustment strategy table at this time can contain the following information:

[0142] {

[0143] ptp1:{clock_params:{prio1:128,prio2:128,accu:2},allowed_sources:[system_clock,ptp2,ptp3]},

[0144] ptp2:{clock_params:{prio1:120,prio2:118,accu:1},allowed_sources:[null]},

[0145] ptp3:{clock_params:{prio1:120,prio2:118,accu:1},allowed_sources:[null]},

[0146] system_clock:{clock_params:{prio1:122,prio2:130,accu:1},allowed_sources:[ptp2,ptp3]

[0147] }

[0148] }

[0149] With the running of the TSN network, the user needs to adjust the PTP clock of eth3 to the PTP clock of eth2. The clock synchronization process of eth3 is called to generate a clock adjustment instruction to adjust the PTP clock to the PTP clock of eth2.

[0150] The clock synchronization process of eth3 reads the clock adjustment strategy table stored in the specified path, parses to find that the clock performance parameters of ptp3 are the same as those of ptp2, and the allowed synchronization source set of ptp3 is null, that is, ptp3 clock adjustment is not supported, which is contradictory to the instruction meaning, so the instruction is not executed, and the ptp3 clock is not adjusted.

[0151] Example four: compared with example two, the difference is that with the running of the TSN network, the clock synchronization domain where eth1 is located has a clock device with higher performance accessing the network, and the PTP clock of eth1 is synchronized to the clock information corresponding to the clock device with higher performance.

[0152] After detecting that the clock performance parameters of the PTP clock of eth1 change, the clock synchronization manager will re-compare the clock performance parameters of eth1, eth2 and the system, and update the clock adjustment strategy table. Illustratively, the clock adjustment strategy table at this time can contain the following information:

[0153] {

[0154] ptp1:{clock_params:{prio1:95,prio2:103,accu:1},allowed_sources:[null]},

[0155] ptp2:{clock_params:{prio1:120,prio2:118,accu:1},allowed_sources:[ptp1]},

[0156] system_clock:{clock_params:{prio1:122,prio2:130,accu:1},allowed_sources:[ptp2,ptp1]

[0157] }

[0158] }

[0159] The technical solutions described in the above embodiments comprehensively consider the different network port performances of the multi-network port terminal device in the TSN network and the overall performance of the clock synchronization domain, and when the user needs to adjust the clock information, the corresponding clock can be adjusted to the clock information with higher performance.

[0160] Example four

[0161] Figure 6 A structure schematic diagram of a clock adjustment device provided for the fourth embodiment of the present application. As shown in the figure, the device comprises: Figure 6

[0162] a policy table generating module 41, configured to generate a clock adjustment policy table according to clock performance parameters of each clock source, the clock source including a network clock of each network port and a system clock, and the clock adjustment policy table at least including a set of allowed synchronization sources corresponding to each clock source, the set of allowed synchronization sources representing a set of clock sources configured to be allowed to serve as a clock synchronization reference for each clock source;

[0163] a clock determining module 42, configured to determine a reference clock and a clock to be adjusted corresponding to a clock adjustment instruction;

[0164] a clock adjustment module 43, configured to synchronize the clock to be adjusted to the reference clock when the reference clock belongs to the set of allowed synchronization sources of the clock to be adjusted, based on the clock adjustment policy table.

[0165] Further, on the basis of the above-mentioned embodiments of the present application, the policy table generating module 41 comprises:

[0166] a parameter collecting unit, configured to collect clock performance parameters of each network clock and system clock;

[0167] a performance sorting unit, configured to sort the performance of each clock source according to the clock performance parameters;

[0168] an identification adding unit, configured to traverse each clock source and add clock source identifications of all high-performance clock sources whose clock performance is superior to that of a current clock source to a set of allowed synchronization sources corresponding to the current clock source;

[0169] a policy table generating unit, configured to generate the clock adjustment policy table based on the clock source identifications, clock performance parameters and set of allowed synchronization sources of each clock source.

[0170] Further, on the basis of the above-mentioned embodiments of the present application, the clock performance parameters at least include a first priority, a second priority and clock accuracy, and correspondingly, the performance sorting unit is specifically configured to:

[0171] sort the performance of each clock source according to the following rules based on the clock performance parameters:

[0172] for each clock source, first compare the first priority, and the clock source with a smaller value has better clock performance;

[0173] if the first priority is the same, then compare the second priority, and the clock source with a smaller value has better clock performance;

[0174] ​If the first priority and the second priority are the same, then the clock accuracy is compared, and the clock source with the smaller value has better clock performance.

[0175] Further, on the basis of the above-mentioned embodiments, the clock determination module 42 comprises:

[0176] The instruction analysis unit is configured to analyze the reference clock identifier and the to-be-adjusted clock identifier carried in the clock adjustment instruction in response to the clock adjustment instruction, and determine the clock sources corresponding to the reference clock identifier and the to-be-adjusted clock identifier as the reference clock and the to-be-adjusted clock respectively.

[0177] Further, on the basis of the above-mentioned embodiments, the clock adjustment module 43 comprises:

[0178] The information extraction unit is configured to extract the set of allowed synchronization sources corresponding to the to-be-adjusted clock in the clock adjustment strategy table.

[0179] The reference clock searching unit is configured to determine whether the reference clock exists in the set of allowed synchronization sources.

[0180] The first execution unit is configured to adjust the clock frequency and the time value of the to-be-adjusted clock to be consistent with the reference clock if the reference clock exists in the set of allowed synchronization sources.

[0181] The second execution unit is configured to terminate the execution of the clock adjustment instruction and return an error code if the reference clock does not exist in the set of allowed synchronization sources.

[0182] Further, on the basis of the above-mentioned embodiments, the clock adjustment device further comprises:

[0183] The strategy table updating module is configured to update the clock adjustment strategy table when any of the following events is detected:

[0184] The clock role of any clock source is changed;

[0185] The clock performance parameter of any clock source is changed;

[0186] The preset strategy table updating period is reached;

[0187] The network port is newly added and enabled to use the network clock synchronization function.

[0188] Further, on the basis of the above-mentioned embodiments, the clock adjustment strategy table is stored in a key-value pair data structure; wherein the key in the key-value pair data structure is the clock source identifier, and the value corresponding to each key at least includes the following fields: the clock performance parameter and the set of allowed synchronization sources.

[0189] The clock adjustment device provided in the embodiments of the present application can execute the clock adjustment method provided in any of the embodiments of the present application, and has the corresponding functional modules and beneficial effects of the execution method.

[0190] Example 5

[0191] Figure 7 A schematic diagram of the structure of an electronic device 50 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital assistants, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or claimed herein.

[0192] like Figure 7 As shown, the electronic device 50 includes at least one processor 51 and a memory, such as a read-only memory (ROM) 52, a random access memory (RAM) 53, etc., which is communicatively connected to the at least one processor 51. The memory stores a computer program that can be executed by the at least one processor. The processor 51 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 52 or the computer program loaded from the storage unit 58 into the random access memory (RAM) 53. Various programs and data required for the operation of the electronic device 50 can also be stored in the RAM 53. The processor 51, ROM 52, and RAM 53 are connected to each other via a bus 54. An input / output (I / O) interface 55 is also connected to the bus 54.

[0193] Multiple components in the electronic device 50 are connected to the I / O interface 55, including an input unit 56, such as a keyboard, a mouse, etc.; an output unit 57, such as various types of displays, speakers, etc.; a storage unit 58, such as a magnetic disk, an optical disk, etc.; and a communication unit 59, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 59 allows the electronic device 50 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.

[0194] The processor 51 may be any general-purpose and / or specialized processing component with processing and computing capabilities. Examples of the processor 51 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various specialized artificial intelligence (AI) computing chips, various processors for running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The processor 51 executes the various methods and processes described above, such as the clock adjustment method.

[0195] In some embodiments, the clock adjustment method can be implemented as a computer program that is tangibly contained in a computer-readable storage medium, such as the storage unit 58. In some embodiments, part or all of the computer program can be loaded and / or installed on the electronic device 50 via the ROM 52 and / or the communication unit 59. When the computer program is loaded into the RAM 53 and executed by the processor 51, one or more steps of the clock adjustment method described above can be performed. Alternatively, in other embodiments, the processor 51 can be configured to perform the clock adjustment method in any other suitable manner (e.g., by means of firmware).

[0196] Various embodiments of the systems and techniques described herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), system-on-chip systems (SOCs), programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include being implemented in one or more computer programs that are executable and / or interpreted on a programmable system that includes at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0197] In some embodiments, the clock adjustment method can be implemented as a computer program that is invisibly included in a computer program product. When the computer program is executed by a processor, it implements the clock adjustment method of the present invention. The computer program product can be understood as a software product that implements its solution primarily through the computer program. The computer program for implementing the method of the present invention can be written in any combination of one or more programming languages. These computer programs can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device so that when the computer program is executed by the processor, the functions / operations specified in the flowchart and / or block diagram are implemented. The computer program can be executed entirely on the machine, partially on the machine, as a stand-alone software package, partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0198] In the context of the present application, a computer-readable storage medium can be a tangible medium that can contain or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. A computer-readable storage medium can include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium can be a machine-readable signal medium. More specific examples of a machine-readable storage medium will include one or more lines of a program of instructions in a transitory signal, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0199] To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the electronic device. Other kinds of devices can be used to provide for interaction with a user as well; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form, including acoustic, speech, or tactile input.

[0200] The systems and techniques described here can be implemented in a computing system that includes a back end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front end component (e.g., a user computer having a graphical user interface or a Web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back end, middleware, or front end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0201] A computing system may include clients and servers. The clients and servers are typically remote from each other and typically interact via a communication network. This client-server relationship arises through computer programs running on the respective computers, creating a client-server relationship. The server may be a cloud server, also known as a cloud computing server or cloud host. This server is a hosting product within the cloud computing service ecosystem that addresses the management difficulties and limited scalability of traditional physical hosting and VPS services.

[0202] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in the present invention can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present invention can be achieved. This is not limited herein.

[0203] The above specific embodiments do not limit the scope of protection of the present invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention are intended to be included within the scope of protection of the present invention.

Claims

1. A clock adjustment method, characterized in that: The method comprises: Generate a clock adjustment policy table based on the clock performance parameters of each clock source; the clock sources include the network clocks and system clocks of each network port, and the clock adjustment policy table includes at least a set of allowed synchronization sources corresponding to each of the clock sources, wherein the allowed synchronization source set represents a set of clock sources configured for each of the clock sources that are allowed to serve as clock synchronization references; Determine the reference clock and the clock to be adjusted corresponding to the clock adjustment instruction; Based on the clock adjustment policy table, when the reference clock belongs to the set of allowed synchronization sources of the clock to be adjusted, the clock to be adjusted is synchronized to the reference clock.

2. The method according to claim 1, characterized in that Generating a clock adjustment strategy table according to the clock performance parameters of each clock source includes: Collecting the clock performance parameters of each of the network clocks and the system clock; sorting the clock sources by performance according to the clock performance parameters; Traversing each of the clock sources, and adding the clock source identifiers of all high-performance clock sources having clock performance better than the current clock source to the allowed synchronization source set corresponding to the current clock source; The clock adjustment policy table is generated based on the clock source identifier of each clock source, the clock performance parameter and the allowed synchronization source set.

3. The method according to claim 2, characterized in that The clock performance parameters include at least a first priority, a second priority, and clock accuracy. Accordingly, the performance sorting of the clock sources according to the clock performance parameters includes: Based on the clock performance parameters, the clock sources are ranked by performance according to the following rules: For each of the clock sources, first compare the first priority, and the clock source with a smaller value has better clock performance; If the first priorities are the same, then comparing the second priorities, and the clock source with a smaller value has better clock performance; If the first priority and the second priority are the same, then the clock accuracy is compared, and the clock source with a smaller value has better clock performance.

4. The method according to claim 1, wherein The step of determining the reference clock and the clock to be adjusted corresponding to the clock adjustment instruction includes: In response to the clock adjustment instruction, the reference clock identifier and the to-be-adjusted clock identifier carried in the clock adjustment instruction are parsed, and the clock sources corresponding to the reference clock identifier and the to-be-adjusted clock identifier are determined as the reference clock and the to-be-adjusted clock, respectively.

5. The method according to claim 1, wherein The step of synchronizing the clock to be adjusted to the reference clock based on the clock adjustment policy table when the reference clock belongs to the set of allowed synchronization sources of the clock to be adjusted includes: Extracting the allowed synchronization source set corresponding to the clock to be adjusted from the clock adjustment strategy table; determining whether the reference clock exists in the set of allowed synchronization sources; If yes, adjusting the clock frequency and time value of the clock to be adjusted to be consistent with the reference clock; If not, the execution of the clock adjustment instruction is terminated and an error code is returned.

6. The method according to claim 1, characterized in that Also includes: When any of the following events is detected, the clock adjustment policy table is updated: The clock role of any of the clock sources changes; The clock performance parameters of any of the clock sources are changed; The preset policy table update cycle is reached; Added a new network port to enable the network clock synchronization function.

7. The method according to claim 1, characterized in that The clock adjustment strategy table is stored in a key-value pair data structure; wherein the key in the key-value pair data structure is a clock source identifier, and the value corresponding to each key includes at least the following fields: clock performance parameters and a set of allowed synchronization sources.

8. A clock adjustment device, characterized in that: The device comprises: A policy table generation module, configured to generate a clock adjustment policy table based on clock performance parameters of each clock source; the clock sources including the network clocks of each network port and the system clock, the clock adjustment policy table including at least a set of allowed synchronization sources corresponding to each of the clock sources, the set of allowed synchronization sources representing a set of clock sources configured for each of the clock sources that are allowed to serve as clock synchronization references; A clock determination module, used to determine the reference clock and the clock to be adjusted corresponding to the clock adjustment instruction; A clock adjustment module is configured to synchronize the clock to be adjusted to the reference clock based on the clock adjustment policy table when the reference clock belongs to the set of allowed synchronization sources of the clock to be adjusted.

9. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor. The computer program is executed by the at least one processor to enable the at least one processor to perform the clock adjustment method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the clock adjustment method according to any one of claims 1 to 7 when executed.

11. A computer program product, characterized in that The computer program product comprises a computer program, and when the computer program is executed by a processor, the computer program implements the clock adjustment method according to any one of claims 1 to 7.

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