Memory emptying method and system of memory

Abstract

The invention provides a memory emptying method and system of a memory, and relates to the technical field of memory management, and the method comprises the following steps: obtaining a memory block address of each memory block in the memory; calculating the local fragment density of each memory block based on a Voronoi saddle point detection algorithm in combination with the address of the memory block; calculating a neighbor memory block access frequency gradient of each memory block and an idle time item related to the idle duration; in combination with the local fragment density, the access frequency gradient of the neighbor memory block and the idle time item, calculating a pressure factor which is positively correlated with the release demand of the memory block by using an adaptive weight; establishing a multi-constraint condition based on a threshold by combining the local fragment density and the pressure factor, and screening the memory blocks to be released by utilizing the multi-constraint condition; a Delaunay triangulation algorithm is combined to determine a connected subgraph about each memory block to be released; determining emptying priorities of memory blocks in different regions according to each connected sub-graph; and emptying the memory according to the emptying priority.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of memory management, in particular to a memory emptying method and system of a memory. BACKGROUND

[0002] Memory (RAM, full name: Random Access Memory) is a temporary storage device in a computer, used for fast access to running programs and data. Compared with hard disk, memory has faster read and write speed, and is the key part of computer running efficiency. When a program starts, the operating system will load the program code and the data needed into the memory, so that the processor can access quickly. Memory emptying refers to releasing the memory blocks that are no longer used or needed from the memory, so as to make them available for re-allocation and use by other programs.

[0003] In the case of long-term operation or frequent memory allocation and release, memory will gradually produce fragmentation, causing insufficient available space, and even leading to program crashes or system slowdown. Through memory emptying operation, the memory blocks that are no longer used can be released in time, the memory structure can be optimized, and the overall system running efficiency and stability can be improved, which is particularly important in resource-limited or multi-task concurrent environments.

[0004] However, the existing memory emptying method mainly relies on garbage collection mechanism, which leads to uncontrollable release timing, easy to miss the best release timing, causing memory release delay or even memory leakage; in addition, the fixed rule or random release method cannot make the optimal decision according to the actual memory usage, and frequent allocation and release can also cause memory fragmentation, reducing the overall system performance and resource utilization. SUMMARY

[0005] In view of the above deficiencies of the prior art, the purpose of the embodiments of the present application is to provide a memory emptying method of a memory, which can solve the technical problems that the existing memory emptying method mainly relies on garbage collection mechanism, leading to uncontrollable release timing, easy to miss the best release timing, causing memory release delay or even memory leakage; in addition, the fixed rule or random release method cannot make the optimal decision according to the actual memory usage, and frequent allocation and release can also cause memory fragmentation, reducing the overall system performance and resource utilization.

[0006] The first aspect of the embodiments of the present application provides a memory emptying method of a memory, comprising:

[0007] S1: obtaining memory block addresses of each memory block in the memory;

[0008] S2: combining the memory block addresses, calculating the local fragmentation density of each memory block based on the Voronoi saddle point detection algorithm;

[0009] S3: calculating the neighboring memory block access frequency gradient of each memory block and the idle time item related to the idle duration;

[0010] S4: combining the local fragmentation density, the neighboring memory block access frequency gradient and the idle time item, calculating the stress factor positively correlated with the memory block release demand by using adaptive weight;

[0011] S5: combining the local fragmentation density and the stress factor to establish a threshold-based multi-constraint condition, and screening the to-be-released memory block by using the multi-constraint condition;

[0012] S6: determining the connected subgraph about each to-be-released memory block by combining the Delaunay triangulation algorithm;

[0013] S7: determining the emptying priority of the memory block in different regions according to each connected subgraph;

[0014] S8: emptying the memory according to the emptying priority.

[0015] In a second aspect of the embodiment of the present application, a memory emptying system of a memory is provided, comprising: a processor and a memory;

[0016] The memory stores programs or instructions executable on the processor, and the programs or instructions are executed by the processor to implement the steps of the memory emptying method of the memory as described in the first aspect.

[0017] In a third aspect of the embodiment of the present application, a readable storage medium is provided, and the readable storage medium stores programs or instructions, and the programs or instructions are executed by a processor to implement the steps of the memory emptying method as described in the first aspect.

[0018] The technical scheme provided by the embodiment of the present application has at least the following beneficial effects:

[0019] In the embodiment of the present application, by fusing the spatial modeling algorithms such as Voronoi saddle point detection and Delaunay triangulation, combining the multi-dimensional features such as the access frequency, the idle duration and the fragmentation density of the memory block, constructing the stress factor with adaptive weight, and setting the multi-constraint screening mechanism, the release time and object are intelligently judged, the precision and timeliness of memory release are significantly improved; at the same time, through the region connectivity analysis and priority sorting, the memory fragmentation is effectively avoided, the memory utilization rate and the overall performance of the system are improved, and the problems such as uncontrollable release time and easy fragmentation of the traditional method are solved. BRIEF DESCRIPTION OF DRAWINGS

[0020] The accompanying drawings are only for the purpose of illustrating specific embodiments and are not to be considered as limiting the present invention. Throughout the drawings, the same reference symbols represent the same components. Obviously, the drawings described below are only some embodiments of the present invention. It is clear that those skilled in the art can derive other drawings based on these drawings without inventive effort.

[0021] Figure 1 This is a flow chart of a method for clearing memory of a memory provided by an embodiment of the present invention;

[0022] Figure 2 The present invention is a schematic structural diagram of a memory clearing system for a memory provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0023] In order to enable those skilled in the art to better understand the technical solutions in the embodiments of the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the embodiments described are part of the embodiments of the present invention, rather than all of the embodiments. It should be understood that these descriptions are merely exemplary and are not intended to limit the scope of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work should fall within the scope of protection of the present invention.

[0024] The memory clearing method of a memory provided by an embodiment of the present invention is described in detail below with reference to the accompanying drawings through specific embodiments and application scenarios.

[0025] Reference Manual Figure 1 , shows a flow chart of a memory clearing method of a memory provided by an embodiment of the present invention.

[0026] An embodiment of the present invention provides a method for clearing memory of a memory, which may include the following steps:

[0027] S1: Get the memory block address of each memory block in the memory.

[0028] A memory block is the basic allocation unit of memory allocated by the operating system or memory manager. A memory block address refers to the starting physical or virtual address of each memory block in the memory space.

[0029] S2: Combined with the memory block address, the local fragmentation density of each memory block is calculated based on the Voronoi saddle point detection algorithm.

[0030] The Voronoi diagram is a spatial partitioning method that divides a plane into several regions. Each region corresponds to a generation point (here, a memory block address), and the distance from any point in the region to the generation point is minimized. The Voronoi saddle point detection algorithm analyzes the vertices in the Voronoi diagram (i.e., the intersections of multiple regions) and, combined with the angles and vector relationships between adjacent regions, calculates the saddle point energy of each vertex to identify regions with "unbalanced structures" or "complex boundaries." Regions with high saddle point energy typically indicate that the status (free / allocated) of the surrounding memory blocks fluctuates dramatically, indicating potential high-risk areas for fragmentation.

[0031] Local fragmentation density is a quantitative indicator of the degree of spatial fragmentation around a memory block. It measures the degree of intermingling between free and allocated blocks in the vicinity of a memory block. The fragmentation density of a memory block is calculated by calculating the average and normalized saddle point energy of vertices surrounding the memory block. Higher values ​​indicate more severe fragmentation in the area.

[0032] It should be noted that the Voronoi saddle point detection algorithm can accurately calculate the local fragmentation density, which can spatially reflect the distribution of memory fragmentation. This helps to identify memory areas with low release risk and high integration value, thereby improving the scientific nature of the clearing strategy and the fragmentation control capability.

[0033] In a possible implementation, S2 specifically includes:

[0034] S201: Mapping the memory block address to a two-dimensional plane point set.

[0035] The two-dimensional plane point set obtained by mapping is specifically:

[0036] V={(x i ,y i )}

[0037] Among them, (x i ,y i ) represents the two-dimensional coordinates of the i-th memory block, and V represents the two-dimensional plane point set obtained after the memory is mapped.

[0038] S202: Generate a Voronoi diagram for a two-dimensional plane point set.

[0039] Among them, the Voronoi diagram is a space partitioning structure used to divide a two-dimensional plane into several regions according to the positions of several points.

[0040] S203: Calculate the saddle point energy of each vertex in the Voronoi diagram.

[0041] The calculation formula of saddle point energy is:

[0042]

[0043] where N(i) denotes the set of adjacent vertices of the ith vertex, v k denotes the kth vertex in the Voronoi diagram, θ k denotes the adjacent edge angle of the kth vertex, π denotes the ratio of a circle, E s (v i ) denotes the saddle point energy of the ith vertex v i . denotes the vector between the ith vertex v i and the kth vertex v k .

[0044] It should be noted that by calculating the saddle point energy of each vertex in the Voronoi diagram, the trend of the spatial structure change between memory blocks can be quantified, and the boundary complexity between free and allocated memory blocks can be captured. This method uses the angle and vector relationship to identify topologically unbalanced regions, which helps to accurately identify potential fragmentation regions, thereby providing a high-geometric-precision and sensitive perception basis for subsequent fragmentation density evaluation, effectively improving the accuracy and spatial resolution of fragmentation identification.

[0045] S204: Calculate the local fragmentation density based on the saddle point energy to quantify the difference between the free memory blocks and the allocated memory blocks around each memory block.

[0046] The calculation formula of the local fragmentation density is specifically:

[0047]

[0048] where S i denotes the local fragmentation density of the ith memory block B i , max denotes the maximum value of the saddle point energy of the vertices corresponding to each memory block, denotes the average value of the saddle point energy of the vertices corresponding to each memory block surrounding the memory block B i .

[0049] Specifically, the address of each memory block is mapped to a two-dimensional coordinate point to form a set of plane points, and then a Voronoi diagram is generated using these points to divide the memory space into multiple regions. Then, by calculating the saddle point energy of each vertex in the Voronoi diagram, the geometric characteristics of the boundary of each region are analyzed, and the complexity of the change in the state of the memory blocks in the region is determined. Finally, by normalizing the average value of the saddle point energy, the local fragmentation density of each memory block is obtained, thereby quantitatively evaluating the degree of memory fragmentation. This method uses spatial topological characteristics to accurately identify fragmented regions, improves the fineness and pertinence of the memory clearing strategy, and avoids blind release causing new fragmentation.

[0050] S3: Calculate the neighboring memory block access frequency gradient of each memory block and the idle time item related to the idle duration.

[0051] The neighboring memory block access frequency gradient refers to the degree of change of the memory block access frequency in the surrounding of a certain memory block. The idle time item refers to the time that a memory block has not been accessed again since the last time it was accessed.

[0052] It should be noted that by introducing the neighboring memory block access frequency gradient and the idle time item, the usage state of the memory block can be comprehensively evaluated from two dimensions of spatial access activity and temporal idle characteristics, effectively identifying the memory region that has not been used for a long time or has a significantly lower usage frequency than the neighboring blocks, thereby improving the accuracy and timeliness of the memory release decision and avoiding the removal of active data.

[0053] In one possible implementation, S3 specifically includes:

[0054] S301: Obtain the memory block access frequency of each memory block.

[0055] S302: Calculate the neighboring memory block access frequency gradient according to the memory block access frequency.

[0056] The calculation formula of the neighboring memory block access frequency gradient is specifically:

[0057]

[0058] wherein, denotes the neighboring memory block access frequency gradient of the i-th memory block, A max denotes the maximum memory block access frequency.

[0059] wherein, Specifically, it can represent the neighboring memory block access frequency gradient in the eight-neighborhood of the i-th memory block.

[0060] It should be noted that in this process, the access frequency of each memory block is first obtained by monitoring, reflecting its active degree of use by the program. Then, based on the eight-neighborhood principle, the gradient of the access frequency between each memory block and its eight neighboring memory blocks is calculated, reflecting the difference in the activity of the memory block in the local area. By normalizing the gradient value, a "low-activity island" with significantly lower access frequency than the surrounding memory blocks can be identified as a candidate for priority release. The advantage of this method is that not only the activity of the memory block itself is considered, but also the access behavior of the surrounding memory blocks, achieving more accurate release intention judgment and improving the intelligence and local rationality of memory management.

[0061] S4: Combine local fragmentation density, neighboring memory block access frequency gradient, and idle time term, and calculate a stress factor positively correlated with memory block release demand using adaptive weights.

[0062] wherein the stress factor is a comprehensive index combining local fragmentation density, neighboring memory block access frequency gradient, and idle time term, and adjusted by adaptive weights. The stress factor is positively correlated with the release demand of the memory block, meaning that the higher the stress factor, the more the memory block needs to be released.

[0063] By comprehensively considering fragmentation density, access frequency, and idle time, and introducing adaptive weights, the accurate quantification of memory block release demand is effectively realized. This method can dynamically adjust the importance of each factor, making the memory release decision more flexible and intelligent, thereby improving the timeliness and efficiency of memory clearing, and avoiding performance problems caused by excessive clearing or delayed release.

[0064] In one possible implementation, S4 specifically includes:

[0065] S401: Attach adaptive weights to each local fragmentation density, neighboring memory block access frequency gradient, and idle time term, respectively.

[0066] S402: Sum the items with adaptive weights to obtain the stress factor.

[0067] The calculation method of the stress factor is specifically:

[0068]

[0069] wherein P i represents the stress factor of the i-th memory block, α, β, and γ represent the adaptive weights of the idle time term , neighboring memory block access frequency gradient , and local fragmentation density S i , respectively, e represents the natural constant, T idle represents the idle time of the i-th memory block, T c represents the average lifetime of the memory blocks in the memory.

[0070] It should be noted that in this step, by assigning adaptive weights to the three key indicators of local fragmentation density, near-neighbor memory block access frequency gradient and idle time term, a comprehensive evaluation of different memory block states is realized. Each factor reflects a dimension of memory block release: the idle time term indicates that the memory block has not been used for a long time, the access frequency gradient reflects its cold spot in the local area, and the fragmentation density measures the impact on the memory structure after release. The stress factor obtained by weighted summation can dynamically reflect the release urgency and rationality of the memory block. The advantage of this method is to integrate multi-dimensional information and automatically adjust the importance of each factor through trainable adaptive weights, thereby realizing more refined and intelligent memory release decisions, improving overall memory management efficiency and reducing the risk of false release and fragmentation.

[0071] S5: Establish a threshold-based multi-constraint condition in combination with the local fragmentation density and the stress factor, and use the multi-constraint condition to screen the memory blocks to be released.

[0072] Among them, the memory block to be released refers to the memory block that is determined to have release conditions through multi-dimensional evaluation in the current memory emptying cycle. By constructing a multi-constraint condition composed of stress factor, local fragmentation density, Laplacian operator, etc., the memory block that is truly suitable for release is accurately screened, effectively avoiding problems such as premature release, late release or false release. At the same time, the impact of release on fragmentation is considered to ensure that the release operation does not destroy the memory structure, thereby improving the release efficiency while maintaining the health and continuity of the system memory.

[0073] In one possible implementation, S5 specifically includes:

[0074] S501: Calculate the stress factor threshold in combination with the stress factor mean and the stress factor standard deviation.

[0075] The calculation method of the stress factor threshold is specifically:

[0076] P th = λ · μ P + (1-λ) · σ P

[0077] Where P th represents the stress factor threshold, λ represents the weight factor controlling the relative importance of the stress factor mean and the stress factor standard deviation, μ P represents the stress factor mean, and σ P represents the stress factor standard deviation.

[0078] It should be noted that the dynamic threshold is calculated by combining the mean and standard deviation of the pressure factor, so that the system can flexibly adjust the screening standard according to the concentration and dispersion of the overall release demand of the current memory block. Compared with the fixed threshold, this method has stronger adaptability, can accurately identify the memory block with high release priority in different memory usage scenarios, improves the stability and robustness of the release judgment, and avoids misjudgment caused by a single statistical quantity.

[0079] S502: Calculate the Laplacian of the pressure factor corresponding to each memory block for local pressure peak detection.

[0080] The calculation formula of the Laplacian is specifically:

[0081]

[0082] wherein, P i represents the Laplacian of the pressure factor P represents the partial derivative.

[0083] It should be noted that by calculating the Laplacian of the pressure factor, the local pressure peak around the memory block can be detected, so as to accurately identify the area with high memory release demand. This method can capture the local area with pressure mutation in the memory space, ensure that the system releases the memory block in a high pressure state in priority, effectively avoid unnecessary memory release, and optimize the efficiency and accuracy of memory emptying.

[0084] S503: Calculate a critical fragmentation safety threshold that the release of the memory block will not aggravate the memory fragmentation, in combination with the local fragmentation density.

[0085] The calculation method of the critical fragmentation safety threshold is specifically:

[0086]

[0087] wherein, S safe represents the critical fragmentation safety threshold, F MemRatio represents the proportion of the current free memory block in the total memory block in the memory, τ1 represents a benchmark coefficient for balancing release benefits and fragmentation risks, and τ2 represents a sensitivity coefficient for controlling the influence degree of the free memory block on the fragmentation safety threshold.

[0088] Optionally, the benchmark coefficient can be set to 0.7, and the sensitivity coefficient can be set to 2.

[0089] It should be noted that by introducing the fragmentation safety threshold related to the current idle memory ratio, the dynamic control of the fragmentation risk of the memory release operation is realized. The method can flexibly adjust the release strategy according to the adequacy of the system idle memory: when the idle memory is less, the restriction is relaxed to release more memory, and when the idle memory is sufficient, the control is more strict to avoid the increase of fragmentation, so as to realize the intelligent balance between performance and fragmentation risk, and improve the safety and adaptability of the memory cleaning strategy.

[0090] S504: The three conditions that the pressure factor is greater than the pressure factor threshold, the Laplacian is less than zero, and the local fragmentation density is less than the critical fragmentation safety threshold are taken as multi-constraint conditions to screen the memory blocks to be released.

[0091] The screening formula is specifically:

[0092]

[0093] It should be noted that the system first calculates a comprehensive threshold by the mean and standard deviation of the pressure factor, dynamically adapts to the overall load state of the current memory, and avoids the limitation of the static threshold. Then, the Laplacian is used to analyze the second-order derivative of the pressure factor, to detect the local pressure peak, to ensure that the selected memory block has the "release hot spot" feature in space. Then, the fragmentation safety threshold is introduced to control the fragmentation risk caused by the release in combination with the current idle memory ratio. Finally, the three conditions of "pressure greater than threshold + local high pressure point + release will not aggravate fragmentation" are used to screen the truly optimal memory blocks to be released. This process realizes quantitative, dynamic and spatial sensitive multi-constraint judgment, effectively improves the accuracy and system robustness of the release decision, and avoids the performance loss and fragmentation aggravation caused by blind release.

[0094] S6: Determine the connected subgraph about each memory block to be released in combination with the Delaunay triangulation algorithm.

[0095] The Delaunay triangulation is an algorithm for dividing a set of planar points into several non-overlapping triangles. In the Delaunay triangulation network, if multiple triangles are connected together by sharing edges, they can be regarded as a group of "connected" triangles. The memory block set covered by these connected triangles constitutes a "connected subgraph".

[0096] By constructing the memory blocks to be released into a connected subgraph with reasonable structure through the Delaunay triangulation algorithm, the spatially aggregated memory block group can be identified, the fragmentation caused by scattered release can be avoided, and a structural basis for subsequent region-based priority setting for cleaning is provided, so as to improve the systematicness, continuity and merging efficiency of the release operation.

[0097] In one possible implementation, S6 specifically includes:

[0098] S601: Combining the two-dimensional plane point set, using the Bowyer-Watson algorithm to generate a Delaunay triangulation of each memory block to be released, and obtaining a triangle set including multiple Delaunay triangles.

[0099] S602: Delaunay triangles with shared edges in the triangle set are considered connected, wherein each Delaunay triangle that satisfies the connectivity rule constitutes a connected subgraph.

[0100] It's important to note that the Bowyer-Watson algorithm generates a Delaunay triangulation, transforming the spatial distribution of memory blocks into a structured triangle set. Adjacent and connected memory block regions are identified based on shared edge relationships. This approach offers the advantage of accurately identifying spatially clustered groups of memory blocks with similar states, providing a topological foundation for subsequent regional clearing and optimizing the release sequence, thus avoiding overly dispersed and inefficient fragment clearing.

[0101] S7: Determine the clearing priority of memory blocks in different areas according to each connected subgraph.

[0102] Clearing priority refers to the weighted basis for determining which areas should be cleared first after sorting the memory blocks to be released in multiple connected subgraphs. By calculating the merging demand ratio of each connected subgraph, the clearing order is rationally arranged, prioritizing the release of memory areas with greater continuity and integration value, thereby improving the availability of released memory and reducing the risk of fragmentation.

[0103] In a possible implementation, S7 specifically includes:

[0104] S701: Combining the two-dimensional plane point set, using the Bowyer-Watson algorithm to generate a Delaunay triangulation of each memory block to be released, and obtaining a triangle set including multiple Delaunay triangles.

[0105] Among them, the Bowyer-Watson algorithm is a commonly used algorithm for incrementally constructing Delaunay triangulation. A Delaunay triangulation is a triangular network constructed based on a set of discrete points.

[0106] S702: Calculate the triangle area of ​​each Delaunay triangle in the triangle set.

[0107] The formula for calculating the area of ​​a triangle is:

[0108]

[0109] Wherein, Area (T) represents the triangle area of the Delaunay triangle T, (x1, y1), (x2, y2) and (x3, y3) represent the memory block coordinates corresponding to the three vertices of the Delaunay triangle respectively.

[0110] It should be noted that by calculating the area of each Delaunay triangle, the geometric distribution range of the memory block in the two-dimensional space can be quantified, providing basic data for evaluating the compactness of the region and the overall coverage area of the subsequent calculation of the connected subgraph. The advantage of this method is that it can abstract the discrete memory block into a triangular unit with spatial attributes, so that the memory release strategy not only depends on the logical index, but also introduces spatial structure information, thereby improving the accuracy of region identification and the spatial integration efficiency of memory clearing operation.

[0111] S703: Traverse each Delaunay triangle in the triangle set, and calculate the total triangle area of the connected Delaunay triangle.

[0112] The calculation formula of the total triangle area is specifically:

[0113]

[0114] Wherein, Area (G) represents the total triangle area of the connected subgraph G, G triangles represents the set of Delaunay triangles contained in G.

[0115] It can be understood that by traversing the connected Delaunay triangle and accumulating its area, the coverage range of each connected subgraph in the two-dimensional space is calculated. The total area reflects the geometric distribution density and continuity of the memory block in the address space. Its advantage is that it can be used to judge whether the arrangement of memory blocks is compact, which helps to evaluate whether it has the spatial potential to be merged into a large block of memory after release, thereby providing a key basis for subsequent release priority ranking and memory integration optimization.

[0116] S704: Traverse each connected subgraph to determine the total memory block byte amount of all memory blocks in the corresponding connected subgraph.

[0117] The calculation formula of the total memory block byte amount is specifically:

[0118]

[0119] Wherein, B g represents the gth memory block in the connected subgraph G, |G| represents the number of memory blocks in the connected subgraph G, size (B g ) represents the byte size of the memory block B g .

[0120] It should be noted that the actual memory resource size occupied by the region is quantified by traversing the memory blocks in each connected subgraph and calculating the total number of bytes thereof. The value is used to compare with the area covered by the region, so as to measure the distribution density of the memory blocks in space. The advantage is that the value of the region after release can be effectively evaluated, which helps to judge whether it is worth emptying the region in priority, thereby improving the output efficiency of the release operation on the large available memory and optimizing the overall memory layout of the system.

[0121] S705: Calculate the merging demand ratio between the total area of the triangular region and the total number of bytes of the memory blocks in the same connected subgraph.

[0122] S706: Based on the relationship between the proportion of the current idle memory blocks to the total memory blocks and the merging demand ratio, it is judged whether the memory blocks in each connected subgraph can be merged into a large block of continuous memory after release, if yes, go to step S707, otherwise, the memory blocks corresponding to the connected subgraph are excluded from the to-be-released memory blocks.

[0123] The judgment rule is specifically:

[0124]

[0125] Among them, The merging demand ratio, ρ represents an empirical coefficient for balancing the merging efficiency and the release range, F MemRatio The proportion of the current idle memory blocks in the total memory blocks in the memory.

[0126] The specific meaning of the inequality is that the numerator is the "covered area" of the memory blocks in the address space, and the denominator is the total size of the memory blocks. The larger the ratio, the more compact the arrangement of the memory blocks in the address space (the area is large and the total size is small, which is easy to merge after release). In combination with the proportion of the current idle memory blocks in the total memory blocks, the strategy adapts to the system memory adequacy (strict if idle, relaxed if idle). Optionally, the empirical coefficient can be set to 0.8.

[0127] It should be noted that by comparing the merging demand ratio of the connected subgraph with the weighted threshold of the idle memory proportion, the mergability of the memory blocks after release is dynamically judged, so as to select the regions with more integration value. The advantage is that not only the spatial structure is considered, but also the current idle state of the system is combined to adaptively adjust the release strategy, which not only improves the continuous memory generation capability, but also avoids unnecessary inefficient release operation, thereby improving the overall memory management efficiency and practicability.

[0128] S707: Sort according to the merging demand ratio, and determine the emptying priority of each connected subgraph according to the sorting result, wherein the emptying priority is consistent with the sorting result.

[0129] Specifically, the system generates a Delaunay triangulation through a Bowyer-Watson algorithm, calculates the area of each triangle, accumulates the total coverage area of each connected subgraph, and then counts the total amount of memory block bytes contained in the subgraph, to further calculate the "merging demand ratio", that is, the ratio of area to size. The ratio reflects the compactness of the memory blocks in the region. The larger the value, the more concentrated the memory blocks are in space but occupy less resources, and it is more suitable to be released and merged into large blocks of continuous memory. In combination with the current idle memory ratio, the release strategy is dynamically adjusted to ensure that the release operation is efficient and safe. The advantage of this process is that it can accurately evaluate the release and merging value of each region based on the spatial density and system memory state, implement a prioritized partition emptying strategy, effectively improve the large block memory generation capability, and optimize the overall memory management efficiency.

[0130] S8: Memory emptying according to emptying priority.

[0131] In a possible implementation, the updating manner of the adaptive weight specifically includes:

[0132] A loss function is established with respect to the local fragmentation density and the release time difference, where the release time difference is specifically the time interval between the time when each memory block needing memory emptying is determined as a memory block to be released and the actual release time.

[0133] The loss function is specifically:

[0134]

[0135] Where L represents the loss function value, w represents the release time difference weight value, R Delay The average of the release time difference of each memory block needing memory emptying, represents the average of the local fragmentation density of all memory blocks in the memory.

[0136] It should be noted that the loss function dynamically adjusts the adaptive weight in the release decision by comprehensively considering the influence of the average of the local fragmentation density of the memory block and the release time difference. By introducing the release time difference, the release delay can be effectively controlled, the memory emptying opportunity can be optimized, and the risk of memory fragmentation can be reduced. At the same time, the memory release priority is adjusted according to the local fragmentation density, so that more balanced and efficient resource allocation can be realized in memory management.

[0137] A random walk matrix is introduced, combined with the loss function, and the gradient descent method is used to update each adaptive weight.

[0138] The updating formula is specifically:

[0139]

[0140] wherein, W represents a random walk matrix of three rows and three columns, and respectively represent adaptive weights at time t and t+1, and T represents an adaptive weight vector, and the superscript T represents a transposition operation, and

[0141] Optionally, the learning rate can be set to 0.01, and the release time difference weight value can be set to 1.5.

[0142] Specifically, in the process, the system measures the fragment control effect and release response efficiency of the current memory management strategy by constructing a loss function containing the local fragment density mean value and the release time difference mean value. The release time difference is introduced as a time performance indicator to improve the timeliness of the release decision. Then, the gradient descent method is used to iteratively update the weight vector, and the random walk matrix is introduced to enhance the global search ability and diversity of weight adjustment, avoiding falling into local optimum. This mechanism can dynamically optimize the contribution of different factors (such as fragment density, access frequency gradient, and idle time item) in the stress factor, so that the algorithm can continuously adapt to different memory loads and fragment states, improving the robustness, precision and adaptability of the release strategy.

[0143] In practical application, the scheme comprehensively utilizes the Voronoi saddle point detection algorithm and the Delaunay triangulation algorithm to introduce multi-dimensional data analysis in the release decision of the memory block. First, by calculating the local fragment density of the memory block, the access frequency gradient of the neighboring memory block and the idle time, the urgency of memory release is accurately evaluated, avoiding the problem that the garbage collection mechanism cannot control the release timing. Then, combined with the adaptive weight mechanism, the influence of each factor is dynamically adjusted to optimize the release order and timing of the memory block, avoiding memory leakage and delay. Through multi-constraint screening and connectivity analysis based on threshold, it is ensured that the release of the memory block will not aggravate the fragmentation, and the memory integration ability is effectively improved through emptying priority sorting. Overall, the technical problems of memory fragmentation, release delay and low resource utilization are solved, and the intelligence of memory management and system performance are improved.

[0144] The technical scheme provided by the embodiment of the application has at least the following beneficial effects:

[0145] In the embodiment of the present application, by fusing Voronoi saddle point detection and Delaunay triangulation and other spatial modeling algorithms, combining the access frequency, idle time and fragmentation density and other multi-dimensional features of the memory block, an adaptive weight pressure factor is constructed, and a multiple constraint screening mechanism is set, the release time and object are intelligently judged, the accuracy and timeliness of memory release are significantly improved, and the problems of uncontrollable release time and easy fragmentation of the traditional method are solved.

[0146] Reference is made to the accompanying drawings that show a structural schematic diagram of a memory emptying system of a memory according to an embodiment of the present application. Figure 2 , shows a structural schematic diagram of a memory emptying system of a memory according to an embodiment of the present application.

[0147] The embodiment of the present application provides a memory emptying system 20 of a memory, which comprises a processor 201 and a memory 202.

[0148] The memory 202 stores programs or instructions that can run on the processor 201, and the programs or instructions are executed by the processor 201 to realize the steps of the memory emptying method of the memory and achieve the same technical effects, and the present application will not be repeated here.

[0149] It should be understood that the processor 201 in the embodiment of the present application can be a central processing unit (CPU), and the processor can also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), ready programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc.

[0150] It should also be appreciated that the memory 202 in embodiments of the application can be volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. In one example, a non-volatile memory can be a Read-Only Memory (ROM), Programmable ROM (PROM), Erasable PROM (EPROM), Electrically EPROM (EEPROM), or flash memory. A volatile memory can be a Random Access Memory (RAM), which is used as external cache. By way of example, and not limitation, many forms of random access memory can be used, such as Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), Synchronous DRAM (SDRAM), Double-Data Rate SDRAM (DDR SDRAM), Enhanced SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), and Direct Rambus RAM (DR RAM).

[0151] The above-described embodiments can be implemented in part or in whole through software, hardware (e.g., circuitry), firmware, or any combination thereof. When implemented in software, the above-described embodiments can be implemented in the form of a computer program product. The computer program product includes one or more computer instructions or computer programs. When loaded and executed by a computer, the computer instructions or computer programs cause the computer to perform the processes or functions described above according to the embodiments of the present application. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable apparatus. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, such as from a website, a computer, a server, or a data center to another website, computer, server, or data center through a wired (e.g., infrared, wireless, microwave, or the like) manner. The computer-readable storage medium can be any available medium or a collection of medium accessible by a computer or a data storage device such as a server, data center, or the like, containing one or more of the available medium. The available medium can be a magnetic medium (e.g., a floppy diskette, a hard disk, a magnetic tape), an optical medium (e.g., a DVD), or a semiconductor medium. The semiconductor medium can be a solid-state hard disk.

[0152] It should be understood that the size of the serial number of each process described above does not mean the order of execution, and the execution order of each process should be determined by its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0153] Those of ordinary skill in the art can realize that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be realized in electronic hardware, or a combination of computer software and electronic hardware. Whether the functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. A person skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0154] Those of ordinary skill in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described devices, apparatuses, and units can refer to the corresponding processes in the foregoing method embodiments, which will not be described here.

[0155] In several embodiments provided by the present application, it should be understood that the disclosed devices, apparatuses and methods can be implemented in other manners. For example, the embodiments of the apparatus described above are merely schematic. For example, the division of the units is only a logical function division. There can be another division manner for the actual implementation, for example, multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. In addition, the displayed or discussed mutual couplings or direct couplings or communication connections between different units, can be indirect couplings or communication connections through some interfaces, devices or units, and can be in electrical, mechanical or other forms.

[0156] The units described as separate components can or can not be physically separate, and the components shown as units can or can not be physical units, that is, can be located in one place, or can be distributed on multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the embodiment.

[0157] In addition, each functional unit in each embodiment of the present application can be integrated into a processing unit, or each unit can be physically present alone, or two or more units can be integrated into one unit.

[0158] If the functions are realized in the form of software function units and sold or used as independent products, they can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the present application essentially or the parts of the prior art that make contributions or parts of the technical solutions can be embodied in the form of software products. The computer software product is stored in a storage medium, and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various media that can store program codes.

[0159] The embodiment of the present application provides a readable storage medium, which includes: a program or instruction stored on the readable storage medium, the program or instruction is executed by a processor to realize the steps of the memory emptying method of the memory, and the same technical effect can be achieved. To avoid repetition, the present application will not be described again.

[0160] It should be pointed out finally that the above embodiments are only used to illustrate the technical solutions of the embodiments of the present application, but not to limit them. Although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that the technical solutions recorded in the foregoing embodiments can be modified, or some technical features can be replaced equivalently; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application. Any changes or replacements that can be easily thought of by those skilled in the art within the technical scope disclosed by the present application should be covered within the protection scope of the present application.

Claims

1. A method for clearing memory of a memory, characterized in that: include: S1: Get the memory block address of each memory block in the memory; S2: Calculating the local fragmentation density of each memory block based on the Voronoi saddle point detection algorithm in combination with the memory block address; S3: Calculate the access frequency gradient of the neighboring memory blocks of each of the memory blocks and the idle time item related to the idle time length; S4: combining the local fragmentation density, the neighboring memory block access frequency gradient, and the idle time item, and calculating a pressure factor positively correlated with the memory block release demand using an adaptive weight; S5: establishing a threshold-based multi-constraint condition based on the local fragmentation density and the pressure factor, and screening the memory blocks to be released using the multi-constraint condition; S6: Determine a connected subgraph of each of the memory blocks to be released by combining a Delaunay triangulation algorithm; S7: determining the clearing priority of memory blocks in different regions according to each of the connected subgraphs; S8: Clear the memory according to the clearing priority.

2. The memory clearing method of a memory according to claim 1, characterized in that: The S2 specifically includes: S201: Mapping the memory block address into a two-dimensional plane point set; S202: Generate a Voronoi diagram for the two-dimensional plane point set; S203: Calculating the saddle point energy of each vertex in the Voronoi diagram; S204: Calculate the local fragmentation density based on the saddle point energy to quantify the difference between the free memory blocks and the allocated memory blocks around each of the memory blocks.

3. The memory clearing method of a memory according to claim 1, characterized in that: The S3 specifically includes: S301: Obtaining the memory block access frequency of each memory block; S302: Calculate the neighboring memory block access frequency gradient according to the memory block access frequency.

4. The memory clearing method of a memory according to claim 1, characterized in that: The S4 specifically includes: S401: Adding the adaptive weight to each of the local fragmentation density, the neighboring memory block access frequency gradient, and the idle time item; S402: Sum up the items to which the adaptive weights are added to obtain the pressure factor.

5. The memory clearing method of a memory according to claim 1, characterized in that: The S5 specifically includes: S501: Calculating a stress factor threshold by combining the stress factor mean and the stress factor standard deviation; S502: Calculating the Laplace operator of the pressure factor corresponding to each of the memory blocks to perform local pressure peak detection; S503: Calculating a critical fragmentation safety threshold that will not aggravate memory fragmentation by releasing a memory block based on the local fragmentation density; S504: The memory blocks to be released are screened by using the three conditions that the pressure factor is greater than the pressure factor threshold, the Laplacian operator is less than zero, and the local fragmentation density is less than the critical fragmentation safety threshold as the multiple constraint conditions.

6. The memory clearing method of a memory according to claim 2, characterized in that: The S6 specifically includes: S601: generating a Delaunay triangulation of each of the memory blocks to be released using the Bowyer-Watson algorithm in combination with the two-dimensional plane point set, and obtaining a triangle set including a plurality of Delaunay triangles; S602: Delaunay triangles in the triangle set that share edges are considered connected, wherein each Delaunay triangle that satisfies the connectivity rule constitutes the connected subgraph.

7. The memory clearing method of a memory according to claim 2, characterized in that: The S7 specifically includes: S701: generating a Delaunay triangulation of each of the memory blocks to be released using the Bowyer-Watson algorithm in combination with the two-dimensional plane point set, and obtaining a triangle set including a plurality of Delaunay triangles; S702: Calculate the triangle area of ​​each Delaunay triangle in the triangle set; S703: traverse each Delaunay triangle in the triangle set and calculate the total area of ​​the triangle regions connected by the Delaunay triangles; S704: traversing each of the connected subgraphs to determine the total number of memory block bytes of all memory blocks in the corresponding connected subgraph; S705: Calculating a merging requirement ratio between the total area of ​​the triangular regions of the same connected subgraph and the total number of bytes of the memory blocks; S706: Based on the relationship between the ratio of the current free memory blocks to the total memory blocks and the merging requirement ratio, determine whether the memory blocks in each connected subgraph can be merged into a large continuous memory block after being released; if so, proceed to step S707; otherwise, remove the memory blocks corresponding to the connected subgraph from the memory blocks to be released; S707: Sorting is performed according to the combined demand ratio, and a clearing priority of each of the connected subgraphs is determined according to the sorting result, wherein the clearing priority is consistent with the sorting result.

8. The memory clearing method of a memory according to claim 1, characterized in that: The updating method of the adaptive weight specifically includes: Establishing a loss function related to the local fragmentation density and the release time difference, wherein the release time difference is specifically the time interval between the moment when each memory block that needs to be cleared is determined to be a memory block to be released and the moment when it is actually released; A random walk matrix is ​​introduced, combined with the loss function, and the gradient descent method is used to update each of the adaptive weights.

9. A memory clearing system for a memory, characterized in that: include: processor and memory; The memory stores a program or instruction that can be run on the processor, and when the program or instruction is executed by the processor, the steps of the memory clearing method of any one of claims 1 to 8 are implemented.

10. A readable storage medium, characterized in that: The readable storage medium stores a program or instruction, and when the program or instruction is executed by the processor, the steps of the memory clearing method of the memory according to any one of claims 1 to 8 are implemented.

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