Near field communication tag identification circuit and chip

Abstract

The invention discloses a near field communication tag identification circuit and a chip. The circuit comprises a current sampling module, a sampling signal processing module and a quantitative judgment module, the current sampling module is used for sampling current generated by the TX transmitting end of the near field communication chip before and after the intervention of the tag, and converting the current into a voltage signal; the sampling signal processing module is connected with the current sampling module and is used for filtering and amplifying the voltage signal and adjusting the common-mode potential of the output signal to obtain a target voltage signal; and the quantification determination module is connected with the sampling signal processing module and is used for performing analog-to-digital conversion on the target voltage signal, comparing the converted signal with a preset threshold value so as to determine whether there is label intervention, and outputting a determination result. According to the invention, the path loss and interference of the RX signal can be avoided, and the sensitivity and anti-noise capability of the NFC tag intervention detection are significantly improved.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of near field communication, and particularly relates to a near field communication tag identification circuit and a chip. BACKGROUND

[0002] Near Field Communication (NFC) is a short-range high-frequency radio technology evolved from non-contact radio frequency identification (RFID) technology. It supports near-field wireless communication between mobile devices, consumer electronics, PCs and smart control tools, and its working frequency is 13.56 MHz, and the transmission distance is within 10 cm or 20 cm. As a wireless connection technology that provides easy, secure and fast communication, NFC has the characteristics of short distance, high bandwidth and low energy consumption. With its low power consumption, high security and non-contact interaction characteristics, NFC has become the core technology in the fields of mobile payment, identity recognition and access control system.

[0003] In the use of NFC tags, the read-write device needs to identify when the NFC tag is close to enter the normal card detection mode for communication. For the identification of whether there is a tag intervention, the traditional NFC tag detection scheme usually relies on the change of the received signal (RX) to judge whether the tag is intervened. For example, by monitoring the received echo signal strength or carrier frequency offset and other characteristics, combined with fixed threshold or simple signal processing algorithm for judgment. However, such methods have the following inherent defects: weak anti-interference ability, RX signal is easily affected by environmental noise, multipath interference or electromagnetic radiation of adjacent devices, resulting in unstable detection results; insufficient sensitivity, only significant signal changes can be captured, and small tag interventions (such as partial contact or low-power state of the tag) are prone to missed judgment; high hardware complexity, additional RX front-end circuit and signal processing module are needed, increasing system cost and power consumption.

[0004] Chinese patent application No. CN119808805A discloses an NFC passive tag identification system, method and NFC device. The system includes an energy collection circuit for collecting and storing environmental energy. The system also includes a radio frequency transmission circuit connected with the energy collection circuit, powered by environmental energy, for transmitting an excitation signal for making the terminal device exit the low-power card detection (LPCD) mode. In addition, the system also includes an NFC tag circuit for inducting the NFC probe signal transmitted by the terminal device to communicate with the terminal device.

[0005] The scheme core is still to identify through the communication between the NFC detection signal of the terminal device and the tag, and essentially depends on the signal change (such as radio frequency response) on the RX path, which is easy to be affected by environmental electromagnetic interference, adjacent devices, reflection and other factors, and the detection result is unstable, and it is difficult to support high-precision tag judgment; the energy collection and excitation transmission circuit needs additional hardware support, and there is a trend of increasing power consumption and physical structure complexity at both ends of the terminal or the tag, which is not conducive to chip-level integration and low-power design. SUMMARY

[0006] The application provides a near field communication tag identification circuit, and aims to solve the problems of insufficient detection sensitivity and anti-noise ability caused by easy interference.

[0007] To solve the above technical problems, the tag identification circuit provided by the application is arranged in a near field communication chip and includes a current sampling module, a sampling signal processing module and a quantization determination module. The current sampling module is used to sample the current generated by the transmission end of the near field communication chip before and after the intervention of the tag, and convert the current into a voltage signal. The sampling signal processing module is connected with the current sampling module, and is used to filter and amplify the voltage signal, and adjust the common-mode potential of the output signal, so as to obtain a target voltage signal. The quantization determination module is connected with the sampling signal processing module, and is used to compare the target voltage signal with a preset threshold after analog-to-digital conversion, so as to determine whether the tag intervenes, and output the determination result.

[0008] Preferably, the current sampling module includes: A multi-transistor switching unit is used to establish a controllable current path between the first transmission end and the second transmission end. A current shunt path and a sampling resistor are arranged on one side of the transistor switching unit, and are used to extract part of the transmission current and convert it into a voltage signal.

[0009] Preferably, the multi-transistor switching unit includes: A first PMOS tube and a second PMOS tube are respectively connected to a power supply and the first transmission end and the second transmission end. A plurality of groups of NMOS tubes are connected to the ground or the sampling resistor, one group of which is used to establish a main current path, and the other group is connected in series with the sampling resistor and is used for current shunt. The PMOS tubes and the NMOS tubes are turned on through control signals, so as to realize a bidirectional controllable switching path. The sampling resistor is used to convert the shunt current into a voltage signal.

[0010] Preferably, the first PMOS tube has a source connected to a power supply, a drain connected to a first emission end, and a gate receiving a first control signal. The second PMOS tube has a source connected to the power supply, a drain connected to a second emission end, and a gate receiving a second control signal. The plurality of NMOS tubes comprises a first NMOS tube, a second NMOS tube, a third NMOS tube and a fourth NMOS tube; the first NMOS tube has a drain connected to the first emission end, a source connected to the ground, and a gate receiving a third control signal; the second NMOS tube has a drain connected to the first emission end, a source connected to the ground through a sampling resistor, and a gate receiving the third control signal; the third NMOS tube has a drain connected to the second emission end, a source connected to the ground, and a gate receiving a fourth control signal; and the fourth NMOS tube has a drain connected to the second emission end, a source connected to the ground through a sampling resistor, and a gate receiving the fourth control signal. The first control signal and the third control signal are in the same direction, the second control signal and the fourth control signal are in the same direction, and the first control signal and the second control signal are in opposite directions.

[0011] Preferably, the first control signal, the second control signal, the third control signal and the fourth control signal are square wave signals.

[0012] Preferably, the sampling signal processing module comprises: a filtering unit configured to perform smoothing processing on a voltage signal output by the current sampling module; an amplifying unit configured to amplify the voltage signal after filtering; a bias adjusting unit configured to adjust the common-mode level of the amplified signal to improve the quantization accuracy of analog-to-digital conversion.

[0013] Preferably, the filtering unit is a low-pass filter, which receives the voltage signal as an input and outputs a filtered voltage.

[0014] Preferably, the amplifying unit comprises an operational amplifier, an inverting input end of which receives an output of the filtering unit, a non-inverting input end of which is connected to the ground through a first resistor and receives an output current of the bias adjusting unit, and an output end of which is fed back to the non-inverting input end through a feedback resistor and is configured to output a processed signal. The bias adjusting unit comprises an adjustable constant current source connected to the non-inverting input end and configured to adjust the common-mode voltage level of the amplifying unit.

[0015] Preferably, the quantization determination module comprises an analog-to-digital converter configured to convert the target voltage signal into a digital signal, compare the digital signal with a preset digital threshold, and output a corresponding recognition result signal based on a comparison result.

[0016] Correspondingly, the application further provides a near field communication chip, which comprises: A radio frequency transmitting module is configured to generate a radio frequency signal required for near field communication; A radio frequency receiving module is configured to receive a response signal returned by the near field communication tag; A control processing module is configured to control and manage the communication process. The near field communication chip further comprises the above-mentioned near field communication tag identification circuit, which is configured to detect the intervention of the near field communication tag.

[0017] Compared with the prior art, the present application has the following technical effects: 1. The tag identification circuit proposed in the present application directly monitors the slight change of TX current when the tag intervenes through the cooperative design of the H-bridge driving circuit and the matching network. This transmission end current monitoring mechanism avoids the path loss and interference of the RX signal, and significantly improves the detection sensitivity and noise immunity.

[0018] 2. The tag identification circuit proposed in the present application converts the TX current change into a voltage signal, and extracts the average power consumption combined with a low-pass filter, so as to capture the dynamic current characteristics rather than a single signal amplitude. Unlike the traditional RX signal static threshold determination, this method can distinguish the real tag intervention from the current disturbance caused by environmental noise, and reduce the misjudgment rate.

[0019] 3. The tag identification circuit proposed in the present application sets an adjustable bias current in the sampling signal processing module, which can dynamically adjust the initial state output voltage to ensure that the ADC quantization is in the best interval. The threshold for comparison can be flexibly set according to the scene requirements to balance the detection sensitivity and environmental adaptability. This design enables the system to maintain stable performance under temperature changes, device aging or strong interference environment. BRIEF DESCRIPTION OF DRAWINGS

[0020] Figure 1 is the structural principle diagram of the tag identification circuit described in the present application; Figure 2 is the structural schematic diagram of the tag identification circuit described in the present application; Figure 3 is the circuit principle diagram of the current sampling module described in the embodiment of the present application; Figure 4 is the circuit principle diagram of the sampling signal processing module described in the embodiment of the present application; Figure 5 is the structural schematic diagram of the quantization determination module described in the embodiment of the present application. DETAILED DESCRIPTION

[0021] In order to make the purpose, technical scheme and advantages of the present application clearer, the technical scheme of the present application will be described in detail below with reference to the specific embodiments of the present application and the accompanying drawings.

[0022] Before introducing the specific embodiments of the present application, the principle of the technical solution adopted by the embodiments of the present application is first described. The present application realizes the recognition of the intervention state of a near field communication (NFC) tag based on the following electromagnetic coupling principle: In an NFC communication system, the energy transmission between a card reader (i.e. an NFC chip) and an NFC tag is based on the principle of electromagnetic induction, similar to a transformer coupling system. The card reader antenna coil and the tag antenna coil constitute a pair of inductive coupling structures similar to a transformer, the card reader side antenna can be regarded as a primary winding, and the tag side antenna is a secondary winding. When the card reader outputs a 13.56 MHz carrier signal through its TX transmission port, the tag obtains energy through coupling induction to drive its internal circuit to work.

[0023] As shown in Figure 1 , the intervention of the tag will have an impact on the equivalent load impedance of the NFC chip transmission loop. Specifically, the equivalent circuit of the tag antenna includes a series-parallel resonant network composed of inductance, capacitance and resistance, which forms a magnetic coupling with the card reader side. When the tag is not intervened, the equivalent load impedance of the card reader side transmission loop is mainly determined by its own antenna and matching network; when the tag enters the coupling area, its antenna circuit becomes part of the load, and the overall equivalent impedance changes. When the tag intervenes in the electromagnetic field of the card reader, the antenna resistance of the tag becomes the load of the card reader transmission loop.

[0024] The energy coupling efficiency depends on the coupling coefficient k, and the value of k is affected by the coil spacing, arrangement direction and size. The coupling coefficient k is a key indicator of the strength of coupling, and is defined as follows:

[0025] where M is mutual inductance, and are the self-inductance of the card reader and the tag coil respectively. When the tag intervenes in the electromagnetic field of the card reader, its antenna resistance becomes the load of the card reader transmission loop, the coupling coefficient is improved, resulting in a change in the equivalent load impedance of the card reader side according to the following formula:

[0026] wherein, is the intrinsic impedance of the card reader end, is the equivalent impedance of the tag end.

[0027] Since the transmission voltage is constant, according to Ohm's law:

[0028] It can be seen that when the tag intervention causes to decrease, the transmission current The TX current will rise accordingly. Therefore, the access state of the tag can be determined by monitoring the trend of the TX current in real time.

[0029] The present application utilizes the above principle, captures the slight fluctuation of the TX current through a high-sensitivity current sampling structure, and realizes high-reliability detection of whether the NFC tag is involved by cooperating with the post-stage signal processing and quantization determination module.

[0030] The interfaces of the NFC chip output and the impedance network are respectively a first transmitting end TX1OUT and a second transmitting end TX2OUT, the voltage difference of TX1OUT and TX2OUT is Vall, the equivalent model of the NFC chip antenna coil is L1‖C1‖R1, and the equivalent model of the tag chip antenna coil is L2‖C2‖R2. Figure 1 The equivalent resistance of the impedance matching network 1 and the NFC chip antenna coil is , and the equivalent resistance of the impedance matching network 2 and the tag chip antenna coil is .

[0031] Embodiment One The present embodiment realizes the identification of the involved tag by the NFC chip side after the NFC tag is involved by detecting the change of the TX current. The implementation principle of the present embodiment is that the tag involvement causes the change of the TX module current; the TX current sampling module samples the current change of the TX module and converts it into a voltage signal; the sampling signal processing module filters and amplifies the sampled change voltage signal; finally, the analog-to-digital converter (ADC) determines whether the voltage signal after amplification has tag involvement.

[0032] Specifically, the present embodiment is a near field communication tag identification circuit, as shown in Figure 2 , which comprises a current sampling module, a sampling signal processing module, and a quantization determination module.

[0033] The current sampling module is used to sample the current generated by the transmitting end of the near field communication chip before and after the tag is involved, and convert the current into a voltage signal Vsense.

[0034] In the present embodiment, the current sampling module is arranged in the TX transmitting path of the near field communication chip and is used to collect the current change of the TX transmitting end. The module comprises a current path selection and sampling circuit composed of a group of symmetrically structured PMOS tubes, NMOS tubes, and sampling resistors, which can alternately switch the TX current flow direction in different directions according to the control signal and accurately sample it. Please refer to Figure 3 , the current sampling module comprises: A multi-transistor switching unit is configured to establish a controllable current path between a first transmitting terminal TX1OUT and a second transmitting terminal TX2OUT. A current shunt path and a sampling resistor are configured on one side of the multi-transistor switching unit to extract part of the transmitting current and convert it into a voltage signal Vsense.

[0035] As shown in the figure, the multi-transistor switching unit comprises: Figure 3 A first PMOS transistor P1 and a second PMOS transistor P2 are respectively connected to a power supply and the first transmitting terminal TX1OUT and the second transmitting terminal TX2OUT. A plurality of NMOS transistors are connected to the ground or the sampling resistor Rsense, wherein one group of the NMOS transistors is configured to establish a main current path, and another group of the NMOS transistors is configured to be in series with the sampling resistor Rsense to shunt current. The PMOS transistors and the NMOS transistors are turned on by control signals to realize bidirectional controllable switching paths. The sampling resistor Rsense is configured to convert the shunted current into a voltage signal Vsense. In this embodiment, the current sampling module is connected in the following manner:

[0036] The first PMOS transistor P1 has a source connected to a power supply VDD, a drain connected to the first transmitting terminal TX1OUT, and a gate receiving a first control signal Contrl_p1. The second PMOS transistor P2 has a source connected to the power supply VDD, a drain connected to the second transmitting terminal TX2OUT, and a gate receiving a second control signal Contrl_p2. The plurality of NMOS transistors comprise a first NMOS transistor N1.1, a second NMOS transistor N1.2, a third NMOS transistor N2.1, and a fourth NMOS transistor N2.2. The first NMOS transistor N1.1 has a drain connected to the first transmitting terminal TX1OUT, a source connected to the ground, and a gate receiving a third control signal Contrl_n1. The second NMOS transistor N1.2 has a drain connected to the first transmitting terminal TX1OUT, a source connected to the ground through the sampling resistor Rsense, and a gate receiving the third control signal Contrl_n1. The third NMOS transistor N2.1 has a drain connected to the second transmitting terminal TX2OUT, a source connected to the ground, and a gate receiving a fourth control signal Contrl_n2. The fourth NMOS transistor N2.2 has a drain connected to the second transmitting terminal, a source connected to the ground through the sampling resistor Rsense, and a gate receiving the fourth control signal Contrl_n2. The above MOS transistor combination forms two switchable symmetrical current paths.

[0037] ​The first control signal Contrl_p1 and the third control signal Contrl_n1 are in the same direction, the second control signal Contrl_p2 and the fourth control signal Contrl_n2 are in the same direction, and the first control signal Contrl_p1 and the second control signal Contrl_p2 are in opposite directions.

[0038] In the embodiment, the number of the MOS tubes is as follows: the number of the first PMOS tube P1 and the second PMOS tube P2 is N, the number of the first NMOS tube N1.1 and the third NMOS tube N2.1 is 1, and the number of the second NMOS tube N1.2 and the fourth NMOS tube N2.2 is N-1, wherein N is a natural number greater than 2.

[0039] As a preferred embodiment of the application, the first control signal Contrl_p1, the second control signal Contrl_p2, the third control signal Contrl_n1 and the fourth control signal Contrl_n2 are all square wave signals. Usually generated by a timing control logic module, the MOS tubes are alternately turned on to achieve high-precision sampling of the current change between the two transmission channels.

[0040] According to the above connection method, if Contrl_p1=“high”, contrl_n1=“high”, contrl_p2=“low”, and contrl_n2=“low”, the current path is: power supply VDD-->P2-->TX2OUT-->equivalent impedance Zall-->TX1OUT-->N1.1 (N1.2)-->ground, forming a closed loop and a one-way current path.

[0041] If contrl_p1=“low”, contrl_n1=“low”, contrl_p2=“high”, and contrl_n2=“high”, the current path is: power supply VDD-->P1-->TX1OUT-->equivalent impedance Zall-->TX2OUT-->N2.1 (N2.2)-->ground, forming a reverse current path.

[0042] The sampling resistor Rsense is connected in series at the source of N1.2 and N2.2, used for extracting the shunt current and converting it into a voltage signal. By controlling the ratio of the number of N1.2 / N2.2 turned on (such as 1 / N), the shunt current size can be adjusted to achieve sensitivity control. The voltage signal is Vsense, which is used by the subsequent signal processing module.

[0043] Define the total current flowing through the NMOS tube (N1.1+N2.1+N1.2+N2.2) as I0, according to the number of the above-mentioned MOS tube, then the total current flowing through the sampling NMOS tube N1.2 and N2.2 is (1+ (N-1) +1+ (N-1)) / 2=I0 / N; the current flows through the sampling resistor Rsense, and the current signal is converted into a voltage signal: Vsense=I0 / N×Rsense.

[0044] The current sampling module has the following advantages: the double-channel switching structure can realize symmetrical sampling before and after the label intervention, and reduce the system deviation; the square wave control logic is simple and easy to integrate, and is suitable for unified management of a digital controller; the sampling resistor and the MOS transistor are reasonably distributed, and have good scalability and high anti-interference; the module structure is compact, and is suitable for integration in the NFC chip to realize low-power design.

[0045] Through the above structure, the TX current change caused by the label intervention can be accurately extracted, supporting the subsequent identification logic for digital quantization and judgment.

[0046] The sampling signal processing module is connected with the current sampling module, and is used for filtering, amplifying and processing the voltage signal, and adjusting the common mode potential of the output signal, so as to obtain a target voltage signal. It receives the voltage signal Vsense from the current sampling module, and filters, amplifies and biases the signal, so as to accurately process the signal by the subsequent quantization module.

[0047] Specifically, the sampling signal processing module includes: a filtering unit for smoothing the voltage signal output by the current sampling module; an amplifying unit for amplifying the filtered voltage signal; and a biasing adjustment unit for adjusting the common mode level of the amplified signal to improve the quantization accuracy of the analog-to-digital conversion.

[0048] As shown in Figure 4 The filtering unit is a low-pass filter LPF, which receives the voltage signal Vsense as input, filters out the high-frequency interference components in the voltage signal, and outputs the smoothed filtered voltage V_lpfout.

[0049] The amplifying unit includes an operational amplifier OP1, whose inverting input end (-) receives the filtered voltage V_lpfout output by the filtering unit, and whose non-inverting input end (+) is grounded through a first resistor R3 and receives the output current of the biasing adjustment unit. The output end is fed back to the non-inverting input end (+) through a feedback resistor R4, and is used to output the processed signal V_opout.

[0050] The bias adjustment unit comprises an adjustable constant current source Ix connected to the non-inverting input (+) for adjusting the common-mode voltage level of the amplification unit. By adjusting the output current, the non-inverting terminal voltage of OP1 can be offset to the required common-mode point, so that the amplifier output is at the center of the signal dynamic range, the signal-to-noise ratio is improved, and saturation distortion is avoided.

[0051] When there is a tagged intervention, the current of the TX module changes, that is, ΔI0 is generated, and the TX current sampling current converts ΔI0 into ΔVsense. In order to make the subsequent ADC easy to quantize, ΔVsense is processed through the sampling signal processing circuit. Vsense is processed through the LPF to obtain V_lpfout, and the purpose is to pass the dynamic power through the LPF to obtain the desired average power consumption; in order to make the ADC easy to quantize the value of ΔVsense, ΔV_opout=ΔV_lpfout*(R3+R4) / R3, wherein the gain gain=(R3+R4) / R3. Ix is a tunable bias current, and the purpose is to change the common-mode point of V_opout, so that the initial state V_opout1 is located at the center of the voltage domain, so that ΔV_opout can be seen, and not be dead at the top of the voltage domain, and V_opout1=V_lpfout1*(R3+R4) / R1-Ix*R4 is satisfied.

[0052] Through the above structure, the sampling signal processing module can convert the slight ΔVsense voltage change into V_opout with more obvious amplitude, lower noise and reasonable bias, which is beneficial to the accurate quantization processing of the subsequent analog-to-digital conversion module. The module design has the characteristics of compact structure, easy integration and adjustable parameters, and is suitable for label detection applications in complex electromagnetic environments.

[0053] Please refer to Figure 5 , the quantization judgment module is connected with the sampling signal processing module, and is used for comparing the analog-to-digital converted target voltage signal V_opout with a preset threshold M to judge whether there is an intervention of an NFC tag, and outputting a judgment result.

[0054] Specifically, the quantization judgment module comprises an analog-to-digital converter, a digital comparison unit and a threshold setting unit, wherein the analog-to-digital converter is used for converting the target voltage signal into a digital signal and comparing the digital signal with a preset digital threshold, and outputting a corresponding recognition result signal based on a comparison result. The input end is connected to the output end of the sampling signal processing module to receive the V_opout signal and convert it into a corresponding digital signal. The resolution of the ADC can be selected according to the application scene, for example, 8 bits, 10 bits or higher precision, to meet the detection sensitivity requirement.

[0055] The digital comparison unit compares the digital signal with the preset digital threshold M to judge whether the current sampling value is significantly higher than the initial state value, and if the condition is met, it is judged that there is a label intervention.

[0056] The preset threshold M of the threshold setting unit can be adjusted according to the actual application environment to adapt to different label coupling strengths, antenna structures and interference conditions. The threshold can be a fixed value, or can be dynamically set by the system controller to achieve the optimal balance of sensitivity and misjudgment rate.

[0057] The module inputs V_opout into the ADC module for quantization. When Δdigtal_out > M, it is judged that there is a label intervention. The value of M can be flexibly set by application, and the threshold M can be flexibly set according to the scene requirement to achieve the balance of detection sensitivity and environmental adaptability.

[0058] The current of the TX module is I0, the output signal of the TX current sampling module is Vsense, and the output signal of the LPF is V_lpfout; the output signal of the operational amplifier OP1 is V_opout; The current of the TX module in the initial state (without label intervention) is defined as I 01 , the output signal of the TX current sampling module is Vsense1, the output signal of the LPF is V_lpfout1, and the output signal of the operational amplifier OP1 is V_opout1; the ADC output is Digtal_out1; The current of the TX module in the test (to determine whether there is a label intervention) is I 02 , the output signal of the TX current sampling module is Vsense2, the output signal of the LPF is V_lpfout2, the output signal of the operational amplifier OP1 is V_opout2, and the ADC output is Digtal_out2; That is, ΔI0 = I 02 -I 01 ; ΔVsense = Vsense2-Vsense1; ΔV_lpfout = V_lpfout2-V_lpfout1; ΔV_opout = V_opout2-V_opout1; ΔDigtal_out = Digtal_out2-Digtal_out1.

[0059] The quantization judgment module has high-speed response capability and strong environmental adaptability, and can stably complete label recognition in a scene with minimal current disturbance, effectively improving the performance stability and judgment accuracy of the entire recognition circuit.

[0060] Embodiment Two The embodiment is a near field communication chip, comprising: A radio frequency transmitting module for generating a radio frequency signal required for near field communication; A radio frequency receiving module for receiving a response signal returned by a near field communication label; A control processing module is configured to control and manage the communication process. The near field communication chip further comprises the near field communication tag identification circuit as described in Embodiment One, configured to detect the intervention of the near field communication tag.

[0061] The above merely describes the preferred embodiments of the present application, and it should be noted that, for those skilled in the art, without departing from the concept of the present application, several modifications and improvements can be made, which are all within the protection scope of the present application.

Claims

1. A near field communication tag recognition circuit, provided in a near field communication chip, characterized in that: It includes a current sampling module, a sampling signal processing module and a quantization determination module; The current sampling module is used to sample the current generated by the transmitter of the near field communication chip before and after the tag is inserted, and convert the current into a voltage signal; The sampling signal processing module is connected to the current sampling module, and is used to filter and amplify the voltage signal and adjust the common mode potential of the output signal to obtain a target voltage signal; The quantization determination module is connected to the sampling signal processing module, and is used to perform analog-to-digital conversion on the target voltage signal and compare the converted signal with a preset threshold value to determine whether there is tag intervention and output a determination result.

2. The circuit according to claim 1, wherein: The current sampling module includes: a multi-transistor switching unit, configured to establish a controllable current path between the first transmitting terminal and the second transmitting terminal; The current shunt path and the sampling resistor are arranged on one side of the transistor switching unit and are used to extract part of the emission current and convert it into a voltage signal.

3. The circuit according to claim 2, characterized in that The multi-transistor switching unit comprises: A first PMOS transistor and a second PMOS transistor connected to a power supply and a first transmitting end and a second transmitting end respectively; Multiple groups of NMOS transistors connected to ground or sampling resistors, one group is used to establish the main current path, and the other group is connected in series with the sampling resistor for current shunting; The PMOS transistor and the NMOS transistor are both turned on by the control signal to realize a bidirectional controllable switching path; The sampling resistor is used to convert the shunt current into a voltage signal.

4. The circuit according to claim 3, characterized in that The first PMOS transistor has a source connected to a power supply, a drain connected to a first transmitting terminal, and a gate receiving a first control signal; The second PMOS transistor has a source connected to the power supply, a drain connected to the second transmitting terminal, and a gate receiving a second control signal; The multiple groups of NMOS transistors include a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, and a fourth NMOS transistor; the first NMOS transistor has a drain connected to the first emitter, a source grounded, and a gate receiving a third control signal; the second NMOS transistor has a drain connected to the first emitter, a source grounded via a sampling resistor, and a gate receiving a third control signal; the third NMOS transistor has a drain connected to the second emitter, a source grounded, and a gate receiving a fourth control signal; the fourth NMOS transistor has a drain connected to the second emitter, a source grounded via a sampling resistor, and a gate receiving a fourth control signal; The first control signal and the third control signal are in the same direction, the second control signal and the fourth control signal are in the same direction, and the first control signal and the second control signal are in opposite directions.

5. The circuit according to claim 4, characterized in that The first control signal, the second control signal, the third control signal and the fourth control signal are all square wave signals.

6. The circuit according to claim 1, wherein: The sampling signal processing module includes: The filtering unit is used to smooth the voltage signal output by the current sampling module; an amplifying unit, for amplifying the filtered voltage signal; The bias adjustment unit is used to adjust the common-mode level of the amplified signal to improve the quantization accuracy of analog-to-digital conversion.

7. The circuit according to claim 6, characterized in that The filtering unit is a low-pass filter, which receives the voltage signal as input and outputs a filtered voltage.

8. The circuit according to claim 6 or 7, characterized in that The amplifying unit includes an operational amplifier, whose inverting input terminal receives the output of the filtering unit, whose non-inverting input terminal is grounded via a first resistor and receives the output current of the bias adjusting unit, and whose output terminal is fed back to the non-inverting input terminal via a feedback resistor and is used to output a processed signal; The bias adjustment unit includes an adjustable constant current source connected to the non-inverting input terminal and used for adjusting the common mode voltage level of the amplification unit.

9. The circuit according to claim 1, wherein: The quantization determination module includes an analog-to-digital converter, which is used to convert the target voltage signal into a digital signal, compare it with a preset digital threshold, and output a corresponding recognition result signal based on the comparison result.

10. A near-field communication chip, comprising: A radio frequency transmitting module, used to generate radio frequency signals required for near field communication; A radio frequency receiving module is used to receive a response signal returned by a near field communication tag; Control processing module, used to control and manage the communication process; It is characterized in that the near field communication chip further includes a near field communication tag identification circuit as described in any one of claims 1 to 9, which is used for detecting the intervention of the near field communication tag.

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