Display panel and display device

Abstract

The embodiment of the invention provides a display panel and a display device. The display panel comprises three kinds of color sub-pixels, and driving currents corresponding to the three kinds of color sub-pixels in one display frame of the display panel meet a target proportional relation through different sizes of driving transistors included in pixel driving circuits of the three kinds of color sub-pixels and / or different cross voltages at the two ends of the pixel driving circuits. And enabling the display panel to display the target full-color picture according to the target proportional relation. According to the embodiment of the invention, the problem that the sub-pixels with different colors need different current demands under different display brightness can be solved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] In the field of electroluminescent display, such as Figure 1 As shown, the display panel 100 may include red (R) sub-pixels, green (G) sub-pixels, and blue (B) sub-pixels arranged in rows and columns. When the display panel 100 is used for display, the brightness of the R sub-pixels, G sub-pixels, and B sub-pixels can be adjusted to achieve full-color display by superposition. When the display panel 100 displays full-color images of different brightness, the brightness of the R sub-pixels, G sub-pixels, and B sub-pixels needs to be different. For example, when maintaining white balance at high brightness, the brightness ratio of the three primary colors of RGB is often approximately 3:6:1 to ensure the visibility of white balance under strong light. When maintaining white balance at low brightness, the brightness ratio of the three primary colors of RGB is often approximately 2.5:5:2 to reduce visual fatigue. In this case, the pixel driving circuits in the R sub-pixels, G sub-pixels, and B sub-pixels need to generate different driving currents to meet the different brightness requirements of the different color sub-pixels. However, traditional brightness adjustment mostly uses a unified voltage or pulse width modulation (PWM) control, driving with the same driving current, which makes it difficult to achieve display control according to demand. Summary of the Invention

[0003] Embodiments of the present application provide a display panel and a display device to solve the above-mentioned problems.

[0004] In one aspect, an embodiment of the present application provides a display panel, comprising: a plurality of pixel units arranged in an array; the pixel units comprising: a first color sub-pixel, a second color sub-pixel, and a third color sub-pixel; the first color sub-pixel, the second color sub-pixel, and the third color sub-pixel respectively comprising a first light emitting device, a second light emitting device, and a third light emitting device emitting light waves of different colors, and a first pixel driving circuit, a second pixel driving circuit, and a third pixel driving circuit respectively used for driving the first light emitting device, the second light emitting device, and the third light emitting device; the first pixel driving circuit, the second pixel driving circuit, and the third pixel driving circuit respectively comprising: a first pixel driving circuit connected with the first light emitting device, a second pixel driving circuit connected with the second light emitting device, and a third pixel driving circuit connected with the third light emitting device; wherein the driving transistors included in the first pixel driving circuit, the second pixel driving circuit, and the third pixel driving circuit are of different sizes, and / or the cross-voltage applied across the first pixel driving circuit, the second pixel driving circuit, and the third pixel driving circuit is different, so that in one display frame of the display panel, the driving currents generated by the first pixel driving circuit, the second pixel driving circuit, and the third pixel driving circuit according to the corresponding data voltages satisfy a target proportional relationship, so that the display panel displays a target full-color picture according to the target proportional relationship.

[0005] In another aspect, an embodiment of the present application further provides a display device, comprising the display panel as described above, and a signal control circuit used for generating a control signal for controlling the display panel; the control signal comprising: at least one of a scanning signal, a reset signal, and a light emitting control signal.

[0006] The display panel and the display device provided by the embodiments of the present application set three color sub-pixels, and set different sizes for the driving transistors included in the pixel driving circuits of the three color sub-pixels and / or set different cross-voltages across the pixel driving circuits, so that the driving currents of the display panel in one display frame satisfy a certain proportional relationship, and the display panel displays a required full-color picture according to the proportional relationship. BRIEF DESCRIPTION OF DRAWINGS

[0007] The present application will be further described below with reference to the drawings. It should be noted that the drawings in the following description are only used to explain some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor on the basis of these drawings.

[0008] Figure 1 A structural block diagram of the display panel provided by an embodiment of the present application.

[0009] Figure 2 Another structural diagram of a display panel provided by an embodiment of the present application is shown.

[0010] Figure 3 A structural diagram of a pixel unit of a display panel provided by an embodiment of the present application is shown. Figure 1 .

[0011] Figure 4 A structural diagram of a sub-pixel of a display panel provided by an embodiment of the present application is shown.

[0012] Figure 5 A driving timing diagram of a pixel unit shown in the display panel provided by an embodiment of the present application is shown. Figure 4

[0013] A structural diagram of a pixel unit provided by an embodiment of the present application is shown. Figure 6 . Figure 2

[0014] Figure 7 A structural diagram of a pixel unit provided by an embodiment of the present application is shown. Figure 3 .

[0015] Figure 8 A structural diagram of a pixel unit provided by an embodiment of the present application is shown. Figure 4 .

[0016] Figure 9 A structural diagram of a pixel unit provided by an embodiment of the present application is shown. Figure 5 . DETAILED DESCRIPTION

[0017] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.

[0018] The terms "first", "second", and the like in the present application are used to distinguish different objects, and are not used to describe a specific order. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or modules is not limited to the listed steps or modules, but can optionally include steps or modules not listed, or can optionally include other steps or modules inherent to the process, method, product or device.

[0019] ​Reference to“an embodiment” herein means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase“in an embodiment” in various places in the specification are not necessarily all referring to the same embodiment, nor are they necessarily all directed to the same embodiment, or to a common alternative embodiment. One of ordinary skill in the art will readily recognize from the disclosure herein a wide number of variations, alternatives, and equivalents in the application that fall within the scope of the application. Those skilled in the art will readily recognize from the disclosure herein, with the described embodiments, that the application is applicable to any suitable display panel.

[0020] As described above, when the display panel 100 displays a full-color picture with different brightness, the brightness of the R sub-pixel, the G sub-pixel, and the B sub-pixel needs to be different, and therefore, different driving currents are needed to drive the light emitting devices in the R sub-pixel, the G sub-pixel, and the B sub-pixel.

[0021] Therefore, embodiments of the application provide a display panel and a display device, by making the size of the driving transistor in the sub-pixel of different colors different and / or making the cross voltage of the driving transistor different, the driving current for driving the sub-pixel of different colors is different in different display brightness requirements, so that the full-color picture is displayed as needed.

[0022] Specifically, referring to Figure 2 , Figure 3 , Figure 4 , Figure 5 Embodiments of the application provide a display panel 200, which includes a plurality of pixel units 201 arranged in an array. The pixel unit 201 can include a first color sub-pixel, a second color sub-pixel, and a third color sub-pixel. The first color sub-pixel, the second color sub-pixel, and the third color sub-pixel can be R sub-pixels, G sub-pixels, and B sub-pixels, respectively. The R sub-pixel, the G sub-pixel, and the B sub-pixel respectively include a first light emitting device 301, a second light emitting device 302, and a third light emitting device 303 emitting light waves of different colors, and a first pixel driving circuit 304, a second pixel driving circuit 305, and a third pixel driving circuit 306 for driving the first light emitting device 301, the second light emitting device 302, and the third light emitting device 303, respectively.

[0023] As an optional embodiment, as Figure 4As shown, the first pixel driving circuit 304, the second pixel driving circuit 305 and the third pixel driving circuit 306 can respectively include a first sub-module 401 and a second sub-module 402. The first sub-module 401 can include a first driving transistor PT8, a first data writing transistor PT7, a first light emitting control transistor PT6, a second light emitting control transistor PT10, a first reset transistor PT11, a first transfer transistor PT9, a second reset transistor PT13 and a first capacitor C2. The first electrode of the first driving transistor PT8 is connected to a first node N1, the second electrode is connected to a second node N2, and the control electrode is connected to a third node N3. The first electrode of the first data writing transistor PT7 is used to access a corresponding first data voltage VData_PAM, the second electrode is connected to the first node N1, and the control electrode is used to access a first scanning signal PAM(n). The first electrode of the first light emitting control transistor PT6 is connected to a first power line positive terminal to access a first voltage VDD_PAM, the second electrode is connected to the first node N1, and the control electrode is used to access a first light emitting control signal EMPAM. The first electrode of the second light emitting control transistor PT10 is connected to the anode of a corresponding light emitting device, the second electrode is connected to the second node N2, and the control electrode is used to access the first light emitting control signal EMPAM; the cathode of the corresponding light emitting device is connected to a first power line negative terminal to access a second voltage VSS. The first electrode of the first reset transistor PT11 is used to access a first reset signal Vi_G, the second electrode is connected to the third node N3, and the control electrode is used to access a first reset control signal PAM(n-1). The first electrode of the first transfer transistor PT9 is connected to the third node N3, the second electrode is connected to the second node N2, and the control electrode is used to access the first scanning signal PAM(n). The first electrode of the second reset transistor PT13 is connected to the anode of the corresponding light emitting device, the second electrode is used to access a second reset signal Vi_A, and the control electrode is used to access a second reset control signal Discharge. The first pole of the first capacitor C2 is connected to the first power line positive terminal, and the second pole is connected to the third node N3.

[0024] As an example, if the first submodule is included in the first pixel driving circuit 304, the corresponding light-emitting device may be the first light-emitting device 301, and the corresponding first data voltage VData_PAM is the first data voltage corresponding to the R sub-pixel; if the first submodule is included in the second pixel driving circuit 305, the corresponding light-emitting device may be the second light-emitting device 302, and the corresponding first data voltage VData_PAM is the first data voltage corresponding to the G sub-pixel; if the first submodule is included in the third pixel driving circuit 306, the corresponding light-emitting device may be the third light-emitting device 303, and the corresponding first data voltage VData_PAM is the first data voltage corresponding to the B sub-pixel.

[0025] like Figure 4 As shown, the second submodule 402 may include: a second driving transistor PT3, a second data writing transistor PT2, a third light-emitting control transistor PT1, a fourth light-emitting control transistor PT5, a third reset transistor PT12, a second transmission transistor PT4 and a second capacitor C1. The first electrode of the second driving transistor PT3 is connected to the fourth node N4, the second electrode is connected to the fifth node N5, and the control electrode is connected to the sixth node N6; the first electrode of the second data writing transistor PT2 is used to receive the second data voltage VData_PWM, the second electrode is connected to the fourth node N4, and the control electrode is used to receive the second scanning signal PWM(n); the first electrode of the third light-emitting control transistor PT1 is connected to the positive end of the second power line, the second electrode is connected to the fourth node N4, and the control electrode is used to receive the second light-emitting control signal EMPWM; the positive end of the second power line is used to receive the third voltage VDD_PWM; the first electrode of the fourth light-emitting control transistor PT5 is connected to the positive end of the second power line The first electrode of the second transmission transistor PT4 is connected to the sixth node N6, the second electrode is connected to the fifth node N5, and the control electrode is used to receive the second light-emitting control signal EMPWM; the first electrode of the third reset transistor PT12 is connected to the sixth node N6, the second electrode is used to receive the third reset signal (which can be the same as the first reset signal, Vi_G), and the control electrode is used to receive the third reset control signal PWM(n-1); the first electrode of the second transmission transistor PT4 is connected to the sixth node N6, the second electrode is connected to the fifth node N5, and the control electrode is used to receive the second scanning signal PWM(n); the first electrode of the second capacitor C1 is connected to the sixth node, and the second electrode is used to receive the ramp voltage Sweep.

[0026] Wherein, as an example, if the second sub-module is included in the first pixel driving circuit 304, the corresponding second data voltage VData_PWM is the second data voltage corresponding to the R sub-pixel; if the second sub-module is included in the second pixel driving circuit 305, the corresponding second data voltage VData_PWM is the second data voltage corresponding to the G sub-pixel; if the second sub-module is included in the third pixel driving circuit 306, the corresponding second data voltage VData_PWM is the second data voltage corresponding to the B sub-pixel.

[0027] In some embodiments, the first driving transistor PT8 and the second driving transistor PT3 can be P-type thin film transistors.

[0028] Referring to Figure 5 illustrated, which shows Figure 4 illustrated driving timing of the pixel driving circuit. Specifically, in some display frames, a reset period, a data writing period and a light emitting period are included.

[0029] In the reset period T1, the first reset control signal PAM[n-1] and the second reset control signal Discharge are at an effective level, the first reset transistor PT11 and the second reset transistor PT13 are turned on, the first reset signal (Vi_G) is transmitted to the third node and the second reset signal Vi_A is transmitted to the anode of the light emitting device, respectively, to reset the third node and the anode of the light emitting device. The third reset control signal PWM(n-1) is at an effective level, the third reset transistor PT12 is turned on, and the third reset signal (Vi_G) is transmitted to the sixth node.

[0030] In the data writing period T2, the first scan signal PAM(n) is at an effective level, the first data writing transistor PT7 and the first transfer transistor PT9 are turned on, and the first data voltage VData_PAM is transmitted to the third node N3 connected to the first driving transistor PT8; the second scan signal PWM(n) is at an effective level, the second data writing transistor PT2 and the second transfer transistor PT4 are turned on, and the second data voltage VData_PWM is transmitted to the sixth node N6 connected to the second driving transistor PT3.

[0031] In the light emitting period T3, the first light emitting control signal EMPAM is at an active level, the first light emitting control transistor PT6 and the second light emitting control transistor PT10 are turned on, the first drive transistor PT8 generates a light emitting current according to the first data voltage VData_PAM to drive the light emitting device to emit light; the voltage of the sixth node N6 gradually changes with the change of the ramp voltage Sweep; the second light emitting control signal EMPWM is at an active level, the third light emitting control transistor PT1 and the third light emitting control transistor PT5 are turned on, the third voltage VDD_PWM is transmitted to the fifth node N5, to control the turn-on time and turn-off time of the second drive transistor PT3 and the first drive transistor PT8 according to the ramp voltage Sweep and the third voltage VDD_PWM, so as to control the light emitting time of the light emitting device.

[0032] In some embodiments, the time length ratio among the reset period T1, the data writing period T2 and the light emitting period T3 can be 1:2:7.

[0033] It should be noted that, Figure 4 Only one structure of the pixel driving circuit is exemplarily shown. In actual cases, the technical solutions provided by the embodiments of the present application are also applicable to pixel driving circuits of other structures, such as 3T1C, 7T1C, 8T1C, etc. The embodiments of the present application only take the 13T2C pixel driving circuit shown in FIG. 4 as an example to illustrate the technical solutions described in the present application. Figure 4 The pixel driving structure of the sub-pixel can be the structure shown in FIG. 4, unless otherwise specified.

[0034] In the display field, due to the existence of three kinds of cone cells in the human eye retina, which are respectively sensitive to long-wave (red), medium-wave (green) and short-wave (blue) light. The wavelength range of RGB three primary colors (for example, red 635-700 nanometers (nm), green 520-546 nm, blue 435-473 nm) is highly consistent with the sensitive interval of cone cells, for example, the perception efficiency of green light (532 nm) is the highest, and the corresponding cone cell response is the strongest. The human eye perceives color through the superposition of three primary colors and the principle of complementary colors. For example, yellow is generated by the superposition of red and green, and blue is the complementary color of yellow, showing an opposite relationship in the color phase diagram. This mechanism requires the RGB system to accurately control the proportional relationship of the three primary colors, for example, when synthesizing white light, the proportional relationship needs to be 1:2.4:2.5 (635 nm red) or 1:2.4:6.8 (650 nm red). Therefore, in order to display a full-color picture, the brightness of the R sub-pixel, the G sub-pixel and the B sub-pixel needs to have a certain proportional relationship. In this case, the light emitting devices corresponding to the R sub-pixel, the G sub-pixel and the B sub-pixel need to emit different brightness, which requires that the driving currents of the light emitting devices corresponding to the R sub-pixel, the G sub-pixel and the B sub-pixel need to be different. In order to realize the different driving currents of the light emitting devices corresponding to the R sub-pixel, the G sub-pixel and the B sub-pixel, for example, as shown in Figure 4 the pixel driving circuit corresponding to the R sub-pixel, the G sub-pixel and the B sub-pixel, the sizes of the driving transistors included in the first pixel driving circuit 304, the second pixel driving circuit 305 and the third pixel driving circuit 306 are different, and / or the cross-voltage applied across the first pixel driving circuit 304, the second pixel driving circuit 305 and the third pixel driving circuit 306 is different, so that in one display frame of the display panel, the driving currents generated by the first pixel driving circuit 304, the second pixel driving circuit 305 and the third pixel driving circuit 306 according to the corresponding data voltage respectively satisfy the target proportional relationship, so that the display panel displays a target full-color picture according to the target proportional relationship. That is, the embodiments of the present application can drive the R sub-pixel, the G sub-pixel and the B sub-pixel with different driving currents in different display brightness requirements by making the sizes of the driving transistors (such as the first driving transistor PT8 and / or the second driving transistor PT3) in the R sub-pixel, the G sub-pixel and the B sub-pixel different and / or making the cross-voltage of the driving transistors (such as the first driving transistor PT8 and / or the second driving transistor PT3) different, to realize the corresponding full-color display requirements.

[0035] Wherein, the size of the driving transistor can include the width (W) and length (L) of the channel region of the driving transistor. According to the design standard of the transistor, the larger the width-length ratio (W / L) of the transistor, the lower the on-resistance (Ron), which can support larger current. The calculation formula of the on-resistance is as follows:

[0036] Ron = 1 / (μ n C ox (W / L)(Vgs-Vth)).

[0037] where μ n is the carrier mobility, C ox is the gate oxide capacitance.

[0038] Since the light emitting efficiency of the light emitting devices corresponding to RGB sub-pixels respectively has differences, in order to realize the full-color display as mentioned above, it is necessary to customize the driving current of RGB sub-pixels, wherein the green light emitting efficiency is the highest (about 120 lm / W), the required driving current is the smallest, and the width-length ratio is the lowest. The red is the second (85 lm / W), and the blue is the lowest (70 lm / W), and the W / L needs to be increased to increase the current capacity.

[0039] Therefore, in some embodiments, based on the pixel driving circuit as shown in Figure 4 , the driving transistor of the first pixel driving circuit includes a first channel region with a first width and a first length; the driving transistor of the second pixel driving circuit includes a second channel region with a second width and a second length; and the driving transistor of the third pixel driving circuit includes a third channel region with a third width and a third length. Based on the foregoing, the first pixel driving circuit includes a first driving transistor and a second driving transistor, therefore, the first driving transistor or the second driving transistor has a first channel region with a first width and a first length, wherein the first lengths of the first driving transistor and the second driving transistor in the first pixel driving circuit can be equal or not equal. Correspondingly, the first widths of the first driving transistor and the second driving transistor in the first pixel driving circuit can be equal or not equal. Similarly, the first driving transistor or the second driving transistor of the second pixel driving circuit has a second channel region with a second width and a second length; and the first driving transistor or the second driving transistor of the second pixel driving circuit has a third channel region with a third width and a third length.

[0040] In order to achieve the aforementioned full-color display, an practicable method may be as follows: the voltage across the first driving transistor of the first pixel driving circuit, the first driving transistor of the second pixel driving circuit, and the first driving transistor of the third pixel driving circuit is the same (VDD_PAM-VSS), the first length of the first driving transistor of the first pixel driving circuit, the second length of the first driving transistor of the second pixel driving circuit, and the third length of the first driving transistor of the third pixel driving circuit are different from each other, and / or the first width of the first driving transistor of the first pixel driving circuit, the second width of the first driving transistor of the second pixel driving circuit, and the third width of the first driving transistor of the third pixel driving circuit are different from each other. For example, Figure 6 As shown, the voltage across the driving transistor DTFT_R of the R sub-pixel, the driving transistor DTFT_G of the G sub-pixel, and the driving transistor DTFT_B of the B sub-pixel is the same, which is VDD-VSS. Then, the lengths of the driving transistors DTFT_R, DTFT_G, and DTFT_B are different from each other, and / or the widths of the driving transistors DTFT_R, DTFT_G, and DTFT_B are different from each other, so as to enable the display panel to display the required full-color image according to their respective data voltages (dataR, dataG, and dataB, respectively). It should be noted that Figure 6 The high-voltage control module shown may include the aforementioned first light emission control transistor PT6. The low-voltage control module may include the aforementioned second light emission control transistor PT10. The data control module may include the aforementioned first data writing transistor PT7, first reset transistor PT11, first transfer transistor PT9, second reset transistor PT13, and first capacitor C2.

[0041] Furthermore, in the case where the first pixel driving circuit further includes a second driving transistor, the second pixel driving circuit further includes a second driving transistor, and the third pixel driving circuit further includes a second driving transistor, the voltage across the first driving transistor and the second driving transistor in the first pixel driving circuit, the first driving transistor and the second driving transistor in the second pixel driving circuit, and the first driving transistor and the second driving transistor in the third pixel driving circuit are the same, the first length of the second driving transistor in the first pixel driving circuit, the second length of the second driving transistor in the second pixel driving circuit, and the third length of the second driving transistor in the third pixel driving circuit are also different from each other, and / or the first width of the second driving transistor in the first pixel driving circuit, the second width of the second driving transistor in the second pixel driving circuit, and the third width of the second driving transistor in the third pixel driving circuit are also different from each other. For example, Figure 7 As shown, the voltage across the driving transistor DTFT_RA of the R sub-pixel, the driving transistor DTFT_GA of the G sub-pixel, and the driving transistor DTFT_BA of the B sub-pixel is the same, which is VDDA-VSS; the voltage across the driving transistor DTFT_RW of the R sub-pixel, the driving transistor DTFT_GW of the G sub-pixel, and the driving transistor DTFT_BW of the B sub-pixel is the same, for example, the voltage difference between VDDW and the third node N3. Then, the lengths of the driving transistor DTFT_RA, the driving transistor DTFT_GA, and the driving transistor DTFT_BA are different from each other, and / or the widths of the driving transistor DTFT_RA, the driving transistor DTFT_GA, and the driving transistor DTFT_BA are different from each other. At the same time, the lengths of the driving transistor DTFT_RW, the driving transistor DTFT_GW, and the driving transistor DTFT_BW are different from each other, and / or the widths of the driving transistor DTFT_RW, the driving transistor DTFT_GW, and the driving transistor DTFT_BW are different from each other. Wherein, Figure 7 The high voltage control module, low voltage control module and data control module in the driving transistor DTFT_RA, driving transistor DTFT_GA and driving transistor DTFT_BA are connected with the Figure 6The same as in this, not to repeat. For driving transistor DTFT_RW, driving transistor DTFT_GW, high voltage control module, low voltage control module and data control module in driving transistor DTFT_BW respectively include: third light-emitting control transistor PT1, fourth light-emitting control transistor PT5; and including: second data write transistor PT2, third reset transistor PT12, second transmission transistor PT4 and second capacitor C1. Wherein, dataWR, dataWG, dataWB respectively for R sub-pixel, G sub-pixel, B sub-pixel in the second sub-module 402 of the second data write transistor PT2 access data voltage. DataAR, dataAG, dataAB respectively for R sub-pixel, G sub-pixel, B sub-pixel in the first sub-module 401 of the first data write transistor PT7 access data voltage. As Figure 7 The sub-pixel as shown in the PAM mode (amplitude mode) can meet the current requirements of R sub-pixel, G sub-pixel, B sub-pixel due to different brightness requirements by setting different sizes of the first driving transistor PT8 of R sub-pixel, G sub-pixel, B sub-pixel. And in PWM mode (pulse width mode) can meet the different requirements of the driving current of R sub-pixel, G sub-pixel, B sub-pixel due to different brightness and gray scale division requirements by setting different sizes of the second driving transistor PT3 of R sub-pixel, G sub-pixel, B sub-pixel. Through the above-mentioned manner, without adding mask, to realize the different regions or different transistors by using the newly added mask to meet the different requirements of the driving current of R sub-pixel, G sub-pixel, B sub-pixel due to different brightness and gray scale division requirements, can save cost.

[0042] Specifically, as an exemplary implementation, the driving transistor included in the first pixel driving circuit, the driving transistor included in the second pixel driving circuit, and the driving transistor included in the third pixel driving circuit have electrical stability limitations. At this time, the first length of the first driving transistor included in the first pixel driving circuit, the second length of the first driving transistor included in the second pixel driving circuit, and the third length of the first driving transistor included in the third pixel driving circuit can be set to be equal; the first width of the first driving transistor included in the first pixel driving circuit is greater than the second width of the first driving transistor included in the second pixel driving circuit, and the second width of the first driving transistor included in the second pixel driving circuit is greater than the third width of the first driving transistor included in the third pixel driving circuit. Further, the first length of the second driving transistor included in the first pixel driving circuit, the second length of the second driving transistor included in the second pixel driving circuit, and the third length of the second driving transistor included in the third pixel driving circuit can be set to be equal; the first width of the second driving transistor included in the first pixel driving circuit is greater than the second width of the second driving transistor included in the second pixel driving circuit, and the second width of the first driving transistor included in the second pixel driving circuit is greater than the third width of the second driving transistor included in the third pixel driving circuit.

[0043] In another exemplary implementation, the driving transistor included in the first pixel driving circuit, the driving transistor included in the second pixel driving circuit, and the driving transistor included in the third pixel driving circuit do not have electrical stability limitations. At this time, the first driving transistor in each sub-pixel has a different channel region. For example, the R sub-pixel has the first channel region, the G sub-pixel has the second channel region, and the B sub-pixel has the third channel region. Correspondingly, the first length of the first channel region is less than the second length of the second channel region, the second length is less than the third length of the third channel region, and the first width of the first channel region is greater than or equal to the second width of the second channel region, the second width is greater than or equal to the third width of the third channel region. Further, the first length of the second driving transistor in each sub-pixel is less than the second length, the second length is less than the third length, and the first width is greater than or equal to the second width, the second width is greater than or equal to the third width.

[0044] The electrical stability limit can refer to a physical phenomenon that the electrical characteristics of the driving transistor (such as threshold voltage, drain current, subthreshold swing, etc.) will deteriorate significantly when the channel length is reduced to below a certain critical value, resulting in the driving transistor losing stable controllability. The physical mechanism of the electrical stability limit can be understood from the following two aspects: first, gate control ability degradation, when the channel length (L) approaches the width of the depletion layer, the gate electric field cannot effectively control the entire channel region. At this time, the lateral electric field of the source / drain junction will form a two-dimensional potential distribution with the longitudinal electric field of the gate. For example, in a 28 nm process, if the channel length is reduced to 20 nm (substrate doping concentration NA=1e18 cm-3), the source / drain depletion layer width can reach 15 nm. At this time, the gate can only control the center region of the channel, while the two ends are dominated by the drain electric field, resulting in a decrease of about 0.1 V in threshold voltage (Vth). Second, drain-induced barrier lowering (DIBL), a strong drain voltage (VDS) will reduce the source junction barrier, resulting in an exponential increase in subthreshold leakage current. For example, in a certain 65 nm NMOS device, when VDS increases from 0.5 V to 1.2 V, Vth decreases by 80 mV, and subthreshold leakage current increases by 3 orders of magnitude. The specific manifestations of the deterioration of the electrical stability include the following aspects: threshold voltage roll-off (Vth Roll-off), when the channel length L decreases, the amount of charge required to maintain the inversion layer decreases, and Vth presents a nonlinear decrease; channel length modulation (CLM), in the saturation region, the effective channel length L_eff=L-ΔL shortens as VDS increases, resulting in current unsaturation. In the embodiments of the present application, when the driving transistor of the first pixel driving circuit, the driving transistor of the second pixel driving circuit, and the driving transistor of the third pixel driving circuit have an electrical stability limit, the first length, the second length, and the third length can be set to be equal, such as the minimum stable channel length:

[0045] L_min=0.4*[tox*(xj+ddep) 2 ] (1 / 3) .

[0046] wherein xj is the junction depth, ddep is the depletion layer width, and tox is the gate oxide layer thickness. For example, when tox=2 nm, xj=15 nm, and NA=5e17 cm-3, L_min≈28 nm. If the actual L=25 nm, a significant Vth shift will occur.

[0047] In some embodiments, when the first length, the second length, and the third length are equal, the first width corresponding to the driving transistor in the R sub-pixel is greater than the second width corresponding to the driving transistor in the G sub-pixel, and the second width corresponding to the driving transistor in the G sub-pixel is greater than the third width corresponding to the driving transistor in the B sub-pixel, so as to achieve that the width-length ratio of the driving transistor in the R sub-pixel is greater than the width-length ratio of the driving transistor in the G sub-pixel, and the width-length ratio of the driving transistor in the G sub-pixel is greater than the width-length ratio of the driving transistor in the B sub-pixel.

[0048] In some other embodiments, when the driving transistor in each sub-pixel has no electrical stability limitation, the first length is less than the second length, the second length is less than the third length, and the first width is greater than or equal to the second width, and the second width is greater than or equal to the third width, so as to achieve that the width-length ratio of the driving transistor in the R sub-pixel is greater than the width-length ratio of the driving transistor in the G sub-pixel, and the width-length ratio of the driving transistor in the G sub-pixel is greater than the width-length ratio of the driving transistor in the B sub-pixel.

[0049] In some other embodiments, the width-length ratio of the driving transistor in each sub-pixel is the same, and the cross voltage applied across the first pixel driving circuit, the second pixel driving circuit, and the third pixel driving circuit is different. For example, the cross voltage applied across the driving transistor (the first driving transistor and / or the second driving transistor) of the first pixel driving circuit is the first cross voltage, the cross voltage applied across the driving transistor of the second pixel driving circuit is the second cross voltage, and the cross voltage applied across the driving transistor of the third pixel driving circuit is the third cross voltage, and the first cross voltage, the second cross voltage, and the third cross voltage are different from each other. The cross voltage can refer to the difference between the first voltage VDD_PAM and the second voltage VSS.

[0050] Since the drain-source voltage VDS of the driver transistor equals VDD_PAM - VSS, it determines the operating region of the driver transistor. When VDS is greater than the difference between the gate-source voltage VGS and the threshold voltage VTH of the driver transistor, the driver transistor operates in the saturation region, also known as the constant current region. In this constant current region, the drive current of the light-emitting device is ideally independent of VDD_PAM and is only dependent on the aspect ratio of the driver transistor. When VDS is less than the difference between the gate-source voltage VGS and the threshold voltage VTH of the driver transistor, the driver transistor operates in the linear region, also known as the variable resistance region. In this linear region, the drive current of the light-emitting device is affected by VDS and VGS, and the brightness can be adjusted as VDD_PAM fluctuates. In embodiments of the present application, different voltages (VDD_PAM - VSS) can be applied to the driver transistors in the first pixel driver circuit of the R sub-pixel, the driver transistors in the second pixel driver circuit, and the driver transistors in the third pixel driver circuit to achieve different drive current requirements for the R sub-pixel, G sub-pixel, and B sub-pixel.

[0051] In order to understand the embodiments of the present application, Figure 8 As shown, the width-to-length ratio of the driving transistors in each sub-pixel can be the same. The voltage across the driving transistor DTFT_R in the R sub-pixel is VDDR-VSSR. The voltage across the driving transistor DTFT_G in the G sub-pixel is VDDG-VSSG. The voltage across the driving transistor DTFT_B in the B sub-pixel is VDDB-VSSB. Figure 8 The high voltage control module, low voltage control module and data control module in the driving transistor DTFT_RA, driving transistor DTFT_GA and driving transistor DTFT_BA can refer to Figure 6The relevant description will not be repeated here. In a specific implementation, the relationship between the driving currents of the R sub-pixel, the G sub-pixel, and the B sub-pixel can be as follows: the driving current IR of the R sub-pixel is greater than the driving current IG of the G sub-pixel, and the driving current IG of the G sub-pixel is greater than the driving current IB of the B sub-pixel. Based on this, for the setting of the voltage across the driving transistors DTFT_RA, DTFT_GA, and DTFT_BA in the R sub-pixel, the G sub-pixel, and the B sub-pixel, illustratively, the values ​​of VSSR, VSSG, and VSSB can be set to the same, VDDR is greater than VDDG, and VDDG is greater than VDDB, so that the voltage across the driving transistors DTFT_RA, DTFT_GA, and DTFT_BA in the R sub-pixel, the G sub-pixel, and the B sub-pixel are different to meet the different driving current requirements of the R sub-pixel, the G sub-pixel, and the B sub-pixel. As another optional example, VDDR, VDDG, and VDDB are set to the same, VSSR is less than VSSG, and VSSG is less than VSSB. As another optional example, VDDR is greater than VDDG, VDDG is greater than VDDB, VSSR is less than VSSG, and VSSG is less than VSSB. The selection can be made based on actual power consumption and other factors.

[0052] In other embodiments, in order to meet the different driving current requirements of the R sub-pixel, G sub-pixel, and B sub-pixel, the sizes of the driving transistors in the R sub-pixel, the driving transistors in the G sub-pixel, and the driving transistors in the B sub-pixel and the voltages across both ends can be set to be different.

[0053] For example, Figure 9 As shown, the size of the driving transistor in each sub-pixel is as described above. Figure 7 Set the voltage across the driving transistor DTFT_RA in the R sub-pixel to VDDAR-VSSR. The voltage across the driving transistor DTFT_GA in the G sub-pixel to VDDAG-VSSG. The voltage across the driving transistor DTFT_BA in the B sub-pixel to VDDAB-VSSB. At the same time, the voltage across the driving transistor DTFT_RW in the R sub-pixel is VDDWR-VSSR. The voltage across the driving transistor DTFT_GW in the G sub-pixel is VDDWG-VSSG. The voltage across the driving transistor DTFT_BW in the B sub-pixel is VDDWB-VSSB. Wherein, Figure 9 The high voltage control module, low voltage control module and data control module in the driving transistor DTFT_RA, driving transistor DTFT_GA and driving transistor DTFT_BA can also be referred to. Figure 6 Related content. Figure 9The high voltage control module, low voltage control module and data control module in the driving transistor DTFT_RW, driving transistor DTFT_GW and driving transistor DTFT_BW can refer to Figure 7 The relevant content will not be repeated here. Figure 9 The sub-pixels shown can meet the current requirements of the R sub-pixels, G sub-pixels, and B sub-pixels due to different brightness requirements by setting different sizes and different cross-voltages for the first driving transistors PT8 of the R sub-pixels, G sub-pixels, and B sub-pixels in PAM mode (amplitude mode). In addition, the different sizes and different cross-voltages can be set for the second driving transistors PT3 of the R sub-pixels, G sub-pixels, and B sub-pixels in PWM mode (pulse width mode) to meet the different driving current requirements of the R sub-pixels, G sub-pixels, and B sub-pixels due to brightness and grayscale segmentation requirements. In this way, there is no need to add a mask. By using the added mask to achieve separate electrical debugging of different areas or different transistors, the different driving current requirements of the R sub-pixels, G sub-pixels, and B sub-pixels due to different brightness and grayscale segmentation requirements can be met, which can save costs.

[0054] An embodiment of the present application provides a display panel, which realizes different driving current requirements for R sub-pixels, G sub-pixels, and B sub-pixels during full-color display by setting different sizes of driving transistors of the three-color sub-pixels and / or different voltages across the driving transistors.

[0055] In some embodiments, the embodiments of the present application also provide a display device, including a display panel as described above, and a signal control circuit, wherein the signal control circuit is used to generate a control signal for controlling the display panel; the control signal includes: at least one of a scanning signal, a reset signal, and a light-emitting control signal.

[0056] The above is a detailed introduction to the display panel and display device provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application. Ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A display panel, characterized in that: include: A plurality of pixel units arranged in an array; The pixel unit includes: a first color sub-pixel, a second color sub-pixel, and a third color sub-pixel; the first color sub-pixel, the second color sub-pixel, and the third color sub-pixel respectively include a first light-emitting device, a second light-emitting device, and a third light-emitting device that emit light waves of different colors, and a first pixel driving circuit, a second pixel driving circuit, and a third pixel driving circuit for driving the first light-emitting device, the second light-emitting device, and the third light-emitting device, respectively; Among them, the sizes of the driving transistors included in the first pixel driving circuit, the second pixel driving circuit and the third pixel driving circuit are different, and / or the cross voltages applied to the first pixel driving circuit, the second pixel driving circuit and the third pixel driving circuit are different, so that within a display frame of the display panel, the driving currents generated by the first pixel driving circuit, the second pixel driving circuit and the third pixel driving circuit according to the corresponding data voltages respectively meet the target proportional relationship, so that the display panel displays the target full-color picture according to the target proportional relationship.

2. The display panel according to claim 1, wherein: The first color sub-pixel is a red sub-pixel; the second color sub-pixel is a green sub-pixel; the third color sub-pixel is a blue sub-pixel; the size includes the width and length of the channel region of the driving transistor; the driving transistor included in the first pixel driving circuit includes a first channel region having a first width and a first length; the driving transistor included in the second pixel driving circuit includes a second channel region having a second width and a second length; the driving transistor included in the third pixel driving circuit includes a third channel region having a third width and a third length; wherein the first length, the second length, and the third length are different from each other, and / or the first width, the second width, and the third width are different from each other.

3. The display panel according to claim 2, wherein: The driving transistor included in the first pixel driving circuit, the driving transistor included in the second pixel driving circuit, and the driving transistor included in the third pixel driving circuit have electrical stability limitations; the first length, the second length, and the third length are equal; the first width is greater than the second width, and the second width is greater than the third width.

4. The display panel according to claim 2, wherein: The driving transistor included in the first pixel driving circuit, the driving transistor included in the second pixel driving circuit, and the driving transistor included in the third pixel driving circuit have no electrical stability restrictions, the first length is less than the second length, the second length is less than the third length, and the first width is greater than or equal to the second width, and the second width is greater than or equal to the third width.

5. The display panel according to claim 1 or 2, wherein: The first pixel driving circuit, the second pixel driving circuit and the third pixel driving circuit respectively include a first submodule, and the first submodule includes: a first driving transistor, a first data writing transistor, a first light emitting control transistor and a second light emitting control transistor, wherein: The first electrode of the first driving transistor is connected to the first node, the second electrode is connected to the second node, and the control electrode is connected to the third node; The first electrode of the first data writing transistor is used to receive the corresponding first data voltage, the second electrode is connected to the first node, and the control electrode is used to receive the first scan signal; The first electrode of the first light-emitting control transistor is connected to the positive end of the first power line, the second electrode is connected to the first node, and the control electrode is used to receive a first light-emitting control signal; the positive end of the first power line is used to receive a first voltage; The first electrode of the second light-emitting control transistor is connected to the anode of the corresponding light-emitting device, the second electrode is connected to the second node, and the control electrode is used to receive the first light-emitting control signal; the cathode of the first light-emitting device is connected to the negative end of the first power line to receive the second voltage; The first pixel driving circuit, the second pixel driving circuit, and the third pixel driving circuit are respectively connected to different voltages between the first voltage and the second voltage.

6. The display panel according to claim 5, wherein: The first submodule further includes: a first reset transistor, a first transmission transistor, a second reset transistor and a first capacitor; wherein, The first electrode of the first reset transistor is used to receive the first reset signal, the second electrode is connected to the third node, and the control electrode is used to receive the first reset control signal; The first electrode of the first transmission transistor is connected to the third node, the second electrode is connected to the second node, and the control electrode is used to receive the first scanning signal; The first electrode of the second reset transistor is connected to the anode of the first light emitting device, the second electrode is used to receive a second reset signal, and the control electrode is used to receive a second reset control signal; The first electrode of the first capacitor is connected to the positive end of the first power line, and the second electrode is connected to the third node.

7. The display panel according to claim 6, wherein: During a reset period within a display frame of the display panel, the first reset control signal and the second reset control signal are at an active level, the first reset transistor and the second reset transistor are turned on, and the first reset signal is transmitted to the third node and the second reset signal is transmitted to the anode of the light-emitting device, respectively, so as to reset the third node and the anode of the light-emitting device; In a data writing period after the reset period, the first scanning signal is at an active level, the first data writing transistor and the first transmission transistor are turned on, and the first data voltage is transmitted to the third node connected to the first driving transistor; In the light emitting period after the data writing period, the first light emitting control signal is at an active level, the first light emitting control transistor and the second light emitting control transistor are turned on, and the first driving transistor generates a light emitting current according to the first data voltage to drive the light emitting device to emit light.

8. The display panel according to claim 7, wherein: The first pixel driving circuit, the second pixel driving circuit and the third pixel driving circuit further include a second submodule respectively, and the second submodule includes a second driving transistor, a second data writing transistor, a third light emitting control transistor and a fourth light emitting control transistor; wherein, The first electrode of the second driving transistor is connected to the fourth node, the second electrode is connected to the fifth node, and the control electrode is connected to the sixth node; The first electrode of the second data writing transistor is used to receive the corresponding second data voltage, the second electrode is connected to the fourth node, and the control electrode is used to receive the second scan signal; The first electrode of the third light-emitting control transistor is connected to the positive end of the second power line, the second electrode is connected to the fourth node, and the control electrode is used to receive the second light-emitting control signal; the positive end of the second power line is used to receive the third voltage; The first electrode of the fourth light emitting control transistor is connected to the fifth node, the second electrode is connected to the third node, and the control electrode is used to receive the second light emitting control signal; The voltage across the third voltage connected to the first pixel driving circuit, the second pixel driving circuit, and the third pixel driving circuit is different from the voltage at the third node.

9. The display panel according to claim 8, wherein: The second submodule further includes: a third reset transistor, a second transmission transistor and a second capacitor, wherein: The first electrode of the third reset transistor is connected to the sixth node, the second electrode is used to receive the third reset signal, and the control electrode is used to receive the third reset control signal; The first electrode of the second transmission transistor is connected to the sixth node, the second electrode is connected to the fifth node, and the control electrode is used to receive the second scanning signal; The first electrode of the second capacitor is connected to the sixth node, and the second electrode is used to access the ramp voltage.

10. The display panel according to claim 9, wherein: During the reset period, the third reset control signal is at an active level, the third reset transistor is turned on, and the third reset signal is transmitted to the sixth node; During the data writing period, the second scanning signal is at an active level, the second data writing transistor and the second transmission transistor are turned on, and the second data voltage is transmitted to the sixth node connected to the second driving transistor; During the light emitting period, the voltage of the sixth node gradually changes with the change of the ramp voltage; The second light-emitting control signal is at an effective level, the third light-emitting control transistor and the third light-emitting control transistor are turned on, and the third voltage is transmitted to the fifth node to control the on-time and off-time of the second driving transistor and the first driving transistor according to the ramp voltage and the third voltage to control the light-emitting time of the light-emitting device.

11. The display panel according to claim 8, wherein The first driving transistor and the second driving transistor are P-type thin film transistors.

12. A display device, characterized in that: It comprises a display panel as described in any one of claims 1 to 11, and a signal control circuit, wherein the signal control circuit is used to generate a control signal for controlling the display panel; the control signal comprises: at least one of a scan signal, a reset signal, and a light-emitting control signal.

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