Display device and display panel thereof

By setting up a source drive circuit and an integrated voltage divider module in the non-display area of ​​the display panel, independent voltage control of different sub-pixels is achieved, solving image quality problems caused by material and process differences and improving display effects and smoothness.

CN120808704AActive Publication Date: 2025-10-17BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Application Number
CN202511318448.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-09-15
Publication Date
2025-10-17
Estimated Expiration
2045-09-15

AI Technical Summary

Technical Problem

Due to the differences in materials and processes of different sub-pixels, the lighting conditions are different. Using the same reset voltage will lead to image quality problems such as smearing and color cast. The existing technology is limited by the number of source driver output ports and is difficult to improve.

Method used

A source driving circuit is set in the non-display area of ​​the display panel, which includes a source driver and an integrated voltage divider module. The integrated voltage divider module distributes the initialization voltage to multiple panel input ports. Combined with a voltage regulator and a flexible circuit board, independent voltage control of different sub-pixels is achieved.

Benefits of technology

Without changing the source driver structure or increasing costs, the image quality problem is improved and the display effect is enhanced, especially in high refresh rate panels, the ghosting is reduced and the smoothness of dynamic images is improved.

✦ Generated by Eureka AI based on patent content.

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    Figure CN120808704A_ABST
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Abstract

The invention relates to the technical field of display, and mainly relates to a display device and a display panel thereof. The display panel is provided with a display area and a non-display area. In the display area, the display panel is provided with a plurality of panel input ports, and the panel input ports are used for inputting initialization voltage; in the non-display area, the display panel is provided with a source electrode driving circuit, and the source electrode driving circuit comprises a source electrode driver and an integrated voltage division module; the source driver is provided with a plurality of driver output ports, and the driver output ports are used for outputting initialization voltage; the number of the driver output ports is smaller than that of the panel input ports, and the integrated voltage dividing module is configured to enable any driver output port to be electrically connected with at least one panel input port; according to the display panel, the image quality can be improved without developing a new source driver on the basis of not changing the structure of the original source driver, and the cost is not increased.
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Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of display, in particular, to a display device and a display panel thereof. BACKGROUND

[0002] Due to the material and process differences of different sub-pixels, the light-on conditions of different sub-pixels have differences. If the same reset voltage is used for each sub-pixel, it will cause problems in picture quality debugging, such as common ghosting and color deviation.

[0003] In the related art, the way of setting the initialization voltage for each sub-pixel is used to improve the problems of ghosting and color deviation, but this solution is limited by the number of output ports of the source driver (driver IC).

[0004] It should be noted that the information disclosed in the above background section is only used to strengthen the understanding of the background of the present disclosure, and therefore can include information that does not constitute prior art known to those of ordinary skill in the art. SUMMARY

[0005] The purpose of the present disclosure is to overcome the shortcomings of the prior art, and to provide a display device and a display panel thereof, which can improve the picture quality without changing the original source driver structure (without developing a new source driver) and without increasing the cost.

[0006] According to one aspect of the present disclosure, a display panel is provided, having a display area and a non-display area; In the display area, the display panel has a plurality of panel input ports, which are used to input an initialization voltage; In the non-display area, the display panel has a source driving circuit, which includes a source driver and an integrated voltage dividing module; The source driver has a plurality of driver output ports, which are used to output the initialization voltage; the number of the driver output ports is less than the number of the panel input ports, and the integrated voltage dividing module is configured to electrically connect any one of the driver output ports with at least one of the panel input ports.

[0007] In an embodiment of the present disclosure, in the display area, the display panel has a plurality of display units; The display unit includes a sub-pixel and a pixel driving circuit for driving the sub-pixel to emit light, and the pixel driving circuit has at least one initialization connection port; The same initialization connection port of each pixel driving circuit connected to the sub-pixels of the same light-emitting color is connected to the same panel input port.

[0008] In an embodiment of the present disclosure, the number of the integrated voltage dividing modules is one.

[0009] In an embodiment of the present disclosure, the source driver has a query table, and the source driver is configured to call the query table and output the initialization voltage through the driver output port.

[0010] In an embodiment of the present disclosure, the source driver has at least two query tables, and each of the query tables corresponds to a different display mode of the display panel. The source driver is configured to call the corresponding query table based on the different display mode of the display panel and output the initialization voltage through the driver output port.

[0011] In an embodiment of the present disclosure, in the non-display area, the display panel is bound with a flexible circuit board, and the integrated voltage dividing module is arranged on the flexible circuit board. The flexible circuit board further has a voltage stabilizer, an output end of the integrated voltage dividing module is electrically connected to an input end of the voltage stabilizer, and an output end of the voltage stabilizer is electrically connected to the panel input port. The voltage stabilizer is configured to stabilize the initialization voltage output by the integrated voltage dividing module and output the stabilized initialization voltage to the panel input port.

[0012] In an embodiment of the present disclosure, the display panel has two groups of panel input port groups, and each group of panel input port groups includes the plurality of panel input ports. The output end of the voltage stabilizer is electrically connected to the two groups of panel input port groups, respectively. The voltage stabilizer is configured to stabilize the initialization voltage output by the integrated voltage dividing module and output the stabilized initialization voltage to the two groups of panel input port groups.

[0013] In an embodiment of the present disclosure, the number of the integrated voltage dividing modules is at least two, and each of the integrated voltage dividing modules has an enable control unit configured to control the integrated voltage dividing module to be turned on or turned off. The source driver is configured to control each of the enable control units to be turned on or turned off. Any two integrated voltage dividing modules form a module pair, and the module pair has at least one adjustment interface corresponding to the module pair. The at least one adjustment interface is different from the driver output port connected by one of the modules in the module pair and the driver output port connected by the other module in the module pair. The adjustment interface is one of the panel input ports.

[0014] In one embodiment of the present disclosure, the number of the integrated voltage division modules is two, and each of the pixel driving circuits has a first initialization connection port and a second initialization connection port; The source driver has four driver output ports, and the display panel has six panel input ports; the sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel. In one of the integrated voltage division modules, the panel input port connected to the first initialization connection port corresponding to the first sub-pixel and the panel input port connected to the second initialization connection port corresponding to the second sub-pixel are connected to the same driver output port through the integrated voltage division module; the panel input port connected to the first initialization connection port corresponding to the third sub-pixel and the panel input port connected to the second initialization connection port corresponding to the first sub-pixel are connected to the same driver output port through the integrated voltage division module. In another integrated voltage division module, the panel input port connected to the first initialization connection port corresponding to the first sub-pixel and the panel input port connected to the second initialization connection port corresponding to the third sub-pixel are connected to the same driver output port through the integrated voltage division module; the panel input port connected to the first initialization connection port corresponding to the second sub-pixel and the panel input port connected to the second initialization connection port corresponding to the first sub-pixel are connected to the same driver output port through the integrated voltage division module.

[0015] According to another aspect of the present disclosure, a display device is provided, which has the above-mentioned display panel.

[0016] It should be understood that the general description above and the detailed description below are only exemplary and explanatory, and cannot limit the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0017] The accompanying drawings, which are incorporated into and form part of the specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure. Obviously, the drawings in the following description are only some embodiments of the present disclosure, and other drawings can be obtained by those skilled in the art without creative labor on the basis of these drawings.

[0018] Figure 1 In one embodiment of the present disclosure, a structural schematic diagram of a display panel is shown.

[0019] Figure 2 In one embodiment of the present disclosure, a structural schematic diagram of a pixel driving circuit is shown.

[0020] Figure 3For an embodiment of the present disclosure, a schematic structural diagram of a pixel driving circuit.

[0021] Figure 4 For an embodiment of the present disclosure, a schematic structural diagram of a display panel.

[0022] Figure 5 For an embodiment of the present disclosure, a schematic structural diagram of a display panel.

[0023] Figure 6 For an embodiment of the present disclosure, a schematic structural diagram of a display panel.

[0024] Figure 7 For an embodiment of the present disclosure, a schematic structural diagram of a display panel. DETAILED DESCRIPTION

[0025] Example embodiments now will be described more fully hereinafter with reference to the accompanying drawings. Example embodiments, however, can be implemented in many different forms and should not be construed as limited to the implementations set forth herein; rather, these implementations are provided as non-limiting examples so that this disclosure will be thorough and complete, and will fully convey the scope of example embodiments to those skilled in the art. Like reference numerals refer to like elements throughout the drawings, and thus their detailed descriptions will be omitted. In addition, the drawings are only schematic and are non-limiting exemplary, they should not be considered as limiting the scope of the disclosure in any way.

[0026] Although relative terms such as "upper", "lower", etc. are used herein to describe one component's relationship to another component as illustrated in the figures, these terms are used herein for convenience only and are not intended to limit the scope of the disclosure to or from any particular direction. It is to be understood that if a device is turned over, so that the upper portion is now on the lower side and vice versa, what is described as on "top" is now on the "bottom". When a structure is "on" another structure, it can mean that the structure is formed integrally with the other structure or that the structure is "directly" on the other structure, or that the structure is "indirectly" on the other structure via another structure.

[0027] The terms "one", "a", "an", "the", "at least one", "at least one", are used to indicate the existence of one or more elements, components, members, etc.; the terms "comprising" and "having" are used to indicate an open-ended inclusion of one or more elements, components, members, etc. in the description of a process, a method, an article, or a composition of matter, and that additional elements, components, members, etc. are not precluded by the process, the method, the article, or the composition of matter; the terms "first", "second", and "third", etc. are used only as labels, and do not imply any limitation on the number of elements.

[0028] In this application, unless otherwise explicitly specified and limited, the term "connection" should be understood broadly, for example, "connection" can be fixed connection, or detachable connection, or integral; can be directly connected, or indirectly connected through an intermediate medium.

[0029] In this embodiment of the present disclosure, a transistor refers to an element including at least three terminals of a gate electrode, a drain electrode, and a source electrode. The transistor has a channel region between the drain electrode (a drain electrode terminal, a drain region, or a drain electrode) and the source electrode (a source electrode terminal, a source region, or a source electrode), and a current can flow through the drain electrode, the channel region, and the source electrode. The channel region refers to a region through which a current mainly flows.

[0030] In this embodiment of the present disclosure, the functions of the "source electrode" and the "drain electrode" are sometimes interchanged in the case of using a transistor having opposite polarities or in the case of a change in the direction of current in circuit operation. Therefore, in this specification, the "source electrode" and the "drain electrode" can be interchanged. In this embodiment of the present disclosure, for any one transistor, one of the "source" and the "drain" is referred to as a first electrode of the transistor, and the other is referred to as a second electrode of the transistor, and the gate electrode is referred to as a control electrode of the transistor. The first electrode can be the drain electrode, and the second electrode can be the source electrode, or the first electrode can be the source electrode, and the second electrode can be the drain electrode.

[0031] The structure layer A is formed on the side of the structure layer B away from the substrate. It can be understood that the structure layer A is formed on the side of the structure layer B away from the substrate. When the structure layer B is a patterned structure, part of the structure of the structure layer A can also be at the same physical height as the structure layer B or lower than the physical height of the structure layer B, wherein the substrate is the height reference.

[0032] In this embodiment of the present disclosure, a display device is provided, which includes a display panel PNL.

[0033] Referring to Figure 1 The display panel PNL includes a display area AA and a non-display area BB located on at least one side of the display area AA.

[0034] The display panel PNL includes a plurality of display units arranged in an array in the display area AA. The display unit includes a sub-pixel PIX and a pixel driving circuit PDC driving the sub-pixel PIX. The display panel PNL has a plurality of scan lines GL arranged along the row direction DH in the display area AA, each scan line GL is arranged one-to-one corresponding to each display unit row; the scan line GL is connected with each pixel driving circuit PDC of the corresponding display unit row. The display panel PNL has a plurality of data lines DL arranged along the column direction DV in the display area AA, each data line DL is arranged one-to-one corresponding to each display unit column; the data line DL is connected with each pixel driving circuit PDC of the corresponding display unit column. In this way, the pixel driving circuit PDC of each display unit is connected with one scan line GL and one data line DL. When the gate-on signal is loaded on the scan line GL, the data voltage loaded on the data line DL can be loaded to the pixel driving circuit PDC, so that the pixel driving circuit PDC can control the brightness of the sub-pixel PIX according to the written driving voltage.

[0035] In an embodiment of the present disclosure, the display panel can further have an initialization signal line for connecting the initialization connection port of the pixel driving circuit PDC, and loading an initialization voltage to the pixel driving circuit PDC.

[0036] Optionally, the sub-pixel PIX can be a current-driven self-luminous element, for example, can be any one of OLED, PLED, QLED, Micro LED, Mini LED and the like. In this embodiment, the sub-pixel PIX can include sub-pixels PIX of multiple different colors, for example, including a first sub-pixel PIX1 (a red sub-pixel for emitting red light), a second sub-pixel PIX2 (a green sub-pixel for emitting green light), and a third sub-pixel PIX3 (a blue sub-pixel for emitting blue light).

[0037] In an embodiment of the present disclosure, the display panel PNL can include a substrate substrate (not shown in the figure), a driving layer (not shown in the figure), and a pixel layer (not shown in the figure) arranged in sequence. The pixel layer is provided with a light-emitting element (not shown in the figure), which can be used as a sub-pixel PIX, and the driving layer is provided with a pixel driving circuit PDC for driving the light-emitting element (sub-pixel PIX); each light-emitting element (sub-pixel PIX) can emit light under the driving of the pixel driving circuit PDC to display a picture. Further, the display panel PNL further includes a thin film packaging layer on the side of the pixel layer away from the substrate substrate, and the thin film packaging layer can encapsulate and protect the pixel layer.

[0038] Optionally, the substrate can be a substrate of inorganic material, a substrate of organic material, or a composite substrate of a substrate of inorganic material and a substrate of organic material. For example, in some embodiments of the present disclosure, the substrate can be a glass material such as soda lime glass, quartz glass, sapphire glass, etc. In some other embodiments of the present disclosure, the substrate can be a polymer material such as polymethyl methacrylate, polyvinyl alcohol, polyvinyl phenol, polyether sulfone, polyimide, polyamide, polyacetal, polycarbonate, polyethylene terephthalate, polyethylene naphthalate, or a combination thereof. In some other embodiments of the present disclosure, the substrate can be a flexible substrate, for example, the substrate can include polyimide.

[0039] Optionally, in the driving layer DRL, any one of the pixel driving circuits PDC can include a thin film transistor TFT and a storage capacitor. Further, the thin film transistor TFT can be selected from a top-gate thin film transistor, a bottom-gate thin film transistor, or a dual-gate thin film transistor; the material of the active layer of the thin film transistor can be amorphous silicon semiconductor material, low-temperature polysilicon semiconductor material, metal oxide semiconductor material, organic semiconductor material, carbon nanotube semiconductor material, or other types of semiconductor material; the thin film transistor can be an N-type thin film transistor or a P-type thin film transistor.

[0040] It can be understood that in the pixel driving circuit PDC, the types of any two of the transistors can be the same or different. For example, in some embodiments, in one pixel driving circuit PDC, some of the transistors can be N-type transistors and some of the transistors can be P-type transistors. For another example, in some other embodiments, in one pixel driving circuit PDC, the material of the active layer of some of the transistors can be low-temperature polysilicon semiconductor material and the material of the active layer of some of the transistors can be metal oxide semiconductor material. In some embodiments of the present disclosure, the thin film transistor is a low-temperature polysilicon transistor. In some other embodiments of the present disclosure, some of the thin film transistors are low-temperature polysilicon transistors and some of the thin film transistors are metal oxide transistors.

[0041] Optionally, the pixel driving circuit PDC at least includes a data writing transistor, a driving transistor and a storage capacitor, the gate of the driving transistor can be electrically connected with one electrode plate of the storage capacitor. The source of the data writing transistor can be electrically connected with the data line DL, and the gate of the data writing transistor can be electrically connected with the scan line GL. When the scan signal is loaded on the scan line GL, the data writing transistor is turned on, so that the driving voltage on the data line DL is written to the gate of the driving transistor and the storage capacitor. When the data writing transistor is turned off, the driving voltage can be maintained by the storage capacitor. The driving transistor can output a driving current to drive the sub-pixel PIX to emit light under the control of the voltage on the gate of the driving transistor. It can be understood that the pixel driving circuit PDC of the embodiment of the present disclosure can also include other transistors or capacitors to make the pixel driving circuit PDC have better driving performance. For example, the pixel driving circuit PDC can be a 7T1C (7 thin film transistors and one storage capacitor), 8T1C (8 thin film transistors and one storage capacitor) or other architecture of pixel driving circuit.

[0042] Optionally, in the non-display area BB, the display panel PNL has a source driving circuit, which provides a driving current (or voltage) for the light emitting element, and the size of the current directly determines the luminance of the light emitting element, thereby realizing the brightness control of the pixel.

[0043] Optionally, in the non-display area BB, the display panel PNL is also bound with a flexible circuit board FPC, which is used to realize the electrical connection between the upper computer and the source driving circuit. In this embodiment, the source driving circuit can be bound on the flexible circuit board FPC.

[0044] Due to the material and process differences of different sub-pixels, the starting light conditions of different sub-pixels have certain differences. If the same reset voltage is used for each sub-pixel, the picture quality debugging will have problems, such as the common ghosting color cast problem. The root cause is that the starting light levels of the pixels are different. When switching from black state to white state under the same initialization voltage, for example, the red sub-pixel and the green sub-pixel are not starting light, and the ghosting effect will be blue.

[0045] In the related art, the way of setting the initialization voltage for each sub-pixel can be used to improve the ghosting color cast problem and the like, but this scheme is limited by the number of output ports of the source driver (drive IC).

[0046] In order to solve the technical problem, the structure of the source driving circuit is optimized in the present disclosure, so as to improve the ghosting color cast problem and the like without changing the source driver IC, and improve the display quality.

[0047] In one embodiment of the present disclosure, the pixel driving circuit PDC has a plurality of initialization connection ports Vinit for accessing initialization voltages to the pixel driving circuit PDC. For example, a 7T1C-based pixel driving circuit PDC has two initialization connection ports Vinit (a first initialization connection port Vinit1 and a second initialization connection port Vinit2). For another example, an 8T1C-based pixel driving circuit PDC has three initialization connection ports Vinit (a first initialization connection port Vinit1, a second initialization connection port Vinit2, and a third initialization connection port Vinit3).

[0048] Referring to Figure 2 , Figure 2 The pixel driving circuit PDC can be an 8T1C (8 thin film transistors and one storage capacitor) architecture, which includes a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, an eighth transistor T8, and a storage capacitor Cst. The pixel driving circuit PDC has three initialization connection ports, a first initialization connection port Vinit1, a second initialization connection port Vinit2, and a third initialization connection port Vinit3, each of which is used to access a corresponding initialization voltage.

[0049] Referring to Figure 3 , Figure 3 The pixel driving circuit PDC can be a 7T1C (7 thin film transistors and one storage capacitor) architecture, which includes a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, and a storage capacitor Cst. The pixel driving circuit PDC has two initialization connection ports, a first initialization connection port Vinit1 and a second initialization connection port Vinit2, each of which is used to access a corresponding initialization voltage.

[0050] In one embodiment of the present disclosure, referring to Figure 4 , Figure 6 and Figure 7, the same initialization connection port Vinit of each pixel driving circuit PDC for each sub-pixel PIX of the same luminous color is connected to the same panel input port. In other words, the same initialization connection port Vinit of the pixel driving circuit PDC corresponding to each sub-pixel PIX of the same color is connected to each other, different initialization connection ports Vinit are not connected to each other, and initialization connection ports Vinit of the pixel driving circuit PDC corresponding to sub-pixels PIX of different colors are not connected to each other. Under this connection configuration, when the pixel driving circuit PDC is a 7T1C, the display panel PNL has six panel input ports. When the pixel driving circuit PDC is an 8T1C, the display panel PNL has nine panel input ports.

[0051] Take the pixel drive circuit PDC of 8T1C as an example, see Figure 4 The first initialization connection port Vinit1 of all pixel drive circuits PDC corresponding to each first sub-pixel PIX1 is connected to the same panel input port, the second initialization connection port Vinit2 of all pixel drive circuits PDC corresponding to each first sub-pixel PIX1 is connected to the same panel input port, and the third initialization connection port Vinit3 of all pixel drive circuits PDC corresponding to each first sub-pixel PIX1 is connected to the same panel input port, and these three panel input ports are different panel input ports. The second sub-pixel PIX2 and the third sub-pixel PIX3 are similar, and will not be described in detail in this disclosure. Figure 6 and Figure 7 The initialization connection ports Vinit of the first sub-pixel PIX1, the second sub-pixel PIX2, and the third sub-pixel PIX3 are connected to different panel input ports. Under this condition, based on the 8T1C pixel driving circuit PDC, the display panel PNL has nine panel input ports.

[0052] Take the pixel drive circuit PDC as 7T1C as an example, see Figure 3 and Figure 5The pixel driving circuit PDC has a first initialization connection port Vinit1 and a second initialization connection port Vinit2. Each first sub-pixel PIX1 is connected to the same panel input port (first panel input port Vinit1-R) through the first initialization connection port Vinit1 of the pixel driving circuit PDC, each first sub-pixel PIX1 is connected to the same panel input port (second panel input port Vinit2-R) through the second initialization connection port Vinit2 of the pixel driving circuit PDC, each second sub-pixel PIX2 is connected to the same panel input port (third panel input port Vinit1-G) through the first initialization connection port Vinit1 of the pixel driving circuit PDC, each second sub-pixel PIX2 is connected to the same panel input port (fourth panel input port Vinit2-G) through the second initialization connection port Vinit2 of the pixel driving circuit PDC, each third sub-pixel PIX3 is connected to the same panel input port (fifth panel input port Vinit1-B) through the first initialization connection port Vinit1 of the pixel driving circuit PDC, and each third sub-pixel PIX3 is connected to the same panel input port (sixth panel input port Vinit2-B) through the second initialization connection port Vinit2 of the pixel driving circuit PDC. In this way, the display panel PNL has six panel input ports.

[0053] In the present disclosure, the initialization voltage of each sub-pixel PIX is controlled individually, and during display, the single-pixel on-off control can be realized by adjusting the initialization voltage. For example, the second initialization voltage of the first sub-pixel PIX1 (red sub-pixel) and the second sub-pixel PIX2 (green sub-pixel) is positively biased to pre-charge them to the same level as the third sub-pixel PIX3 (blue sub-pixel) when turned on, so as to improve the problem of trailing color cast.

[0054] In an embodiment of the present disclosure, referring to Figure 7 The double-sided driving mode can be used to realize the driving of the pixel driving circuit PDC for corresponding initialization. In this example, the display panel PNL can have two groups of panel input port groups, each group of panel input port groups including a plurality of panel input ports, and both groups of panel input port groups are electrically connected to the corresponding initialization connection port Vinit. In the present disclosure, the use of double-sided driving can greatly shorten the signal transmission path. Compared with single-sided driving (the signal needs to be transmitted from one end to the other end), double-sided driving can reduce signal delay and attenuation, so that the on-off control of the pixel is more rapid, especially in high refresh rate panels (such as e-sports screens and high-end displays), which can effectively reduce trailing and improve the smoothness of dynamic pictures.

[0055] Taking the pixel driving circuit PDC as an example, each group of panel input port groups includes nine panel input ports, each first sub-pixel PIX1 is connected to the same two panel input ports (the first panel input port in the first group of panel input port groups and the first panel input port in the second group of panel input port groups) through the first initialization connection port Vinit1 of the pixel driving circuit PDC, each first sub-pixel PIX1 is connected to the same two panel input ports (the second panel input port in the first group of panel input port groups and the second panel input port in the second group of panel input port groups) through the second initialization connection port Vinit2 of the pixel driving circuit PDC, and each first sub-pixel PIX1 is connected to the same two panel input ports (the second panel input port in the first group of panel input port groups and the third panel input port in the second group of panel input port groups) through the third initialization connection port Vinit3 of the pixel driving circuit PDC. Each second sub-pixel PIX2 is connected to the same two panel input ports (the fourth panel input port in the first group of panel input port groups and the fourth panel input port in the second group of panel input port groups) through the first initialization connection port Vinit1 of the pixel driving circuit PDC, each second sub-pixel PIX2 is connected to the same two panel input ports (the fifth panel input port in the first group of panel input port groups and the fifth panel input port in the second group of panel input port groups) through the second initialization connection port Vinit2 of the pixel driving circuit PDC, and each second sub-pixel PIX2 is connected to the same two panel input ports (the sixth panel input port in the first group of panel input port groups and the sixth panel input port in the second group of panel input port groups) through the third initialization connection port Vinit3 of the pixel driving circuit PDC. Each third sub-pixel PIX3 is connected to the same two panel input ports (the seventh panel input port in the first group of panel input port groups and the seventh panel input port in the second group of panel input port groups) through the first initialization connection port Vinit1 of the pixel driving circuit PDC, each third sub-pixel PIX3 is connected to the same two panel input ports (the eighth panel input port in the first group of panel input port groups and the eighth panel input port in the second group of panel input port groups) through the second initialization connection port Vinit2 of the pixel driving circuit PDC, and each third sub-pixel PIX3 is connected to the same two panel input ports (the ninth panel input port in the first group of panel input port groups and the ninth panel input port in the second group of panel input port groups) through the third initialization connection port Vinit3 of the pixel driving circuit PDC.

[0056] In an embodiment of the present disclosure, referring to Figure 5 With Figure 7 , the source driving circuit has a source driver IC, wherein the source driver IC has a plurality of driver output ports Q (seeFigure 5 The source driver IC generates the initialization voltage through the internal voltage processing circuit and outputs through the driver output port Q.

[0057] Optionally, when the number of the driver output port Q is not less than the number of the panel input port in each panel input port group, the driver output port Q is connected with the panel input port one by one to realize the source driver IC loading the initialization voltage to the panel input port (the initialization connection port Vinit).

[0058] Optionally, referring to Figure 5 When the number of the driver output port Q is less than the number of the panel input port in each panel input port group, in order to avoid the re-development of the source driver IC, the disclosure proposes to integrate the voltage division module QM, and the voltage division module QM is configured to electrically connect any one driver output port Q with at least one panel input port. It can be understood that the driver output port Q can be connected with one panel input port, and the driver output port Q can be connected with two panel input ports. Of course, the driver output port Q can also be connected with three, four, etc. panel input ports, which are set according to the requirements.

[0059] In the disclosure, when the initialization voltages are the same, the connection of the same driver output port Q can be used for electrical connection. The same in the disclosure means that within a certain difference range, they are all the same.

[0060] In an embodiment of the disclosure, the source driver IC further has an enable interface KQ, and the voltage division module QM has an enable control unit SN, and the enable interface KQ is electrically connected with the enable control unit SN, and the enable control unit SN is configured to control the opening or closing of the voltage division module QM, and the source driver IC is configured to control the opening or closing of the enable control unit SN. In other words, the source driver IC is further configured to control the opening or closing of the voltage division module QM through the enable control unit SN.

[0061] In an embodiment of the disclosure, the number of the voltage division module QM is at least one. For example, the number of the voltage division module QM is one. For example, the number of the voltage division module QM is at least two. When there are multiple voltage division modules QM, the source driver IC can drive the opening or closing of the corresponding voltage division module QM through the enable control unit SN of the voltage division module QM. Of course, which voltage division module QM is specifically started depends on the actual requirements.

[0062] In an embodiment of the present disclosure, any two integrated voltage division modules QM form a module pair, and the module pair has at least one adjustment interface corresponding to the module pair. The at least one adjustment interface is different from the driver output port Q connected by one module in the module pair and the driver output port Q connected by the other module in the module pair. The adjustment interface is one of the panel input ports. It can be understood that when the number of integrated voltage division modules QM is two, there is one module pair. When the number of integrated voltage division modules QM is three, there are three module pairs. When the number of integrated voltage division modules QM is four, there are six module pairs. And so on.

[0063] In an embodiment of the present disclosure, the integrated voltage division module QM can use a switch and a corresponding connection wire to realize the functions thereof. Of course, other ways can also be used to realize the same functions.

[0064] In an embodiment of the present disclosure, the integrated voltage division module QM can be integrated on the source driver IC. Of course, it can also be independently arranged or integrated on other structures.

[0065] In this example, taking the 7T1C structure of the pixel driving circuit PDC as an example, the different arrangement modes of each integrated voltage division module QM when there are multiple integrated voltage division modules QM are described. Referring to Figure 3 and Figure 5 , the number of integrated voltage division modules QM is two, each pixel driving circuit PDC has a first initialization connection port Vinit1 and a second initialization connection port Vinit2; the source driver IC has four driver output ports (Q1, Q2, Q3, Q4), and the display panel PNL has six panel input ports (Vinit1-R, Vinit2-R, Vinit1-G, Vinit2-G, Vinit1-B, Vinit2-B). The sub-pixel PIX includes a first sub-pixel PIX1, a second sub-pixel PIX2, and a third sub-pixel PIX3; wherein the first sub-pixel PIX1 is a red sub-pixel PIX, the second sub-pixel PIX2 is a green sub-pixel PIX, and the third sub-pixel PIX3 is a blue sub-pixel PIX.

[0066] Referring to Figure 5In the first integrated voltage division module QM1, the panel input port Vinit1-R connected with the first initialization connection port Vinit1 corresponding to the first sub-pixel PIX1 and the panel input port Vinit2-G connected with the second initialization connection port Vinit2 corresponding to the second sub-pixel PIX2 are connected with the same driver output port Q1 through the first integrated voltage division module QM1; the panel input port Vinit1-B connected with the first initialization connection port Vinit1 corresponding to the third sub-pixel PIX3 and the panel input port Vinit2-R connected with the second initialization connection port Vinit2 corresponding to the first sub-pixel PIX1 are connected with the same driver output port Q3 through the first integrated voltage division module QM1; the panel input port Vinit1-G connected with the first initialization connection port Vinit1 corresponding to the second sub-pixel PIX2 is connected with the driver output port Q2 through the first integrated voltage division module QM1; and the panel input port Vinit2-B connected with the second initialization connection port Vinit2 corresponding to the third sub-pixel PIX3 is connected with the driver output port Q4 through the first integrated voltage division module QM1.

[0067] In the second integrated voltage division module QM2, the panel input port Vinit1-R connected with the first initialization connection port Vinit1 corresponding to the first sub-pixel PIX1 and the panel input port Vinit2-B connected with the second initialization connection port Vinit2 corresponding to the third sub-pixel PIX3 are connected with the same driver output port Q1 through the second integrated voltage division module QM2; the panel input port Vinit1-G connected with the first initialization connection port Vinit1 corresponding to the second sub-pixel PIX2 and the panel input port Vinit2-R connected with the second initialization connection port Vinit2 corresponding to the first sub-pixel PIX1 are connected with the same driver output port Q2 through the second integrated voltage division module QM2. The panel input port Vinit1-B connected with the first initialization connection port Vinit1 corresponding to the third sub-pixel PIX3 is connected with the driver output port Q3 through the second integrated voltage division module QM2; and the panel input port Vinit2-G connected with the second initialization connection port Vinit2 corresponding to the second sub-pixel PIX2 is connected with the driver output port Q4 through the second integrated voltage division module QM2.

[0068] The connection mode of the integrated voltage division module QM corresponding to the pixel driving circuit PDC based on 8T1C can be adaptively designed and adjusted according to actual requirements.

[0069] Of course, in other embodiments, the number of integrated voltage division modules QM can be set according to requirements.

[0070] In an embodiment of the present disclosure, the source driver IC has a look-up table (LUT), and the source driver IC can call the LUT to output a corresponding initialization voltage.

[0071] In an example, the number of LUTs is one.

[0072] In another example, referring to Figure 5 , the number of LUTs is at least two (in an example, the number of LUTs is two, i.e., a first LUT 1 and a second LUT 2), and each LUT corresponds to a different display mode of the display panel PNL; each LUT can output an initialization voltage through the driver output port Q. The source driver IC is configured to call a corresponding LUT based on the different display mode of the display panel PNL, and output an initialization voltage through the driver output port Q.

[0073] In an embodiment of the present disclosure, the integrated voltage dividing module QM can be disposed on the flexible printed circuit board (FPC) (not shown in the figure).

[0074] In this example, referring to Figure 7 ( Figure 7 only the connection mode of the panel input port corresponding to the third initialization connection port Vinit3 of the 8T1C pixel driving circuit is shown in the figure), a voltage stabilizer WT can be disposed on the flexible printed circuit board FPC, and each initialization voltage output by the integrated voltage dividing module QM is output after passing through the voltage stabilizer WT. In other words, the voltage stabilizer WT is electrically connected to the integrated voltage dividing module QM, and at the same time, the voltage stabilizer WT is electrically connected to the panel input port, so as to send the stabilized initialization voltage to the panel input port. In the present disclosure, by disposing the voltage stabilizer WT and outputting the stabilized initialization voltage, the problem of initialization voltage deviation caused by voltage drop and internal circuit loss of the source driver IC can be avoided. It can be understood that the output end of the integrated voltage dividing module QM is connected to the voltage stabilizer WT through the flexible printed circuit board FPC, and the voltage stabilizer WT outputs the stabilized initialization voltage through the flexible printed circuit board FPC.

[0075] In other embodiments of the present disclosure, the integrated voltage dividing module QM can also be integrated on the source driver.

[0076] In summary, the disclosure proposes an added integrated voltage division module QM, which can realize the separate control of the initialization voltage of each sub-pixel PIX on the basis of the unchanged existing source driver IC structure, select initialization voltages with similar characteristics for multiplexing output (multiplexing the same driver output interface), and is not limited by the number of driver output interfaces of the source driver IC, so that the source driver IC is applicable to different display panels PNL and different display modes, greatly reducing the cost, improving the flexibility of the design of the display panel PNL (the source driver IC can flexibly control the output of the initialization voltage through the integrated voltage division module QM), and using the scheme in the disclosure, the initialization voltage is independently controlled according to the characteristics of the sub-pixel PIX, the picture quality is optimized, and the output of the initialization voltage is more stable.

[0077] Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the features disclosed herein. This application is intended to cover any variations, uses or adaptations of the disclosure that are deemed to fall within the general principles of the disclosure and include commonly known or customary practice in the art. The specification and examples are to be considered exemplary only, with the true scope and spirit of the disclosure being indicated by the following claims.

Claims

1. A display panel, characterized in that: Having a display area and a non-display area; In the display area, the display panel has a plurality of panel input ports, and the panel input ports are used to input initialization voltages; In the non-display area, the display panel has a source driving circuit, and the source driving circuit includes a source driver and an integrated voltage divider module; The source driver has a plurality of driver output ports, and the driver output ports are used to output an initialization voltage; The number of the driver output ports is less than the number of the panel input ports, and the integrated voltage divider module is configured to electrically connect any one of the driver output ports to at least one of the panel input ports.

2. The display panel according to claim 1, wherein: In the display area, the display panel has a plurality of display units; The display unit includes a sub-pixel and a pixel driving circuit for driving the sub-pixel to emit light, wherein the pixel driving circuit has at least one initialization connection port; The same initialization connection port connected to each of the pixel driving circuits of the sub-pixels of the same luminous color is connected to the same panel input port.

3. The display panel according to claim 2, wherein: The number of the integrated voltage divider module is one.

4. The display panel according to claim 3, wherein: The source driver has a lookup table, and is configured to call the lookup table and output an initialization voltage through the driver output port.

5. The display panel according to claim 4, wherein: The source driver has at least two lookup tables, each of which corresponds to a different display mode of the display panel; The source driver is configured to call the corresponding lookup table based on different display modes of the display panel and output an initialization voltage through the driver output port.

6. The display panel according to claim 5, wherein: In the non-display area, the display panel is bound with a flexible circuit board; the integrated voltage divider module is arranged on the flexible circuit board; A voltage regulator is also provided on the flexible circuit board. The output end of the integrated voltage divider module is electrically connected to the input end of the voltage regulator, and the output end of the voltage regulator is electrically connected to the panel input port. The voltage regulator is configured to stabilize the initialization voltage output by the integrated voltage divider module and output the stabilized initialization voltage to the panel input port.

7. The display panel according to claim 6, wherein: The display panel has two groups of panel input port groups, each group of panel input port groups includes the plurality of panel input ports; The output end of the voltage regulator is electrically connected to the two groups of panel input port groups respectively; the voltage regulator is configured to stabilize the initialization voltage output by the integrated voltage divider module and output the stabilized initialization voltage to the two groups of panel input port groups.

8. The display panel according to any one of claims 3 to 7, wherein: There are at least two integrated voltage divider modules, each of which has an enabling control unit configured to control the integrated voltage divider module to be turned on or off, and the source driver is configured to control each enabling control unit to be turned on or off; A module pair consisting of any two of the integrated voltage divider modules has at least one adjustment interface corresponding to the module pair, and the driver output port to which at least one of the adjustment interfaces is connected through one module in the module pair is different from the driver output port to which the adjustment interface is connected through the other module in the module pair; the adjustment interface is one of the panel input ports.

9. The display panel according to claim 8, wherein: There are two integrated voltage divider modules, and each pixel driving circuit has a first initialization connection port and a second initialization connection port; The source driver has four driver output ports, and the display panel has six panel input ports; the sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel; In one of the integrated voltage divider modules, the panel input port connected to the first initialization connection port corresponding to the first sub-pixel and the panel input port connected to the second initialization connection port corresponding to the second sub-pixel are connected to the same driver output port through the integrated voltage divider module; the panel input port connected to the first initialization connection port corresponding to the third sub-pixel and the panel input port connected to the second initialization connection port corresponding to the first sub-pixel are connected to the same driver output port through the integrated voltage divider module; In another integrated voltage divider module, the panel input port connected to the first initialization connection port corresponding to the first sub-pixel and the panel input port connected to the second initialization connection port corresponding to the third sub-pixel are connected to the same driver output port through the integrated voltage divider module; the panel input port connected to the first initialization connection port corresponding to the second sub-pixel and the panel input port connected to the second initialization connection port corresponding to the first sub-pixel are connected to the same driver output port through the integrated voltage divider module.

10. A display device, characterized in that: A display panel according to any one of claims 1 to 9.

Citation Information

Patent Citations

  • Liquid crystal display panel and driving circuit thereof

    CN105185326A

  • Time schedule controller, source drive IC, and source driving method

    CN105609068A

  • Driving device and driving method of display panel

    CN107507584A

  • Backlight module, display device and electronic equipment

    CN111489704A

  • Display device and mobile terminal

    CN113674667A