Method for forming doped polycrystalline silicon thin film

Abstract

The invention relates to the field of semiconductor manufacturing, in particular to a method for forming a doped polycrystalline silicon thin film, which comprises the following steps of: depositing doped polycrystalline silicon on an oxide layer of a substrate to form the doped polycrystalline silicon thin film; high-temperature annealing is carried out on the doped polycrystalline silicon thin film, the high-temperature annealing comprises a preheating stage, a temperature rising stage and an annealing stage, and oxygen is introduced in the preheating stage and the temperature rising stage so as to generate an amorphous silicon dioxide layer on the doped polycrystalline silicon thin film; wherein the initial temperature range of the heating stage is 300-500 DEG C; the flow of the introduced oxygen ranges from 0.1 SLM to 1SLM; the proportion range of the concentration of the introduced oxygen is 0.2%-3%; film thickness range of amorphous silicon dioxide layer

Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor manufacturing, and in particular, to a method for forming a doped polysilicon film. BACKGROUND

[0002] In the manufacturing of semiconductor micro-electro-mechanical systems (MEMS), doped polysilicon (DPOLY) is a key functional material, widely used in structural layers, electrode interconnections, and sacrificial layers, etc. Doped polysilicon films prepared by low pressure chemical vapor deposition (LPCVD) process, as shown in FIG. 1, are deposited on a silicon substrate 10 with an oxide layer 20. The deposition process of doped polysilicon films achieves a high level of customization of film properties by precisely controlling the temperature, pressure, and dopant flow. Since the deposition temperature is lower than the melting point of single crystal silicon, silicon atoms nucleate randomly on the substrate surface, forming a polycrystalline structure ranging from tens of nanometers to microns. This irregular grain structure often leads to an increase in film surface roughness, affecting the reliability and yield of the device. Figure 1

[0003] To improve the performance of the film, the prior art usually introduces a doping gas (such as PH3 or B2H6) during the deposition process, allowing the doping atoms to co-deposit with the silicon atoms. This method can achieve high doping uniformity, suitable for large-area substrates, while avoiding the damage to the film structure caused by ion implantation. However, the temperature gradient, grain boundary defects, and the mismatch of the coefficient of thermal expansion (CTE) between silicon and the substrate during the deposition process can cause significant residual stress problems.

[0004] The presence of residual stress not only affects the performance and reliability of the device, but also can cause defects such as substrate warping or cracking. Traditional solutions usually reduce the deposition temperature, pressure, and reaction gas flow ratio, combined with a high-temperature annealing process to improve the stress characteristics of the doped polysilicon film. However, this method has the following problems: 1. The unavoidable silicon oxidation reaction during the high-temperature annealing process can cause a reduction in film thickness; 2. The annealing process can cause stress distribution inhomogeneity while causing thickness loss, affecting the overall performance of the film. SUMMARY

[0005] The present application aims to provide a method for forming a doped polysilicon film that can achieve grain size uniformization while improving stress distribution and reducing residual stress.

[0006] To achieve the above-mentioned purpose, the present application provides the following technical solution: a method for forming a doped polysilicon film, comprising:

[0007] depositing doped polysilicon on the oxide layer of the substrate to form a doped polysilicon film; ​

[0008] annealing the doped polysilicon thin film at high temperature, the high temperature annealing comprising a preheating stage, a temperature rising stage and an annealing stage, oxygen is introduced in the preheating stage and the temperature rising stage to generate an amorphous silicon dioxide layer on the doped polysilicon thin film;

[0009] wherein the initial temperature range of the temperature rising stage is 300-500℃; the oxygen flow introduced is in the range of 0.1 SLM-1 SLM, the oxygen concentration introduced accounts for 0.2%-3%; the temperature rising rate of each stage in the temperature rising stage is 1-3℃ / min.

[0010] Further, the film thickness of the amorphous silicon dioxide layer is in the range of

[0011] Further, the forming method of the doped polysilicon thin film further comprises: removing the amorphous silicon dioxide layer by wet etching.

[0012] Further, the deposition temperature of the doped polysilicon thin film deposited on the oxide layer of the substrate is in the range of 400-600℃.

[0013] Further, the stable time of each stage is in the range of 5-10 minutes.

[0014] Further, the temperature rising range of the temperature rising stage comprises a first stage temperature rising range and a second stage temperature rising range, wherein the first stage temperature rising range is 300-400℃, and the second stage temperature rising range is 400-500℃.

[0015] Further, the annealing stage implements temperature cycling, and each time the temperature rising amplitude is increased in the range of 50-100℃ until the target temperature is reached.

[0016] Further, the target temperature is 900-1100℃,

[0017] Further, the target temperature holding time is 30-360 minutes.

[0018] The application has the beneficial effects that: the forming method of the doped polysilicon thin film of the application generates an amorphous silicon dioxide layer on the doped polysilicon thin film by passing oxygen in the temperature rising stage, and realizes grain size homogenization by setting corresponding parameters, and an upward tensile stress can be applied to the substrate by using the formed amorphous silicon dioxide layer, so that the stress distribution can be improved and the residual stress can be reduced, thereby avoiding the generation of substrate warping or cracks, in addition, in combination with the limitation of the temperature rising rate by setting the temperature rising rate of each stage to 1-3℃ / min, the temperature rising rate is low, and the low temperature rising rate can provide sufficient activation energy for the grain, promote the gradual migration and uniform growth of the grain boundary, and avoid the formation of abnormal grains, so that the grain homogenization is realized, and the electrical and mechanical properties of the doped polysilicon thin film are improved; the reduction of the temperature rising rate also helps to reduce the accumulation of thermal stress caused by the difference in the coefficient of thermal expansion (CTE), gradually release the stress between the thin film and the substrate, and avoid the local thermal gradient problem caused by rapid temperature rising.

[0019] The above description is only a summary of the technical scheme of the application, in order to more clearly understand the technical means of the application, and the content of the description can be implemented, the following will be described in detail with the preferred embodiments of the application and the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0020] Figure 1 The deposition structure diagram of the doped polysilicon thin film formed by the forming method of the prior art;

[0021] Figure 2 The flowchart of the forming method of the doped polysilicon thin film shown in an embodiment of the application;

[0022] Figure 3 The SEM diagram of the doped polysilicon thin film formed by embodiment one, embodiment two and control example one, control example two. DETAILED DESCRIPTION

[0023] The technical scheme of the application will be described in detail below with the accompanying drawings, obviously, the described embodiments are part of the embodiments of the application, not all the embodiments. Based on the embodiments in the application, all other embodiments obtained by those skilled in the art without creative labor belong to the protection scope of the application.

[0024] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" and the like indicate the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third" are only for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0025] In the description of the present application, it should be noted that unless otherwise explicitly specified and limited, the terms "mounting", "connecting", "connecting" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0026] In addition, the technical features involved in the different embodiments of the application described below can be combined with each other as long as there is no conflict.

[0027] Figure 2 A flowchart of a method for forming a doped polysilicon film is shown, which includes:

[0028] Step S100: depositing doped polysilicon on the oxide layer of the substrate to form a doped polysilicon film;

[0029] Step S200: high-temperature annealing of the doped polysilicon film, the high-temperature annealing including a preheating stage, a temperature rising stage and an annealing stage, oxygen is introduced in the preheating stage and the temperature rising stage to generate an amorphous silicon dioxide layer on the doped polysilicon film;

[0030] The initial temperature range of the temperature rising stage is 300-500℃, for example, 300℃, 400℃ or 500℃, etc.; the oxygen flow introduced is in the range of 0.1 SLM-1 SLM, for example, 0.1 SLM, 0.5 SLM or 1 SLM, etc., the oxygen concentration introduced is in the range of 0.2%-3%, for example, 0.2%, 1.5% or 3%, etc.; the temperature rising rate of each stage in the temperature rising stage is 1-3℃ / min, for example, 1℃ / min, 2℃ / min or 3℃ / min, etc.

[0031] The method for forming the doped polysilicon film generates an amorphous silicon dioxide layer on the doped polysilicon film by introducing oxygen in the preheating stage and the temperature rising stage, so that the amorphous silicon dioxide layer has a passivation effect, inhibiting abnormal grain boundary growth, and by setting corresponding parameters, the grain size is homogenized. Furthermore, the amorphous silicon dioxide layer formed can exert a certain tensile stress on the doped polysilicon film through thermal stress and chemical stress, which can partially offset the inherent stress of the doped polysilicon film, thereby balancing the stress distribution of the entire doped polysilicon film, reducing residual stress, so that the stress distribution and residual stress can be improved, thereby avoiding the generation of substrate warping or cracks. In addition, by setting the temperature rising rate of each stage to 1-3°C / min, the temperature rising rate is limited, so that the temperature rising rate is low, and the low temperature rising rate can provide sufficient activation energy for the grain, promote the gradual migration and uniform growth of the grain boundary, and avoid the formation of abnormal grains, so that the grain is homogenized, and the electrical and mechanical properties of the doped polysilicon film are improved; the reduction of the temperature rising rate also helps to reduce the accumulation of thermal stress caused by the difference in coefficient of thermal expansion (CTE), gradually releases the stress between the film and the substrate, and avoids the problem of local thermal gradient caused by rapid temperature rising.

[0032] It should be noted that when the inventors discovered the problems in the prior art, according to the conventional idea, since the use of nitrogen and argon can reduce the thermal stress of the film, the inventors directly thought of introducing nitrogen and argon in the annealing process. However, through the adjustment of different parameters of nitrogen and argon, the problem of abnormal grain boundary growth could not be solved, and after trying many gases without success, the inventors tried to introduce oxygen. In this attempt, the inventors found through many experiments that the amorphous silicon dioxide layer formed by introducing oxygen not only did not have the defects in the conventional cognition, but also had a significant passivation and stress adjustment effect. With further research, the inventors set the parameters so that the amorphous silicon dioxide layer generated not only did not damage the performance of the film, but also could solve the problems of passivation and stress at the same time.

[0033] During the experiment, the inventors also used other parameters, but they all had different problems. For example, when the initial temperature range was set to less than 300°C, the amorphous silicon dioxide layer could not be effectively generated, and the grain boundary inhibition effect was weak; when the initial temperature range was set to greater than 500°C, the amorphous silicon dioxide layer rapidly crystallized and lost its stress balance function, resulting in increased residual stress; when the oxygen flow rate was less than 0.1SLM, the coverage of the amorphous silicon dioxide layer was insufficient and the stress distribution was uneven; when the oxygen flow rate was greater than 1SLM, excessive oxidation stress was caused, which increased the overall residual stress of the film; when the oxygen concentration was greater than 3%, an excessively thick silicon dioxide layer was generated on the surface of the doped polysilicon, destroying the overall conductive performance; when the oxygen concentration was less than 0.2%, the generated amorphous silicon dioxide layer was insufficient to provide passivation, and the grain growth problem was not alleviated.

[0034] During the experiment, the inventors discovered that introducing oxygen could simultaneously solve the passivation and stress problems. However, in some embodiments, the film surface would become hardened. To address this issue, the inventors tried to adjust the parameters of the oxygen injection, but the problem remained unresolved. After repeated attempts, the inventors accidentally discovered that the problem could be solved by limiting the heating rate. Based on this discovery, after repeated experiments, the inventors confirmed that the heating rate should be limited in addition to the oxygen injection parameters, and ultimately limited the heating rate to 1–3°C / min.

[0035] In this embodiment, the amorphous silicon dioxide layer exerts an upward tensile stress on the doped polysilicon film in the range of -300 to -500 MPa. The thickness of the amorphous silicon dioxide layer is in the range of For example, or By setting the thickness range of the amorphous silicon layer, the surface stress distribution of the doped polysilicon thin film can be adjusted to prevent warping.

[0036] It should be noted that the inventors have tried to use other ranges for setting the film thickness of the amorphous silicon dioxide layer. However, within the set process parameter range, when the film thickness range is set to less than It has the following problems: 1. The thickness is less than 1. The amorphous silicon dioxide layer cannot fully cover the surface of the polysilicon film, and the pinning effect of oxygen atoms at the grain boundaries is insufficient, resulting in the rapid growth of abnormal grains and the inability to achieve uniform grain size; 2. Due to its weak tensile stress, it cannot balance the inherent stress inside it, resulting in substrate warping and cracks; 3. It is easily affected by the external environment and causes surface oxidation. When the post-film range is set to be greater than There are problems as follows: 1. Too thick will produce too large tensile stress, resulting in stress distribution imbalance of the doped polysilicon film, causing local cracks or peeling; 2. The difference in thermal expansion coefficient between the annealing process and the doped polysilicon film or the substrate will amplify thermal stress, thereby increasing the risk of warping or stress concentration.

[0037] The step S100 specifically includes:

[0038] A substrate is provided, which can be a single crystal silicon wafer or other compatible semiconductor substrate, such as silicon-on-insulator, etc.

[0039] The silicon substrate is cleaned to remove surface contamination, specifically: the cleaning solution includes a mixture of sulfuric acid or hydrogen peroxide, and a hydrofluoric acid solution, wherein the mixture of sulfuric acid or hydrogen peroxide is used to remove organic matter on the substrate, and the hydrofluoric acid solution is used to remove surface oxides.

[0040] The cleaned substrate is placed in a thermal oxidation furnace to grow an oxide layer on the substrate, and the thickness of the oxide layer is For example, or etc.

[0041] A doped polysilicon material is deposited on the oxide layer by low pressure chemical vapor deposition (LPCVD) to form a doped polysilicon film. The deposition temperature range for depositing the doped polysilicon film on the oxide layer is 400-600°C, for example, 400°C, 540°C or 600°C, etc. The thickness of the doped polysilicon film is greater than 300 nm, wherein when a TEL vertical furnace tube is used, the thickness of the doped polysilicon film can be selected to be 300 nm-1 μm, for example, 300 nm, 600 nm or 1 μm, etc.; when a KE furnace tube machine is used, the thickness of the doped polysilicon film can be selected to be 300 nm-4 μm, of course, in actual application, the thickness of the doped polysilicon film can also be greater than 4 μm, which is not specifically limited.

[0042] In step S200,

[0043] The stable time range of each stage is 5-10 minutes, 5 minutes, 8 minutes or 10 minutes. The temperature rising stage includes a first stage temperature rising range and a second stage temperature rising range, wherein the first stage temperature rising range is 300°C-400°C, and the second stage temperature rising range is 400°C-500°C. By refining the temperature rising stage and setting the stable time of each stage, transient stress accumulation caused by inconsistent thermal expansion can be avoided. It should be noted that by setting two stages for the temperature rising stage, the gradual release of internal stress of the material can be ensured, which helps to improve the overall stress distribution.

[0044] The temperature cycle is implemented in the annealing stage, and the temperature is increased by 50-100℃ each time until the target temperature is reached, which can be 50℃, 80℃ or 100℃. In this embodiment, the target temperature of the annealing stage ranges from 900℃ to 1100℃, for example, 900℃, 1050℃ or 1100℃. The target temperature holding time is 30-360min. By holding at the target temperature for a certain time (such as 30min, 200min or 360min, etc.), the material stress can be fully relaxed, which helps to reduce the residual stress after annealing.

[0045] In the above scheme, the temperature is gradually increased from the lower initial temperature of 400-500℃ in the initial temperature range of the heating stage to 900-1100℃, which provides sufficient time and conditions for grain growth, and helps to control the grain uniformity.

[0046] In order to adapt to subsequent processes such as bonding process, the method for forming the doped polysilicon thin film further includes: removing the amorphous silicon dioxide layer by wet etching.

[0047] The following further illustrates the grain situation of the doped polysilicon thin film formed according to the embodiment of the present application under different annealing conditions in combination with specific embodiments.

[0048] Embodiment one

[0049] Step one: providing a substrate

[0050] A silicon substrate is provided, and an oxide layer is grown on the substrate.

[0051] Step two: forming a doped polysilicon thin film

[0052] A doped polysilicon thin film is deposited on the oxide layer using low pressure chemical vapor deposition (LPCVD) technology; phosphine is introduced as a doping agent during the deposition process to realize co-deposition of doping atoms and silicon atoms.

[0053] Step three: annealing process

[0054] Preheating stage: set the initial temperature of the high-temperature annealing furnace to 300℃, and place the doped polysilicon thin film in the high-temperature annealing furnace;

[0055] Heating stage: the first stage is heated to 300-400℃, and the second stage is heated to 400-500℃, the heating rate of each stage is 1℃ / min, and the stable time of each stage is 5 minutes;

[0056] Annealing stage: the temperature is increased by 50℃ each time until the temperature reaches 900℃, and the temperature is gradually increased at a rate of 1℃ / min, and each stage is stable for 5 minutes. The temperature is kept at 900℃ for 1 hour.

[0057] In the preheating stage and the temperature rising stage, a gas composed of oxygen and nitrogen is introduced, wherein the oxygen concentration accounts for 0.2%, the oxygen flow is 0.1 SLM, and the film thickness of the amorphous silicon dioxide layer formed is

[0058] Example Two

[0059] Example Two is different from Example One in that the annealing process is as follows:

[0060] Preheating stage: the initial temperature of the high-temperature annealing furnace is set to 300°C, and the doped polysilicon film is placed in the high-temperature annealing furnace;

[0061] Temperature rising stage: the first-stage temperature rising range is 300-400°C, the second-stage temperature rising range is 400-500°C, the temperature rising rate of each stage is 3°C / min, and the temperature stabilization time of each stage is 5 minutes;

[0062] Annealing stage: the temperature is gradually increased by 100°C each time until 1050°C is reached, the temperature is gradually increased at a rate of 1°C / min, the temperature of each stage is stabilized for 10 minutes, and the temperature is maintained at 1050°C for 2 hours.

[0063] In the preheating stage and the temperature rising stage, oxygen is introduced, the oxygen flow is 1 SLM, the oxygen concentration accounts for 3%, and the film thickness of the amorphous silicon dioxide layer formed is

[0064] Comparative Example One

[0065] Comparative Example One is the same as Example One in terms of the steps, except that no oxygen is introduced in the preheating stage and the temperature rising stage, and only nitrogen is introduced.

[0066] Comparative Example Two

[0067] Comparative Example Two is substantially the same as Example Two in terms of the steps, except that the annealing process is as follows:

[0068] Preheating stage: the initial temperature of the high-temperature annealing furnace is set to 300°C, and the doped polysilicon film is placed in the high-temperature annealing furnace;

[0069] Temperature rising stage: the first-stage temperature rising range is 300-400°C, the second-stage temperature rising range is 400-500°C, the temperature rising rate of each stage is 8°C / min, and the temperature stabilization time of each stage is 5 minutes;

[0070] Annealing stage: the temperature is gradually increased by 100°C each time until 1050°C is reached, the temperature is gradually increased at a rate of 1°C / min, the temperature of each stage is stabilized for 10 minutes, and the temperature is maintained at 1050°C for 2 hours.

[0071] In the preheating stage and the temperature rising stage, oxygen is introduced, the oxygen flow is 1 SLM, the oxygen concentration is 3%, and the film thickness of the amorphous silicon dioxide layer formed is

[0072] Figure 3 The SEM images of the doped polysilicon films obtained in the embodiments one and two and the comparative examples one and two under different annealing conditions are shown respectively. The thicknesses of the doped polysilicon films of the comparative examples one and two and the embodiments one and two are all 600 nm. It can be seen from the SEM images that the grain distribution of the embodiments one and two is uniform, while the comparative example one has holes in the crystal, and the comparative example two has rough and island-shaped "clot" morphology on the surface, i.e. the phenomenon of clumping occurs. Figure 3

[0073] The technical features of the above embodiments can be combined arbitrarily, and in order to make the description simple, all possible combinations of the technical features in the above embodiments are not described, however, as long as the combinations of the technical features do not contradict, they should be considered as the scope of the present disclosure.

[0074] The above embodiments only express several implementation manners of the present application, the description is more specific and detailed, but it should not be understood as the limitation of the scope of the present application. It should be pointed out that for those skilled in the art, some modifications and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the appended claims.​

Claims

1. A method for forming a doped polysilicon thin film, characterized in that: The forming method comprises: depositing doped polysilicon on the oxide layer of the substrate to form a doped polysilicon thin film; performing high-temperature annealing on the doped polycrystalline silicon film, wherein the high-temperature annealing includes a preheating stage, a heating stage, and an annealing stage, wherein oxygen is introduced during the preheating stage and the heating stage to form an amorphous silicon dioxide layer on the doped polycrystalline silicon film; The initial temperature of the heating stage is in the range of 300°C-500°C; the oxygen flow rate is in the range of 0.1SLM-1SLM, and the oxygen concentration is in the range of 0.2%-3%; the heating rate of each stage in the heating stage is 1-3°C / min.

2. The method for forming a doped polysilicon thin film according to claim 1, wherein: The thickness of the amorphous silicon dioxide layer is in the range of 3. The method for forming a doped polysilicon thin film according to claim 1, wherein: The method for forming the doped polysilicon film further includes: removing the amorphous silicon dioxide layer by wet etching.

4. The method for forming a doped polysilicon thin film according to claim 1, wherein: The deposition temperature range of the doped polysilicon film on the oxide layer of the substrate is 400-600°C.

5. The method for forming a doped polysilicon thin film according to claim 1, wherein: The stabilization time for each stage ranges from 5 to 10 minutes.

6. The method for forming a doped polysilicon thin film according to claim 5, wherein: The temperature rising range of the temperature rising stage includes a first stage temperature rising range and a second stage temperature rising range, wherein the first stage temperature rising range is 300°C-400°C, and the second stage temperature rising range is 400°C-500°C.

7. The method for forming a doped polysilicon thin film according to claim 1, wherein: The annealing stage implements a temperature cycle, with each temperature increase increasing by 50-100° C. until the target temperature is reached.

8. The method for forming a doped polysilicon thin film according to claim 7, wherein: The target temperature is 900°C-1100°C.

9. The method for forming a doped polysilicon thin film according to claim 8, wherein: The target temperature is maintained for 30 min to 360 min.

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