Method and system on chip for memory access control with limited search range size during video coding

Abstract

Methods and systems on chip for memory access with limited search range sizes during video coding are provided. The method may include loading local data of non-encoded video data corresponding to a picture into a search memory of the video processing circuitry for at least one motion estimation (ME) operation of the video encoding; and configuring, in a memory space of the search memory, at least one ME search range corresponding to at least one ME region for performing the at least one ME operation, where any ME search range may include a corresponding ME region and a plurality of horizontal margins and a plurality of vertical margins of the ME search range relative to the ME region, each horizontal margin is at least twice the horizontal size of the ME region, and each vertical margin is at least twice the vertical size of the ME region.

Description

TECHNICAL FIELD

[0001] The present application relates to video processing, and in particular, to a method and a system-on-chip (SoC) for memory access control with limited search range size during video encoding. BACKGROUND

[0002] According to the related art, high efficiency video coding (HEVC) can help to improve image quality and data compression ratio. For example, by using coding tree unit (CTU) which can be larger than the size of macro-block (MB) in previous encoding techniques and can be re-sizable, the encoder can encode high resolution image more efficiently. However, there seems to be no suitable solution in the related art to reduce the related cost. SUMMARY

[0003] Therefore, one of the purposes of the present application is to provide a method and a system-on-chip (SoC) for memory access control with limited search range size during video encoding to solve the problems in the related art.

[0004] At least one embodiment of the present application provides a method for memory access control with limited search range size during video encoding, wherein the method can be applied to a video processing circuit in an electronic device. The method can include: loading partial data corresponding to non-encoded video data of a picture into a search memory of the video processing circuit for at least one motion estimation (ME) operation of the video encoding; and configuring at least one motion estimation search range corresponding to at least one motion estimation region in a memory space of the search memory for the at least one motion estimation operation, wherein the at least one motion estimation search range includes the at least one motion estimation region, and wherein the video processing circuit is configured to use an expanded search range larger than the at least one motion estimation search range in the memory space to perform the at least one motion estimation operation to improve the efficiency of motion estimation.

[0005] At least one embodiment of the present disclosure provides a system on chip, wherein the system on chip can be disposed in an electronic device. The system on chip can include at least one processor, a video processing circuit coupled to the at least one processor, and at least one memory coupled to the at least one processor and the video processing circuit. The at least one processor can be configured to control operation of the electronic device, the video processing circuit can be configured to perform video processing for the electronic device, and the at least one memory can be configured to store information. For example, the video processing circuit is configured to load local data corresponding to non-coded video data of a picture into a search memory of the video processing circuit for at least one motion estimation operation of the video encoding, wherein the at least one memory includes the search memory; and the video processing circuit is configured to configure at least one motion estimation search range corresponding to at least one motion estimation region in a memory space of the search memory for the at least one motion estimation operation, wherein the at least one motion estimation search range includes the at least one motion estimation region, wherein the video processing circuit is configured to perform the at least one motion estimation operation using an expanded search range in the memory space that is larger than the at least one motion estimation search range to improve motion estimation performance.

[0006] One of the benefits of the present disclosure is that by properly controlling at least one limited search range and expanding the search range(s), the method and system on chip of the present disclosure can achieve optimal cost control while maintaining the best performance of the system on chip. Compared to the related art, the method and system on chip of the present disclosure can solve the problems of the related art without or with less side effects. BRIEF DESCRIPTION OF DRAWINGS

[0007] Figure 1 is a schematic diagram of an electronic device according to an embodiment of the present disclosure.

[0008] Figure 2 is a schematic diagram of a first configuration involved in a method for memory access control with limited search range size during video encoding according to an embodiment of the present disclosure.

[0009] Figure 3 is a schematic diagram of a second configuration involved in the method according to the embodiment shown in Figure 2

[0010] Figure 4 is a schematic diagram of a third configuration involved in the method according to the embodiment shown in Figure 2

[0011] Figure 5 is a schematic diagram of a fourth configuration involved in the method according to the embodiment shown in Figure 2

[0012] ​​​Figure 6 According to an embodiment of the present application, a processing region control scheme of the method is illustrated.

[0013] Figure 7 According to an embodiment of the present application, a processing region control scheme of the method is illustrated.

[0014] Figure 8 According to an embodiment of the present application, a flowchart of the method is illustrated. DETAILED DESCRIPTION

[0015] Figure 1 is a schematic diagram of an electronic device 100 according to an embodiment of the present application. The electronic device 100 can include a system-on-chip (SoC) 101, which can include at least one processor (e.g., one or more processors) collectively referred to as processor(s) 102, at least one bus (e.g., one or more buses) collectively referred to as bus(es) 103, video processing circuitry 110, and at least one memory (e.g., one or more memories) collectively referred to as memory(ies) 120. The electronic device 100 can also include a number of additional components located outside the system-on-chip 101, such as user interface (UI) device 130, display device 140, external memory (not shown), etc. The processor(s) 102 can control operation of the electronic device 100, the video processing circuitry 110 can perform video processing (e.g., video processing conforming to HEVC) for the electronic device 100, the memory 120 can be used to store information, the UI device 130 can provide UI mechanisms to allow a user of the electronic device 100 to interact with the electronic device 100, and the display device 140 can display information for the user of the electronic device 100. According to some embodiments, the architecture of the electronic device 100 can be varied, for example: the electronic device 100 can include the processor(s) 102 and the bus(es) 103, and include the video processing circuitry 110, the memory 120, the UI device 130, the display device 140, etc. coupled to the processor(s) 102 through the bus(es) 103, while the implementation of the system-on-chip 101 is optional; the UI device 130 and the display device 140 can be integrated into the same module; and / or the at least one memory, such as the memory 120, can include a plurality of memories, and one of the plurality of memories can be located outside the system-on-chip 101 and can be considered as an external memory.

[0016] Examples of the electronic device 100 can include, but are not limited to, personal computers such as desktop computers and laptop computers, tablet computers, multi-functional mobile phones, wearable devices. In addition, the processor 102 can be implemented by one or more processors, one or more processor cores, one or more microprocessors, etc., the video processing circuit 110 can be implemented by a video codec, etc., the memory 120 can be implemented by volatile memories such as static random-access memories (SRAM) and dynamic random-access memories (DRAM), and non-volatile memories such as electrically-erasable programmable read-only memories (EEPROM), Flash memories, etc., the user interface device 130 can be implemented by a keyboard, a mouse, a touch panel, a touch screen, etc., and the display device 140 can be implemented by a display panel, a touch screen, etc.

[0017] Figure 2 , Figure 3 , Figure 4 and Figure 5FIG. 1 shows a schematic diagram of a first configuration of a method for memory access control with a limited search range size during video encoding according to an embodiment of the present application, wherein the method can be applied to a video processing circuit 110 in an electronic device 100. The video processing circuit 110 can configure a search memory 200 of the video processing circuit 110 for the video encoding, and in particular, use a memory space of the search memory 200 according to a plurality of parameters such as memory configuration parameters U, B, C, H, W, b, c, h, w, etc. The memory configuration parameters U, B, C, H, and W can represent a size of a basic coding unit, a size of a motion estimation (ME) region, a size of any of a plurality of related Coding Tree Blocks (CTBs) {CTB()}, such as CTB(n-1) and CTB(n), a size of the memory space along a vertical direction of an image frame, and a size of the memory space along a horizontal direction of the image frame, respectively, in units of pixels. B = (b*U), C = (c*U), H = (h*U), and W = (w*U). Based on the method, the video processing circuit 110 can perform memory access control with the limited search range size during the video encoding, and related operations can include:

[0018] (1) The video processing circuit 110 can load local data corresponding to non-coded video data of a picture (e.g., an image frame) into a search memory 200 (e.g., an SRAM) of the video processing circuit 110 for at least one motion estimation (ME) operation of the video encoding, such as an integer motion estimation (IME) operation and a fractional motion estimation (FME) operation of the video encoding, wherein the picture can represent a reference picture in a series of pictures, and the local data can represent video data of at least one local picture in the reference picture;

[0019] (2) The video processing circuit 110 can configure an IME search range IME_Search_Range corresponding to the IME region IME_Region in the memory space of the memory 200 for performing the IME operation, wherein the IME search range IME_Search_Range can include the IME region IME_Region and a plurality of first horizontal margins {IME_Margin_H} and a plurality of first vertical margins {IME_Margin_V} of the IME search range IME_Search_Range relative to the IME region IME_Region, for example, each of the plurality of first horizontal margins {IME_Margin_H} reaches at least twice of a horizontal size IME_Region_H of the IME region IME_Region, and each of the plurality of first vertical margins {IME_Margin_V} reaches at least once of a vertical size IME_Region_V of the IME region IME_Region; and

[0020] (3) The video processing circuit 110 can configure an FME search range FME_Search_Range corresponding to the FME region FME_Region in the memory space of the memory 200 for performing the FME operation, wherein the FME search range FME_Search_Range can include the FME region FME_Region and a plurality of second horizontal margins {FME_Margin_H} and a plurality of second vertical margins {FME_Margin_V} of the FME search range FME_Search_Range relative to the FME region FME_Region, for example, each of the plurality of second horizontal margins {FME_Margin_H} reaches at least twice of a horizontal size FME_Region_H of the FME region FME_Region, and each of the plurality of second vertical margins {FME_Margin_V} reaches at least twice of a vertical size FME_Region_V of the FME region FME_Region;

[0021] The at least one memory, such as the memory 120, can include a search memory 200 and the external memory (e.g., a DRAM), and the video processing circuit 110 can sequentially load video data of a plurality of partial pictures in the reference picture from the external memory to the search memory 200 according to processing progress of an encoding pipeline in the video processing circuit 110. For example, the electronic device 100 can include an integrated circuit, and the video processing circuit 110 and the search memory 200 can be disposed in the integrated circuit. The video processing circuit 110 can load the partial data corresponding to the partial pictures in the non-encoded video data of the picture from outside of the integrated circuit (or from the external memory, such as a DRAM) to the search memory 200 by using direct memory access (DMA) control for performing at least the IME operation, and in particular, for performing the IME operation and the FME operation. In addition, the video processing circuit 110 can perform the at least one ME operation (e.g., the IME operation and the FME operation) using an enlarged search range in the memory space that is greater than at least one ME search range ME_Search_Range (e.g., the IME search range IME_Search_Range and the FME search range FME_Search_Range) to improve the performance of motion estimation.

[0022] During the video encoding, the video processing circuit 110 can utilize the encoding pipeline to perform motion estimation such as the IME operation and the FME operation. For example, b = 2, c = 4, h = 8 and w = 16; if U = 16, then B = 32, C = 64, H = 128 and W = 256, but the present disclosure is not limited thereto. Assuming that the search window size can be a region enlarged from the boundary of the current motion estimation region (e.g., the IME region IME_Region or the FME region FME_Region) along the X-axis and Y-axis directions by (±64, ±32), in the case that the video processing circuit 110 is implemented as an advanced video codec such as a video codec compliant with HEVC, AOMedia Video 1 (AV1), etc., if the CTB size is 64x64, i.e., the CTB size of (64*64) pixels, then the layout of the search memory 200 needs to be at least 256x128, i.e., the memory space size of (256*128) pixels. The video processing circuit 110 can sequentially load the multiple local pictures (or video data thereof) in the reference picture from the external memory to the search memory 200 according to the processing progress of the encoding pipeline, in particular, utilizing the DMA module / circuit built-in the video processing circuit 110 to load a certain local picture (or video data thereof) to a certain region in the memory space, which can be referred to as a DMA region.

[0023] For Figure 2At the first configuration, at the current time point t(0), the IME operation can include a first motion estimation of the current picture relative to the reference picture for the IME region IME_Region to generate at least one integer part of a first motion vector MV1(0) of the current picture at the IME region IME_Region, and the FME operation can include a second motion estimation of the current picture relative to the reference picture for the FME region FME_Region to generate at least one fractional part of a second motion vector MV2(0) of the current picture at the FME region FME_Region. For better understanding, at the current time point t(0), the IME region IME_Region and the FME region FME_Region can represent the IME region IME_Region(0) and the FME region FME_Region(0), respectively; at a subsequent time point t(1) after the current time point t(0), the IME region IME_Region and the FME region FME_Region can represent the IME region IME_Region(1) and the FME region FME_Region(1), respectively; and the rest can be similarly applied. If the pipeline process unit size is designed to be 32x32, i.e., the pipeline process unit size is (32*32) pixels, the available region of the search memory 200 can be increased / enlarged during the IME / FME z-order movement. For example, at the first configuration, the video processing circuit 110 can enlarge the IME search range IME_Search_Range(0) to the entire available region, including the left margin "-96" and the right margin "+96" along the X-axis direction and the up margin "-32" and the down margin "+64" along the Y-axis direction from the four boundaries of the IME region IME_Region(0). Similarly, the video processing circuit 110 can enlarge the FME search range FME_Search_Range(0) to the entire available region. When the IME operation and the FME operation finish the processing of the respective current 32x32 region, the video processing circuit 110 can continue the processing of the respective next 32x32 region. Figure 2 At the first configuration, at the current time point t(0), the IME operation can include a first motion estimation of the current picture relative to the reference picture for the IME region IME_Region to generate at least one integer part of a first motion vector MV1(0) of the current picture at the IME region IME_Region, and the FME operation can include a second motion estimation of the current picture relative to the reference picture for the FME region FME_Region to generate at least one fractional part of a second motion vector MV2(0) of the current picture at the FME region FME_Region. For better understanding, at the current time point t(0), the IME region IME_Region and the FME region FME_Region can represent the IME region IME_Region(0) and the FME region FME_Region(0), respectively; at a subsequent time point t(1) after the current time point t(0), the IME region IME_Region and the FME region FME_Region can represent the IME region IME_Region(1) and the FME region FME_Region(1), respectively; and the rest can be similarly applied. If the pipeline process unit size is designed to be 32x32, i.e., the pipeline process unit size is (32*32) pixels, the available region of the search memory 200 can be increased / enlarged during the IME / FME z-order movement. For example, at the first configuration, the video processing circuit 110 can enlarge the IME search range IME_Search_Range(0) to the entire available region, including the left margin "-96" and the right margin "+96" along the X-axis direction and the up margin "-32" and the down margin "+64" along the Y-axis direction from the four boundaries of the IME region IME_Region(0). Similarly, the video processing circuit 110 can enlarge the FME search range FME_Search_Range(0) to the entire available region. When the IME operation and the FME operation finish the processing of the respective current 32x32 region, the video processing circuit 110 can continue the processing of the respective next 32x32 region.

[0024] The processing progress of the encoding pipeline can vary over time. For example, in a series of time points {t()}, t(-1) < t(0) < t(1) < t(2) < t(3) < …. For Figure 3In the illustrated second configuration, at time point t(l), the IME operation can include performing the first motion estimation of the current picture relative to the reference picture for the latest IME region IME_Region(l) to generate at least one integer part of another first motion vector MV1 (1) of the current picture in the latest IME region IME_Region(l), and the FME operation can include performing the second motion estimation of the current picture relative to the reference picture for the latest FME region FME_Region(l) (which can be the same region as the IME region IME_Region(0) at time point t(0)) to generate at least one fractional part of another second motion vector MV2 (1) (e.g., the first motion vector MV1 (0)) of the current picture in the latest FME region FME_Region(l) (e.g., the IME region IME_Region(0) at time point t(0)), where when the latest FME region FME_Region(l) at time point t(l) is equal to the IME region IME_Region(0) at time point t(0), the another second motion vector MV2 (1) and its fractional part MV2_fractional(1) can represent the first motion vector MV1 (0) and its at least one fractional part MV1_fractional(0), respectively. The video processing circuit 110 can expand the IME search range IME_Search_Range(l) to the entire available region, including a left margin of "-96" and a right margin of "+64" along the X-axis direction and an up margin of "-32" and a down margin of "+64" along the Y-axis direction from the four boundaries of the IME region IME_Region(l). The video processing circuit 110 can expand the FME search range FME_Search_Range(l) to the entire available region, and the expanded FME search range at time point t(l) can be the same as the expanded IME search range at time point t(0), including a left margin of "-96" and a right margin of "+96" along the X-axis direction and an up margin of "-32" and a down margin of "+64" along the Y-axis direction from the four boundaries of the FME region IME_Region(l), where the video processing circuit 110 can use the left margin of "-96" instead of the left margin of "-128", precluding the next same-size region of the DMA region at time point t(l), since the next same-size region will be used as the DMA region at time point t(2) for loading a new local picture (or video data thereof) at time point t(2).After completing the processing of the IME operation and the FME operation on the respective current 32×32 regions, the video processing circuit 110 may continue processing the IME operation and the FME operation on the respective next 32×32 regions.

[0025] against Figure 4 In the third configuration shown, at time point t(2), the IME operation may include performing the first motion estimation of the current picture relative to the reference picture for the latest IME region IME_Region(2) to generate another (yet) motion estimation of the current picture in the latest IME region IME_Region(2). another) first motion vector MV1(2), and the FME operation may include performing the second motion estimation of the current picture relative to the reference picture for an latest FME region FME_Region(2) (which may be the same region as the IME region IME_Region(1) at the time point t(1)) to generate at least one fractional part MV2_fractional(2) of yet another second motion vector MV2(2) (e.g., the another first motion vector MV1(1)) of the current picture in the latest FME region FME_Region(2) (e.g., the IME region IME_Region(1) at the time point t(1)), wherein when the latest FME region FME_Region(2) at the time point t(2) is equal to the IME region IME_Region(1) at the time point t(1), the yet another second motion vector MV2(2) and its fractional part MV2_fractional(2) may respectively represent the another first motion vector MV1(1) and its at least one fractional part MV1_fractional(1). Since the use of the data in the DMA area at time point t(1) has ended at time point t(2), the video processing circuit 110 can start loading or reading new pixel data into the next area, i.e., the DMA area at time point t(2). Figure 4The video processing circuit 110 can expand the IME search range IME_Search_Range(2) to the entire available area, including a left margin of "-64" and a right margin of "+128" along the X-axis direction and an up margin of "-64" and a down margin of "+32" along the Y-axis direction from the four boundaries of the IME region IME_Region(2). The video processing circuit 110 can expand the FME search range FME_Search_Range(2) to the entire available area, and the expanded FME search range for the time point t(2) can be the same as the expanded IME search range for the time point t(l), including a left margin of "-96" and a right margin of "+64" along the X-axis direction and an up margin of "-32" and a down margin of "+64" along the Y-axis direction from the four boundaries of the FME region IME_Region(2). When the processing of the IME operation and the FME operation in the respective current 32x32 regions is completed, the video processing circuit 110 can continue the processing of the IME operation and the FME operation in the respective next 32x32 regions.

[0026] For Figure 5In the illustrated fourth configuration, at time point t(3), the IME operation can include performing the first motion estimation of the current picture relative to the reference picture for the latest IME region IME_Region(3) to generate at least one integer part of still another first motion vector MV1(3) of the current picture in the latest IME region IME_Region(3), and the FME operation can include performing the second motion estimation of the current picture relative to the reference picture for the latest FME region FME_Region(3) (which can be the same region as the IME region IME_Region(2) at time point t(2)) to generate at least one fractional part of still another second motion vector MV2(3) (e.g., the yet another first motion vector MV1(2)) of the current picture in the latest FME region FME_Region(3) (e.g., the IME region IME_Region(2) at time point t(2)), where when the latest FME region FME_Region(3) at time point t(3) is equal to the IME region IME_Region(2) at time point t(2), the still another second motion vector MV2(3) and its fractional part MV2_fractional(3) can represent the yet another first motion vector MV1(2) and its at least one fractional part MV1_fractional(2), respectively. The video processing circuit 110 can expand the IME search range IME_Search_Range(3) to the entire available region, including a left margin of "-96" and a right margin of "+96" along the X-axis direction and an up margin of "-64" and a down margin of "+32" along the Y-axis direction from the four boundaries of the IME region IME_Region(3). The video processing circuit 110 can expand the FME search range FME_Search_Range(3) to the entire available region, and the expanded FME search range at time point t(3) can be the same as the expanded IME search range at time point t(2), including a left margin of "-64" and a right margin of "+128" along the X-axis direction and an up margin of "-64" and a down margin of "+32" along the Y-axis direction from the four boundaries of the FME region IME_Region(3).

[0027] Based on a series of configurations such as the first configuration, the second configuration, the third configuration, the fourth configuration, and so on, by properly controlling at least one limited search range (e.g., the IME search range IME_Search_Range and the FME search range FME_Search_Range) in the memory space of the search memory 200 and expanding the search range(s), the video processing circuit 110 can efficiently use the search memory 200 to improve the efficiency of motion estimation and coding gain, and achieve optimized cost control while maintaining the best performance of the system on chip 101. In particular, the predetermined available region Available_Region of the memory space of the search memory 200 can include the IME search range IME_Search_Range and a plurality of other horizontal margins and at least one other vertical margin of the predetermined available region Available_Region relative to the IME search range IME_Search_Range, for example, each of the plurality of other horizontal margins reaches at least one time of the horizontal size of the IME region IME_Region, and each of the at least one other vertical margin reaches at least one time of the vertical size of the IME region IME_Region.

[0028] Figure 6An available region control scheme is illustrated according to an embodiment of the present application. For example, assuming b = 2, c = 4, h = 8, and w = 16, when U = 16, B = 32, C = 64, H = 128, and W = 256. Search range 620 can be an example of the IME search range IME_Search_Range(0) at time point t(0), and the IME search range IME_Search_Range(0) such as search range 620 can include the IME region IME_Region(0) at time point t(0) and the plurality of first horizontal margins {IME_Margin_H} (e.g., horizontal margins "+64" and "-64") and the plurality of first vertical margins {IME_Margin_V} (e.g., vertical margins "+32" and "-32") of search range 620 relative to the IME region IME_Region(0) at time point t(0), where each of the plurality of first horizontal margins {IME_Margin_H} (e.g., horizontal margins "+64" and "-64") is at least twice the horizontal size IME_Region_H (e.g., 32) of the IME region IME_Region(0), and each of the plurality of first vertical margins {IME_Margin_V} (e.g., vertical margins "+32" and "-32") is at least one time the vertical size IME_Region_V (e.g., 32) of the IME region IME_Region(0).

[0029] Based on the available region control scheme, the predetermined available region Available_Region at time point t(0) for the IME operation can include search range 620 and the plurality of other horizontal margins (e.g., horizontal margins "+32" and "-32" along the +X direction and the -X direction, respectively, as shown by the shading to the right and left of search range 620 in Figure 6 respectively, excluding the DMA region) and the at least one other vertical margin (e.g., vertical margin "+32" along the +Y direction, as shown by the shading below search range 620 in Figure 6 ). Thus, video processing circuit 110 can efficiently use the augmented search range (e.g., available region Available_Region augmented from search range 620) for the IME operation to improve the efficiency of motion estimation, and thereby improve the overall efficiency.

[0030] In addition, each of the plurality of second horizontal margins {FME_Margin_H} at the second time point (e.g., time point t(l)) can have a size equal to that of each of the plurality of first horizontal margins {IME_Margin_H} at the first time point (e.g., time point t(0)), and each of the plurality of second vertical margins {FME_Margin_V} at the second time point (e.g., time point t(l)) can have a size equal to that of each of the plurality of first vertical margins {IME_Margin_V} at the first time point (e.g., time point t(0)). In accordance with Figure 3 With the second configuration shown, the FME search range FME_Search_Range(l) at time point t(l) can be equal to the IME search range IME_Search_Range(0) at time point t(0). In this case, Figure 3 may be modified to add Figure 6 The search range 620 and the shading to the right, left, and below the search range 620, respectively, are shown. Thus, the same search range 620 can also serve as an example of the FME search range FME_Search_Range(l) at time point t(l), and the FME search range FME_Search_Range(l) such as the search range 620 can include the FME region FME_Region(l) at time point t(l) (or the IME region IME_Region(0) at time point t(0)) and the plurality of second horizontal margins {FME_Margin_H} (e.g., horizontal margins "+64" and "-64") and the plurality of second vertical margins {FME_Margin_V} (e.g., vertical margins "+32" and "-32") of the search range 620 relative to the FME region FME_Region(l) at time point t(l) (or the IME region IME_Region(0) at time point t(0)), where each of the plurality of second horizontal margins {FME_Margin_H} (e.g., horizontal margins "+64" and "-64") reaches at least twice the horizontal size FME_Region_H (e.g., 32) of the FME region FME_Region(l) (e.g., the IME region IME_Region(0)), and each of the plurality of second vertical margins {FME_Margin_V} reaches at least twice the vertical size FME_Region_V (e.g., 32) of the FME region FME_Region(l) (e.g., the IME region IME_Region(0)).

[0031] Based on this available region control scheme, the predetermined available region Available_Region at time point t(l) for the FME operation can include the search range 620 and the plurality of other horizontal margins (e.g., horizontal margins "+32" and "-32" along the +X direction and the -X direction, respectively, as shown in the Figure 6 shadows to the right and left of the search range 620, respectively, excluding the DMA region) and the at least one other vertical margin (e.g., a vertical margin "+32" along the +Y direction, as shown in the shadow below the search range 620, respectively). Thus, the video processing circuit 110 can efficiently use the expanded available region (e.g., the available region Available_Region expanded from the search range 620) for the FME operation to improve the efficiency of motion estimation, and thereby improve the overall efficiency. Figure 6

[0032] Figure 7 According to embodiments of the present disclosure, a processing region control scheme of the method is shown. Assuming b = 2, c = 4, h = 8, and w = 16, when U = 16, B = 32, C = 64, H = 128, and W = 256, but the present disclosure is not limited thereto. For example, assuming the video processing circuit 110 can be configured b = 1 to use a 16 x 16 coding size, i.e., a coding size of (16 * 16) pixels, the IME region at time point t(l) can be reduced to a processing region 710. In this case, a search range 720 can serve as an example of the IME search range IME_Search_Range(l) at time point t(l), and the IME search range IME_Search_Range(l) such as the search range 720 can include the processing region 710 and horizontal margins {IME_Margin_H} (e.g., horizontal margins "+64" and "-64") and vertical margins {IME_Margin_V} (e.g., vertical margins "+32" and "-32") of the search range 720 relative to the processing region 710, wherein each of the horizontal margins {IME_Margin_H} (e.g., the horizontal margins "+64" and "-64") is at least four times the horizontal size IME_Region_H (e.g., 16) of the processing region 710, and each of the vertical margins {IME_Margin_V} (e.g., the vertical margins "+32" and "-32") is at least twice the vertical size IME_Region_V (e.g., 16) of the processing region 710.

[0033] ​Based on the processing region control scheme, the predetermined available region Available_Region at time point t(l) for the IME operation can include the search range 720 and the plurality of other horizontal margins (e.g., horizontal margins "+16" and "-64" along the +X direction and the -X direction, respectively, as shown in the Figure 7 shaded area to the right and left of the search range 720, respectively, excluding the DMA region) and the at least one other vertical margin (e.g., a vertical margin "+48" along the +Y direction, as shown in the shaded area below the search range 720). Thus, the video processing circuit 110 can efficiently use the augmented search range (e.g., the available region Available_Region augmented from the search range 720) to perform the IME operation to improve the efficiency of motion estimation, and thereby improve the overall efficiency. For the sake of brevity, similar content is not repeated here in this embodiment. Figure 7

[0034] Figure 8 A flowchart of the method is shown according to an embodiment of the present application. The video processing circuit 110 can perform motion estimation of the current picture with respect to the reference picture, such as the reference picture, to generate all motion vectors {MV} (e.g., motion vectors MV1 and MV2) of the current picture to complete the encoding of the current picture.

[0035] In step Sll, the video processing circuit 110 can load local data corresponding to the non-encoded video data of the picture into the search memory 200 of the video processing circuit 110 for performing at least one motion estimation (ME) operation of the video encoding, such as the IME operation and the FME operation.

[0036] In step S12, the video processing circuit 110 can configure at least one ME search range ME_Search_Range (e.g., the IME search range IME_Search_Range and the FME search range FME_Search_Range) corresponding to at least one ME region ME_Region (e.g., the IME region IME_Region and the FME region FME_Region) in the memory space of the search memory 200 for performing the at least one ME operation, wherein the at least one ME search range ME_Search_Range can include the at least one ME region ME_Region, and the video processing circuit 110 can use an augmented search range greater than the at least one ME search range ME_Search_Range in the memory space to perform the at least one ME operation to improve the efficiency of ME.​

[0037] Any of the at least one ME search range ME_Search_Range (e.g., the IME search range IME_Search_Range or the FME search range FME_Search_Range) in the above can include a corresponding ME region ME_Region (e.g., the IME region IME_Region or the FME region FME_Region) in the above and a plurality of horizontal margins and a plurality of vertical margins of the any of the ME search range ME_Search_Range relative to the corresponding ME region ME_Region, wherein each of the horizontal margins reaches at least twice of a horizontal size of the corresponding ME region ME_Region, and each of the vertical margins reaches at least one of a vertical size of the corresponding ME region ME_Region. In addition, the predetermined available region Available_Region of the memory space of the search memory 200 can include the any of the ME search range ME_Search_Range and a plurality of other horizontal margins and at least one other vertical margin of the predetermined available region Available_Region relative to the any of the ME search range ME_Search_Range, wherein each of the plurality of other horizontal margins reaches at least one of the horizontal size of the corresponding ME region ME_Region, and each of the at least one other vertical margin reaches at least one of the vertical size of the corresponding ME region ME_Region.

[0038] For example, the video processing circuit 110 can configure the IME search range IME_Search_Range corresponding to the IME region IME_Region in the memory space of the search memory 200 for performing the IME operation. For another example, the video processing circuit 110 can configure the FME search range FME_Search_Range corresponding to the FME region FME_Region in the memory space of the search memory 200 for performing the FME operation.

[0039] In step S13, the video processing circuit 110 can determine whether to continue the motion estimation according to the current local data in the search memory 200. If yes, go to step S12; if no, go to step S14.

[0040] In step S14, the video processing circuit 110 determines whether the encoding of the current frame is complete. If yes, the process ends; if not, the process proceeds to step S11. For the sake of brevity, similar details in this embodiment are not repeated here.

[0041] For a better understanding, the method can be used Figure 8 According to some embodiments, one or more steps may be performed in Figure 8 Add, delete or modify the workflow shown.

[0042] The above description is only a preferred embodiment of the present invention. Any equivalent changes and modifications made according to the scope of the patent application of the present invention should fall within the scope of the present invention.

[0043]

Explanation of symbols

[0044] 100: Electronic devices

[0045] 101: System on a Chip (SoC)

[0046] 102: Processor

[0047] 103: Bus

[0048] 110: Video processing circuit

[0049] 120: Memory

[0050] 130: User interface (UI) device

[0051] 140: Display device

[0052] 200: Search memory

[0053] 620, 720: Search range

[0054] 710: Processing area

[0055] CTB(n-1), CTB(n): Coding Tree Block (CTB)

[0056] U, B, C, H, W, b, c, h, w: memory configuration parameters

[0057] X: X-axis

[0058] Y: Y axis

Claims

1. A method for memory access control with limited search range size during video encoding, the method applicable to a video processing circuit within an electronic device, the method comprising: loading local data corresponding to non-encoded video data of a picture into a search memory of the video processing circuit for at least one motion estimation operation of the video encoding; and configuring at least one motion estimation search range corresponding to at least one motion estimation region in a memory space of the search memory for the at least one motion estimation operation, wherein the at least one motion estimation search range includes the at least one motion estimation region, wherein the video processing circuit is to use an augmented search range larger than the at least one motion estimation search range in the memory space for the at least one motion estimation operation to improve motion estimation performance.

2. The method of claim 1, wherein the at least one motion estimation operation comprises an integer motion estimation operation; and configuring the at least one motion estimation search range corresponding to the at least one motion estimation region in the memory space of the search memory for the at least one motion estimation operation further comprises: configuring an integer motion estimation search range corresponding to an integer motion estimation region in the memory space of the search memory for the integer motion estimation operation, wherein the integer motion estimation search range includes the integer motion estimation region, the at least one motion estimation region includes the integer motion estimation region, and the at least one motion estimation search range includes the integer motion estimation search range.

3. The method of claim 2, wherein the integer motion estimation search range further includes a plurality of first horizontal margins and a plurality of first vertical margins of the integer motion estimation search range relative to the integer motion estimation region, each horizontal margin of the plurality of first horizontal margins reaches at least twice a horizontal size of the integer motion estimation region, and each vertical margin of the plurality of first vertical margins reaches at least once a vertical size of the integer motion estimation region.

4. The method of claim 1, wherein the at least one motion estimation operation comprises a fractional motion estimation operation; and configuring the at least one motion estimation search range corresponding to the at least one motion estimation region in the memory space of the search memory for the at least one motion estimation operation further comprises: configuring a fractional motion estimation search range corresponding to a fractional motion estimation region in the memory space of the search memory for the fractional motion estimation operation, wherein the fractional motion estimation search range includes the fractional motion estimation region, the at least one motion estimation region includes the fractional motion estimation region, and the at least one motion estimation search range includes the fractional motion estimation search range.

5. The method of claim 4, wherein the fractional motion estimation search range further comprises a plurality of second horizontal margins and a plurality of second vertical margins of the fractional motion estimation search range relative to the fractional motion estimation region, each horizontal margin of the plurality of second horizontal margins reaching at least twice a horizontal size of the fractional motion estimation region, and each vertical margin of the plurality of second vertical margins reaching at least twice a vertical size of the fractional motion estimation region.

6. The method of claim 1, wherein the at least one motion estimation operation comprises an integer motion estimation operation and a fractional motion estimation operation, the at least one motion estimation region comprises an integer motion estimation region and a fractional motion estimation region, and the at least one motion estimation search range comprises an integer motion estimation search range and a fractional motion estimation search range, wherein the integer motion estimation search range comprises the integer motion estimation region and a plurality of first horizontal margins and a plurality of first vertical margins of the integer motion estimation search range relative to the integer motion estimation region, and the fractional motion estimation search range comprises the fractional motion estimation region and a plurality of second horizontal margins and a plurality of second vertical margins of the fractional motion estimation search range relative to the fractional motion estimation region; and a size of each horizontal margin of the plurality of second horizontal margins at a second time point is equal to a size of each horizontal margin of the plurality of first horizontal margins at a first time point, and a size of each vertical margin of the plurality of second vertical margins at the second time point is equal to a size of each vertical margin of the plurality of first vertical margins at the first time point.

7. The method of claim 6, wherein the picture is a reference picture; and the integer motion estimation operation comprises performing a first motion estimation of a current picture relative to the reference picture for the integer motion estimation region to generate at least an integer portion of a first motion vector of the current picture in the integer motion estimation region, and the fractional motion estimation operation comprises performing a second motion estimation of the current picture relative to the reference picture for the fractional motion estimation region to generate at least a fractional portion of a second motion vector of the current picture in the fractional motion estimation region.

8. The method of claim 1, wherein any motion estimation search range of the at least one motion estimation search range comprises a corresponding motion estimation region of the at least one motion estimation region and a plurality of horizontal margins and a plurality of vertical margins of the any motion estimation search range relative to the corresponding motion estimation region, each horizontal margin of the plurality of horizontal margins reaching at least twice a horizontal size of the corresponding motion estimation region, and each vertical margin of the plurality of vertical margins reaching at least one time a vertical size of the corresponding motion estimation region.

9. The method of claim 8, wherein the predetermined available area of the memory space of the search memory comprises the any motion estimation search range and a plurality of other horizontal margins and at least one other vertical margin of the predetermined available area relative to the any motion estimation search range, each horizontal margin of the plurality of other horizontal margins reaching at least one time of the horizontal size of the corresponding motion estimation area, and each vertical margin of the at least one other vertical margin reaching at least one time of the vertical size of the corresponding motion estimation area.

10. A system on chip (SoC) disposed in an electronic device, the SoC comprising: at least one processor to control operation of the electronic device; video processing circuitry coupled to the at least one processor to perform video processing for the electronic device; and at least one memory coupled to the at least one processor and the video processing circuitry to store information; wherein: the video processing circuitry is to load local data corresponding to non-coded video data of a picture into a search memory of the video processing circuitry for at least one motion estimation operation of the video encoding, wherein the at least one memory comprises the search memory; and the video processing circuitry is to configure at least one motion estimation search range corresponding to at least one motion estimation area in a memory space of the search memory for the at least one motion estimation operation, wherein the at least one motion estimation search range comprises the at least one motion estimation area, wherein the video processing circuitry is to use an augmented search range in the memory space that is larger than the at least one motion estimation search range for the at least one motion estimation operation to improve motion estimation performance. ​

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