Display device

Abstract

There is provided a display device including: a base substrate including a first region, a second region spaced apart from the first region in a first direction, and a third region between the first region and the second region; a pixel in the first region; an insulating layer having a plurality of contact holes defined therethrough; and a signal line in the first region, the second region, and the third region, the signal line including: a first line portion in the first region; a connection portion on the insulating layer and connected to the first line portion via a plurality of contact holes; and a second line portion extending from the first region to the third region and in a different layer from the first line portion, in which the insulating layer is on the first line portion, and the plurality of contact holes are covered by the second line portion and overlap the second line portion in a plan view.

Description

[0001] This application claims priority to and the benefit of Korean Patent Application No. 10-2024-0050780 filed on April 16, 2024, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] An aspect of some embodiments of the present disclosure relates to a display device. Background Art

[0003] The display device includes a display area that is activated in response to an electrical signal applied thereto, senses an input applied thereto from the outside through the display area, and displays various images to provide information to a user.

[0004] The display device includes a display panel and a circuit substrate. The display panel includes pixels, signal lines connected to the pixels, and signal pads connected to the signal lines.

[0005] The above information disclosed in this Background section is only for enhancement of understanding of the background technology and therefore the information discussed in this Background section does not necessarily constitute prior art. Summary of the Invention

[0006] Some embodiments of the present disclosure relate to a display device. For example, some embodiments of the present disclosure relate to a display device including a signal line.

[0007] Aspects of some embodiments of the present disclosure include a display device including a signal line having relatively improved reliability.

[0008] Aspects of some embodiments of the present disclosure include a display device comprising: a base substrate comprising a first region, a second region spaced apart from the first region in a first direction, and a third region between the first region and the second region; a pixel in the first region; an insulating layer provided with a plurality of contact holes defined through the insulating layer; and a signal line in the first region, the second region, and the third region. According to some embodiments, the signal line comprises: a first line portion in the first region; a connecting portion on the insulating layer and connected to the first line portion via the plurality of contact holes; and a second line portion extending from the first region to the third region and on a different layer from the first line portion. According to some embodiments, the insulating layer is on the first line portion, and the contact holes are covered by the second line portion and overlap with the second line portion in a plan view.

[0009] According to some embodiments, the contact hole overlaps the first line portion, the connection portion, and the second line portion in a plan view.

[0010] According to some embodiments, the display device further includes an organic layer between the connection portion and the second line portion. According to some embodiments, the organic layer is provided with a first organic layer opening through which the connection portion is exposed, and the second line portion is directly on an upper surface of the connection portion exposed through the first organic layer opening.

[0011] According to some embodiments, the first organic layer opening overlaps all of the contact holes in a plan view, and in the plan view, the first organic layer opening is inside the connection portion and extends to a region in which the first line portion is not positioned.

[0012] According to some embodiments, the first organic layer opening does not overlap all of the contact holes in a plan view, and the first organic layer opening surrounds a region in which the contact holes are positioned in the plan view.

[0013] According to some embodiments, the first organic layer opening overlaps some of the contact holes in a plan view.

[0014] According to some embodiments, the first organic layer opening does not overlap all of the contact holes in a plan view, the organic layer includes a first portion overlapping the contact holes and a second portion overlapping the connection portion and not overlapping the first line portion, and the first portion and the second portion of the organic layer are integrally provided with each other.

[0015] According to some embodiments, in a plan view, the first organic layer opening is inside the connection portion and the first line portion.

[0016] According to some embodiments, the organic layer is further provided with a second organic layer opening defined through the organic layer to be spaced apart from the first organic layer opening and not to overlap the first line portion.

[0017] According to some embodiments, in a plan view, the second organic layer opening is inside the connection portion and the second line portion.

[0018] According to some embodiments, the first line portion includes molybdenum (Mo).

[0019] According to some embodiments, the connection portion includes aluminum (Al).

[0020] According to some embodiments, the first region includes a display region in which a pixel is positioned and a first non-display region adjacent to the display region, and the first line portion is in the first non-display region.

[0021] According to some embodiments, the second region includes a pad, and the second line portion is connected to the pad.

[0022] According to some embodiments, the third region is curved with respect to an imaginary axis extending in a second direction crossing the first direction.

[0023] According to some embodiments, the second line portion includes a contact portion superposed with the first line portion and a plurality of line portions extending from the contact portion and superposed with the third region, and the plurality of line portions extend in a first direction and are arranged in a second direction intersecting the first direction.

[0024] According to some embodiments, the display device further includes a scan driving circuit in the first region and applying a scan signal to the pixel, and the signal line is connected to the scan driving circuit.

[0025] According to some embodiments, the signal line is connected to the pixel.

[0026] According to some embodiments, the insulating layer includes a plurality of inorganic layers.

[0027] Aspects of some embodiments of the present disclosure include a display device including: a base substrate including a first region, a second region spaced apart from the first region in a first direction, and a third region between the first region and the second region; a pixel in the first region; an insulating layer provided with a plurality of contact holes defined through the insulating layer; and a signal line in the first region, the second region, and the third region. According to some embodiments, the signal line includes: a first line portion in the first region; a connection portion on the insulating layer and connected to the first line portion via the plurality of contact holes; and a second line portion extending from the first region to the third region and different from the first line portion in layers. According to some embodiments, the insulating layer is on the first line portion, and at least a portion of the connection portion is superposed with both the first line portion and the second line portion in a plan view.

[0028] According to the above, the signal line of the display device has a structure that can be able to prevent or reduce corrosion caused by moisture penetration, and thus, the reliability of the display device can be relatively improved. BRIEF DESCRIPTION OF DRAWINGS

[0029] The above and other aspects of some embodiments of the present disclosure will become more apparent by describing in detail some embodiments thereof with reference to the accompanying drawings, in which: FIG. 1A and FIG. 1B is a perspective view of a display device according to some embodiments of the present disclosure; FIG. 2 is a cross-sectional view of a display device according to some embodiments of the present disclosure; FIG. 3 is a plan view of a display panel according to some embodiments of the present disclosure; FIG. 4 and FIG. 5 is a cross-sectional view of a display device according to some embodiments of the present disclosure; FIG. 6A is a plan view of a signal line according to some embodiments of the present disclosure; FIG. 6B and FIG. 6C is a cross-sectional view of a signal line according to some embodiments of the present disclosure; FIG. 7A is a plan view of a signal line according to some embodiments of the present disclosure; FIG. 7B and FIG. 7C is a cross-sectional view of a signal line according to some embodiments of the present disclosure; FIG. 8A is a plan view of a signal line according to some embodiments of the present disclosure; FIG. 8B is a cross-sectional view of a signal line according to some embodiments of the present disclosure; FIG. 9A is a plan view of a signal line according to some embodiments of the present disclosure; FIG. 9B is a cross-sectional view of a signal line according to some embodiments of the present disclosure; FIG. 10A is a plan view of a signal line according to some embodiments of the present disclosure; and FIG. 10B is a cross-sectional view of a signal line according to some embodiments of the present disclosure. DETAILED DESCRIPTION

[0030] In the present disclosure, it will be understood that when an element (or components, layer or part) is referred to as being “on”, “connected to” or “engaged to” another element or layer, it can be directly on, connected or engaged to the other element or layer, or intervening elements or layers can be present.

[0031] The same reference numerals are used throughout the drawings to represent the same elements. In the drawings, the thickness, ratio, and size of components are exaggerated for effective description. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items.

[0032] It will be understood that, although the terms first, second, etc. can be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. Thus, a first element discussed below could be termed a second element without departing from the teachings of the present disclosure. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0033] For the sake of description, spatially relative terms - such as "beneath", "below", "lower", "above", "upper" and the like - can be used herein for describing the orientation of one element or feature relative to another element or feature as illustrated in the drawings. The term "horizontal" as used herein is intended to mean any direction that is parallel to the ground plane. The term "vertical" as used herein is intended to mean any direction that is perpendicular to the ground plane.

[0034] It will also be understood that the terms "comprises" and / or "comprising", when used in this specification, set out the presence of stated features, integers, steps, operations, elements, and / or components but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0035] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0036] Aspects of some embodiments of the present disclosure will be described below in greater detail with reference to the accompanying drawings.

[0037] FIG. 1A and FIG. 1B is a perspective view of a display device DD according to some embodiments of the present disclosure. FIG. 1A A non-bent state of a bent area BA of the display device DD is illustrated. FIG. 1B A bent state of the bent area BA of the display device DD is illustrated.

[0038] Referring to FIG. 1A and FIG. 1B , a mobile phone terminal is illustrated as a representative example of the display device DD. The display device DD according to some embodiments of the present disclosure can be applied to large electronic devices such as a television, a monitor, etc. as well as small and medium electronic devices such as a tablet computer, a car navigation unit, a game unit, a smart watch, etc.

[0039] The display device DD can have a rectangular shape having a long side extending in a first direction DR1 and a short side extending in a second direction DR2 crossing the first direction DR1. However, the shape of the display device DD should not be limited to the rectangular shape, and the display device DD can have various shapes such as a circular shape, a polygonal shape other than the rectangular shape, etc. According to some embodiments, the display device DD can have rounded (filleted) corners.

[0040] Hereinafter, a direction perpendicular (or substantially perpendicular) to a plane defined by the first direction DR1 and the second direction DR2 can be referred to as a third direction DR3. In the present disclosure, the phrase "when viewed in a plane" or "in a plan view" refers to a state of being viewed in the third direction DR3 or in a direction toward a display surface IS of the display device DD.

[0041] The display device DD can be rigid or flexible. The term "flexible" used herein refers to a property of being able to bend, and the display device DD can include all structures from a completely bent structure to a structure bent in a scale of several nanometers. For example, the flexible display device DD can be a curved display device, a rollable display device, or a foldable display device.

[0042] The display device DD can display an image at a display surface IS. The display surface IS can be parallel (or substantially parallel) to a plane defined by the first direction DR1 and the second direction DR2. The display surface IS can include a display area DA in which an image is displayed and a non-display area NDA adjacent to the display area DA (e.g., at a periphery of the display area DA or outside a coverage area of the display area DA). An image can not be displayed through the non-display area NDA. According to some embodiments, the non-display area NDA can be positioned to be adjacent to only one side of the display area DA or can be omitted.

[0043] The display device DD can include a window, a display module, and a housing member.

[0044] The window can be located on the display module and can transmit light provided from the display module to the outside thereof. The window can include a base layer and a functional layer located on the base layer. The functional layer can include a protective layer, an anti-fingerprint layer, etc. The base layer of the window can include glass, sapphire, or plastic. The base layer of the window can include an optically transparent insulating material. As an example, the base layer of the window can include a glass or plastic film or can include a glass substrate and a plastic film attached to the glass substrate by an adhesive.

[0045] The window can include a transmissive area and a non-transmissive area. The transmissive area can overlap the display area DA and can have a shape corresponding to the display area DA. The non-transmissive area can overlap the non-display area NDA and can have a shape corresponding to the non-display area NDA. The non-transmissive area can have a relatively low light transmittance compared to the transmissive area. The non-transmissive area can be defined in a portion of the base layer of the window by a bezel pattern, and an area not positioned with the bezel pattern can be defined as the transmissive area. However, embodiments according to the present disclosure are not limited to or restricted by this, and according to some embodiments, the non-transmissive area can be omitted.

[0046] The housing member can accommodate the display module and can be combined with the window.

[0047] The display device DD can further include a circuit board, a main board, and modules (such as an electronic module, a camera module, and a power module) mounted on the main board.

[0048] The display device DD can include a first non-bending area NBA1 (hereinafter, referred to as a first area), a second non-bending area NBA2 (hereinafter, referred to as a second area) spaced apart from the first non-bending area NBA1 in a first direction DR1, and a bending area BA (hereinafter, referred to as a third area) defined between the first non-bending area NBA1 and the second non-bending area NBA2.

[0049] The first area NBA1 can include a display area DA and a portion of a non-display area NDA (hereinafter, referred to as a first non-display area NDA1). The second area NBA2 can include another portion of the non-display area NDA (hereinafter, referred to as a second non-display area NDA2) spaced apart from the first non-display area NDA1 in the first direction DR1. The third area BA can include an area (hereinafter, referred to as a third non-display area NDA3) between the first non-display area NDA1 and the second non-display area NDA2.

[0050] The third area BA can be bent along a bending axis BX extending in a second direction DR2. The third area BA and the second area NBA2 can have a width smaller than a width of the first area NBA1 in the second direction DR2. The driving chip DC can be mounted in the second area NBA2, however, embodiments according to the present disclosure are not limited to or by this. According to some embodiments, the driving chip DC can be mounted on a circuit board, and the circuit board can be electrically connected to the second area NBA2.

[0051] When the third area BA is bent, the second area NBA2 can be disposed to face the first area NBA1, and thus, a size of the non-display area NDA in the display surface IS can be relatively reduced. Referring to FIG. 1B the display device DD of FIG. 1A , the size of the non-display area NDA can be reduced by at least the second area NBA2 when compared to the display device DD shown in . As described above, when the third area BA is bent, a bezel area of the display device DD can be reduced.

[0052] The first area NBA1, the second area NBA2, and the third area BA can be identically applied to a display panel DP (refer to FIG. 2 ) and an input sensor ISL (refer to FIG. 2 ) of the display device DD. The display area DA and the non-display area NDA can also be identically applied to the display panel DP (refer to FIG. 2). The input sensor ISL (refer to FIG. 2 The input sensor ISL can include a sensing area corresponding to the display area DA and a non-sensing area corresponding to the non-display area NDA.

[0053] FIG. 2 is a cross-sectional view of a display device DD according to some embodiments of the present disclosure.

[0054] The display module can include the display panel DP and the input sensor ISL. FIG. 2 The display panel DP and the input sensor ISL among the components of the display device DD are illustrated. FIG. 2 A cross section defined by the second direction DR2 and the third direction DR3 in the first area NBA1 is illustrated.

[0055] The display panel DP can be one of a liquid crystal display panel, an electrophoretic display panel, a micro electro mechanical system (MEMS) display panel, an electro wetting display panel, an organic light emitting display panel, an inorganic light emitting display panel, and a quantum dot light emitting display panel, however, the present disclosure should not be limited thereto or thereby. Hereinafter, the organic light emitting display panel will be described as the display panel DP.

[0056] The display panel DP can include a base layer 110, a circuit element layer 120 located on the base layer 110, a display element layer 130 located on the circuit element layer 120, and a thin film encapsulation layer 140 located on the display element layer 130. The input sensor ISL can be directly located on the thin film encapsulation layer 140. In the present disclosure, the expression “component A is directly located on component B” means that there is no intervening adhesive layer between component A and component B.

[0057] The base layer 110 can include at least a plastic film. The base layer 110 can be a flexible substrate, and can include a plastic substrate, a glass substrate, a metal substrate, or an organic / inorganic composite material substrate. The base layer 110 can include two organic layers and an inorganic layer located between the two organic layers. Refer to FIG. 1A and FIG. 1B The display area DA, the non-display area NDA, the first area NBA1, the second area NBA2, and the third area BA described can be equally applied to the base layer 110.

[0058] The circuit element layer 120 can include at least one insulating layer and a circuit element. The insulating layer can include at least one inorganic layer and at least one organic layer. The circuit element can include a signal line and a pixel driving circuit. This will be described in more detail later.

[0059] The display element layer 130 can include a display element. The display element layer 130 can further include an organic layer such as a pixel defining layer.

[0060] The thin film encapsulation layer 140 can include a plurality of thin layers. Some thin layers can be provided to relatively improve optical efficiency, and some thin layers can be provided to protect the organic light emitting diode.

[0061] The input sensor ISL can obtain coordinate information of an external input. The input sensor ISL can have a multi-layer structure. The input sensor ISL can include a single conductive layer or a plurality of conductive layers. The input sensor ISL can include a single insulating layer or a plurality of insulating layers.

[0062] The input sensor ISL can include one of a capacitive sensor, an optical sensor, an ultrasonic sensor, and an electromagnetic induction sensor. The input sensor ISL can be formed on the display panel DP through a continuous process, or can be attached to an upper portion of the display panel DP through an adhesive layer after being separately manufactured, however, embodiments according to the disclosure are not limited thereto or by it.

[0063] FIG. 3 is a plan view of a display panel DP according to some embodiments of the disclosure.

[0064] As shown in FIG. 3 , when viewed in a plane (or in a plan view), the display panel DP can include a display area DA and a non-display area NDA. The display panel DP can include a first area NBA1, a second area NBA2, and a third area BA.

[0065] The display panel DP can include a plurality of driving circuits GDC and EDC, a plurality of signal lines SGL, and a plurality of pixels PX. The pixels PX can be arranged in the display area DA. Each of the pixels PX can include a light emitting element and a pixel driving circuit connected to the light emitting element. The driving circuits GDC and EDC, the signal lines SGL, and the pixel driving circuit can be included in a circuit element layer 120 shown in FIG. 2 .

[0066] The driving circuits GDC and EDC can include a scan driving circuit GDC and a light emitting driving circuit EDC arranged in the non-display area NDA. The scan driving circuit GDC can generate a plurality of scan signals, and can sequentially output the scan signals to a plurality of scan lines GL described later. The light emitting driving circuit EDC can generate a plurality of pulse signals, and can sequentially output the pulse signals to a plurality of light emitting signal lines EL described later. The light emitting driving circuit EDC can be a second scan driving circuit that generates another type of scan signal that is activated in a period different from a period in which the scan signal generated by the scan driving circuit GDC is activated.

[0067] Each of the scan driving circuit GDC and the light emitting driving circuit EDC can include a plurality of thin film transistors formed with the same process (e.g., a low temperature polysilicon (LTPS) process or a low temperature polysilicon oxide (LTPO) process) as the pixel driving circuit of the pixel PX.

[0068] The signal lines SGL can include the scan lines GL, the light emitting signal lines EL, the data lines DL, and the signal transmission lines CSL1 and CSL2. Each of the data lines DL can be connected to a corresponding pixel among the pixels PX. Each of the data lines DL can provide a data signal from the driving chip DC (refer to FIG. 1) to a corresponding pixel among the pixels PX. The data lines DL can be overlaid with the first area NBA1, the second area NBA2, and the third area BA. FIG. 1A

[0069] The signal transmission lines CSL1 and CSL2 can include a first signal transmission line CSL1 that provides a signal to the scan driving circuit GDC and a second signal transmission line CSL2 that provides a signal to the light emitting driving circuit EDC. The first signal transmission line CSL1 and the second signal transmission line CSL2 can be overlaid with the first area NBA1, the second area NBA2, and the third area BA.

[0070] Each of the first signal transmission line CSL1 and the second signal transmission line CSL2 is illustrated as one signal line, however, each of the first signal transmission line CSL1 and the second signal transmission line CSL2 can be provided as a plurality of lines. The first signal transmission line CSL1 and the second signal transmission line CSL2 can include a first signal line that receives a first bias voltage and a second signal line that receives a second bias voltage lower than the first bias voltage.

[0071] The first signal transmission line CSL1 and the second signal transmission line CSL2 can further include a third signal line that transmits a clock signal. The first signal transmission line CSL1 and the second signal transmission line CSL2 can include a plurality of third signal lines that transmit different clock signals.

[0072] Each of the scan driving circuit GDC and the light emitting driving circuit EDC can receive a clock signal, a first bias voltage, and a second bias voltage, and can generate a pulse signal. The scan driving circuit GDC and the light emitting driving circuit EDC can receive clock signals different from each other. The first bias voltage applied to the scan driving circuit GDC can have a level different from a level of the first bias voltage applied to the light emitting driving circuit EDC, and the second bias voltage applied to the scan driving circuit GDC can have a level different from a level of the second bias voltage applied to the light emitting driving circuit EDC.

[0073] ​The display panel DP can include a plurality of signal pads (or "bonding pads") DP-PD arranged in the second area NBA2. The signal pads DP-PD can include a first pad PD1, a second pad PD2, and a third pad PD3.

[0074] An area in which the first pad PD1 and the second pad PD2 are arranged can be referred to as a first pad area PA1, and an area in which the third pad PD3 is arranged can be referred to as a second pad area PA2. The first pad area PA1 can be bonded to the driving chip DC (refer to FIG. 1A ), and the second pad area PA2 can be bonded to the circuit board. The first pad area PA1 can include a first area B1 in which the first pad PD1 is arranged and a second area B2 in which the second pad PD2 is arranged.

[0075] The first pad area PA1 and the second pad area PA2 can be spaced apart from each other in the first direction DR1. The first pad PD1 can be connected to a corresponding signal line among the signal lines DL, CSL1, and CSL2. According to some embodiments, the first pad PD1 can be electrically connected to the second pad PD2. The second pad PD2 can be connected to the third pad PD3 via a connection signal line S-CL. FIG. 3 One pad row in the first area B1 is shown as a representative example, however, more pad rows can be arranged in the first area B1. The third pad PD3 can be bonded to a pad of the circuit board.

[0076] FIG. 4 and FIG. 5 is a cross-sectional view of a display device DD according to some embodiments of the present disclosure. FIG. 4 shows a cross-section of a pixel PX corresponding to FIG. 3 , FIG. 5 shows a cross-section taken along a line I-I' of FIG. 1A , and FIG. 5 is centered on an insulating layer. In FIG. 4 and FIG. 5 , the insulating layer is shown as having a different thickness than its actual thickness in order to clearly show the insulating layer.

[0077] FIG. 4 shows a portion of a light emitting element LD and a portion of a pixel circuit PC1. Silicon transistors S-TFT and oxide transistors O-TFT are shown as representative examples of the pixel circuit PC1. In the embodiments presented, a pixel circuit PC1 including both silicon transistors S-TFT and oxide transistors O-TFT will be described as a representative example, however, the pixel circuit PC1 can include only a plurality of silicon transistors S-TFT or can include only a plurality of oxide transistors O-TFT.

[0078] Referring to FIG. 4The barrier layer 10br can be located on the base layer 110. The barrier layer 10br can prevent or reduce a case in which foreign substances or contaminants enter therefrom the outside. The barrier layer 10br can include at least one inorganic layer. The barrier layer 10br can include a silicon oxide layer and a silicon nitride layer. Each of the silicon oxide layer and the silicon nitride layer can be provided as a plurality, and the silicon oxide layer and the silicon nitride layer can be alternately stacked with each other.

[0079] The first shield electrode BMLa can be located on the barrier layer 10br. The first shield electrode BMLa can include a metallic material. The first shield electrode BMLa can include molybdenum (Mo) having good heat resistance, an alloy including molybdenum (Mo), titanium (Ti), or an alloy including titanium (Ti). The first shield electrode BMLa can receive a bias voltage. The first shield electrode BMLa can receive a power voltage. The first shield electrode BMLa can prevent or reduce a case in which an electric potential caused by a polarization phenomenon affects the silicon transistor S-TFT. The first shield electrode BMLa can prevent or reduce a case in which external light reaches the silicon transistor S-TFT. According to some embodiments, the first shield electrode BMLa can be a floating electrode isolated from other electrodes or lines.

[0080] The buffer layer 10bf can be located on the barrier layer 10br. The buffer layer 10bf can prevent or reduce a case in which metal atoms or impurities diffuse from the base layer 110 to the first semiconductor pattern SC1 located thereon. The buffer layer 10bf can include at least one inorganic layer. The buffer layer 10bf can include a silicon oxide layer and a silicon nitride layer.

[0081] The first semiconductor pattern SC1 can be located on the buffer layer 10bf. The first semiconductor pattern SC1 can include a silicon semiconductor. As an example, the silicon semiconductor can include amorphous silicon or polysilicon. For example, the first semiconductor pattern SC1 can include low-temperature polysilicon.

[0082] FIG. 4 Only a portion of the first semiconductor pattern SC1 is shown, and the first semiconductor pattern SC1 can also be located in another area. The first semiconductor pattern SC1 can be arranged throughout the pixel in a certain rule. The first semiconductor pattern SC1 can have different electrical properties according to whether it is doped. The first semiconductor pattern SC1 can include a first region having a relatively high conductivity and a second region having a relatively low conductivity. The first region can be doped with an N-type dopant or a P-type dopant. A P-type transistor can include a doped region doped with a P-type dopant, and an N-type transistor can include a doped region doped with an N-type dopant. The second region can be a non-doped region or a region doped at a lower concentration than that of the first region.

[0083] The first region can have a higher conductivity than that of the second region, and can function as (or substantially function as) an electrode or a signal line. The second region can correspond to (or substantially correspond to) a channel region (or an active region) of the transistor. In other words, a portion of the first semiconductor pattern SC1 can be a channel of the transistor, another portion of the first semiconductor pattern SC1 can be a source or a drain of the transistor, and still another portion of the first semiconductor pattern SC1 can be a connection electrode or a connection signal line.

[0084] The source region SE1, the channel region AC1 (or the active region), and the drain region DE1 of the silicon transistor S-TFT can be formed of the first semiconductor pattern SC1. In a cross section, the source region SE1 and the drain region DE1 can extend from the channel region AC1 in directions opposite to each other.

[0085] The first insulating layer 10 can be located on the buffer layer 10bf. The first insulating layer 10 can cover the first semiconductor pattern SC1. The first insulating layer 10 can be an inorganic layer. The first insulating layer 10 can have a single-layer structure of a silicon oxide layer. In addition to the single-layer structure, the first insulating layer 10 can have a multi-layer structure. The inorganic layer of the circuit element layer 120, which is described in more detail later, can have a single-layer structure or a multi-layer structure, and can include at least one of the above-described materials, however, embodiments according to some embodiments of the present disclosure are not limited to or restricted by this.

[0086] The gate GT1 of the silicon transistor S-TFT can be located on the first insulating layer 10. The gate GT1 can be a portion of a metal pattern. The gate GT1 can be superposed with the channel region AC1. The gate GT1 can function as a mask in a process of doping the first semiconductor pattern SC1.

[0087] The first electrode CE10 of the storage capacitor Cst can be located on the first insulating layer 10. According to some embodiments, the first electrode CE10 can be integrally formed with the gate GT1.

[0088] The second insulating layer 20 can be located on the first insulating layer 10 and can cover the gate GT1. According to some embodiments, an upper electrode can be located on the second insulating layer 20 and can be superposed with the gate GT1. The second electrode CE20 can be located on the second insulating layer 20 and can be superposed with the first electrode CE10.

[0089] The second shielding electrode BMLb can be located on the second insulating layer 20. The second shielding electrode BMLb can be located under the oxide transistor O-TFT. According to some embodiments, the second shielding electrode BMLb can be omitted. According to some embodiments, the first shielding electrode BMLa can extend to the lower side of the oxide transistor O-TFT instead of the second shielding electrode BMLb.

[0090] A third insulating layer 30 can be located on the second insulating layer 20. A second semiconductor pattern SC2 can be located on the third insulating layer 30. The second semiconductor pattern SC2 can include a channel region AC2 of an oxide transistor O-TFT. The second semiconductor pattern SC2 can include an oxide semiconductor. The second semiconductor pattern SC2 can include a transparent conductive oxide (TCO), such as indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), zinc oxide (ZnO x ) or indium oxide (In2O3).

[0091] The oxide semiconductor can include a plurality of regions distinguished from each other depending on whether a transparent conductive oxide is reduced. A region in which the transparent conductive oxide is reduced (hereinafter, referred to as a reduced region) has a higher conductivity than a region in which the transparent conductive oxide is not reduced (hereinafter, referred to as a non-reduced region). The reduced region can function as a source / drain of a transistor or a signal line. The non-reduced region can correspond to (or substantially correspond to) a semiconductor region (or a channel) of the transistor. In other words, a portion of the second semiconductor pattern SC2 can be a semiconductor region of a transistor, another portion of the second semiconductor pattern SC2 can be a source / drain region of the transistor, and yet another portion of the second semiconductor pattern SC2 can be a signal transmission region.

[0092] A fourth insulating layer 40 can be located on the third insulating layer 30. As shown in FIG. 1B, the fourth insulating layer 40 can cover the second semiconductor pattern SC2. According to some embodiments, the fourth insulating layer 40 can overlap the gate GT2 of the oxide transistor O-TFT, and can be an insulating pattern through which the source SE2 and the drain DE2 of the oxide transistor O-TFT are exposed. FIG. 4

[0093] The gate GT2 of the oxide transistor O-TFT can be located on the fourth insulating layer 40. The gate GT2 of the oxide transistor O-TFT can be a portion of a metal pattern. The gate GT2 of the oxide transistor O-TFT can overlap the channel region AC2.

[0094] A fifth insulating layer 50 can be located on the fourth insulating layer 40, and the fifth insulating layer 50 can cover the gate GT2. Each of the first to fifth insulating layers 10, 20, 30, 40, and 50 can be an inorganic layer.

[0095] A first connection electrode CNE1 can be located on the fifth insulating layer 50. The first connection electrode CNE1 can be connected to the drain DE1 of the silicon transistor S-TFT via a contact hole defined by the first to fifth insulating layers 10, 20, 30, 40, and 50.

[0096] ​The sixth insulating layer 60 may be located on the fifth insulating layer 50. The second connection electrode CNE2 may be located on the sixth insulating layer 60. The second connection electrode CNE2 may be connected to the first connection electrode CNE1 via a contact hole defined by the sixth insulating layer 60. The data line DL may be located on the sixth insulating layer 60. The seventh insulating layer 70 may be located on the sixth insulating layer 60 and may cover the second connection electrode CNE2 and the data line DL. The third connection electrode CNE3 may be located on the seventh insulating layer 70. The third connection electrode CNE3 may be connected to the second connection electrode CNE2 via a contact hole defined by the seventh insulating layer 70. The eighth insulating layer 80 may be located on the seventh insulating layer 70 and may cover the third connection electrode CNE3. Each of the sixth insulating layer 60, the seventh insulating layer 70, and the eighth insulating layer 80 may be an organic layer.

[0097] In the embodiment presented, the circuit element layer 120 is shown as a representative example, including seven conductive layers, including a first shield electrode BMLa, a gate electrode GT1 of a silicon transistor S-TFT, a second shield electrode BMLb, a gate electrode GT2 of an oxide transistor O-TFT, a first connection electrode CNE1, a second connection electrode CNE2, and a third connection electrode CNE3. Each of the first shield electrode BMLa, the gate electrode GT1 of the silicon transistor S-TFT, the second shield electrode BMLb, the gate electrode GT2 of the oxide transistor O-TFT, the first connection electrode CNE1, the second connection electrode CNE2, and the third connection electrode CNE3 can be formed by patterning the first to seventh conductive layers. According to some embodiments, the number of conductive layers may be varied. The circuit element layer 120 may include four to seven conductive layers.

[0098] The light emitting element LD may include an anode AE1 (or a first electrode), a light emitting layer EL1 and a cathode CE (or a second electrode). The cathode CE may be commonly provided in the pixel PX (refer to FIG. 3 ) in the light-emitting element.

[0099] The anode AE1 of the light-emitting element LD may be located on the eighth insulating layer 80. The anode AE1 may be a transmissive electrode, a semi-transmissive electrode, or a reflective electrode. The pixel-defining layer PDL may be located on the eighth insulating layer 80. The pixel-defining layer PDL may have light-absorbing properties. For example, the pixel-defining layer PDL may have a black color. The pixel-defining layer PDL may include a black colorant. The black colorant may include a black dye or a black pigment. The black colorant may include carbon black, a metal material (such as chromium), or an oxide thereof. The pixel-defining layer PDL may correspond to a light-blocking pattern having light-blocking properties.

[0100] The pixel definition layer PDL can cover a portion of the anode AE1. As an example, the pixel definition layer PDL can be provided with an opening PDL-OP defined therethrough to expose a portion of the anode AE1.

[0101] According to some embodiments, a hole control layer can be located between the anode AE1 and the light emitting layer EL1. The hole control layer can include a hole transport layer and / or a hole injection layer. An electron control layer can be located between the light emitting layer EL1 and the cathode CE. The electron control layer can include an electron transport layer and / or an electron injection layer. The hole control layer and the electron control layer can be formed commonly throughout the plurality of pixels PX (see FIG. 2) using an opening mask. FIG. 3

[0102] A thin film encapsulation layer 140 can be located on the display element layer 130. The thin film encapsulation layer 140 can include inorganic layers 141, an organic layer 142, and inorganic layers 143 stacked in order, however, the layers included in the thin film encapsulation layer 140 should not be limited to this or be limited by this.

[0103] The inorganic layers 141 and 143 can protect the display element layer 130 from moisture and oxygen, and the organic layer 142 can protect the display element layer 130 from foreign substances such as dust particles. The inorganic layers 141 and 143 can include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The organic layer 142 can include an acrylic organic layer, however, should not be limited to this or be limited by this.

[0104] An input sensor ISL can be located on the display panel DP. The input sensor ISL can include at least one conductive layer and at least one insulating layer. According to some embodiments, the input sensor ISL can include a first insulating layer 210, a first conductive layer 220, a second insulating layer 230, a second conductive layer 240, and a third insulating layer 250.

[0105] The first insulating layer 210 can be located directly on the display panel DP. The first insulating layer 210 can be an inorganic layer including at least one of silicon nitride, silicon oxynitride, and silicon oxide. Each of the first conductive layer 220 and the second conductive layer 240 can have a single layer structure or a multi-layer structure of a plurality of layers stacked in a third direction DR3. The first conductive layer 220 and the second conductive layer 240 can include wires to define electrodes having a mesh shape. The wires of the first conductive layer 220 can be connected to the wires of the second conductive layer 240 via contact holes defined through the second insulating layer 230 or can not be connected. The connection relationship between the wires of the first conductive layer 220 and the wires of the second conductive layer 240 can be determined according to the type of the sensor applied to the input sensor ISL.

[0106] ​The first and second conductive layers 220 and 240 having a single layer structure can include a metal layer or a transparent conductive layer. The metal layer can include molybdenum, silver, titanium, copper, aluminum, or an alloy thereof. The transparent conductive layer can include a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO x ), indium zinc tin oxide (ITZO), or the like. In addition, the transparent conductive layer can include a conductive polymer such as PEDOT, metal nanowires, graphene, or the like.

[0107] The first and second conductive layers 220 and 240 having a multi-layer structure can include a metal layer. The metal layer can have a three-layer structure of titanium / aluminum / titanium. The first and second conductive layers 220 and 240 having a multi-layer structure can include at least one metal layer and at least one transparent conductive layer.

[0108] The second insulating layer 230 can cover the first conductive layer 220. The second insulating layer 230 can include an inorganic layer including at least one of silicon nitride, silicon oxynitride, and silicon oxide.

[0109] The third insulating layer 250 can cover the second conductive layer 240. The third insulating layer 250 can include an organic layer.

[0110] Referring to FIG. 5 , the inorganic layers 10br, 10bf, and 10 to 50 can be located on the base layer 110. The inorganic layers 10br, 10bf, and 10 to 50 can include a barrier layer 10br, a buffer layer 10bf, and first to fifth insulating layers 10 to 50. The inorganic layers 10br, 10bf, and 10 to 50 can be stacked with the first and second regions NBA1 and NBA2. The inorganic layers 10br, 10bf, and 10 to 50 can be provided with an opening OP1 (hereinafter, referred to as a first opening) defined therethrough and corresponding to the third region BA. The first opening OP1 can be defined to prevent or reduce damage to the inorganic layers 10br, 10bf, and 10 to 50 due to stress generated when the third region BA is bent as shown in FIG. 1B. The first opening OP1 can extend in the second direction DR2. FIG. 1B

[0111] The organic layers 60, 70, 80, and PDL can be located on the inorganic layers 10br, 10bf, and 10 to 50. The organic layers 60, 70, 80, and PDL can include a sixth insulating layer 60, a seventh insulating layer 70, and an eighth insulating layer 80, and a pixel definition layer PDL. The first opening OP1 can be filled with the sixth insulating layer 60.

[0112] ​The sixth to eighth insulating layers 60 to 80 can be provided with an opening OP2 (hereinafter, referred to as a second opening) defined therethrough and corresponding to the non-display area NDA of the first area NBA1. The second opening OP2 can extend in the second direction DR2, and the fifth insulating layer 50 can be exposed through the second opening OP2. The inorganic layers 141 and 143 of the thin film encapsulation layer 140 can be located in the second opening OP2, and can be in contact with the fifth insulating layer 50.

[0113] The first and second insulating layers 210 and 230 of the input sensor ISL, which are inorganic layers, can overlap the first and second areas NBA1 and NBA2. The first and second insulating layers 210 and 230 of the input sensor ISL can be provided with an opening OP3 (hereinafter, referred to as a third opening) defined therethrough and corresponding to the third area BA. The third opening OP3 can be defined to prevent or reduce damage to the first and second insulating layers 210 and 230 of the input sensor ISL due to stress generated when the third area BA is bent as shown in FIG. 1B. The third opening OP3 can extend in the second direction DR2. According to some embodiments, the third insulating layer 250 of the input sensor ISL, which is an organic layer, can overlap the first area NBA1, and can not overlap the second area NBA2 and the third area BA, however, embodiments according to the present disclosure are not limited thereto or thereby. FIG. 1B

[0114] FIG. 6A is a plan view of a signal line SL according to some embodiments of the present disclosure. FIG. 6B and FIG. 6C is a cross-sectional view of a signal line SL according to some embodiments of the present disclosure.

[0115] FIGS. 6A-6C The signal line SL shown in FIG. 1B can correspond to the data line DL or the signal transmission lines CSL1 and CSL2 described with reference to FIG. 3 FIG. 2. For example, FIG. 6A is an enlarged plan view of a data line DL located in the area AA shown in FIG. 3 FIG. 1B. In addition, the signal line SL should not be limited by the type of signal or voltage to be transmitted. The signal line SL suffices to satisfy the structural characteristics described below.

[0116] With reference to FIG. 6A FIG. 2, the signal line SL can include a first line portion P1, a second line portion P2, and a connection portion CP.

[0117] The first line portion P1 can be located in the first area NBA1. The first line portion P1 can be electrically connected to the second line portion P2 through the connection portion CP.

[0118] ​The second line portion P2 may be located in the first area NBA1, the second area NBA2, and the third area BA. The second line portion P2 may extend from the first area NBA1 through the third area BA to the second area NBA2. For illustration purposes, FIG. 6A Only a portion of the second line portion P2 is shown, however, as FIG. 3 As shown in FIG, a portion of the signal line SL extending from the first area NBA1 to the second area NBA2 may correspond to a second line portion P2.

[0119] The second line portion P2 may include a contact portion P2-1 and a plurality of line portions P2-2. The contact portion P2-1 may be located in the first area NBA1. The contact portion P2-1 may overlap the connection portion CP. The line portions P2-2 may be located at least in the third area BA. Each of the line portions P2-2 may extend from the contact portion P2-1 in the first direction DR1. The line portions P2-2 may extend to the second area NBA2 and may be located in the second area NBA2. The line portions P2-2 may be arranged in the second direction DR2. The line portions P2-2 may reduce resistance and relatively improve the flexibility of the second line portion P2.

[0120] The second line portion P2 may further include a contact portion located in the second area NBA2. In this case, the contact portion P2-1 located in the first area NBA1 may be referred to as a first contact portion, and the contact portion located in the second area NBA2 may be referred to as a second contact portion. The second contact portion may extend from the line portion P2-2 toward the first direction DR1 and may be located in the second area NBA2. The description regarding the contact portion P2-1 may also apply to the second contact portion, except that the second contact portion is located in the second area NBA2. The second contact portion may contact the first pad PD1 (refer to FIG. 1 ). FIG. 3 ) overlap. The second contact portion may be connected to the first pad PD1 (refer to FIG. 3 ).

[0121] The connection portion CP may be located in the first area NBA1. The connection portion CP may overlap a portion of the first line portion P1. The connection portion CP may overlap a portion of the second line portion P2. The first line portion P1 may be electrically connected to the second line portion P2 through the connection portion CP.

[0122] The signal line SL can further include a third line portion located in the second region NBA2 and extending in the first direction DR1, and a connection portion electrically connecting the second line portion P2 and the third line portion. In this case, the connection portion CP electrically connecting the first line portion P1 and the second line portion P2 can be referred to as a first connection portion, and the connection portion electrically connecting the second line portion P2 and the third line portion can be referred to as a second connection portion. The second connection portion can overlap with a portion of the second line portion P2 located in the second region NBA2. The second connection portion can overlap with a portion of the third line portion.

[0123] The signal line SL can further include another portion located in the first region NBA1 and electrically connected to the first line portion P1. As an example, FIG. 3 The data line DL illustrated in FIG. 1B can further include a line portion electrically connected to the first line portion P1, located in a different layer from the first line portion P1, and located in the display region DA.

[0124] FIG. 6B is a cross-sectional view taken along the line A-A'. The first line portion P1, the second line portion P2, and the connection portion CP can be located in different layers from each other.

[0125] The insulating layer INS can be located between the first line portion P1 and the connection portion CP. The insulating layer INS can correspond to FIG. 5 and FIG. 6C the second insulating layer 20, the third insulating layer 30, the fourth insulating layer 40, and the fifth insulating layer 50 of FIGS. 1A and 1B. A contact hole CNT can be defined through the insulating layer INS. In FIG. 6A in FIG. 1B, the insulating layer INS is not illustrated, but the position of the contact hole CNT is illustrated.

[0126] The contact hole CNT can overlap with the first line portion P1, the connection portion CP, and the second line portion P2 when viewed in plan (or in a plan view). The contact hole CNT can overlap with the organic layer opening OP-a when viewed in plan (or in a plan view).

[0127] The first line portion P1 can be exposed through the contact hole CNT defined through the insulating layer INS. The exposed first line portion P1 can be covered by the connection portion CP. Accordingly, the first line portion P1 and the connection portion CP can contact each other and be electrically connected to each other via the contact hole CNT.

[0128] The organic layer 60 can be located between the connection portion CP and the second line portion P2. The organic layer 60 can be provided with an organic layer opening OP-a defined therethrough. In FIG. 6AIn the middle, the organic layer 60 is not shown, but the position of the organic layer opening OP-a is shown. When viewed in a plane (or in a plan view), the organic layer opening OP-a can be defined inside the connection portion CP. In addition, when viewed in a plane (or in a plan view), the organic layer opening OP-a can be defined as extending to a region in which the first line portion P1 is not positioned.

[0129] The connection portion CP can be exposed through the organic layer opening OP-a defined by passing through the organic layer 60. The exposed connection portion CP can be covered by the second line portion P2. The second line portion P2 can be directly positioned on the upper surface of the connection portion CP exposed through the organic layer opening OP-a. Thus, the connection portion CP and the second line portion P2 can contact each other and be electrically connected to each other via the organic layer opening OP-a.

[0130] FIG. 6C A cross-section of the display device DD (refer to FIG. 6A taken along the line B-B' of FIG. 1A is shown.

[0131] Referring to FIG. 6C , the first line portion P1 can be positioned on the first insulating layer 10. According to some embodiments, the first line portion P1 positioned on the same layer as the gate electrode GT1 of the silicon transistor S-TFT of FIG. 4 is shown as a representative example, however, embodiments according to the present disclosure are not limited thereto or thereby. The first line portion P1 can be positioned on the same layer as the second shield electrode BMLb of FIG. 4 or the gate electrode GT2 of the oxide transistor O-TFT of FIG. 4 In the present disclosure, the expression “component A is positioned on the same layer as component B” means that they are formed by the same process and that they have the same material and the same stack structure.

[0132] As an example, the first line portion P1 can include molybdenum. The first line portion P1 can include copper / titanium or molybdenum / titanium. The second line portion P2 and the connection portion CP can include aluminum. The second line portion P2 and the connection portion CP can include titanium / aluminum / titanium.

[0133] The connection portion CP can be connected to the first line portion P1 via the contact hole CNT defined by passing through the second insulating layer 20, the third insulating layer 30, the fourth insulating layer 40, and the fifth insulating layer 50. FIGS. 6A-6C A plurality of contact holes arranged in five rows by three columns are shown, however, the number of the contact holes CNT should not be limited thereto or thereby. In addition, when viewed in a plane (or in a plan view), the contact hole CNT can have a square shape, however, the shape of the contact hole CNT should not be limited thereto or thereby.

[0134] In FIG. 6CIn the drawings, the depth of the contact hole CNT is depicted as being significantly greater than its diameter. However, this is merely due to the scale of the drawing, and the diameter of the contact hole CNT can be equal to or greater than its depth. Even if the diameter of the contact hole CNT is less than the depth of the contact hole CNT, the difference can be slight. Because the thickness of the inorganic layer (e.g., the second insulating layer 20, the third insulating layer 30, the fourth insulating layer 40, and the fifth insulating layer 50) is thin, even if the plurality of contact holes CNT are formed with a small area, the difference between the diameter of the contact hole CNT and the depth of the contact hole CNT can be small. As an example, each of the second insulating layer 20, the third insulating layer 30, the fourth insulating layer 40, and the fifth insulating layer 50 can have a thickness in a range of 1500 to 2500 (or about 1500 to about 2500 ).

[0135] The second line portion P2 can contact the connection portion CP via the organic layer opening OP-a defined through the sixth insulating layer 60 and can be electrically connected to the connection portion CP.

[0136] In the region where the contact hole CNT is not defined, the connection portion CP and the second line portion P2 can contact each other in a flat shape.

[0137] The seventh insulating layer 70 can be located on the sixth insulating layer 60 and can cover the second line portion P2.

[0138] Because the first insulating layer 210 and the second insulating layer 230 of the input sensor ISL, which are inorganic layers, are superposed with the first region NBA1 and are not superposed with the third region BA, a moisture permeation path can be provided.

[0139] The first insulating layer 210, which is an inorganic layer, is damaged by outgassing generated from the organic layers 60, 70, 80, and PDL located below the first insulating layer 210 and the second insulating layer 230 and moisture permeated between the first insulating layer 210 and the pixel definition layer PDL, and thus hydrogen radicals and ammonia (NH3) gas are generated from the first insulating layer 210. For example, the first insulating layer 210 (a silicon nitride layer) is oxidized to generate hydrogen radicals and ammonia (NH3) gas. The hydrogen radicals and ammonia (NH3) gas react with water (H2O) permeated therein to generate hydrogen ions and ammonium ions. The hydrogen ions and ammonium ions diffuse to cause corrosion of the connection portion CP. In particular, due to a step difference caused by the contact hole CNT, micro-cracks can be generated in the connection portion CP.

[0140] However, according to some embodiments of the present disclosure, since the second line portion P2 extends to the region in which the contact hole CNT is defined, the second line portion P2 may be arranged to cover the contact hole CNT and the connection portion CP around the contact hole CNT. Therefore, the penetration of moisture or other contaminants may be prevented or reduced, and thus, the corrosion of the connection portion CP may be prevented or reduced.

[0141] FIG. 7A is a plan view of a signal line SL according to some embodiments of the present disclosure. FIG. 7B and FIG. 7C is a cross-sectional view of a signal line SL according to some embodiments of the present disclosure.

[0142] FIGS. 7A-7C 1 shows a signal line SL according to some embodiments of the present disclosure. In addition to the arrangement of the second line portion P2 according to the structure of the organic layer (ie, the sixth insulating layer 60), FIGS. 6A-6C The description of the signal line SL can be applied to FIGS. 7A-7C signal line SL.

[0143] FIG. 7B Shown along FIG. 7A The cross section is taken along the line CC'. FIG. 7C Shown along FIG. 7A The display device (see FIG. 1A DD) cross section.

[0144] For ease of explanation, FIG. 7B The thickness and the shape of the upper surface of the second line portion P2 shown in FIG are shown as FIG. 7C The thickness and the shape of the upper surface of the second line portion P2 are different, but the thickness and the shape of the upper surface of the second line portion P2 should not be limited thereto or thereby.

[0145] A first organic layer opening OP-b1 and a second organic layer opening OP-b2 spaced apart from the first organic layer opening OP-b1 may be defined through the organic layer 60. When viewed in a plane (or in a plan view), the first organic layer opening OP-b1 and the second organic layer opening OP-b2 may be located inside the connection portion CP.

[0146] When viewed in a planar manner (or in a plan view), the first organic layer opening OP-b1 may be located within the first line portion P1. When viewed in a planar manner (or in a plan view), the first organic layer opening OP-b1 may be defined to surround the region where the contact hole CNT is defined. When viewed in a planar manner (or in a plan view), the first organic layer opening OP-b1 may not overlap the region where the contact hole CNT is defined. When viewed in a planar manner (or in a plan view), the portion of the organic layer 60 that overlaps the contact hole CNT may be separated from the portion of the organic layer 60 that does not overlap the contact hole CNT by the first organic layer opening OP-b1.

[0147] The second line portion P2 may be directly located on the organic layer 60. The second line portion P2 may be directly located on the connection portion CP exposed through the first organic layer opening OP-b1. Since the second line portion P2 is directly located on the connection portion CP exposed through the first organic layer opening OP-b1, the connection portion CP may be electrically connected to the second line portion P2.

[0148] When viewed in a planar manner (or in a plan view), the second organic layer opening OP-b2 may be located outside the first line portion P1. However, unlike this structure, the second organic layer opening OP-b2 may be located inside the first line portion P1. The second organic layer opening OP-b2 may not overlap with the portion where the contact hole CNT is located. The connection portion CP may be exposed through the second organic layer opening OP-b2, and the exposed connection portion CP may be covered by the second line portion P2. The connection portion CP located in the second organic layer opening OP-b2 and the second line portion P2 may be in contact with each other in a flat shape.

[0149] FIG. 8A is a plan view of a signal line SL according to some embodiments of the present disclosure. FIG. 8B is a cross-sectional view of a signal line SL according to some embodiments of the present disclosure. FIG. 9A is a plan view of a signal line SL according to some embodiments of the present disclosure. FIG. 9B is a cross-sectional view of a signal line SL according to some embodiments of the present disclosure.

[0150] FIGS. 8A-9B 1 is a view of a signal line SL according to an embodiment of the present disclosure. In addition to the arrangement of the second line portion P2 according to the structure of the organic layer (ie, the sixth insulating layer 60), FIGS. 6A-6C The description of the signal line SL can be applied to FIGS. 8A-9B signal line SL.

[0151] FIG. 8B Shown along FIG. 8A A cross section taken along line EE'. FIG. 9B Shown along FIG. 9Aa cross-section taken along the line F-F'.

[0152] With reference to FIG. 8A and FIG. 8B A first organic layer opening OP-c1 and a second organic layer opening OP-c2 spaced apart from the first organic layer opening OP-c1 can be defined through the organic layer 60. When viewed in plan (or in a plan view), the first organic layer opening OP-c1 and the second organic layer opening OP-c2 can be located inside the connection portion CP.

[0153] When viewed in plan (or in a plan view), the first organic layer opening OP-c1 can be located inside the first line portion P1. When viewed in plan (or in a plan view), the first organic layer opening OP-c1 can surround the area where some of the contact holes CNT are located and can overlap with some other contact holes CNT.

[0154] The second line portion P2 can be located directly on the connection portion CP exposed through the first organic layer opening OP-c1. Since the second line portion P2 is located directly on the connection portion CP exposed through the first organic layer opening OP-c1, the connection portion CP can be electrically connected to the second line portion P2.

[0155] When viewed in plan (or in a plan view), the second organic layer opening OP-c2 can be located outside the first line portion P1. However, unlike this structure, the second organic layer opening OP-c2 can be located inside the first line portion P1. The second organic layer opening OP-c2 can not overlap with the area where the contact holes CNT are located. The connection portion CP can be exposed through the second organic layer opening OP-c2, and the exposed connection portion CP can be covered by the second line portion P2. The connection portion CP and the second line portion P2 located in the second organic layer opening OP-c2 can include portions that contact each other in a flat shape.

[0156] The above description regarding the first organic layer opening OP-c1 and the second organic layer opening OP-c2 of FIG. 9A and FIG. 9B may be applied to the first organic layer opening OP-d1 and the second organic layer opening OP-d2 of FIG. 10A and FIG. 10B .

[0157] FIG. 10A is a plan view of a signal line SL according to some embodiments of the present disclosure. FIG. 10B is a cross-sectional view of a signal line SL according to some embodiments of the present disclosure.

[0158] FIGS. 6A-6C and FIG. 10Ais a view of the signal line SL according to some embodiments of the present disclosure. The above description of the signal line SL according to FIG. 10B may be applied to the signal line SL of FIG. 10B and FIG. 10A .

[0159] FIG. 1A shows a cross-section of the display device (refer to the DD of ​ taken along the line G-G' of ​ .

[0160] The first organic layer opening OP-e1 and a second organic layer opening OP-e2 spaced apart from the first organic layer opening OP-e1 can be defined through the organic layer 60. When viewed in plan (or in a plan view), the first organic layer opening OP-e1 and the second organic layer opening OP-e2 can be located inside the connection portion CP.

[0161] When viewed in plan (or in a plan view), the first organic layer opening OP-e1 can be located inside the first line portion P1. When viewed in plan (or in a plan view), the first organic layer opening OP-e1 can surround a portion of the area where the contact hole CNT is located. When viewed in plan (or in a plan view), the first organic layer opening OP-e1 can not overlap the area where the contact hole CNT is located. When viewed in plan (or in a plan view), since the first organic layer opening OP-e1 surrounds only a portion of the area where the contact hole CNT is located, gas generated from the organic layer 60 can be discharged. That is, the organic layer 60 can be provided in a single integral form without being divided into a plurality of portions by the first organic layer opening OP-e1.

[0162] The second line portion P2 can be located directly on the portion of the organic layer 60 where the contact hole CNT is located. The second line portion P2 can be located directly on the connection portion CP exposed through the first organic layer opening OP-e1. Since the second line portion P2 can be located directly on the connection portion CP exposed through the first organic layer opening OP-e1, the connection portion CP can be electrically connected to the second line portion P2.

[0163] The second organic layer opening OP-e2 can be located outside the first line portion P1 when viewed in a plane (or in a plan view). However, unlike this structure, the second organic layer opening OP-e2 can be located inside the first line portion P1. The second organic layer opening OP-e2 can not overlap with the area in which the contact hole CNT is positioned. The connection portion CP can be exposed through the second organic layer opening OP-e2, and the exposed connection portion CP can be covered by the second line portion P2. The connection portion CP and the second line portion P2 located in the second organic layer opening OP-e2 can include portions that contact each other in a flat shape.

[0164] While aspects of some embodiments of the present disclosure have been described, it is understood that the present disclosure should not be limited to these embodiments alone and that various changes and modifications could be made by a person of ordinary skill in the art within the spirit and scope of the embodiments according to the present disclosure as defined by the appended claims and their equivalents. Thus, the disclosed subject matter should not be limited to any single embodiment described herein, and the scope of embodiments according to some embodiments of the present disclosure should be according to the appended claims and their equivalents.

Claims

1. A display device comprising: a base substrate including a first region, a second region spaced apart from the first region in a first direction, and a third region between the first region and the second region; a pixel in the first region; an insulating layer having a plurality of contact holes defined therethrough; and a signal line in the first region, the second region, and the third region, the signal line including a first line portion in the first region, a connection portion on the insulating layer and connected to the first line portion via the plurality of contact holes, and a second line portion extending from the first region to the third region and different from the first line portion in a layer, wherein the insulating layer is on the first line portion, and wherein the plurality of contact holes are covered by and superposed on the second line portion in a plan view.

2. The display device of claim 1, wherein, The plurality of contact holes are superposed on the first line portion, the connection portion, and the second line portion in the plan view.

3. The display device of claim 1, wherein, The display device further includes an organic layer between the connection portion and the second line portion, the organic layer has a first organic layer opening through which the connection portion is exposed, and the second line portion is directly on an upper surface of the connection portion exposed through the first organic layer opening.

4. The display device of claim 3, wherein, The first organic layer opening is superposed on all of the plurality of contact holes in the plan view, and in the plan view, the first organic layer opening is inside the connection portion and extends to a region in which the first line portion is not positioned.

5. The display device of claim 3, wherein, The first organic layer opening is not superposed on all of the plurality of contact holes in the plan view, and the first organic layer opening surrounds a region in which the plurality of contact holes are positioned in the plan view.

6. The display device of claim 3, wherein, The first organic layer opening is superposed on some of the plurality of contact holes in the plan view.

7. The display device of claim 3, wherein, The first organic layer opening is not superposed on all of the plurality of contact holes in the plan view, the organic layer includes a first portion superposed on the plurality of contact holes and a second portion superposed on the connection portion and not superposed on the first line portion, and the first portion and the second portion of the organic layer are integrally provided with each other.

8. The display device of claim 3, wherein, In the plan view, the first organic layer opening is inside the connection portion and the first line portion.

9. The display device of claim 3, wherein, The organic layer further has a second organic layer opening defined through the organic layer spaced apart from the first organic layer opening and not superposed on the first line portion.

10. The display device of claim 9, wherein, In the plan view, the second organic layer opening is inside the connection portion and the second line portion.

11. The display device of claim 1, wherein, The first line portion includes molybdenum.

12. The display device of claim 1, wherein, The connection portion includes aluminum.

13. The display device of claim 1, wherein, The first region includes a display region in which the pixel is positioned and a first non-display region adjacent to the display region, and the first line portion is in the first non-display region.

14. The display device of claim 1, wherein, The second region includes a pad, and the second line portion is connected to the pad. The display device further includes a second non-display region adjacent to the display region, and the first line portion is in the second non-display region. The second region includes a pad, and the second line portion is connected to the pad.

15. The display device of claim 1, wherein, The third region is curved with respect to an imaginary axis extending in a second direction intersecting the first direction.

16. The display device of claim 1, wherein, The second line portion includes a contact portion superposed with the first line portion and a plurality of line portions extending from the contact portion and superposed with the third region, and The plurality of line portions extend in the first direction and are arranged in a second direction intersecting the first direction.

17. The display device of claim 1, wherein, The display device further includes a scan driving circuit in the first region and configured to apply a scan signal to the pixel, and The signal line is connected to the scan driving circuit.

18. The display device of claim 1, wherein, The signal line is connected to the pixel.

19. The display device of claim 1, wherein, The insulating layer includes a plurality of inorganic layers.

20. A display device, the display device comprising: a base substrate including a first region, a second region spaced apart from the first region in a first direction, and a third region between the first region and the second region; a pixel in the first region; an insulating layer provided with a plurality of contact holes defined therethrough; and a signal line in the first region, the second region, and the third region, the signal line including a first line portion in the first region, a connection portion on the insulating layer and connected to the first line portion via the plurality of contact holes, and a second line portion extending from the first region to the third region and different from the first line portion in layer, wherein the insulating layer is on the first line portion, and wherein at least a portion of the connection portion is superposed with both the first line portion and the second line portion in plan view.

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