Display panel, driving method of display panel and display device
By using an alternating setup and precise drive display panel design, the alignment process challenge of high-resolution dual cell display products has been solved. This achieves high-resolution display while reducing alignment accuracy requirements and process complexity, and improving image consistency and brightness uniformity.
Patent Information
- Application Number
- CN202511064917.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-30
- Publication Date
- 2025-10-28
AI Technical Summary
How to reduce the difficulty of alignment process in high-resolution dual cell display products, especially the problem of excessively high alignment accuracy requirements caused by the increase in the number of sub-pixels of the two panels.
The display panel adopts an alternating arrangement design, in which the first liquid crystal sub-panel and the second liquid crystal sub-panel alternately arrange sub-pixels in the column direction, and the on and off timing of the sub-pixels is controlled by a precise driving method. Combined with impedance matching and dynamic compensation technology, the alignment process accuracy requirements are reduced.
It effectively reduces the difficulty of alignment process for high-resolution display panels, simplifies process complexity and cost, and improves the image consistency and brightness uniformity of display panels.
Smart Images

Figure CN120848069A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of display technology, and in particular to a display panel and driving method, and a display device. Background Technology
[0002] To meet users' increasingly sophisticated tastes, numerous improvements have been made to the contrast ratio of LCD panels, with dual-cell (dual-layer LCD) displays being a solution developed to address this need.
[0003] However, since dual cell products achieve image quality control by bonding two panels together, in order to achieve higher contrast and display effects, the two panels must meet the sub-pixel correspondence when bonding. Therefore, the alignment process of dual cell products has strict requirements. At the same time, for the two panels, the higher the resolution, the more sub-pixels in a single panel, and the smaller the size, the more difficult the alignment process becomes.
[0004] Therefore, how to achieve high resolution in dual-cell products while reducing the alignment process is an urgent problem to be solved. Summary of the Invention
[0005] To address the aforementioned issues, this application provides a display panel, driving method, and display device that can overcome the alignment process difficulties of high-resolution dual-cell products.
[0006] To address the aforementioned problems, the first technical solution provided in this application is: to provide a display panel comprising multiple rows of sub-pixels, the display panel including:
[0007] The first liquid crystal sub-panel includes multiple rows of first sub-pixels;
[0008] The second liquid crystal sub-panel is stacked on top of the first liquid crystal sub-panel, and the second liquid crystal sub-panel includes multiple rows of second sub-pixels;
[0009] In the column direction intersecting the row direction, multiple rows of first sub-pixels and multiple rows of second sub-pixels are alternately arranged; and the multiple rows of first sub-pixels and multiple rows of second sub-pixels constitute the multiple rows of sub-pixels of the display panel.
[0010] In one embodiment, the multiple rows of sub-pixels include a first repeating unit consisting of N adjacent rows of the first sub-pixels; and a second repeating unit consisting of M adjacent rows of the second sub-pixels;
[0011] Where N is a positive integer greater than or equal to 1 and less than or equal to 10; M is a positive integer greater than or equal to 1 and less than or equal to 10.
[0012] In one embodiment, the number of rows of the first sub-pixels in the first repeating unit is the same as the number of rows of the second sub-pixels in the second repeating unit (M rows).
[0013] To address the aforementioned problems, the second technical solution provided in this application is: a driving method for a display panel, applied to any of the display panels described above, comprising:
[0014] In response to receiving the grayscale of multiple rows of subpixels in the display panel in the next frame;
[0015] The system outputs a first control timing sequence to control the activation of multiple rows of first sub-pixels within the first liquid crystal sub-panel, and a second control timing sequence to control the activation of multiple rows of second sub-pixels within the second liquid crystal sub-panel, so that the multiple rows of sub-pixels composed of multiple rows of first sub-pixels and multiple rows of second sub-pixels are activated row by row.
[0016] In one embodiment, the first control timing includes a plurality of first clock signals, each first clock signal controlling the on / off state of a row of first sub-pixels; the second control timing includes a plurality of second clock signals, each second clock signal controlling the on / off state of a row of second sub-pixels.
[0017] The first control timing sequence for outputting control to enable multiple rows of the first sub-pixels in the first liquid crystal sub-panel, and the second control timing sequence for outputting control to enable multiple rows of the second sub-pixels in the second liquid crystal sub-panel, include:
[0018] After the second sub-pixel in the row above the first sub-pixel in each row is turned on, N first clock signals are output row by row to control the first sub-pixels in the adjacent N rows in the display panel to be turned on row by row.
[0019] After the first sub-pixel in the row above the second sub-pixel in each row is turned on, M second clock signals are output row by row to control the M adjacent rows of the second sub-pixel in the second liquid crystal sub-panel to be turned on row by row.
[0020] Wherein, the turn-on level of the first clock signal and the turn-on level of the second clock signal do not overlap; N is a positive integer greater than or equal to 1; M is a positive integer greater than or equal to 1.
[0021] In one embodiment, the method further includes:
[0022] Obtain multiple first feedback electrical parameters corresponding to the first sub-pixels in different regions of the first liquid crystal sub-panel, and obtain multiple second feedback electrical parameters corresponding to the second sub-pixels in different regions of the second liquid crystal sub-panel;
[0023] In response to the fact that the difference between the first feedback electrical parameter obtained from any area of the first liquid crystal sub-panel and the second feedback electrical parameter obtained from the corresponding area of the second liquid crystal sub-panel does not fall within a preset range, compensation is performed on the display data of the first sub-pixel and / or the second sub-pixel in the area where the difference does not fall within the preset range.
[0024] In one embodiment, it further includes:
[0025] Determine the refresh rate of the display panel in the current display state;
[0026] The display data of the first sub-pixel and the display data of the second sub-pixel are compensated based on the refresh rate.
[0027] In one embodiment, the method further includes:
[0028] Based on the grayscale of the first sub-pixel and the second sub-pixel in the next frame, the display data of the first sub-pixel and the second sub-pixel in the next frame are compensated;
[0029] Different gray levels correspond to different compensation values.
[0030] In one embodiment, the second liquid crystal sub-panel is located on the light-emitting side of the first liquid crystal sub-panel;
[0031] The compensation for the display data of the first sub-pixel and the second sub-pixel in the next frame includes:
[0032] At the same gray level, the compensation value for the display data of the first sub-pixel is greater than the compensation value for the display data of the second sub-pixel.
[0033] To address the aforementioned problems, the second technical solution provided in this application is: to provide a display device, comprising:
[0034] The display panel includes any of the display panels described above;
[0035] A control unit is electrically connected to the display panel, and the control unit is used to execute the driving method of the display panel described in any of the preceding claims.
[0036] The beneficial effects of this application are that, unlike the prior art, the display panel provided in this application includes a first liquid crystal sub-panel and a second liquid crystal sub-panel. The first liquid crystal sub-panel includes multiple rows of first sub-pixels; the second liquid crystal sub-panel is stacked with the first liquid crystal sub-panel, and the second liquid crystal sub-panel includes multiple rows of second sub-pixels; wherein, in the column direction intersecting the row direction, the multiple rows of first sub-pixels and the multiple rows of second sub-pixels are alternately arranged; and the multiple rows of first sub-pixels and the multiple rows of second sub-pixels constitute multiple rows of sub-pixels in the display panel. Specifically, by alternately arranging multiple rows of sub-pixels in the display panel, the precision requirements of the alignment process of the two liquid crystal sub-panels in the display panel are effectively reduced, avoiding an exponential increase in alignment difficulty due to high resolution. Furthermore, while maintaining high resolution, the multi-row sub-pixel layered design reduces the number of sub-pixels in a single-layer liquid crystal sub-panel, thereby simplifying process complexity and reducing costs. Attached Figure Description
[0037] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort, wherein:
[0038] Figure 1 This is a schematic diagram of the structure of a display panel provided in one embodiment of this application;
[0039] Figure 2 A schematic diagram showing the distribution of sub-pixels in a first liquid crystal sub-panel and a second liquid crystal sub-panel provided in an embodiment of this application;
[0040] Figure 3 A schematic diagram showing the distribution of sub-pixels in a first liquid crystal sub-panel and a second liquid crystal sub-panel, provided for another embodiment of this application;
[0041] Figure 4 A schematic diagram showing the distribution of sub-pixels in a first liquid crystal sub-panel and a second liquid crystal sub-panel, provided in yet another embodiment of this application;
[0042] Figure 5 A schematic flowchart illustrating a method for driving a display panel according to an embodiment of this application;
[0043] Figure 6 A schematic flowchart of a display panel driving method provided in another embodiment of this application;
[0044] Figure 7 A timing diagram of the driving mechanism of a display panel provided in an embodiment of this application;
[0045] Figure 8A timing diagram for driving a display panel provided in another embodiment of this application;
[0046] Figure 9 A schematic flowchart illustrating a method for driving a display panel according to another embodiment of this application;
[0047] Figure 10 A schematic flowchart illustrating a method for driving a display panel according to another embodiment of this application;
[0048] Figure 11 This is a schematic diagram of a display device provided in an embodiment of this application.
[0049] Label Explanation:
[0050] Display device-1000;
[0051] Display panel - 100; First LCD sub-panel - 10; First sub-pixel - P1; First repeating unit - X1; Second LCD sub-panel - 20; Second sub-pixel - P2; Second repeating unit - X2;
[0052] Control Unit-200. Specific Implementation
[0053] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.
[0054] The terms "first," "second," and "third" in this application are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined as "first," "second," or "third" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified. All directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of this application are only used to explain the relative positional relationships and movements between components in a specific orientation (as shown in the figures). If the specific orientation changes, the directional indications also change accordingly. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.
[0055] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0056] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.
[0057] In the description of the embodiments of this application, the term "multiple" refers to two or more (including two), similarly, "multiple sets" refers to two or more (including two sets), and "multiple pieces" refers to two or more (including two pieces).
[0058] In the description of the embodiments of this application, unless otherwise expressly specified and limited, technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. For those skilled in the art, the specific meaning of the above terms in the embodiments of this application can be understood according to the specific circumstances.
[0059] See Figures 1-4 , Figure 1 This is a schematic diagram of the structure of a display panel provided in one embodiment of this application; Figure 2 A schematic diagram showing the distribution of sub-pixels in a first liquid crystal sub-panel and a second liquid crystal sub-panel provided in an embodiment of this application; Figure 3 A schematic diagram showing the distribution of sub-pixels in a first liquid crystal sub-panel and a second liquid crystal sub-panel, provided for another embodiment of this application; Figure 4 This is a schematic diagram showing the distribution of sub-pixels in a first liquid crystal sub-panel and a second liquid crystal sub-panel, provided in yet another embodiment of this application.
[0060] This application provides a display panel 100, which includes a first liquid crystal sub-panel 10 and a second liquid crystal sub-panel 20 stacked on top of the first liquid crystal sub-panel 10. The first liquid crystal sub-panel 10 includes multiple rows of sub-pixels (defined as first sub-pixels P1), and each row of first sub-pixels P1 includes multiple pixel units composed of red, green, and blue sub-pixels. The second liquid crystal sub-panel 20 includes multiple rows of sub-pixels (defined as second sub-pixels P2), and each row of second sub-pixels P2 includes multiple pixel units composed of red, green, and blue sub-pixels. The multiple rows of first sub-pixels P1 and multiple rows of second sub-pixels P2 are alternately arranged in the column direction intersecting the row direction. The multiple rows of first sub-pixels P1 and multiple rows of second sub-pixels P2 constitute the multiple rows of sub-pixels of the display panel 100.
[0061] Taking the second liquid crystal sub-panel 20 located on the light-emitting side of the first liquid crystal sub-panel 10 as an example, the first liquid crystal sub-panel 10 includes multiple rows of first sub-pixels P1; the second liquid crystal sub-panel 20 includes multiple rows of second sub-pixels P2; the sub-pixels on the two liquid crystal sub-panels are arranged alternately in the column direction to form a complete number of sub-pixel rows. It should be noted that the liquid crystal sub-panel located on the light-emitting side needs to have a light-transmitting area in the row position where no sub-pixels are set, so as to ensure that the light emitted by the sub-pixels in the lower liquid crystal sub-panel can pass through the upper liquid crystal sub-panel.
[0062] Understandably, in the display panel 100 provided in this application, multiple rows of sub-pixels are formed by alternating multiple rows of first sub-pixels P1 in the first liquid crystal sub-panel 10 and multiple rows of second sub-pixels P2 in the second liquid crystal sub-panel 20. As a result, the sub-pixels in the two liquid crystal sub-panels do not overlap in the light emission direction, thus effectively reducing the precision requirements of the alignment process of the two liquid crystal sub-panels in the display panel 100 and avoiding the exponential increase in alignment difficulty caused by high resolution.
[0063] Furthermore, to achieve product effects such as 4K or 8K resolutions, the display panel 100 provided in this application only needs to have half of its sub-pixels in both the first liquid crystal sub-panel 10 and the second liquid crystal sub-panel 20. By forming a complete row of sub-pixels using the first liquid crystal sub-panel 10 and the second liquid crystal sub-panel 20, product effects such as 4K or 8K resolutions can be achieved. This design reduces the number of sub-pixels in a single-layer liquid crystal sub-panel, simplifying the manufacturing process and reducing costs.
[0064] In one embodiment, the multi-row sub-pixels in the display panel 100 include a first repeating unit X1 composed of N adjacent rows of first sub-pixels P1; and a second repeating unit X2 composed of M adjacent rows of second sub-pixels P2; wherein N is a positive integer greater than or equal to 1 and less than or equal to 10; and M is a positive integer greater than or equal to 1 and less than or equal to 10.
[0065] Specifically, multiple rows of subpixels form a first repeating unit X1 by adjacent N rows of first subpixels P1, and a second repeating unit X2 by adjacent M rows of second subpixels P2. The values of N and M range from 1 to 10, achieving an interleaved layout of subpixels through this periodic arrangement. In practice, the first subpixels P1 can be distributed in even-numbered rows (2, 4, 6...), and the second subpixels P2 can be distributed in odd-numbered rows (1, 3, 5...). Figure 2 (as shown); or the repetition period can be changed by adjusting the values of N and M, such as arranging the first sub-pixels P1 of the three rows adjacently, and the second sub-pixels P2 of the three rows adjacently (as shown). Figure 3 (as shown); or arrange the first sub-pixels P1 in five rows adjacent to each other, and the second sub-pixels P2 in five rows adjacent to each other; or arrange the first sub-pixels P1 in ten rows adjacent to each other, and the second sub-pixels P2 in ten rows adjacent to each other; or arrange the second sub-pixels P2 in two rows adjacent to each other, and set a row of first sub-pixels P1 between every two rows of second sub-pixels P2 (as shown). Figure 4 (as shown), etc. No further limitations are made here.
[0066] By setting specific values for repeating units, the orderly staggered arrangement of multiple rows of sub-pixels within the display panel 100 can be achieved, effectively reducing the alignment difficulty of the two-layer liquid crystal sub-panels at high resolution. Furthermore, the variable parameter design of the repeating units enhances structural adaptability, allowing the arrangement to be adjusted according to different design requirements.
[0067] like Figure 2 or Figure 3 As shown, in some embodiments, the number of rows of first sub-pixels P1 in the first repeating unit X1 is the same as the number of rows of second sub-pixels P2 in the second repeating unit X2.
[0068] For example, the first sub-pixel P1 in the first repeating unit X1 and the second sub-pixel P2 in the second repeating unit X2 can both be in one row, both in three rows, or both in five rows, etc.
[0069] Specifically, the number of rows of the first sub-pixel P1 in the first repeating unit X1 is designed to be consistent with the number of rows of the second sub-pixel P2 in the second repeating unit X2. This design helps improve the vertical alignment accuracy of the two liquid crystal sub-panels and reduces the display defect rate caused by alignment deviations during the manufacturing process. In practice, multiple alignment marks can be set on the edges of the two liquid crystal sub-panels, and optical positioning technology can be used to achieve staggered alignment of the two sub-pixels during the manufacturing process. For example, ten sets of alignment marks can be used for calibration, or the number of marks can be adjusted according to actual needs.
[0070] In addition, it is understandable that the light emitted by the sub-pixels in the upper liquid crystal sub-panel can be directly transmitted to the outside, while the light emitted by the sub-pixels in the lower liquid crystal sub-panel still needs to pass through the upper liquid crystal sub-panel to be transmitted to the outside. Therefore, the light emitted by the sub-pixels in the lower liquid crystal sub-panel has an attenuation problem, resulting in the lower sub-pixel's grayscale brightness being relatively low at the same grayscale, thus affecting the uniformity of the display.
[0071] Therefore, in order to improve the display uniformity of the display panel 100, the number of rows of sub-pixels in each repeating unit should not be too many, for example, not more than ten rows, so as to avoid bright and dark stripes appearing on the display panel 100 during display.
[0072] Of course, this problem can also be improved through drive compensation. In this approach, the number of rows of sub-pixels in each repeating unit can be increased, as long as the display effect is not affected.
[0073] In scenarios where two layers of liquid crystal sub-panels are used to display an image, precise timing control of the two sub-panels is required to ensure that each line of the display panel 100 displays the image line by line without delay or overlap. Therefore, see [link to relevant documentation]. Figure 5 , Figure 5 This is a flowchart illustrating a driving method for a display panel according to an embodiment of this application; this application also provides a driving method for a display panel 100, which can be applied to the display panel 100 provided in any of the above embodiments, and the driving method includes:
[0074] S1: In response to receiving the grayscale of multiple rows of subpixels in the display panel 100 in the next frame.
[0075] S2: Output a first control timing sequence to control the opening of multiple rows of first sub-pixels P1 in the first liquid crystal sub-panel 10, and output a second control timing sequence to control the opening of multiple rows of second sub-pixels P2 in the second liquid crystal sub-panel 20, so that the multiple rows of sub-pixels composed of multiple rows of first sub-pixels P1 and multiple rows of second sub-pixels P2 are opened row by row.
[0076] Specifically, by controlling the opening sequence of the two liquid crystal sub-panels respectively, the multiple rows of sub-pixels of the display panel 100 are turned on sequentially. Then, combined with the grayscale display requirements of the image, the corresponding display data (such as Vdata) is output to the turned-on sub-pixels, ultimately achieving a high resolution effect.
[0077] The first control timing sequence includes multiple first clock signals, each first clock signal controlling the activation and deactivation of a row of first sub-pixels P1; the second control timing sequence includes multiple second clock signals, each second clock signal controlling the activation and deactivation of a row of second sub-pixels P2.
[0078] See Figures 6-8, Figure 6 A schematic flowchart of a display panel driving method provided in another embodiment of this application; Figure 7 A timing diagram of the driving mechanism of a display panel provided in an embodiment of this application; Figure 8 A timing diagram for driving a display panel provided in another embodiment of this application.
[0079] In one embodiment, the output of a first control timing sequence for controlling the activation of multiple rows of first sub-pixels P1 within the first liquid crystal sub-panel 10, and the output of a second control timing sequence for controlling the activation of multiple rows of second sub-pixels P2 within the second liquid crystal sub-panel 20, includes:
[0080] S21: After the second sub-pixel P2 in the row above the first sub-pixel P1 in each row is turned on, N first clock signals are output row by row to control the first sub-pixel P1 in the adjacent N rows within the display panel 100 to be turned on row by row.
[0081] S22: After the first sub-pixel P1 in the row above the second sub-pixel P2 in each row is turned on, M second clock signals are output row by row to control the M adjacent rows of second sub-pixels P2 in the second liquid crystal sub-panel 20 to be turned on row by row; wherein, the turn-on level of the first clock signal and the turn-on level of the second clock signal do not overlap; N is a positive integer greater than or equal to 1; M is a positive integer greater than or equal to 1.
[0082] Combination Figure 2 and Figure 7 For example, taking the number of rows of sub-pixels in each repeating unit as one row, the first clock signal includes CK1-CKn, and the second clock signal includes CK1′-CKn′.
[0083] When CK1' outputs an on level (e.g., high level) to activate the second sub-pixel P2 of a row, display data begins to be output, charging of the second sub-pixel P2 of that row begins, and the image begins to be displayed. When CK1' outputs an off level (e.g., low level), charging of the second sub-pixel P2 of that row stops. However, CK2' does not immediately output an on level; instead, CK1 outputs an on level to activate the first sub-pixel P1 of the next row to charge it. When CK1 outputs an off level, charging of the first sub-pixel P1 of that row stops, but CK2 does not immediately output an on level; instead, CK2' outputs an on level to activate the second sub-pixel P2 of the next row to charge it. When CK2' outputs an off level, charging of the second sub-pixel P2 of that row stops, and CK2 outputs an on level to activate the first sub-pixel P1 of the next row to charge it. This process alternates until all rows of sub-pixels in the display panel 100 are fully charged.
[0084] That is, the turn-on level of adjacent second clock signals is delayed by the turn-on level time of a first clock signal, and the turn-on level of adjacent first clock signals is delayed by the turn-on level time of a second clock signal. This enables the alternating output of multiple rows of sub-pixels in the two liquid crystal sub-panels, so that the multiple rows of sub-pixels of the display panel 100 are turned on sequentially. Combined with the grayscale display requirements of the image, the corresponding display data is output to the turned-on sub-pixels, ultimately achieving a high resolution effect.
[0085] Combination Figure 3 and Figure 8 Taking the number of rows of sub-pixels in each repeating unit as three rows, the first clock signal includes CK1-CKn, and the second clock signal includes CK1′-CKn′ as an example.
[0086] When CK1′-CK3′ sequentially output the enable level, activating the second sub-pixel P2 of the three rows in turn, display data begins to be output line by line, charging the second sub-pixel P2 of the three rows sequentially, and the image begins to be displayed. When CK1′-CK3′ sequentially output the cutoff level, charging of the second sub-pixel P2 of the three rows stops. However, CK4′ does not immediately output the enable level; instead, CK1′-CK3′ sequentially output the enable level, activating the first sub-pixel P1 of the next three rows to charge the first sub-pixel P1 of the three rows. When CK1′-CK3′ sequentially output the cutoff level, charging of the first sub-pixel P1 of the three rows stops, but CK4′ does not immediately output the enable level; instead, CK4′…
[0087] -CK6′, the progressive output on level, activates the second sub-pixel P2 of the next three rows to charge the second sub-pixel P2 of the next three rows. When CK4′-CK6′, the progressive output off level, stops charging the second sub-pixel P2 of the next three rows. At this time, CK4-CK6′, the progressive output on level, activates the first sub-pixel P1 of the next three rows to charge the first sub-pixel P1 of the next three rows. This process alternates until all sub-pixels in all rows of the display panel 100 are fully charged.
[0088] That is, after outputting the turn-on level of three second clock signals line by line, the turn-on level of three first clock signals is delayed for a certain time before the turn-on level of three second clock signals is output line by line again. After outputting the turn-on level of three first clock signals line by line, the turn-on level of three second clock signals is delayed for a certain time before the turn-on level of three first clock signals is output line by line again. This achieves the alternating output of multiple rows of sub-pixels in the two liquid crystal sub-panels, so that the multiple rows of sub-pixels of the display panel 100 are turned on sequentially. Combined with the grayscale display requirements of the image, the corresponding display data is output to the turned-on sub-pixels, ultimately achieving a high resolution effect.
[0089] Of course, in other embodiments, the output timing of the first clock signal and the second clock signal can be changed accordingly based on the specific values of N and M in each repeating unit, so as to ensure that the multiple rows of sub-pixels of the display panel 100 are turned on sequentially.
[0090] See also Figure 9 , Figure 9 This is a flowchart illustrating a driving method for a display panel according to another embodiment of this application. In one embodiment, the driving method further includes:
[0091] S3: Obtain multiple first feedback electrical parameters corresponding to the first sub-pixel P1 in different regions of the first liquid crystal sub-panel 10, and obtain multiple second feedback electrical parameters corresponding to the second sub-pixel P2 in different regions of the second liquid crystal sub-panel 20.
[0092] S4: In response to the fact that the difference between the first feedback electrical parameter obtained from any area of the first liquid crystal sub-panel 10 and the second feedback electrical parameter obtained from the corresponding area of the second liquid crystal sub-panel 20 does not fall within a preset range, compensation is performed on the display data of the first sub-pixel P1 and / or the second sub-pixel P2 in the area where the difference does not fall within the preset range.
[0093] Specifically, even if two LCD sub-panels have identical internal structures and pixel designs, inconsistencies in in-plane impedance due to manufacturing process tolerances can result in differences in the actual grayscale displayed by the two sub-panels, despite having the same output. Therefore, the following solutions are adopted to address the issue of differences in loading (impedance characteristics) between different LCD sub-panels:
[0094] 1. Before the lamination process, the in-plane loading of different LCD sub-panels is measured, and two LCD sub-panels with similar impedance are selected for lamination to reduce the impact of loading differences.
[0095] 2. Regarding the actual loading after product production, a high-precision detection and automatic compensation scheme can be used. For example, the display area of the dual cell product is divided into three regions: left, center, and right. Then, the first feedback electrical parameters (current, voltage, etc.) of the first sub-pixel P1 in the three regions of the first liquid crystal sub-panel 10 are obtained respectively. For example, the three first feedback electrical parameters are SFB1, SFB2, and SFB3. Similarly, the second feedback electrical parameters (current, voltage, etc.) of the second sub-pixel P2 in the three regions of the second liquid crystal sub-panel 20 are obtained respectively. For example, the three second feedback electrical parameters are MFB1, MFB2, and MFB3. Then, the feedback electrical parameters of the corresponding regions of the two liquid crystal sub-panels are compared, such as comparing MFB1 & SFB1, MFB2 & SFB2, and MFB3 & SFB3. In the comparison, when the difference in feedback electrical parameters of a corresponding area of the two liquid crystal sub-panels is detected to be outside the preset range, the display data of the first sub-pixel P1 and / or the second sub-pixel P2 of the corresponding area of the two liquid crystal sub-panels with the difference outside the preset range is compensated. For example, for the area with a large loading, the display data of the sub-pixel in that area is gradually increased to improve the grayscale brightness, and / or for the area with a small loading, the display data of the sub-pixel in that area is gradually decreased to reduce the grayscale brightness, until the grayscale brightness of the corresponding area of the two liquid crystal sub-panels is consistent, that is, the difference in feedback electrical parameters of the two corresponding areas meets the preset range. This effectively solves the problem of display inconsistency caused by impedance difference after dual cell products are bonded.
[0096] See also Figure 10 , Figure 10 This is a flowchart illustrating a driving method for a display panel according to another embodiment of the present application. In one embodiment, the driving method further includes:
[0097] S5: Determine the refresh rate of display panel 100 in the current display state.
[0098] S6: Compensate the display data of the first sub-pixel P1 and the display data of the second sub-pixel P2 based on the refresh rate.
[0099] Specifically, the charging time of sub-pixels varies under different refresh rate states. After the clock signal CK is turned off, it is maintained by discharging the storage capacitor. However, due to the characteristics of TFT (transistor), the longer the off time, the more leakage current occurs. In the above solution of this application, since the multiple rows of sub-pixels in the two liquid crystal sub-panels are turned on alternately, for example, after the first sub-pixel P1 in a row is turned off, it will be delayed by the turn-on level time of the second clock signal. This may cause the screen to have brightness differences due to leakage current during the delay time.
[0100] Therefore, by conducting prior experiments and storing compensation values for display data corresponding to different refresh rates, the display data of sub-pixels in the two LCD sub-panels can be compensated based on the current refresh rate during actual use of the dualcell product. For example, the longer the delay time, the longer the charging time for the sub-pixels; or, the longer the delay time, the more the output value of the display data is increased, etc., without any limitations.
[0101] Specifically, in the driving method provided in this application, the display data of the first sub-pixel P1 and the second sub-pixel P2 are dynamically compensated according to the refresh rate in the current display state, which can effectively eliminate the uneven brightness caused by the refresh rate change and improve the consistency of the screen display.
[0102] In one embodiment, the driving method further includes:
[0103] Based on the grayscale of the first sub-pixel P1 and the second sub-pixel P2 in the next frame, the display data of the first sub-pixel P1 and the second sub-pixel P2 in the next frame are compensated; where different grayscales correspond to different compensation values.
[0104] Specifically, during the display process, grayscale information of the first sub-pixel P1 and the second sub-pixel P2 is collected in subsequent frames, and the display data is dynamically adjusted based on the collected grayscale of the sub-pixels. For example, optical measurement equipment can be used during the production stage to test the display brightness differences at different grayscale levels and establish a correspondence table between grayscale and compensation values. Alternatively, a compensation algorithm module can be set in the control circuit to call the corresponding compensation value based on the real-time collected grayscale data.
[0105] By acquiring grayscale information from subsequent frames in advance and performing targeted compensation, the uneven brightness caused by differences in display characteristics between factor pixels can be effectively reduced. The design of using differentiated compensation values for different grayscale levels makes the compensation strategy more aligned with actual display needs, ensuring brightness stability in high grayscale areas while avoiding overcompensation in low grayscale areas. This dynamic compensation mechanism can adapt to changes in display characteristics at different refresh rates, and especially in scenarios supporting free synchronization, it can significantly reduce brightness differences caused by refresh rate fluctuations. Simultaneously, through the pre-established grayscale-compensation value correspondence, the image quality consistency of the display panel can be improved without increasing additional hardware costs, thus enhancing the user's visual experience.
[0106] In one embodiment, the second liquid crystal sub-panel 20 is located on the light-emitting side of the first liquid crystal sub-panel 10; compensation is performed on the display data of the first sub-pixel P1 and the second sub-pixel P2 in the next frame, including:
[0107] At the same gray level, the compensation value for the display data of the first sub-pixel P1 is greater than the compensation value for the display data of the second sub-pixel P2.
[0108] Specifically, the second liquid crystal sub-panel 20 is located on the light-emitting side of the first liquid crystal sub-panel 10. The light emitted by the first sub-pixel P1 in the first liquid crystal sub-panel 10 will inevitably be attenuated after passing through the second liquid crystal sub-panel 20. This is reflected in the entire dual-cell product as a difference between the actual display grayscale of the area corresponding to the first sub-pixel P1 and the required output grayscale. Therefore, to address this issue, the driving method provided in this application sets the compensation value for the display data of the first sub-pixel P1 to be greater than the compensation value for the display data of the second sub-pixel P2 under the same grayscale, thereby reducing the display difference on the dual-cell product, making the display transition of multiple rows of sub-pixels smoother, and improving the image detail and visual consistency.
[0109] One approach is to set a fixed grayscale level during the design phase. Then, by measuring the brightness of the actual grayscale level of the lower-level sub-pixels (such as the first sub-pixel P1), the difference between the actual grayscale level and the fixed grayscale level is confirmed. The output is then adjusted until the brightness of the actual grayscale level of the lower-level sub-pixels matches that of the fixed grayscale level. This process is repeated for multiple grayscale binding points such as 31, 64, 127, and 231 to obtain a compensation value correspondence table for multiple grayscale binding points. This compensation value correspondence table is then used to compensate the display data of the lower-level sub-pixels before outputting, thereby improving the grayscale difference.
[0110] See also Figure 11 , Figure 11 This is a schematic diagram of a display device provided in an embodiment of this application.
[0111] This application also provides a display device 1000, which includes a display panel 100 and a control unit 200 provided in any of the above embodiments. The control unit 200 is electrically connected to the display panel 100 and is used to execute the driving method of the display panel 100 described above.
[0112] Specifically, the structural design of the display panel 100 in the display device 1000 provided in this application can effectively reduce the precision requirements of the alignment process of the two liquid crystal sub-panels in the display panel 100, avoiding an exponential increase in alignment difficulty due to high resolution. In addition, the display panel 100 can reduce the number of sub-pixels in a single liquid crystal sub-panel at the same resolution, simplifying the manufacturing process complexity and cost.
[0113] Furthermore, the control unit 200 uses a timing-based alternating control scheme to ensure that the sub-pixels in the two layers of liquid crystal sub-panels are alternately illuminated, thereby enabling multiple rows of sub-pixels in the entire display panel 100 to be illuminated row by row. Impedance matching filtering and dynamic compensation mechanisms solve the problem of uneven display caused by production differences, improving image consistency. Brightness compensation algorithms for different resolution modes improve leakage current effects at low refresh rates, maintaining uniform image brightness. Gray-scale compensation mechanisms eliminate the attenuation effect of lower-layer sub-pixels passing through the upper-layer liquid crystal sub-panel, ensuring color accuracy and display precision.
[0114] The above are merely embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.
Claims
1. A display panel comprising multiple rows of sub-pixels, characterized in that: The display panel includes: The first liquid crystal sub-panel includes multiple rows of first sub-pixels; The second liquid crystal sub-panel is stacked on top of the first liquid crystal sub-panel, and the second liquid crystal sub-panel includes multiple rows of second sub-pixels; In the column direction intersecting the row direction, multiple rows of first sub-pixels and multiple rows of second sub-pixels are alternately arranged; and the multiple rows of first sub-pixels and multiple rows of second sub-pixels constitute the multiple rows of sub-pixels of the display panel.
2. The display panel according to claim 1, characterized in that, The multiple rows of sub-pixels include a first repeating unit composed of N adjacent rows of the first sub-pixels; and a second repeating unit composed of M adjacent rows of the second sub-pixels; Where N is a positive integer greater than or equal to 1 and less than or equal to 10; M is a positive integer greater than or equal to 1 and less than or equal to 10.
3. The display panel according to claim 2, characterized in that, The number of rows of the first sub-pixels in the first repeating unit is the same as the number of rows of the second sub-pixels in the second repeating unit (M rows).
4. A driving method for a display panel, applied to the display panel according to any one of claims 1-3, characterized in that, include: In response to receiving the grayscale of multiple rows of subpixels in the display panel in the next frame; The system outputs a first control timing sequence to control the activation of multiple rows of first sub-pixels within the first liquid crystal sub-panel, and a second control timing sequence to control the activation of multiple rows of second sub-pixels within the second liquid crystal sub-panel, so that the multiple rows of sub-pixels composed of multiple rows of first sub-pixels and multiple rows of second sub-pixels are activated row by row.
5. The driving method according to claim 4, characterized in that, The first control timing includes multiple first clock signals, each first clock signal controlling the on / off state of a row of first sub-pixels; the second control timing includes multiple second clock signals, each second clock signal controlling the on / off state of a row of second sub-pixels. The first control timing sequence for outputting control to enable multiple rows of the first sub-pixels in the first liquid crystal sub-panel, and the second control timing sequence for outputting control to enable multiple rows of the second sub-pixels in the second liquid crystal sub-panel, include: After the second sub-pixel in the row above the first sub-pixel in each row is turned on, N first clock signals are output row by row to control the first sub-pixels in the adjacent N rows in the display panel to be turned on row by row. After the first sub-pixel in the row above the second sub-pixel in each row is turned on, M second clock signals are output row by row to control the M adjacent rows of the second sub-pixel in the second liquid crystal sub-panel to be turned on row by row. Wherein, the turn-on level of the first clock signal and the turn-on level of the second clock signal do not overlap; N is a positive integer greater than or equal to 1; M is a positive integer greater than or equal to 1.
6. The driving method according to claim 4, characterized in that, The method further includes: Obtain multiple first feedback electrical parameters corresponding to the first sub-pixels in different regions of the first liquid crystal sub-panel, and obtain multiple second feedback electrical parameters corresponding to the second sub-pixels in different regions of the second liquid crystal sub-panel; In response to the fact that the difference between the first feedback electrical parameter obtained from any area of the first liquid crystal sub-panel and the second feedback electrical parameter obtained from the corresponding area of the second liquid crystal sub-panel does not fall within a preset range, compensation is performed on the display data of the first sub-pixel and / or the second sub-pixel in the area where the difference does not fall within the preset range.
7. The driving method according to any one of claims 4-6, characterized in that, Also includes: Determine the refresh rate of the display panel in the current display state; The display data of the first sub-pixel and the display data of the second sub-pixel are compensated based on the refresh rate.
8. The driving method according to claim 7, characterized in that, The method further includes: Based on the grayscale of the first sub-pixel and the second sub-pixel in the next frame, the display data of the first sub-pixel and the second sub-pixel in the next frame are compensated; Different gray levels correspond to different compensation values.
9. The driving method according to claim 8, characterized in that, The second liquid crystal sub-panel is located on the light-emitting side of the first liquid crystal sub-panel; The compensation for the display data of the first sub-pixel and the second sub-pixel in the next frame includes: At the same gray level, the compensation value for the display data of the first sub-pixel is greater than the compensation value for the display data of the second sub-pixel.
10. A display device, characterized in that, include: The display panel includes the display panel described in any one of claims 1-3; A control unit is electrically connected to the display panel, and the control unit is used to execute the driving method of the display panel according to any one of claims 4-9.