Hash chip-based state detection method and system, computer device, and medium

Abstract

The application relates to a computing power chip-based state detection method and system, a computer device and a medium. The method comprises the following steps: obtaining multi-dimensional hardware feature data of a computing power chip to construct a standardized time sequence data set; learning the standardized time sequence data set based on deep learning and physical constraint conditions of the hardware feature data to construct a health assessment model, and selecting target sample data to generate a health benchmark time sequence; obtaining a to-be-detected data sequence, extracting statistical features, and performing sequence reconstruction on the statistical features and the health benchmark time sequence based on a multi-modal self-encoder to obtain a reconstructed sequence; determining a health state deviation degree of the computing power chip based on the reconstructed sequence and the to-be-detected data sequence, and determining the current health state of the computing power chip. The application can realize system-level aging modeling and detection evaluation of the whole life cycle of the computing power chip, accurately learn the health mode of the computing power chip, and significantly improve the accuracy and precision of the aging state detection.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of artificial intelligence, and particularly relates to a state detection method and system based on a computing chip, a computer device and a medium. BACKGROUND

[0002] With the rapid development of high-performance computing and artificial intelligence, high-performance computing chips (such as GPUs) are widely used in data centers, intelligent computing centers, intelligent terminals and other fields. The performance and reliability of the chip are directly related to the overall efficiency of the system, and the chip is prone to aging in long-time operation or in harsh environments, resulting in performance degradation or even failure. Generally, hardware aging detection relies on simulation methods and destructive stress testing under extreme conditions. However, such methods are very time-consuming and costly, and are difficult to apply to large-scale data center scenarios.

[0003] At present, the existing system-level solutions mainly focus on the design of a single algorithm, such as temperature, power consumption or ECC (Error-Correcting Code, error-correcting code) memory error. These methods mainly focus on chip reliability, i.e., the prediction of hardware failure. Although there are system-level fault modeling methods in the prior art, the specific architecture information of the chip needs to be known, and the fault types are numerous and difficult to model completely, so the generalization of this method is poor, and only the real-time possible fault state of a single device is concerned, and the long-term chip full-life cycle state is not modeled.

[0004] It can be seen that in the prior art, the state detection of high-performance computing chips cannot realize chip full-life cycle state evaluation, and the detection method is single, resulting in low detection accuracy. Therefore, there is an urgent need to provide a scheme that can accurately detect the aging state of the chip and realize full-life cycle evaluation. SUMMARY

[0005] The present application provides a state detection method and system based on a computing chip, a computer device and a medium to solve the problem that the state detection of high-performance computing chips in the prior art cannot realize chip full-life cycle state evaluation, and the detection method is single, resulting in low detection accuracy.

[0006] According to an aspect of the embodiments of the present application, the present application provides a computing power chip-based state detection method, which comprises: obtaining multi-dimensional hardware feature data of a computing power chip under different test environments to construct a standardized time series data set; learning the standardized time series data set based on deep learning and physical constraint conditions of the hardware feature data to construct a health assessment model, selecting target sample data based on the health assessment model to generate a health benchmark time series of the computing power chip; obtaining a current to-be-detected data sequence of the computing power chip, extracting statistical features of the to-be-detected data sequence, and reconstructing the sequence based on the statistical features and the health benchmark time series through a multi-modal autoencoder to obtain a reconstructed sequence; determining a current health state deviation of the computing power chip based on the reconstructed sequence and the to-be-detected data sequence, and determining a current health state of the computing power chip based on the health state deviation.

[0007] Optionally, the obtaining of the multi-dimensional hardware feature data of the computing power chip under different test environments to construct a standardized time series data set comprises: obtaining multi-dimensional hardware feature data of the computing power chip in a preset time period under different test environments, wherein the multi-dimensional hardware feature data comprises computing unit features, storage unit features, power supply system features and thermodynamic features of the computing power chip; performing feature engineering processing on the computing unit features, the storage unit features, the power supply system features and the thermodynamic features of the computing power chip based on a preset time window size and a sliding step to construct the standardized time series data set.

[0008] Optionally, the learning of the standardized time series data set based on deep learning and physical constraint conditions of the hardware feature data to construct a health assessment model, and the selection of target sample data based on the health assessment model to generate a health benchmark time series of the computing power chip comprise: performing health pattern recognition on each standardized hardware feature time series under different test environments in the standardized time series data set through a clustering algorithm; fitting the physical constraint conditions corresponding to the hardware feature data based on the obtained hardware feature data, wherein the physical constraint conditions comprise physical relationship equations between the hardware feature data; constructing a multi-objective optimization target of a loss function in the health assessment model based on the physical relationship equations between the hardware feature data; constructing the health assessment model based on the health pattern recognition of the computing power chip and the loss function; and selecting the target sample data based on the health assessment model to generate the health benchmark time series of the computing power chip.

[0009] Optionally, the selecting the target sample data based on the health assessment model to generate the health benchmark time sequence of the computing power chip comprises: based on the health assessment model, obtaining first sample data satisfying a preset sample selection condition from a clustering result of a health mode, and performing priority sorting on a result of multi-objective optimization to filter out second sample data with the highest priority; taking the first sample data and the second sample data as the target sample data, and updating a benchmark memory pool according to the target sample data; based on a generative adversarial network, generating the health benchmark time sequence of the computing power chip according to data in the updated benchmark memory pool.

[0010] Optionally, the obtaining the current to-be-detected data sequence of the computing power chip, extracting statistical features of the to-be-detected data sequence, and performing sequence reconstruction based on the statistical features and the health benchmark time sequence by the multi-modal autoencoder to obtain a reconstructed sequence comprises: obtaining the to-be-detected data sequence under a current workload of the computing power chip, and extracting the statistical features from the to-be-detected data sequence, wherein the statistical features include time domain features and frequency domain features; performing feature fusion on the health benchmark time sequence, the time domain features, and the frequency domain features to obtain a multi-modal input vector; training the multi-modal autoencoder based on the multi-modal input vector, and performing time sequence reconstruction by a decoding end of the multi-modal autoencoder to obtain the reconstructed sequence.

[0011] Optionally, the determining the current health state deviation of the computing power chip based on the reconstructed sequence and the to-be-detected data sequence, and determining the current health state of the computing power chip based on the health state deviation comprises: based on the trained multi-modal autoencoder, calculating the current health state deviation of the computing power chip according to the reconstructed sequence and the to-be-detected data sequence; if the health state deviation exceeds a preset deviation threshold, determining that the current health state of the computing power chip is abnormal.

[0012] Optionally, after the determining the current health state deviation of the computing power chip based on the reconstructed sequence and the to-be-detected data sequence, and determining the current health state of the computing power chip based on the health state deviation, the method further comprises: calculating a health score based on the current health state deviation of the computing power chip and a preset health state deviation reference value; determining a warning level corresponding to the current state of the computing power chip according to the current health score of the computing power chip, a change speed of the health score relative to a historical health score of the computing power chip, and continuity of the health score; generating health warning information corresponding to an abnormal state of the computing power chip based on the warning level, and updating the historical health score of the computing power chip according to the health score.

[0013] According to another aspect of the embodiments of the present application, the present application provides a computing power chip-based state detection system, which comprises: a data acquisition module configured to acquire multi-dimensional hardware feature data of a computing power chip under different test environments to construct a standardized time series data set; a sequence generation module configured to learn the standardized time series data set based on deep learning and physical constraint conditions of the hardware feature data to construct a health assessment model, select target sample data based on the health assessment model to generate a health benchmark time series of the computing power chip; a sequence reconstruction module configured to acquire a current to-be-detected data sequence of the computing power chip, extract statistical features of the to-be-detected data sequence, and perform sequence reconstruction based on the statistical features and the health benchmark time series through a multi-modal autoencoder to obtain a reconstructed sequence; and a state assessment module configured to determine a health state deviation degree of the computing power chip based on the reconstructed sequence and the to-be-detected data sequence, and determine a current health state of the computing power chip based on the health state deviation degree.

[0014] According to another aspect of the embodiments of the present application, the present application provides a computer device, which comprises a processor, a memory and a network interface, the memory stores machine readable instructions executable by the processor, when the computer device is running, the processor and the memory communicate through the network interface, the processor executes the machine readable instructions to perform the steps of the computing power chip-based state detection method as described above.

[0015] According to another aspect of the embodiments of the present application, the present application provides a computer readable medium having non-volatile program codes executable by a processor, the program codes cause the processor to perform the steps of the computing power chip-based state detection method.

[0016] The above technical solutions provided by the embodiments of the present application have the following advantages compared with related art:

[0017] The application provides a computing power chip-based state detection method. By constructing a three-layer architecture system of standardized data acquisition-health mode modeling-health state dynamic evaluation, a chip full life cycle aging monitoring system is constructed, which can realize system-level aging modeling and detection evaluation of the computing power chip in the full life cycle. By obtaining multi-dimensional hardware feature data of the computing power chip in different test environments as data support, the accuracy and comprehensiveness of modeling can be improved. Based on deep learning, data learning is performed according to the standardized time series data set to model, which can accurately learn the health mode of the computing power chip under different experimental environments and workloads, significantly improve the accuracy and precision of the computing power chip aging state detection, and increase the physical constraint condition of the hardware feature data in the modeling process, which can ensure that not only a single feature is abnormal, but also multiple related features are abnormal, which is beneficial to improve the detection precision. By using a multi-modal autoencoder to extract statistical features of the to-be-detected data sequence, combining the health benchmark time sequence to reconstruct the sequence, and calculating the current health state deviation of the computing power chip to analyze the health state, the current health state of the computing power chip can be accurately analyzed, and the health degree evaluation in the full life cycle can be provided. BRIEF DESCRIPTION OF DRAWINGS

[0018] The accompanying drawings, which are incorporated into and form part of the specification, illustrate embodiments consistent with the present application and, together with the specification, serve to explain the principles of the application.

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the application or the related art, the accompanying drawings needed to be used in the embodiment or related art description will be briefly introduced. Obviously, for those skilled in the art, other drawings can also be obtained without creative labor based on these drawings.

[0020] Figure 1 An optional hardware environment architecture diagram is provided according to the embodiments of the application.

[0021] Figure 2 An optional flowchart of a computing power chip-based state detection method is provided according to the embodiments of the application.

[0022] Figure 3 An optional data interaction diagram is provided according to the embodiments of the application.

[0023] Figure 4 Another optional flowchart of a computing power chip-based state detection method is provided according to the embodiments of the application.

[0024] Figure 5 Another optional flowchart of a computing power chip-based state detection method is provided according to the embodiments of the application.

[0025] Figure 6 An optional state detection system module based on a computing power chip according to an embodiment of the present application is shown in a schematic diagram.

[0026] Figure 7 An optional computer device structure according to an embodiment of the present application is shown in a schematic diagram. DETAILED DESCRIPTION

[0027] To make the objectives, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described below in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the scope of protection of the present application.

[0028] In order to solve the problems mentioned in the background, according to an aspect of an embodiment of the present application, an embodiment of a state detection method based on a computing power chip is provided.

[0029] As shown in Figure 1 , the above-mentioned state detection method based on a computing power chip can be applied to a hardware environment as shown in Figure 1 . The system architecture 100 of the hardware environment includes a terminal device 101 and a server 103. The server 103 is connected with the terminal 101 through a network, and can be used to provide services for the terminal device 101 or a client installed on the terminal device 101. A database 105 can be set on the server 103 or independently of the server 103, and is used to provide data storage services for the server 103. The network can include various connection types, such as wired, wireless communication links or optical fiber cables, etc.

[0030] Users can use terminal device 101 to interact with server 103 via a network to receive or send messages. Various communication client applications can be installed on terminal device 101, such as web browsers, search applications, and instant messaging tools. Terminal device 101 can be various electronic devices with a display screen that support web browsing, including but not limited to smartphones, tablets, e-book readers, MP3 players (Moving Picture Experts Group Audio Layer III), MP4 players (Moving Picture Experts Group Audio Layer IV), laptops, and desktop computers. Server 103 can be a server providing various services, such as a backend server supporting the pages displayed on terminal device 101.

[0031] It should be noted that the state detection method based on computing power chips provided in this application is generally executed by a server and / or terminal device, and correspondingly, the state detection system based on computing power chips is generally set in the server / terminal device. Furthermore, it should be understood that... Figure 1 The number of terminal devices, networks, and servers shown is merely illustrative. Depending on implementation needs, any number of terminal devices, networks, and servers can be included.

[0032] like Figure 2 As shown, Figure 2 A flowchart illustrating a state detection method based on a computing chip provided in an embodiment of the present invention. Taking the execution of the state detection method based on a computing chip by a server as an example, the state detection method based on a computing chip includes the following steps:

[0033] Step S202: Obtain multi-dimensional hardware feature data of the computing chip under different test environments to construct a standardized time series dataset.

[0034] In this embodiment, the state detection method based on computing power chips can be applied to the health monitoring of single nodes and / or clusters of large-scale high-performance computing power chips. Its testing environment includes high-performance computing, data centers, cloud computing, etc., demonstrating strong versatility. The aforementioned computing power chips can refer to high-performance computing chips, which are integrated circuits specifically designed for handling complex computing tasks. They possess characteristics such as high computing power density, low latency, and high energy efficiency, and are widely used in fields such as artificial intelligence, scientific computing, data centers, autonomous driving, and edge computing.

[0035] In this embodiment, the computing power chip includes a GPU, and a Benchmark test is periodically run on each terminal device running the high-performance computing power chip. The Benchmark test can be a standard operator calculation, such as a maxflops calculation, a video memory access, a transmission between a CPU and a GPU, an AI use case calculation, or a test case specially designed to stimulate the aging characteristics of the high-performance computing power chip. The above-mentioned multi-dimensional hardware feature data can refer to the feature data of each hardware of the computing power chip in different dimensions, including but not limited to the hardware feature data of the power consumption, temperature, voltage, frequency, etc. of the chip. The multi-dimensional hardware feature data collected in each test environment can be pre-processed and expressed based on a vector, and each data has a time characteristic, so as to construct a standardized time series data set based on the corresponding vectors in different test environments.

[0036] In step S204, the standardized time series data set is learned based on deep learning and a physical constraint condition of the hardware feature data to construct a health assessment model, and a target sample data is selected based on the health assessment model to generate a health benchmark time series of the computing power chip.

[0037] In this embodiment, the physical constraint condition of the hardware feature data can refer to a physical relationship equation between the hardware feature data in the same test environment, including but not limited to a voltage-frequency relationship, a temperature-power consumption-fan relationship, a power consumption-frequency relationship, etc. The physical relationship equation between the hardware feature data is a relationship between the features fitted according to a simplified physical model, which can introduce a physical law model as a constraint condition into a neural network training process, realize multi-objective optimization, and ensure feature space consistency, so as to ensure that only a single feature is abnormal, but a collaborative abnormality of multiple related features occurs.

[0038] In this embodiment, the essence of deep learning is feature representation learning, which has the ability to automatically extract features. The extracted features are also called deep features or deep feature representations, which have stronger and more robust representation capabilities. The deep learning algorithm includes an autoencoder, an LSTM algorithm, an autoencoder based on LSTM, etc. For example, the LSTM algorithm is used to train and learn based on the standardized time series data set, and the physical constraint condition of the hardware feature data is used as a constraint, so as to learn the health mode of the high-performance computing power chip in different test environments, and construct a health assessment model.

[0039] In this embodiment, the target sample data can refer to data extracted from the standardized time series data set and meeting preset data screening conditions to construct the health benchmark time series of the computing chip, for example, data in a period of time in a historical state where the standard is healthy, data with the lowest voltage and the highest power in the case of consistent frequency, data that maintains a stable state in a continuous period of time when the chip is running normally, and the like. The stable state in the continuous period of time can be determined based on the variance of the data in the period of time, for example, if the variance is less than a preset variance threshold, the data can be taken as the target sample data.

[0040] Further, after the target sample data is screened out, the health benchmark time series of the computing chip is generated based on the target sample data, high-quality data can be screened out, and it is ensured that the benchmark time series reflects the real health state of the chip, for example, in temperature monitoring of the chip, abnormal high-temperature data points caused by environmental interference are eliminated, and model misjudgment is avoided. The benchmark sequence is generated based on the screened data, and the influence of short-term fluctuations on long-term trends can be reduced.

[0041] In step S206, the current to-be-detected data sequence of the computing chip is obtained, the statistical features of the to-be-detected data sequence are extracted, the sequence reconstruction is performed on the statistical features and the health benchmark time series based on the multi-modal autoencoder, and the reconstructed sequence is obtained.

[0042] In this embodiment, the to-be-detected data sequence can be constructed based on the time characteristics of the obtained to-be-detected data by real-time reading of the to-be-detected data of the computing chip in the test environment, wherein the to-be-detected data includes hardware feature data of each dimension of the computing chip. The statistical features can be extracted after data analysis on the plurality of to-be-detected data sequences, and then the statistical features and the health benchmark time series can be reconstructed by the multi-modal autoencoder to generate a new reconstructed sequence. The multi-modal autoencoder can be a bidirectional LSTM-based autoencoder, which can learn the latent representation of the multi-modal input vector.

[0043] In step S208, the health state deviation of the computing chip is determined based on the reconstructed sequence and the to-be-detected data sequence, and the health state of the computing chip is determined based on the health state deviation.

[0044] In the embodiment, the reconstruction error between the reconstructed sequence and the to-be-detected data sequence can be calculated based on the multi-modal autoencoder, and the current health state deviation of the computing power chip can be calculated according to the reconstruction error. The current health state of the computing power chip can be determined according to the size of the health state deviation, the continuous state of the health degree, and the like. The reconstruction sequence and the to-be-detected data sequence are sequences with time sequence, so when calculating, the data of the same dimension corresponding to the same time can be calculated as the time reference. The size of the deviation can be represented by the mean value of the health state deviation in the continuous time, and the continuous state of the health degree can be represented by the change of the health state deviation in the continuous time period.

[0045] In some examples, the health state of the computing power chip can include normal mode, mild aging, moderate aging, and severe aging. Of course, the health state can be divided into more levels, which are not listed here. Different division standards can be used for different health states, including division according to the size and / or duration of the health state deviation, for example, the health state deviation exceeds a certain threshold, and continuously decreases in a continuous time period, which is determined as mild aging.

[0046] In the embodiment, by constructing a three-layer architecture system of standardized data acquisition-health mode modeling-health state dynamic evaluation, a chip full life cycle aging monitoring system is constructed, which can realize system-level aging modeling and detection evaluation of the computing power chip in the full life cycle. By obtaining multi-dimensional hardware feature data of the computing power chip in different test environments as data support, the accuracy and comprehensiveness of modeling can be improved. Based on deep learning, data learning is performed on the standardized time series data set to model, which can accurately learn the health mode of the computing power chip under different experimental environments and workloads, significantly improve the accuracy and precision of the aging state detection of the computing power chip, and increase the physical constraint condition of the hardware feature data in the modeling process, which can ensure that not only a single feature is abnormal, but also multiple related features are abnormal, which is beneficial to improve the detection accuracy. By using the multi-modal autoencoder to extract statistical features of the to-be-detected data sequence, combining the health benchmark time sequence to reconstruct the sequence, and calculating the current health state deviation of the computing power chip for health state analysis, the current health state of the computing power chip can be accurately analyzed, and the health degree evaluation in the full life cycle can be provided.

[0047] In some optional embodiments, the step S202 specifically includes:

[0048] S2021, obtaining multi-dimensional hardware feature data of the computing power chip in a preset time period in different test environments, the multi-dimensional hardware feature data including computing unit features, storage unit features, power supply system features, and thermodynamic features of the computing power chip.

[0049] S2022, perform feature engineering processing on the computing unit features, storage unit features, power supply system features, and thermodynamic features of the computing power chip based on the preset time window size and sliding step, to construct the standardized time series dataset.

[0050] In the embodiment, the hardware feature data of the computing power chip in different test environments in a preset time period is collected, and the collected data is processed through feature engineering to standardize the data. Figure 3 As shown in the figure, the hardware feature data collected can include but is not limited to computing unit features in the computing unit, storage unit features on the storage unit, power supply system features in the power supply system, and thermodynamic features. The computing unit features include Tensor core utilization rate, graphic frequency, GFLOPS (floating point number calculation per second), etc.; the storage unit features include video memory utilization rate, frequency, bandwidth, etc.; the power supply system features include transient voltage, voltage fluctuation variance, etc., and the calculation formula of the voltage fluctuation variance is the variance of the feature value of each unit time step in a time window; the thermodynamic features include transient temperature, power consumption, transient overshoot area, dynamic energy efficiency ratio, etc., wherein the transient overshoot area can refer to the integral area exceeding the average value in a time window, and the dynamic energy efficiency ratio can be the ratio of floating point number calculation per unit time to power (GFLOPS / W).

[0051] Further, the time window size and sliding step can be preset, for example, the time window is 100 and the sliding step is 5, and the collected computing unit features, storage unit features, power supply system features, and thermodynamic features are processed through feature engineering, wherein the feature engineering processing includes low-pass filtering smoothing processing and standardization to eliminate high-frequency noise and dimension difference, including data cleaning, feature selection, feature transformation (normalization / standardization), feature combination, time series features, etc.

[0052] Further, the data processed through feature engineering can be output in the form of a matrix NXM to obtain a standardized time series dataset, wherein N represents the total number of gpu nodes, each node corresponds to an independent gpu; M is the number of time windows, each time window contains a standardized feature sequence. Each node feature sequence in the standardized time series dataset can be represented as Si={xi,1,xi,2,...,xi,k}, xi represents the i-th feature value, 1……k represents the length of the feature sequence, i.e. the number of features of each node. In this way, a clear and compact data structure foundation is laid for subsequent modeling analysis.

[0053] In some examples, in combination with Figure 3 As shown, the collected data can be stored in a database of a cloud server in real time or independently of the database of the cloud server for subsequent analysis.

[0054] In this embodiment, by collecting hardware feature data in multiple dimensions, the data diversity can be improved, the standardized data processing is carried out based on feature engineering, and the standardized time series data set is converted, so as to realize systematic feature combination, which is beneficial to provide more accurate health assessment data basis, analyze the hidden mutual relationship, and provide more accurate data for health pattern recognition and modeling.

[0055] In some optional embodiments, the above step S204 specifically comprises:

[0056] S2041, performing health pattern recognition on each standardized hardware feature time series under different test environments in the standardized time series data set through a clustering algorithm;

[0057] S2042, based on the obtained hardware feature data, fitting the physical constraint condition corresponding to the hardware feature data, the physical constraint condition including a physical relationship equation between each hardware feature data;

[0058] S2043, based on the physical relationship equation between each hardware feature data, constructing an optimization target of a loss function in the health assessment model for multi-objective optimization;

[0059] S2044, based on the health pattern recognition of the algorithm power chip and the loss function, constructing the health assessment model;

[0060] S2045, selecting the target sample data based on the health assessment model to generate the health benchmark time series of the algorithm power chip.

[0061] In this embodiment, the health patterns of the standardized hardware feature time series of each node in different test environments in the standardized time series data set can be identified by a clustering algorithm. The clustering algorithm includes K-Means algorithm, kmeans++ algorithm, DBSCAN algorithm, etc. When clustering the time series, the similarity between samples can be calculated by distance measurement (such as Euclidean distance, cosine similarity) or dynamic time warping (DTW). In this embodiment, DTW is used to calculate the distance between time series because it is suitable for dynamic alignment of time series. For the clustering center, the DBA (Bottleneck Attention Module) algorithm can be used. Through clustering, samples with high similarity can be classified into a class, so that the distance between samples in the class is minimized and the distance between samples in different classes is maximized, thereby achieving classification.

[0062] In some examples, the classification rules of the health patterns can be preset, for example, normal mode: stable temperature, small power fluctuation, smooth signal waveform; mild aging: slightly rising temperature, increased power fluctuation, and slight glitch in signal waveform; severe aging: significantly rising temperature, severe power fluctuation, and serious distortion of signal waveform. The threshold value can be set as the standard for data comparison and judgment, and the threshold value can be obtained based on comprehensive analysis of historical data, for example, the threshold value of temperature can be determined according to the mean, mode, etc. of the historical temperature data in the past 1 month.

[0063] Further, when clustering, the health patterns corresponding to the standardized hardware feature time series of each node can be obtained by comparing the preset classification rules of the health patterns and the clustering output, that is, the clustering result of the health patterns of the computing power chip is obtained. For example, the sample with the closest distance to “stable temperature and small power fluctuation” belongs to the normal mode, and the sample similar to “slightly rising temperature and increased power fluctuation” belongs to the mild aging, wherein the similarity can be compared by setting a limit value, and if it is less than the limit value, it is considered to be similar.

[0064] In some examples, after obtaining each hardware feature data, the physical relationship fitting of each hardware feature data can be performed to construct a physical constraint condition. The construction of the physical constraint condition includes:

[0065] The physical relationship equation between voltage and frequency: v = a * f + b, which can be linearly regressed and fitted by the historical data set (f, V), wherein V represents voltage and f represents frequency, and then the parameters a and b can be calculated, and the regular term in the loss function in the health assessment model can be constructed based on the parameters a and b, as shown in the following formula (1):

[0066] (1)

[0067] wherein, L volt represents a regular term of voltage-frequency, N represents a sample amount of a collected data set, V i pred represents a predicted voltage of the i th sample, f i represents a frequency of the i th sample, a represents a degree of influence of frequency on voltage, b represents a shift amount of frequency.

[0068] a physical relationship equation between power consumption and frequency: P = a ∙ C ∙ V 2 ∙ f, since frequency and voltage are approximately linear, the physical relationship equation between power consumption and frequency is: P = k ∙ f 3 +b, the parameters k, b are fitted, and thus a regular term in a loss function based on the physical relationship equation between power consumption and frequency is constructed as shown in the following equation (2):

[0069] (2)

[0070] wherein, L power represents a regular term of power consumption-frequency, N represents a sample amount of a collected data set, P i pred represents a predicted power consumption of the i th sample, f i represents a frequency of the i th sample, k represents a degree of influence of frequency on power consumption, b represents a shift amount of frequency.

[0071] a physical relationship equation between temperature-power consumption-fan is shown in the following equation (3):

[0072] (3)

[0073] wherein, T represents a temperature of a chip, T env represents an ambient temperature, P represents power consumption, C fan represents a heat dissipation coefficient of a fan, F represents a square root of fan speed, epsilon represents an error term or a noise term.

[0074] To perform parameter fitting on equation (3), we first transform equation (3) into a linear form, as shown in equations (4) and (5) below:

[0075] (4)

[0076] (5)

[0077] Furthermore, C can be quickly solved using the (P,F,T) triplet and ambient temperature. fan The parameters are further constructed based on the physical relationship equation between temperature, power consumption, and fan, and the regularization term of the loss function in the health assessment model is shown in the following equation (6):

[0078] (6)

[0079] in, L temp The regularization term represents the temperature-power-fan ratio. N This indicates the sample size of the collected dataset. T i pred Indicates the first i Predicted temperature for each sample.

[0080] In summary, the regularization term of the loss function constructed based on the various physical relationship equations, and the final loss function is composed of the standard loss and the physical loss, as shown in equation (7) below:

[0081] (7)

[0082] Among them, the final constructed loss function, when performing multi-objective optimization, represents the loss of the main task. L main The magnitude is 1, determined by the typical data size of each physical regularization term, and the three parameters λ1, λ2, and λ3 are 0.001, 0.003, and 0.02, respectively.

[0083] Furthermore, combined Figure 4 As shown, a health assessment model is constructed based on the health pattern recognition and loss function of the computing chip. Then, target sample data is selected through the health pattern assessment model to generate the health benchmark time series of the computing chip.

[0084] In the embodiment, in the modeling process, the health patterns of the high-performance computing chip are accurately established by identifying the health patterns of the standardized hardware feature time series under different test environments in the standardized time series data set through the clustering algorithm; and in the modeling process, the physical constraint condition is added to the loss function of the health evaluation model based on the hardware feature data, which can be used to prevent model overfitting, and the physical constraint condition of the hardware feature data can ensure that not only a single feature is abnormal, but also multiple related features are abnormal when the chip is abnormal, and the multiple related features can be analyzed by a support vector machine (SVM).

[0085] In some optional embodiments, the step S2045 specifically includes:

[0086] Based on the health evaluation model, first sample data meeting a preset sample selection condition are obtained from the clustering results of the health patterns, and the results of the multi-objective optimization are prioritized to filter out second sample data with the highest priority;

[0087] The first sample data and the second sample data are used as the target sample data, and the reference memory pool is updated according to the target sample data;

[0088] Based on the generative adversarial network, the health reference time series of the computing chip are generated according to the data in the updated basic memory pool.

[0089] In the embodiment, as shown in Figure 5 The state detection method based on the computing chip provided in the embodiment periodically generates new references by running the existing collected data or part of the data. All the data are stored in a reference memory pool, the reference memory pool has a fixed capacity priority queue, and the reference memory pool can be a dynamic reference memory pool, that is, the memory pool data can be updated periodically. The reference memory pool can be located in the cloud.

[0090] In some examples, the data sources in the reference memory pool can include: first sample data meeting a preset sample selection condition are obtained from the clustering results of the health patterns, and the results of the multi-objective optimization are prioritized to filter out second sample data with the highest priority. The preset sample selection condition can include, but is not limited to, a health pattern being a normal pattern, a normal pattern and a stable state maintained for a continuous time, a sample close to the DBA center after clustering, and the like, for example, a DTW distance deltaThe sample satisfying the preset sample selection condition can be used as the first sample data. In the result of the multi-objective optimization, multiple optimized results are included. Therefore, the results of the multi-objective optimization can be prioritized, and the optimized result with the highest priority, i.e., the first in the same dimension, is selected as the second sample data. For example, in the case of consistent frequency, the sample with the lowest voltage and the highest power is found, and the optimal order is sorted from high to low power. For example, in the case of consistent frequency, based on the result A: voltage 20V, power = 100W; solution B: voltage 25V, power = 120W; solution C: voltage 15V, power = 100W obtained by the multi-objective optimization pareto front method, the second sample data selected is the data of solution B and solution C.

[0091] In some examples, the target sample data can also be selected according to the historical data in the reference memory pool, including the period in the historical state marked as healthy, for example, the health score is higher than a certain limit value. It also includes a time series with a reconstruction error lower than a certain set reconstruction error value, for example, the reconstruction error is lower than 95% of the historical threshold. By selecting data that meets certain conditions from the historical data in the reference memory pool as the target sample data, the selection range of the data can be guaranteed, and the accuracy and representativeness of the selected data can be guaranteed.

[0092] In some examples, the reference memory pool can be updated based on the target sample data selected by the multi-objective optimization, and the updated reference memory pool can be used to generate the health reference time series of the algorithm chip. Figure 5 As shown in FIG. 8, for the data in the reference memory pool, an elimination mechanism can be set, including: a sequence is marked as abnormal or serious deviation, and is removed; using the memory pool data score, for example, the data with a score lower than a set threshold is eliminated according to the ranking of the reconstruction error in the current model.

[0093] Further, based on the selected target sample data, the reference memory pool can be updated to obtain the latest reference memory pool data, and the optimality and high quality of the reference memory pool data can be guaranteed. Then, the data in the updated reference memory pool is used for reconstruction to generate the health reference time series of the algorithm chip.

[0094] In some examples, the reference memory pool can be updated based on the target sample data selected by the multi-objective optimization, and the updated reference memory pool can be used to generate the health reference time series of the algorithm chip. Figures 4-5As shown, the health benchmark time sequence can be generated by a GAN network (generative adversarial network), and the updated data in the benchmark memory pool is used as a training set. In the GAN network, the input is usually composed of multiple parts to guide the generator to generate an output meeting specific requirements or characteristics. The input of the GAN network can be statistical features + noise + mode labels (such as "memory intensive state"). The generator is allowed to generate a sequence that is consistent with the real benchmark in terms of structure (DTW sense), where the structure can refer to a sequence that is consistent with the real benchmark in the sense of DTW (Dynamic Time Warping). The discriminator in the GAN network is used to determine whether the sequence comes from the real benchmark memory pool. By inputting the real data and the data generated by the generator into the discriminator, the discriminator evaluates each data sample and outputs a probability value indicating the likelihood that the sample is real data. The GAN network generates a "virtual ideal benchmark curve" so that the output is fused with the real benchmark. The generated reference sequence + DBA (DTW Barycenter Averaging) center average is used as a discrimination standard, aiming to evaluate the generation quality by combining the diversity and representativeness of the generated samples. In the GAN network, the mode label is used to train multiple GANs for each cluster center to match different working states.

[0095] In this embodiment, the target sample data is filtered by combining the clustering results and the results of multi-objective optimization to update the data in the benchmark memory pool, so as to ensure the real-time and pertinence of the data in the benchmark memory pool, and to construct a more accurate health benchmark time sequence. The health benchmark time sequence is generated by training the GAN network, which can automatically learn and simulate the internal distribution and characteristics of complex data, thereby generating a health benchmark time sequence that meets the actual data rules and has ideal characteristics.

[0096] In some optional embodiments, the above step S206 specifically includes:

[0097] S2061, obtaining the to-be-detected data sequence under the current workload of the computing chip, and extracting the statistical features from the to-be-detected data sequence, wherein the statistical features include time domain features and frequency domain features;

[0098] S2062, performing feature fusion on the health benchmark time sequence, the time domain features, and the frequency domain features to obtain a multi-modal input vector;

[0099] S2063, training the multi-modal autoencoder based on the multi-modal input vector, and performing time sequence reconstruction through the decoding end of the multi-modal autoencoder to obtain the reconstructed sequence.

[0100] In the embodiment, after the computing power chip is monitored in real time to obtain the to-be-detected data sequence of the computing power chip under the current workload in real time, statistical features can be extracted, including time domain features and frequency domain features. The time domain features can include but are not limited to signal waveform, transient response, timing parameter, delay time, etc. The frequency domain features can include but are not limited to spectral distribution, bandwidth, harmonic distortion, noise characteristics, etc.

[0101] Further, the health benchmark time sequence is combined with the time domain features and the frequency domain features to form a multi-modal input vector, the potential representation of the time sequence is learned by a multi-modal autoencoder based on a bidirectional LSTM, and then the time sequence is reconstructed from the decoding end of the multi-modal autoencoder based on the bidirectional LSTM to output a reconstructed sequence.

[0102] In the embodiment, the state of the computing power chip is monitored in real time to extract statistical features from the to-be-detected data sequence, and a multi-modal input vector is constructed in combination with the health benchmark time sequence. Data fusion under each mode can supplement missing information and improve the quality of the reconstructed sequence. The multi-modal autoencoder is trained to realize time sequence reconstruction. The multi-modal autoencoder can learn the joint representation of these modes at the same time, and make up for the limitations of a single mode.

[0103] In some optional embodiments, the above step S208 specifically includes:

[0104] S2081, calculating the health state deviation degree of the computing power chip according to the reconstructed sequence and the to-be-detected data sequence based on the trained multi-modal autoencoder;

[0105] S2082, if the health state deviation degree exceeds a preset deviation threshold, determining that the current health state of the computing power chip is abnormal.

[0106] In the embodiment, after the time sequence is reconstructed by the decoding end of the trained multi-modal autoencoder to obtain a reconstructed sequence, the reconstructed sequence and the to-be-detected data sequence are used to calculate a reconstruction error, and the reconstruction error is used as the health state deviation degree of the computing power chip. In the embodiment, the reconstruction error is illustrated by a mean square error, which is shown in the following formula (8):

[0107] (8)

[0108] wherein, T is the number of samples, d represents the dimension of data, i.e., each sample x t is a d dimensional vector; x t represents the firstt a sample; x^ t a reconstructed output representing a sample in the reconstructed sequence. t a reconstructed output representing a sample in the reconstructed sequence.

[0109] The mean square error is calculated based on the above formula (8) as the health state deviation, and then the health state deviation can be compared with the preset deviation threshold, and the current health state of the computing power chip is determined according to the comparison result. If it exceeds the preset deviation threshold, it is considered that the computing power chip is in an abnormal state, wherein the abnormal state can include a serious aging degree and / or a chip abnormality, for example, in a severe aging. The degree of exceeding the threshold determines the degree of the health state, and the greater the distance exceeds, the worse the health state. The preset deviation threshold is based on the data distribution state of the historical behavior / benchmark behavior, and the historical feature distribution is modeled by using the percentile method. As a possible way, the historical state distribution exceeding 95% of the node can be considered abnormal.

[0110] In the embodiment, by calculating the health state deviation and combining the preset deviation threshold to determine the health state, the deviation degree of the current state of the computing power chip from the normal mode can be quantified. When the health state deviation exceeds the preset deviation threshold, it indicates that the system operation deviates from the expected mode, and there may be potential faults or performance degradation, which is beneficial to timely identify the aging and abnormal state of the high-performance computing power chip and provide real-time health warning.

[0111] In some optional embodiments, after the above step S208, the method further includes:

[0112] S210, calculating a health score based on the current health state deviation of the computing power chip and a preset health state deviation reference value;

[0113] S212, and determining a warning level corresponding to the current state of the computing power chip according to the current health score of the computing power chip, a change speed of the health score relative to the historical health score of the computing power chip, and continuity of the health score;

[0114] S214, generating health warning information corresponding to the abnormal state of the computing power chip based on the warning level, and updating the historical health score of the computing power chip according to the health score.

[0115] In the embodiment, the health score is calculated by the following formula (9):

[0116] (9)

[0117] wherein RE is the health state deviation of the computing power chip, mu refThe preset health state deviation reference value can be a mean value of the reconstruction error. delta The threshold width of the normal distribution.

[0118] Further, the current state of the computing power chip can be determined based on the current health score of the computing power chip, the change speed of the health score relative to the historical health score of the computing power chip, and the continuity of the health score. The change speed of the health score relative to the historical health score of the computing power chip can refer to the change speed of the current health score of the computing power chip and the historical health score. If there are multiple historical health scores, the mean value can be used to represent, or the latest historical health score can be used to represent. The continuity of the health score can refer to the stability of the health score in a period of time.

[0119] In some examples, the abnormal alarm decision rule for a single node has a three-level warning mechanism: primary warning: the health score is lower than the lower limit of the historical score distribution. Such abnormalities are usually transient noise or slight performance fluctuations. Middle warning: the health score decreases slowly and continuously, or decreases in a certain time window and then stabilizes at a lower level, indicating that the node may have a persistent degradation effect, for example, abnormal continuous occurrence for 3 cycles. High warning: the health score decreases rapidly and does not recover in a short time, reflecting that a potential unrecoverable fault may have occurred at the hardware level. The threshold value of rapid decrease can be calculated according to historical data, and the threshold value of rapid decrease = m + 2*n, m is the average change amount of the health score, and n is the standard deviation.

[0120] Further, by analyzing the relationship between the current health score of the computing power chip and the three-level warning mechanism, the corresponding warning level can be determined, and then the health warning information with corresponding emergency level can be generated based on different warning levels for reporting, etc. At the same time, the current health score of the computing power chip is updated based on the historical health score.

[0121] In the embodiment, the health score of the computing power chip is calculated, the early warning level corresponding to the current state of the computing power chip is determined by combining the health score, the change speed of the health score relative to the historical health score of the computing power chip, and the continuity analysis of the health score, the health degree of the computing power chip is quickly and accurately predicted, the health warning information is generated in time for early warning and score updating, the health state is comprehensively evaluated, the potential fault risk is found in advance, the reliability and safety of the computing power chip are improved, the detection accuracy is improved by using the multi-level abnormal early warning mechanism, and the scalability and stability of the detection are ensured. In addition, the accurate health evaluation can help to reasonably schedule and manage the high-performance computing power chip resources, prolong the service life of the hardware, and optimize the overall performance. The health score is associated with the actual failure rate to ensure the detection accuracy.

[0122] In some possible embodiments, in combination with Figure 3 As shown in FIG. 13, all high-performance computing power chip devices can be periodically batch analyzed to generate a health analysis report, and the health trend, performance change, and potential aging risk of each high-performance computing power chip are displayed.

[0123] In another possible embodiment, the state detection method based on the computing power chip provided by the present application is applicable to a cluster constructed based on each node. After obtaining the health benchmark time sequence, the typical working mode of all nodes in the cluster and the health benchmark time sequence of each mode can be obtained by performing load type identification on the obtained health benchmark time sequence. The main state of each typical mode can be obtained by analyzing the characteristic meaning of the health benchmark time sequence of each mode, for example, a computing-intensive state (the computing feature is higher than the distribution), a memory-intensive state (the storage feature is higher than the distribution), and a hybrid computing state (the computing / storage feature fluctuation is greater than 30%). The health assessment of each single node is used to realize the health assessment of the cluster level, and more accurate hierarchical early warning and health scoring are provided. The method can adapt to the needs of different application scenarios and has good scalability, can support large-scale deployment and management, and can adapt to different high-performance computing power chip application scenarios in high-performance computing, data centers, and cloud computing environments, and improve the universality.

[0124] In another possible embodiment, in combination with Figure 4 As shown in FIG. 13, when the health score is calculated, a regression model for associating the health score with the failure rate can be established based on the real failure samples, to analyze the relationship between the failure rate and the health score in the actual situation. In addition, the current health score of the computing power chip can be analyzed according to the specific benchmark, the sub-module, and the hierarchical level, to provide more comprehensive score basis.

[0125] According to another aspect of the embodiments of the present application, as Figure 6 According to another aspect of the embodiments of the present application, as

[0126] The data acquisition module 601 is configured to acquire multi-dimensional hardware feature data of the computing power chip under different test environments, so as to construct a standardized time series data set.

[0127] The sequence generation module 603 is configured to learn the standardized time series data set based on deep learning and physical constraint conditions of the hardware feature data, so as to construct a health assessment model, and select target sample data based on the health assessment model to generate a health benchmark time series of the computing power chip.

[0128] The sequence reconstruction module 605 is configured to acquire a current to-be-detected data sequence of the computing power chip, extract statistical features of the to-be-detected data sequence, and perform sequence reconstruction based on the statistical features and the health benchmark time series through a multi-modal autoencoder, to obtain a reconstructed sequence.

[0129] The state evaluation module 607 is configured to determine a health state deviation degree of the computing power chip based on the reconstructed sequence and the to-be-detected data sequence, and determine a current health state of the computing power chip based on the health state deviation degree.

[0130] It should be noted that in this embodiment, the data acquisition module 601 can be configured to perform step S202 in the embodiments of the present application, the sequence generation module 603 in this embodiment can be configured to perform step S204 in the embodiments of the present application, the sequence reconstruction module 605 in this embodiment can be configured to perform step S206 in the embodiments of the present application, and the state evaluation module 607 in this embodiment can be configured to perform step S208 in the embodiments of the present application.

[0131] It should be noted that the above modules and the examples and application scenarios realized by the corresponding steps are the same, but are not limited to the content disclosed in the above embodiments. It should be noted that the above modules, as part of the system, can run in the hardware environment where the computing power chip-based state detection system is located, and can be implemented by software or hardware.

[0132] According to another aspect of the embodiments of the present application, the present application provides a computer device, as Figure 7As shown, the computer device includes a memory 701, a processor 703, a communication interface 705 and a communication bus 707, the memory 701 stores a computer program executable on the processor 703, the memory 701 and the processor 703 communicate through the communication interface 705 and the communication bus 707, and the processor 803 implements the steps of the above-mentioned state detection method based on the computing chip when executing the computer program.

[0133] The memory and the processor in the above computer device communicate through the communication bus and the communication interface. The communication bus can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The communication bus can be divided into an address bus, a data bus, a control bus, etc.

[0134] The above-mentioned memory can include a Random Access Memory (RAM) and can also include a non-volatile memory, such as at least one disk memory. Optionally, the memory can also be at least one storage device located away from the above-mentioned processor.

[0135] The above-mentioned processor can be a general-purpose processor, including a Central Processing Unit (CPU), a Network Processor (NP), etc.; it can also be a Digital Signal Processing (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component.

[0136] According to another aspect of the embodiments of the present application, a computer program product or a computer program is also provided, which includes computer instructions stored in a computer readable storage medium. The processor of the computer device reads the computer instructions from the computer readable storage medium, and the processor executes the computer instructions, so that the computer device executes the steps of the above-mentioned state detection method based on the computing chip in any of the embodiments.

[0137] Optionally, in the embodiment of the present application, the computer readable medium is configured to store program codes for the processor to execute the steps of the computing power chip-based state detection method described in the above embodiments, and the steps of the computing power chip-based state detection method specifically include:

[0138] S202, obtaining multi-dimensional hardware feature data of the computing power chip in different test environments to construct a standardized time series data set;

[0139] S204, learning the standardized time series data set based on deep learning and physical constraint conditions of the hardware feature data to construct a health assessment model, and selecting target sample data based on the health assessment model to generate a health benchmark time series of the computing power chip;

[0140] S206, obtaining a current to-be-detected data sequence of the computing power chip, extracting statistical features of the to-be-detected data sequence, and reconstructing a sequence based on the statistical features and the health benchmark time series through a multi-modal autoencoder to obtain a reconstructed sequence;

[0141] S208, determining a health state deviation degree of the computing power chip based on the reconstructed sequence and the to-be-detected data sequence, and determining a current health state of the computing power chip based on the health state deviation degree.

[0142] Optionally, specific examples in the embodiment of the present application can refer to the examples described in the above embodiments, which will not be described here again. When the embodiments of the present application are implemented, reference can be made to the above embodiments, which have corresponding technical effects.

[0143] It can be understood that the embodiments described herein can be realized in hardware, software, firmware, middleware, microcode or a combination thereof. For hardware implementation, the processing unit can be implemented in one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), general purpose processors, controllers, micro-controllers, microprocessors, other electronic units designed to perform the functions described in the embodiments of the present application, or a combination thereof. For software implementation, the technical solutions described herein can be implemented by units performing the functions described herein. The software code can be stored in a memory and executed by a processor. The memory can be implemented in the processor or outside the processor.

[0144] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the foregoing method embodiments, which will not be repeated here.

[0145] In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method can be implemented by other manners. For example, the division of the modules is only a logical function division, and actual implementation can have another division manner, for example, a plurality of modules or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the displayed or discussed ones can be indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0146] The functions if realized in the form of software function units and sold or used as independent products can be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the embodiments of the present application essentially or say the parts that make contributions to the prior art or parts of the technical solutions can be embodied in the form of software products, and the computer software products are stored in a storage medium, including a plurality of instructions to make a computer device (which can be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the methods described in the embodiments of the present application. The foregoing storage medium includes: a U disk, a mobile hard disk, a ROM, a RAM, a magnetic disk or an optical disk, and various program code storage media.

[0147] It should be noted that, in this paper, relationship terms such as first, second and the like are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between the entities or operations. Moreover, the term includes, includes or any other variant thereof is intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. Without more limitations, the element defined by the statement "including a" does not exclude the presence of another identical element in the process, method, article or device including the element.

[0148] The foregoing detailed description of the application has been presented for purposes of illustration and description. Various modifications and changes can be made to these embodiments without departing from the spirit and scope of the application. It is intended that the scope of the application should not be limited by the particular representative embodiments described above.

Claims

1. A state detection method based on a computing chip, characterized in that, The method includes: To acquire multi-dimensional hardware feature data of computing chips under different testing environments in order to construct a standardized time series dataset; The standardized time series dataset is learned based on deep learning and the physical constraints of the hardware feature data to construct a health assessment model. Target sample data is selected based on the health assessment model to generate a health benchmark time series for the computing chip. The current data sequence to be detected by the computing chip is obtained, the statistical features of the data sequence to be detected are extracted, and the sequence is reconstructed by a multimodal autoencoder based on the statistical features and the health benchmark time series to obtain the reconstructed sequence. The deviation of the current health status of the computing chip is determined based on the reconstructed sequence and the data sequence to be detected, and the current health status of the computing chip is determined based on the deviation of the health status. The process of learning from the standardized time-series dataset using deep learning and physical constraints based on the hardware feature data to construct a health assessment model, and selecting target sample data based on the health assessment model to generate a health benchmark time-series for the computing chip, includes: identifying health patterns in each standardized hardware feature time-series under different test environments in the standardized time-series dataset using a clustering algorithm; fitting the physical constraints corresponding to the hardware feature data based on the acquired hardware feature data, the physical constraints including physical relationship equations between each hardware feature data; constructing an optimization objective for the loss function in the health assessment model based on the physical relationship equations between each hardware feature data for multi-objective optimization; constructing the health assessment model based on the health pattern recognition of the computing chip and the loss function; and selecting target sample data based on the health assessment model to generate the health benchmark time-series for the computing chip. The step of selecting target sample data based on the health assessment model to generate the health benchmark time series of the computing chip includes: obtaining first sample data that meets preset sample selection conditions from the clustering results of health patterns based on the health assessment model; prioritizing the results of multi-objective optimization and selecting the second sample data with the highest priority; using the first sample data and the second sample data as the target sample data, and updating the benchmark memory pool according to the target sample data; and generating the health benchmark time series of the computing chip based on the updated data in the benchmark memory pool using a generative adversarial network.

2. The state detection method based on a computing chip according to claim 1, characterized in that, The acquisition of multi-dimensional hardware feature data of the computing chip under different testing environments to construct a standardized time series dataset includes: Acquire multi-dimensional hardware feature data of the computing chip in different test environments within a preset time period. The multi-dimensional hardware feature data includes computing unit features, storage unit features, power supply system features, and thermodynamic features of the computing chip. Based on a preset time window size and sliding step size, feature engineering is performed on the computing unit features, storage unit features, power supply system features, and thermodynamic features of the computing chip to construct the standardized time series dataset.

3. The state detection method based on a computing chip according to claim 1, characterized in that, The process of acquiring the current data sequence to be detected from the computing chip, extracting statistical features from the data sequence to be detected, and reconstructing the sequence using a multimodal autoencoder based on the statistical features and the health baseline time series to obtain the reconstructed sequence includes: The data sequence to be detected under the current workload of the computing chip is obtained, and the statistical features are extracted from the data sequence to be detected. The statistical features include time-domain features and frequency-domain features. The health baseline time series, time-domain features, and frequency-domain features are fused to obtain a multimodal input vector; The multimodal autoencoder is trained based on the multimodal input vector, and time series reconstruction is performed through the decoding end of the multimodal autoencoder to obtain the reconstructed sequence.

4. The state detection method based on a computing chip according to claim 1, characterized in that, The step of determining the deviation of the current health status of the computing chip based on the reconstructed sequence and the data sequence to be detected, and determining the current health status of the computing chip based on the deviation of the health status, includes: Based on the trained multimodal autoencoder, the deviation of the current health status of the computing chip is calculated according to the reconstructed sequence and the data sequence to be detected; If the deviation of the health status exceeds a preset deviation threshold, the current health status of the computing chip is determined to be abnormal.

5. The state detection method based on a computing chip according to any one of claims 1 to 4, characterized in that, After determining the deviation of the current health status of the computing chip based on the reconstructed sequence and the data sequence to be detected, and determining the current health status of the computing chip based on the deviation of the health status, the method further includes: A health score is calculated based on the current health status deviation of the computing chip and a preset health status deviation reference value. The warning level corresponding to the current state of the computing chip is determined based on the current health score of the computing chip, the rate of change of the health score relative to the historical health score of the computing chip, and the continuity of the health score. Based on the warning level, generate health warning information corresponding to the current abnormal state of the computing chip, and update the historical health score of the computing chip according to the health score.

6. A state detection system based on a computing chip, used to implement the state detection method based on a computing chip as described in any one of claims 1 to 5, characterized in that, The system includes: The data acquisition module is used to acquire multi-dimensional hardware feature data of the computing chip under different test environments in order to construct a standardized time series dataset; The sequence generation module is used to learn the standardized time series dataset based on deep learning and the physical constraints of the hardware feature data to build a health assessment model, and select target sample data based on the health assessment model to generate a health benchmark time series of the computing chip. The sequence reconstruction module is used to acquire the current data sequence to be detected by the computing chip, extract the statistical features of the data sequence to be detected, and reconstruct the sequence based on the statistical features and the health benchmark time series through a multimodal autoencoder to obtain the reconstructed sequence. The status assessment module is used to determine the deviation of the current health status of the computing chip based on the reconstructed sequence and the data sequence to be detected, and to determine the current health status of the computing chip based on the deviation of the health status.

7. A computer device, comprising: A processor, a memory, and a network interface, wherein the memory stores machine-readable instructions executable by the processor, characterized in that: when the computer device is running, the processor communicates with the memory via the network interface, and the processor executes the machine-readable instructions to perform the steps of the state detection method based on a computing chip as described in any one of claims 1 to 5.

8. A computer-readable medium having processor-executable non-volatile program code, characterized in that, The program code causes the processor to execute the steps of the state detection method based on computing power chip as described in any one of claims 1 to 5.

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