A semiconductor data analysis method, device, equipment and storage medium

Abstract

A semiconductor data analysis method, device, equipment and storage medium are disclosed. The method comprises: obtaining a user's task analysis intention for semiconductor data; analyzing the task analysis intention through a large model to obtain a task decision tree matched with the task analysis intention; each node in the task decision tree is an independent analysis subtask; calling an analysis tool corresponding to the analysis subtask in an analysis module to execute the task decision tree to obtain an execution result; and determining an analysis result corresponding to the task analysis intention based on the execution result of all analysis subtasks. The method obtains the user's task analysis intention through a large model, thereby analyzing the semiconductor data to obtain an analysis result, and can improve the efficiency of semiconductor data analysis.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the technical field of semiconductor data intelligent analysis, and in particular to a semiconductor data analysis method, device, equipment and storage medium. BACKGROUND

[0002] With the complexity of semiconductor processes and the dramatic increase in data volume, traditional rule-driven, static process data analysis methods are difficult to meet the problem identification and decision-making needs in complex chip production processes. Especially in multiple test stages, such as circuit probing (CP), final test (FT), and multi-process parameter interaction, how to use natural language-driven data analysis processes has become one of the key challenges for current industry intelligence.

[0003] Current mainstream semiconductor data analysis software is complex to operate, and software users usually need to be trained before they can use it proficiently, and the software requires high semiconductor manufacturing expertise of the software users. The breadth and depth of knowledge in the semiconductor industry is very large, and existing software will limit the user's analysis capabilities. Therefore, how to use large models to intelligently analyze semiconductor data is a problem to be solved. SUMMARY

[0004] The present application provides a semiconductor data analysis method, device, equipment and storage medium to solve the problem of difficulty in using large models to analyze semiconductor data in the prior art.

[0005] According to an aspect of the present application, a semiconductor data analysis method is provided, the method comprising:

[0006] obtaining a user's task analysis intention for semiconductor data;

[0007] analyzing the task analysis intention by a large model to obtain a task decision tree matching the task analysis intention; each node in the task decision tree is an independent analysis subtask;

[0008] calling an analysis tool corresponding to the analysis subtask in the analysis module to execute the task decision tree to obtain an execution result;

[0009] determining an analysis result corresponding to the task analysis intention based on the execution results of all analysis subtasks.

[0010] According to another aspect of the present application, a semiconductor data analysis device is provided, the device comprising:

[0011] an obtaining module configured to obtain a user's task analysis intention for semiconductor data;

[0012] The analysis module is configured to analyze the task analysis intention by using a large model to obtain a task decision tree matched with the task analysis intention, wherein each node in the task decision tree is an independent analysis subtask.

[0013] The data analysis module is configured to execute the task decision tree by using an analysis tool corresponding to the analysis subtask in the analysis module to obtain an execution result.

[0014] The result output module is configured to determine an analysis result corresponding to the task analysis intention based on the execution results of all the analysis subtasks.

[0015] According to another aspect of the present application, an electronic device is provided, which includes at least one processor, and

[0016] a memory in communication connection with the at least one processor; wherein

[0017] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor to enable the at least one processor to execute the semiconductor data analysis method according to any one of the embodiments of the present application.

[0018] According to another aspect of the present application, a computer readable storage medium is provided, which stores computer instructions for enabling a processor to execute the semiconductor data analysis method according to any one of the embodiments of the present application.

[0019] The semiconductor data analysis method, device, equipment and storage medium according to the embodiments of the present application, the method includes: obtaining a task analysis intention of a user on semiconductor data; analyzing the task analysis intention by using a large model to obtain a task decision tree matched with the task analysis intention; each node in the task decision tree is an independent analysis subtask; executing the task decision tree by using an analysis tool corresponding to the analysis subtask in the analysis module to obtain an execution result; and determining an analysis result corresponding to the task analysis intention based on the execution results of all the analysis subtasks. The method can improve the efficiency of semiconductor data analysis and solve the problem of difficulty in using a large model to analyze semiconductor data in the prior art.

[0020] It should be understood that the content described in this part is not intended to identify key or important features of the embodiments of the present application, nor to limit the scope of the present application. Other features of the present application will become apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0021] In order to make the technical solution in the embodiments of the present application clearer, the accompanying drawings needed in the embodiment description will be briefly introduced. Obviously, the accompanying drawings in the following description are only some embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art without any creative work based on the embodiments in the present application should belong to the protection scope of the present application. It should be understood that each step in the method embodiments of the present application can be executed in different order and / or in parallel. In addition, the method embodiments can include additional steps and / or omit the execution of the shown steps. The scope of the present application is not limited in this respect.

[0022] Figure 1 A flowchart of a semiconductor data analysis method provided for the embodiment one of the present application;

[0023] Figure 2 A flowchart of an Agent scheduling module provided for the embodiment of the present application;

[0024] Figure 3 A task execution decision tree diagram provided for the embodiment of the present application;

[0025] Figure 4 Another task execution decision tree diagram provided for the embodiment of the present application;

[0026] Figure 5 A structure diagram of a semiconductor data analysis device provided for the embodiment two of the present application;

[0027] Figure 6 A diagram of a semiconductor data analysis device provided for the embodiment of the present application;

[0028] Figure 7 A structure diagram of an electronic device of the semiconductor data analysis method of the embodiment of the present application. DETAILED DESCRIPTION

[0029] In order to make the technical solution in the embodiments of the present application clearer, the accompanying drawings needed in the embodiment description will be briefly introduced. Obviously, the accompanying drawings in the following description are only some embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art without any creative work based on the embodiments in the present application should belong to the protection scope of the present application. It should be understood that each step in the method embodiments of the present application can be executed in different order and / or in parallel. In addition, the method embodiments can include additional steps and / or omit the execution of the shown steps. The scope of the present application is not limited in this respect.

[0030] As used herein, the term "includes" and its variants are meant to be open-ended, meaning that there are other items or steps that are not listed. The term "based on" means "based, at least in part, on." The term "one embodiment" means "at least one embodiment." The term "another embodiment" means "at least one additional embodiment." The term "some embodiments" means "at least some embodiments." Related terms have analogous meanings.

[0031] It should be noted that the terms "first", "second", and the like, used in the description and in the claims of the present application as well as above-mentioned drawings of the application are intended to distinguish similar objects and are not necessarily used to indicate a specific order or sequence. It is to be understood that the use of these terms here is merely for distinguishing between the objects and is not intended to limit the scope of the application to the precise order according to those terms but that the application is intended to encompass all the possible orderings of the steps involved. Moreover, the use of the term "including", "containing" or "having" and variations thereof herein is meant to encompass the inclusion of but not limited to the listed items. The terms "program", "software program", "module", "logic" and "component" as used herein refer to tangible items created by computer programming.

[0032] It should be noted that the terms "one", "multiple", mentioned in the present application are illustrative rather than restrictive, and those skilled in the art should understand that "one" or "multiple" should be understood as "one or more" unless otherwise explicitly indicated in the context.

[0033] The names of the messages or information exchanged between the devices in the embodiments of the present application are only for illustrative purposes, and are not intended to limit the scope of the messages or information.

[0034] In recent years, generative large models have shown great potential in natural language understanding, multi-modal interaction, task planning, etc. However, existing data analysis platforms mostly use static configuration and flowchart-style task flow control methods, lacking the ability to understand the purpose of natural language expression. At the same time, the function calls of each analysis module require explicit parameter configuration, with high user threshold. Moreover, the system output is usually in the form of single text or chart, which cannot meet the user's demand for multi-modal and explanatory analysis results.

[0035] As a task-oriented semantic service protocol framework, Model Context Protocol (MCP) supports calling different data processing modules through a unified interface, with good modularity and scalability. Therefore, the present embodiment combines generative large models with the MCP paradigm to realize automatic analysis of semiconductor data analysis tasks oriented to natural language.

[0036] Embodiment one

[0037] Figure 1 A flowchart of a semiconductor data analysis method provided by Embodiment One of the present application is shown in the figure. The method can be applied to analyze the situation of semiconductor data based on the user's task analysis intention. The method can be executed by a semiconductor data analysis device, which can be implemented by software and / or hardware and generally integrated on an electronic device, including but not limited to a computer and other devices.

[0038] As shown in the figure, the semiconductor data analysis method provided by Embodiment One of the present application includes the following steps: Figure 1

[0039] S110, obtaining the user's task analysis intention for semiconductor data.

[0040] The semiconductor data can be a comprehensive data set of the entire life cycle of a chip. The task analysis intention can be the specific analysis goal, core requirement or problem solving direction that the user hopes to achieve through the task when initiating or adjusting the task.

[0041] In this embodiment, the user's task analysis intention for semiconductor data can be obtained. Different types of task analysis intention are different, for example, the types of task analysis intention can include low yield analysis, engineering report, yield improvement, production data analysis, etc.

[0042] S120, analyzing the task analysis intention by a large model to obtain a task decision tree matching the task analysis intention; each node in the task decision tree is an independent analysis subtask.

[0043] The large model can be a generative large language model (LLM). The task decision tree can be a task execution framework designed based on a tree-like logical structure, including multiple nodes in a task decision tree, each node representing an independent analysis subtask.

[0044] In this embodiment, the task analysis intention can be analyzed by a large model to obtain a task decision tree matching the task analysis intention.

[0045] In one embodiment, the task analysis intention is analyzed by a large model to obtain a task decision tree matching the task analysis intention, including: the task analysis intention is semantically analyzed by a large model to extract key parameters in the task analysis intention; based on the key parameters and an enterprise prior knowledge base, a task decision tree matching the task analysis intention is generated.

[0046] ​The key parameters can be parameters related to task execution, and the key parameters corresponding to different task analysis intents are different. For example, the key parameters can be one or more of the following: time range, analysis target, method, related test stage, related test area, device identification, batch identification (ID), wafer identification, grouping information, color differentiation information, Bin number and name, test item number and name, return format, test item abnormal distribution identification algorithm parameters, etc. The enterprise priori knowledge base can refer to a structured knowledge set that the enterprise pre-constructs based on historical experience, past practice, industry cognition and internal precipitation.

[0047] In this embodiment, the task analysis intent can be semantically analyzed by a large model, the key parameters in the task analysis intent are extracted, and a task decision tree matched with the task analysis intent is generated based on the key parameters and the enterprise priori knowledge base.

[0048] After completing semantic analysis, the embodiment enters the task generation phase. In this phase, a task decision tree matched with the user intent can be generated by a pre-trained or fine-tuned large model in combination with an enterprise priori knowledge base and a retrieval-augmented generation (RAG) module. Each node of the decision tree represents an independent analysis subtask. The subtasks mainly include analysis yield, analysis Bin, abnormal test item detection, abnormal data comparison, viewing wafer map defect patterns, etc., and the tasks are connected in series according to the dependency relationship.

[0049] For example, the following are some examples of user task analysis intents:

[0050] Example 1: The task analysis intent is "Please analyze the batches with lower yield in the past three months and find the reasons." The system will understand that the user wants to analyze all batches with lower yield in the past three months and find possible reasons, and extract the key parameters: parameter analysis target (low yield analysis), time range (past three months), batch ID (all batch IDs in the past three months).

[0051] Example 2: The task analysis intent is "Please analyze the data of batch A and give me an engineering report." The system will identify that the user wants to print an engineering report, and extract the key parameter: batch ID.

[0052] Example 3: The task analysis intent is "Please analyze the data of batch A and tell me how to improve the yield." The system will identify that the user wants to find a way to improve the yield of batch A, and extract the key parameter: batch ID.

[0053] S130, calling an analysis tool corresponding to the analysis subtask in the analysis module to execute the task decision tree to obtain an execution result.

[0054] In the embodiment, each analysis subtask requires different analysis tools when executed, and the analysis tools corresponding to the analysis subtasks in the analysis module can be called to execute the task decision tree, and the execution result is obtained after all the analysis subtasks in the task decision tree are executed.

[0055] In one embodiment, the analysis tools corresponding to the analysis subtasks in the analysis module are called to execute the task decision tree and obtain the execution result, including: determining the execution order of each analysis subtask based on the dependency relationship between the analysis subtasks in the task decision tree; determining the current analysis subtask to be executed from all the analysis subtasks based on the execution order; using the model context protocol to call the analysis tools corresponding to the analysis subtask to be executed in the analysis module through the agent to execute the task, and obtain the execution result of the analysis subtask to be executed; continue to determine the new analysis subtask to be executed based on the execution order and execute until all the analysis subtasks in the task decision tree are executed, and obtain the execution result.

[0056] The agent can be an intelligent entity capable of autonomous perception, decision-making and task execution in a specific environment.

[0057] In the embodiment, the execution order of each analysis subtask can be determined based on the dependency relationship between the analysis subtasks, the current analysis subtask to be executed is determined from all the analysis subtasks based on the execution order, and the analysis tools corresponding to the analysis subtask to be executed in the analysis module are called to execute the task through the agent using the model context protocol, and the execution result of the analysis subtask to be executed is obtained, if there are still analysis subtasks to be executed, the new analysis subtask to be executed is determined based on the execution order and executed until all the analysis subtasks in the task decision tree are executed, and the execution result is obtained.

[0058] Figure 2 An Agent scheduling module flow chart provided in the embodiment of the application is shown in FIG. 1. Figure 2 As shown in FIG. 1, the execution of each node in the embodiment is completed by calling the specific analysis tools in the analysis module through the agent using the MCP protocol, and the MCP is a lightweight and modular protocol standard, which allows the analysis module to be deployed and managed in the form of a service. Each module has a unified input and output specification after being registered to the MCP Server, and the system can automatically schedule and execute various data analysis tools registered to the MCP Server according to the decision tree.

[0059] The embodiment combines the analysis of semiconductor data by the generative large model and the MCP paradigm, and can provide a dialog, modular and interpretable data analysis method under the premise of maintaining high flexibility and high scalability, and significantly improve the processing capacity and decision efficiency of semiconductor manufacturing enterprises on complex data.

[0060] In one embodiment, when the task corresponding to the task decision tree is a low yield analysis task, the analysis subtasks at least include a target semiconductor data extraction subtask, a yield trend chart generation subtask, and an abnormal point identification subtask; the analysis tool corresponding to the target semiconductor data extraction subtask is a data set creation tool, the analysis tool corresponding to the yield trend chart generation subtask is a visualization tool, and the analysis tool corresponding to the abnormal point identification subtask is a chart analysis module.

[0061] The low yield analysis task can be a task of analyzing problems of a semiconductor product yield lower than an expected standard, and the target is to find the root cause of the unqualified product. The target semiconductor data extraction subtask can be a task of screening, cleaning and integrating data matching the current analysis target from massive and multi-dimensional semiconductor production data. The yield trend chart generation subtask can be a task of intuitively displaying the change trend of yield with time, batch, process and other dimensions through a chart based on the accurate data output by the target semiconductor data extraction subtask. The abnormal point identification subtask can be a task of identifying abnormal points.

[0062] In the embodiment, when the low yield analysis task is executed, the Agent first extracts target semiconductor data by calling the data set creation tool in the data analysis module through the MCP, then generates a yield trend chart by calling the visualization tool, and then identifies abnormal points by calling the chart analysis module. After detecting the abnormal points, the Bin comparison analysis is entered, the abnormal Bin is found, the abnormal test items are viewed according to the found abnormal Bin, and finally the analysis results can be returned in the form of charts and summary texts.

[0063] In one embodiment, when the task corresponding to the task decision tree is an engineering report task, the analysis subtasks at least include a target semiconductor data extraction subtask, a yield trend chart generation subtask, a Bin Plato generation subtask, a test item cumulative distribution function CDF chart and histogram generation subtask, a wafer map generation subtask, an abnormal distribution test item identification subtask, a yield statistical process control SPC judgment abnormality subtask, a test item SPC judgment abnormality subtask, a variance analysis judgment abnormality subtask, and a wafer map defect mode identification subtask.

[0064] The engineering report task can be a task of generating an engineering report. The Bin Plato generation subtask is a visual analysis task performed on Bin classification data, which refers to a task of intuitively presenting the contribution of different Bin categories to the total amount of defective products or key indicator abnormalities through Plato, thereby helping to quickly locate the core problem Bin. The cumulative distribution function (CDF) graph, histogram, and wafer map generation subtasks can refer to tasks of generating a CDF graph, a histogram, and a wafer map. The abnormal distribution test item identification subtask can be a task of analyzing the data distribution of test items to identify test items that have a significant difference from the expected normal distribution. The SPC abnormality judgment subtask can be a task of monitoring the product yield, a core quality indicator, through a statistical process control (SPC) tool, identifying abnormal fluctuations of the yield data deviating from the statistical control state, and then judging whether the production process is out of control. The test item SPC abnormality judgment subtask can be a task of monitoring the statistical stability of data through an SPC tool, judging whether the test item deviates from the normal fluctuation range, and then identifying product performance abnormalities or test process abnormalities. The ANOVA abnormality judgment subtask can be a task of finding one or more factors that have a significant impact on the results (such as yield and test items) through an analysis of variance (ANOVA) statistical method, and then locating the key root cause factors that cause process abnormalities. The wafer map defect pattern identification subtask can be a task of analyzing and identifying the defect distribution characteristics on the wafer map to determine the defect pattern of the wafer map.

[0065] In this embodiment, when the engineering report task is executed, the subtasks can mainly include creating a data set to extract target data, visualizing analysis of yield trend graphs, Bin Plato, CDF graphs and histograms of test items, wafer maps, abnormal distribution test item identification, wafer map defect pattern identification, and the like. Exemplarily, Figure 3 A task decision tree schematic diagram provided by the embodiment of the present application, Figure 4 Another task decision tree schematic diagram provided by the embodiment of the present application is shown in FIG. 6. Figure 3 and Figure 4 As shown in FIGS. 6 and 7, when analyzing the yield, it can be determined whether there is a low-yield semiconductor batch. If there is, the wafer map can be analyzed, and the Bin can be analyzed to determine whether there is an abnormal Bin. If there is, the test item can be analyzed, and finally the analysis result is summarized.

[0066] S140, determining an analysis result corresponding to the task analysis intention based on the execution results of all the analysis subtasks.

[0067] In this embodiment, the execution results of all analysis subtasks can be integrated and output to obtain a chart or a report for the user to view.

[0068] After the analysis task is completed, the embodiment enters a result integration and multi-modal output stage. The execution results output by all analysis subtasks, including text, charts, structured files (such as CSV, JSON), report segments, etc., are uniformly summarized and a natural language summary is generated by a large model to form an analysis result easy to understand.

[0069] The embodiment can also call a RAG module to search external documents or knowledge bases. For example, after analyzing that the yield decline is related to a certain process equipment, the system can automatically search for past similar problem cases, equipment maintenance logs, etc., and combine some professional knowledge to provide actionable suggestions for the user.

[0070] The embodiment can also provide a multi-round dialogue interaction mechanism for the user. The user can continue to ask questions based on the analysis result of the previous step, such as “please further analyze the Wafer Acceptance Test (WAT) data of the device”. The system will continue to expand the analysis link based on the current context to realize real dialogue data exploration.

[0071] The semiconductor data analysis method provided by the embodiment one comprises the following steps: obtaining a task analysis intention of a user on semiconductor data; analyzing the task analysis intention by a large model to obtain a task decision tree matched with the task analysis intention; each node in the task decision tree is an independent analysis subtask; calling an analysis tool corresponding to the analysis subtask in an analysis module to execute the task decision tree to obtain an execution result; and determining an analysis result corresponding to the task analysis intention based on the execution results of all analysis subtasks. The method can improve the efficiency of semiconductor data analysis and solve the problem of difficulty in using a large model to analyze semiconductor data in the prior art.

[0072] On the basis of the above-mentioned embodiments, variant embodiments of the above-mentioned embodiments are proposed. It should be noted that, in order to make the description brief, only the differences between the variant embodiments and the above-mentioned embodiments are described in the variant embodiments.

[0073] In one embodiment, the method further comprises: recording an intermediate result when an analysis subtask is executed in the process of executing the task decision tree; and the intermediate result is used to form a context dependency chain in subsequent analysis.

[0074] In this embodiment, the intermediate results of different analysis sub-tasks are also different. In this embodiment, the intermediate results when performing the analysis sub-tasks in the process of executing the task decision tree can be recorded, and the intermediate results can be used in subsequent steps to form a complete context-dependent chain. If a step fails, the system has an error catching and rollback mechanism, which can automatically try an alternative path or correct the analysis logic while prompting the user.

[0075] For example, in the following scenarios, intermediate results can be used:

[0076] Example 1: When analyzing yield, if the user does not specify which test stage data to analyze, it will cause the return of the data to be analyzed to be determined. The large model will ask the user which test stage data to analyze until the user supplements these information. During this period, the parameters input by the user (i.e., as intermediate results) are recorded, and the next time the user inputs, the parameters given in the previous conversation do not need to be input.

[0077] Example 2: The data has been grouped in the previous step, and the grouping result can be recorded as an intermediate result of the context. If the same grouping is required in the subsequent step, the detailed information of the grouping can be obtained directly through the record.

[0078] In one embodiment, the method further comprises: during the execution of the task decision tree, receiving a new task analysis intention of the user; and continuing to execute the task decision tree based on the new task analysis intention and the intermediate result.

[0079] In this embodiment, if a new task analysis intention of the user is received during the execution of the task decision tree, the task decision tree can be continued to execute based on the new task analysis intention and the intermediate result. For example, when the decision tree is executed halfway and the Bin analysis sub-task is being performed, the user interrupts the execution and inputs “ignore the data of SBIN1000 and do not analyze”. The system will ignore the data of SBIN1000 in the data range based on the intermediate result saved in the context, such as the analysis data range.

[0080] The embodiments of the present application provide several specific implementation manners on the basis of the technical solutions of the above-mentioned embodiments.

[0081] As a specific implementation manner of the present application, the following steps are included:

[0082] 1) User input: analyze the data of batches with low yield in a month to find the reason for the low yield.

[0083] 2) Task generation: The large model combines the enterprise prior knowledge base to generate a decision tree for analyzing batches with low yield, such as Figure 4As shown, the decision tree generates a series of sub-tasks. In order of precedence, they include: analyzing yield, analyzing wafer map, analyzing Bin, analyzing test item, and summarizing reasons.

[0084] 3) Perform these sub-tasks according to the path planned by the decision tree.

[0085] Analyzing yield: Through the MCP tool, call the database access module to extract target data, then call the visualization module to generate a yield trend chart, and then call the chart analysis module to identify abnormal points. If a low-yield batch is found, analyze the wafer map next. If not, skip directly to the summary.

[0086] Analyzing wafer map: Through the MCP tool, find the wafer map defect mode of the low-yield batch. If abnormalities are found in the wafer, analyze the Bin of these abnormal wafers next. If no abnormalities are found, analyze the Bin of the entire batch.

[0087] Analyzing Bin: Through the MCP tool, get the number of abnormal Bins and compare it with normal data. If the number or proportion of failed chips in this Bin of the current data is significantly higher than that of normal data, it is considered that the current Bin has a problem, and the next step is to analyze the test item. If the Bin is not a problem, do not analyze the test item.

[0088] Analyzing test item: Through the MCP tool, analyze the test item in this Bin that has abnormal distribution. If an abnormal test item is found, call another MCP tool to compare and analyze the differences between the test item in the current data and the normal data. If the difference is large, it is considered that the test item may be one of the reasons for the low yield.

[0089] Summarize the output of all the above sub-tasks to find the possible reasons for the low-yield batch in a month and give charts and data supporting these reasons. Generate a report with reasons, charts, and data to return to the user.

[0090] The embodiment provides a semiconductor data analysis method and device that fuses a generative large model and an MCP paradigm, supports automatic identification of analysis tasks through natural language input, dynamically calls analysis modules, outputs multi-modal analysis results, and gives suggestions based on the analysis results, thereby improving the data analysis efficiency and intelligent level in semiconductor production.

[0091] As a specific embodiment of the present embodiment, the system can also use an asynchronous task scheduling framework to support task priority control and resource dynamic allocation mechanism during task execution, ensuring the execution efficiency of critical tasks. In abnormal situations, the system has self-recovery capability and can record complete logs for auditing and backtracking.

[0092] The embodiment can greatly reduce the analysis threshold by generating a generative large model to endow the system with the ability to understand natural language and build task flow;

[0093] As a specific embodiment of the present embodiment, the present embodiment can provide a web-based visualization interface in terms of user interface, support natural language input, result browsing, analysis history review and custom task template management. The interface can be adapted to PC and mobile terminal, facilitating engineers to perform data analysis and collaboration anytime and anywhere.

[0094] As a specific embodiment of the present embodiment, the present embodiment can also set up a permission system according to user roles, such as different roles can access different data ranges and call different analysis modules, to ensure enterprise data security and model security. In combination with a data desensitization module and an edge computing node, intelligent analysis can be completed without sensitive data leaving the factory, which is suitable for scenarios with high requirements for information security.

[0095] The present embodiment realizes a general, flexible and intelligent semiconductor data analysis solution by integrating natural language interface, task knowledge graph, MCP modular protocol and generative large model, which has wide industrial application prospects.

[0096] Embodiment two

[0097] Figure 5 A structural schematic diagram of a semiconductor data analysis device provided by the second embodiment of the present application is shown in the figure. The device can be applied to the analysis of semiconductor data based on the task analysis intention of the user, wherein the device can be realized by software and / or hardware, and is generally integrated on an electronic device.

[0098] As Figure 5 shown, the device comprises:

[0099] The acquisition module 210 is configured to acquire the task analysis intention of the user for the semiconductor data.

[0100] The analysis module 220 is configured to analyze the task analysis intention by a large model to obtain a task decision tree matched with the task analysis intention. Each node in the task decision tree is an independent analysis subtask.

[0101] The data analysis module 230 is configured to call an analysis tool corresponding to the analysis subtask in the analysis module to execute the task decision tree to obtain an execution result.

[0102] The result output module 240 is configured to determine an analysis result corresponding to the task analysis intention based on the execution results of all analysis subtasks.

[0103] The embodiment provides a semiconductor data analysis device, including: an acquisition module configured to acquire a task analysis intention of a user on semiconductor data; an analysis module configured to analyze the task analysis intention by using a large model to obtain a task decision tree matched with the task analysis intention; each node in the task decision tree is an independent analysis subtask; a data analysis module configured to call an analysis tool corresponding to the analysis subtask in the analysis module to execute the task decision tree to obtain an execution result; and a result output module configured to determine an analysis result corresponding to the task analysis intention based on the execution result of all analysis subtasks. The task analysis intention of the user is acquired by using the large model, the semiconductor data is analyzed to obtain the analysis result, the efficiency of semiconductor data analysis is improved, and the problem that it is difficult to analyze semiconductor data by using a large model in the prior art is solved.

[0104] Further, the analysis module 220 is configured to analyze the task analysis intention by using a large model to obtain a task decision tree matched with the task analysis intention, and the analysis module 220 includes the following steps.

[0105] The task analysis intention is analyzed by using a large model to extract key parameters in the task analysis intention.

[0106] The task decision tree matched with the task analysis intention is generated based on the key parameters and an enterprise prior knowledge base.

[0107] Further, the data analysis module 230 includes the following steps.

[0108] The execution order of each analysis subtask is determined based on the dependency relationship between the analysis subtasks in the task decision tree.

[0109] The current analysis subtask to be executed is determined from all analysis subtasks based on the execution order.

[0110] The analysis tool corresponding to the analysis subtask to be executed is called by using an agent Agent using a model context protocol to execute the task, and the execution result of the analysis subtask to be executed is obtained.

[0111] The new analysis subtask to be executed is determined based on the execution order, and the new analysis subtask to be executed is executed until all analysis subtasks in the task decision tree are executed to obtain the execution result.

[0112] Further, when the task corresponding to the task decision tree is a low yield analysis task, the analysis subtasks at least include a target semiconductor data extraction subtask, a yield trend chart generation subtask, and an abnormal point identification subtask; the analysis tool corresponding to the target semiconductor data extraction subtask is a data set creation tool, the analysis tool corresponding to the yield trend chart generation subtask is a visualization tool, and the analysis tool corresponding to the abnormal point identification subtask is a chart analysis module.

[0113] Further, when the task corresponding to the task decision tree is an engineering report task, the analysis subtasks at least include a target semiconductor data extraction subtask, a yield trend chart generation subtask, a Bin Plato generation subtask, a test item cumulative distribution function (CDF) chart and histogram generation subtask, a wafer map generation subtask, a yield statistical process control (SPC) abnormality judgment subtask, a test item SPC abnormality judgment subtask, a variance analysis abnormality judgment subtask, an abnormal distribution test item identification subtask, and a wafer map defect mode identification subtask.

[0114] Further, the device further comprises:

[0115] In the process of executing the task decision tree, an intermediate result in the execution of the analysis subtask is recorded; the intermediate result is used to form a context dependency chain in subsequent analysis.

[0116] Further, the device further comprises:

[0117] In the process of executing the task decision tree, a new task analysis intention of the user is received.

[0118] Based on the new task analysis intention and the intermediate result, the task decision tree is continuously executed.

[0119] The semiconductor data analysis device described above can execute the semiconductor data analysis method provided by any embodiment of the present application, has the corresponding function modules and beneficial effects of the execution method.

[0120] Figure 6 A schematic diagram of a semiconductor data analysis device provided by an embodiment of the present application is shown in FIG. 1. Figure 6 As shown in FIG. 1, the device can be composed of the following core modules:

[0121] 1. Natural language interaction module: responsible for receiving and analyzing user input, and working with a large model to realize semantic understanding;

[0122] 2. Task identification module: converting the natural language input by the user into a task description graph, and then generating a decision tree based on the knowledge in the RAG module;

[0123] 3. Data analysis module: a module composed of several data analysis tools, which is used to analyze data using various methods and obtain corresponding analysis results. The module encapsulates all analysis tools as an MCP Server for other modules to call. Analysis tools include: building data sets, querying chip test detailed data, grouping, finding corresponding test items according to Bin, comparing adjacent batch data, obtaining Top Bin, Bin comparison, test item abnormal distribution detection, wafer map defect mode detection, visualization tools (yield map, wafer map, histogram, CDF chart), chart analysis tools, etc.

[0124] 4. RAG module: use the search results of the prior knowledge base to generate a decision tree with the task recognition module or generate the next step suggestion with the result output module;

[0125] 5. Agent scheduling module: schedule multiple analysis Agents according to the task node sequence to complete specific tasks using the tool modules provided in the MCP Server;

[0126] 6. Result output module: input the charts, structured files, and natural language texts of each node in the decision tree, and output results and reports with strong explainability;

[0127] 7. Dialog management module: maintain the context of the analysis task and support multi-round analysis dialog.

[0128] The system can be deployed in a local server or a cloud environment, supports horizontal expansion and multi-user collaborative analysis, and is suitable for process engineers, yield engineers, equipment engineers, and other roles.

[0129] Embodiment Three

[0130] Figure 7 A structural schematic diagram of an electronic device 10 that can be used to implement an embodiment of the present application is shown. The electronic device is intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device can also represent various forms of mobile devices, such as personal digital assistants, cellular telephones, smartphones, wearable devices (e.g., headsets, glasses, watches, etc.), and other similar computing devices. The components shown here, their connections, and their functions, as described above, are meant to be examples only, and are not intended to limit the present application as described and / or claimed herein to that particular implementation.

[0131] As Figure 7As shown, the electronic device 10 includes at least one processor 11, and a memory, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., communicatively connected to the at least one processor 11, where the memory stores a computer program executable by the at least one processor. The processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or loaded from the storage unit 18 into the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0132] Various components in the electronic device 10 are connected to the I / O interface 15, including an input unit 16, such as a keyboard, a mouse, etc., an output unit 17, such as various types of displays, a speaker, etc., a storage unit 18, such as a magnetic disk, an optical disk, etc., and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network, such as the Internet, and / or various telecommunication networks.

[0133] The processor 11 can be various general and / or special-purpose processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 performs various methods and processes described above, such as the semiconductor data analysis method.

[0134] In some embodiments, the semiconductor data analysis method can be implemented as a computer program tangibly embodied in a computer readable storage medium, such as the storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or installed onto the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the semiconductor data analysis method described above can be performed. Alternatively, in other embodiments, the processor 11 can be configured to perform the semiconductor data analysis method by any other appropriate means, such as by means of firmware.

[0135] The various embodiments of the systems and techniques described above can be implemented in digital electronic circuitry, integrated circuitry, a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a system on a chip (SOC), a load programmable logic device (CPLD), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include implementation in one or more computer programs that are executable and / or interpretable on a programmable system including at least one programmable processor, which can be special or general purpose, coupled to receive data and instructions from, and to transmit data and instructions to, a storage system, at least one input device, and at least one output device.

[0136] Computer programs used to implement the processes of the application can be written in any combination of one or more programming languages. These computer programs can be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer program

[0137] In the context of the present application, a computer-readable storage medium can be a tangible medium that can contain or store computer programs for use by or in connection with an instruction execution system, apparatus, or device. Computer-readable storage media can include, but are not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium can be a machine-readable signal medium. More specific examples of the machine-readable storage medium will include one or more lines of a program of instructions in a transitory signal, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0138] To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the electronic device. Other kinds of devices can be used to provide for interaction with a user as well; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form, including acoustic, speech, or tactile input.

[0139] The systems and techniques described here can be implemented in a computing system that includes a back end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front end component (e.g., a user computer having a graphical user interface or a Web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back end, middleware, or front end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0140] The computing system can include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. A server can be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system, to solve the defects of large management difficulty and weak business scalability in traditional physical host and VPS service.

[0141] It should be understood that the various forms of flow shown above can be re-ordered, added to, or deleted from without departing from the scope of the present disclosure. For example, the steps recited in the present disclosure can be executed in parallel, executed in sequence, or executed in a different order, as long as the desired results of the present disclosure are achieved, and the present disclosure is not limited herein.

[0142] The specific embodiments described above are not intended to be limiting, and persons skilled in the art will appreciate that various modifications, combinations, sub-combinations and alternatives can be made to the specific embodiments without departing from the spirit and principles of the disclosure. Accordingly, the disclosure is not limited to the specific embodiments described above, but only by the scope of the appended claims.

Claims

1. A semiconductor data analysis method, characterized in that, The method includes: Obtain the user's task analysis intent for semiconductor data; the types of task analysis intent include low yield analysis of semiconductors, engineering reports, yield improvement, and production data analysis; The task analysis intent is analyzed using a large model to obtain a task decision tree that matches the task analysis intent; each node in the task decision tree is an independent analysis subtask. The analysis tool corresponding to the analysis subtask in the analysis module is invoked to execute the task decision tree and obtain the execution result; Based on the execution results of all analysis subtasks, determine the analysis results corresponding to the task analysis intent; When the task decision tree corresponds to a low yield analysis task, the analysis subtasks include at least the target semiconductor data extraction subtask, the yield trend chart generation subtask, and the outlier identification subtask; the analysis tool corresponding to the target semiconductor data subtask is a dataset creation tool, the analysis tool corresponding to the yield trend chart generation subtask is a visualization tool, and the analysis tool corresponding to the outlier identification subtask is a chart analysis module. When the task corresponding to the task decision tree is an engineering report task, the analysis subtasks include at least the following: extracting target semiconductor data, generating yield trend charts, generating Bin Pareto charts, generating cumulative distribution function (CDF) charts and histograms and wafer charts for test items, identifying abnormal distribution test items, judging anomalies using statistical process control (SPC) for yield, judging anomalies using SPC for test items, judging anomalies using analysis of variance (ANOVA), and identifying defect patterns in wafer charts.

2. The method according to claim 1, characterized in that, The step of analyzing the task analysis intent using a large model to obtain a task decision tree that matches the task analysis intent includes: The task analysis intent is semantically parsed using a large model to extract key parameters from the task analysis intent; Based on the key parameters and the enterprise's prior knowledge base, a task decision tree is generated that matches the task analysis intent.

3. The method according to claim 1, characterized in that, The analysis tool corresponding to the analysis subtask in the analysis module executes the task decision tree to obtain the execution result, including: For the analysis subtasks in the task decision tree, the execution order of each analysis subtask is determined based on the dependencies between them; Based on the execution order, determine the analysis subtask to be executed from all the analysis subtasks; The agent uses the model context protocol to call the analysis tool corresponding to the analysis subtask to be executed in the analysis module to execute the task and obtain the execution result of the analysis subtask to be executed. Continue to determine new analysis subtasks to be executed based on the execution order and execute them until all analysis subtasks in the task decision tree have been executed, and the execution result is obtained.

4. The method according to claim 1, characterized in that, The method further includes: During the execution of the task decision tree, intermediate results of the analysis subtasks are recorded; these intermediate results are used to form context dependency chains in subsequent analyses.

5. The method according to claim 4, characterized in that, The method further includes: During the execution of the task decision tree, the user's new task analysis intent is received; The task decision tree continues to be executed based on the new task analysis intent and the intermediate results.

6. A semiconductor data analysis device, characterized in that, The device includes: The acquisition module is used to acquire the user's task analysis intent for semiconductor data; the types of the task analysis intent include low yield analysis of semiconductors, engineering reports, yield improvement, and production data analysis. The analysis module is used to analyze the task analysis intent through a large model to obtain a task decision tree that matches the task analysis intent; each node in the task decision tree is an independent analysis subtask. The data analysis module is used to call the analysis tools corresponding to the analysis subtask in the analysis module to execute the task decision tree and obtain the execution results; The results output module is used to determine the analysis results corresponding to the task analysis intent based on the execution results of all analysis subtasks; When the task decision tree corresponds to a low yield analysis task, the analysis subtasks include at least the target semiconductor data extraction subtask, the yield trend chart generation subtask, and the outlier identification subtask; the analysis tool corresponding to the target semiconductor data subtask is a dataset creation tool, the analysis tool corresponding to the yield trend chart generation subtask is a visualization tool, and the analysis tool corresponding to the outlier identification subtask is a chart analysis module. When the task corresponding to the task decision tree is an engineering report task, the analysis subtasks include at least the following: extracting target semiconductor data, generating yield trend charts, generating Bin Pareto charts, generating cumulative distribution function (CDF) charts and histograms and wafer charts for test items, identifying abnormal distribution test items, judging anomalies using statistical process control (SPC) for yield, judging anomalies using SPC for test items, judging anomalies using analysis of variance (ANOVA), and identifying defect patterns in wafer charts.

7. An electronic device, characterized in that, The device includes: At least one processor; and A memory communicatively connected to the at least one processor; wherein, The memory stores a computer program that can be executed by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform the semiconductor data analysis method according to any one of claims 1-5.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that cause a processor to execute the semiconductor data analysis method according to any one of claims 1-5.

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