The invention relates to a
layout wiring planning design method based on a 2.5 D
core particle interconnection interposer, which is characterized by comprising the following steps of: defining
signal logic interfaces for automatic wiring in a passive
interposer according to
signal transmission requirements among core particles and a communication relationship between the core particles and a packaging substrate, and creating a mapping relationship
list among the logic interfaces; according to the method,
layout planning is carried out on
physical interface endpoints of a passive intermediate layer, the
physical interface endpoints are matched with
signal logic interfaces, and an optimal
layout allocation scheme is quickly determined through a signal
allocation algorithm based on a flow network in combination with a window matching method, so that the wiring resource loss of a 2.5 D
integrated circuit is effectively reduced, and the wiring efficiency is improved. The
system overall performance is improved. According to the invention, the method can cope with a complex
interconnection wiring condition generated by a plurality of independently designed core particles in a 2.5 D integration process, and achieves the efficient
interconnection design of the passive
interposer.