Current type driving chip circuit of power device

Abstract

The invention discloses a current type driving chip circuit of a power device, and relates to the technical field of power device driving. The current type driving chip circuit comprises a logic processing module, a pull-up current source module and a pull-down current source module, and the logic processing module is used for processing a switch control signal into a current source control signal and respectively controlling the pull-up current source module and the pull-down current source module to adjust driving current output to a grid electrode of a switch tube. On and off control of the switch tube is realized, additional arrangement of a peripheral resistor and a pull-down power switch is not needed, and the area overhead and the device cost are reduced.

Description

Technical Field

[0001] This invention relates to the field of power device driving technology, and in particular to a current-type driving chip circuit for a power device. Background Technology

[0002] High-power switching devices such as IGBTs / SiC are being used more and more frequently, and corresponding driver chip circuits are also being used extensively. Since IGBTs / SiC are voltage-type control devices, most IGBT / SiC driver chip circuits are currently based on voltage-type drive architecture.

[0003] Traditional voltage-driven driver chips require an additional soft pull-down path to limit the drive output current. This necessitates users adjusting the charging current of the actual power device's gate using a suitable resistor outside the chip, based on the required drive speed. However, due to the additional series resistor, the path from the drive pin to the power device's gate is no longer a low-impedance path. To prevent interference from the power device's Miller capacitance, an additional Miller clamping circuit is also required.

[0004] Therefore, when voltage-type driver chips need to implement the Mile clamp function, they will provide a separate corresponding pin, and a separate low-impedance switch needs to be designed inside the chip, which increases the chip area and usage cost. Summary of the Invention

[0005] This invention provides a current-driven chip circuit for power devices to solve the problem that voltage-driven chip architectures require additional Miller clamping circuits to implement Miller clamping functions, which increases area overhead and device cost.

[0006] This invention is achieved through the following technical solution: This invention provides a current-driven chip circuit for a power device, comprising: The logic processing module is used to receive the switch control signal and process the switch control signal into a current source control signal; A pull-up current source module has a first output terminal connected to the gate of a switching transistor and a first controlled current source circuit; the first controlled current source circuit is used to adjust the first current signal output to the gate according to the current source control signal to drive the switching transistor to turn on. The pull-down current source module has a second output terminal connected to the gate and a second controlled current source circuit; the second controlled current source circuit is used to adjust the second current signal flowing into the gate according to the current source control signal to drive the switch to turn off.

[0007] In the above scheme, the pull-up current source module outputs an adjustable first current signal (charging current) through a first controlled current source circuit, and the pull-down current source module adjusts the second current signal (discharging current) flowing into the gate through a second controlled current source circuit. By using the controlled current source to drive the gate of the switching transistor, the magnitude of the drive current can be directly adjusted, and the charging and discharging speed of the switching transistor can be controlled without external resistors. Since the drive current can be directly adjusted, the pull-down current source module can be reused to implement active pull-down functionality, eliminating the need for an additional pull-down power switch. This saves on area overhead and device cost.

[0008] In some implementations, the first controlled current source circuit includes a first detection circuit, a first pre-drive circuit, and a first controlled current source; The first detection circuit is connected to the first output terminal and the first pre-drive circuit, and is used to detect the voltage of the gate, obtain a first detection signal, and send the first detection signal to the first pre-drive circuit; The first pre-drive circuit is also connected to the logic processing module and the first controlled current source, and is used to adjust the first control signal output to the first controlled current source according to the current source control signal and the first detection signal; The first controlled current source is also connected to the first output terminal and is used to adjust the first current signal output to the gate according to the first control signal.

[0009] In some implementations, the first output terminal is also connected to the chip power supply pin VDD to provide a low-impedance path from the chip power supply pin VDD to the gate.

[0010] In some implementations, the first current signal is adjusted as follows: When the switch control signal changes from low level to high level, the logic processing module turns on the pull-up current source module and turns off the pull-down current source module. When the first detection circuit detects that the voltage at the first output terminal is low, the first pre-drive circuit controls the first controlled current source to output the maximum controlled current to the first output terminal according to the first detection signal, so as to quickly charge the gate. When the first detection circuit detects that the voltage at the first output terminal reaches the Miller voltage, the first pre-drive circuit controls the first controlled current source to output a preset constant current to the first output terminal according to the first detection signal. When the first detection circuit detects that the voltage at the first output terminal reaches a preset maximum voltage, the first pre-drive circuit controls the first controlled current source to operate in a fully on state according to the first detection signal, so as to provide a low-impedance path from the chip power supply pin VDD to the gate.

[0011] In some embodiments, the second controlled current source circuit includes a second detection circuit, a second pre-drive circuit, and a second controlled current source; The second detection circuit is connected to the second output terminal and the second pre-drive circuit, and is used to detect the voltage of the gate, obtain a second detection signal, and send the second detection signal to the second pre-drive circuit; The second pre-drive circuit is also connected to the logic processing module and the second controlled current source, and is used to adjust the second control signal output to the second controlled current source based on the current source control signal and the second detection signal; The second controlled current source is also connected to the second output terminal for adjusting the second current signal flowing into the gate based on the second control signal.

[0012] In some implementations, the second output is also connected to the chip ground pin VEE to provide a low-impedance path from the gate to the chip ground pin VEE.

[0013] In some implementations, the second current signal is adjusted as follows: When the switch control signal changes from high level to low level, the logic processing module shuts down the pull-up current source module and turns on the pull-down current source module. When the second detection circuit detects that the voltage at the second output terminal is high, the second pre-drive circuit controls the second controlled current source to output the maximum controlled current to the second output terminal according to the second detection signal, so as to quickly discharge the gate; When the second detection circuit detects that the voltage at the second output terminal reaches the Miller voltage, the second pre-drive circuit controls the second controlled current source to output a preset constant current to the second output terminal according to the second detection signal. When the second detection circuit detects that the voltage at the second output terminal reaches a preset minimum voltage, the second pre-drive circuit controls the second controlled current source to operate in a fully on state according to the second detection signal, so as to provide a low-impedance path from the gate to the chip ground pin VEE.

[0014] In some implementations, the logic processing module is also connected to the first detection circuit and the second detection circuit to obtain the first detection signal and the second detection signal; The logic processing module is further configured to adjust the current source control signal based on the switch control signal, the first detection signal, and the second detection signal.

[0015] In some embodiments, the logic processing module is further configured to receive a protection control signal; the logic processing module is further configured to, when the switch control signal is low and the voltage of the gate reaches the Miller voltage, control the second controlled current source to output a pull-down current to the second output terminal at maximum output current capability according to the logic state of the switch control signal and the protection control signal, so as to maintain a low-impedance path from the gate to the chip ground pin VEE until the switch control signal turns high.

[0016] In some embodiments, the logic processing module further includes an input terminal for receiving pull-up current adjustment signals and pull-down current adjustment signals, and a processing circuit for processing the pull-up current adjustment signals and pull-down current adjustment signals; the pull-up current adjustment signal is used to control the level of the maximum output current capability of the pull-up current source module, and the pull-down current adjustment signal is used to control the level of the maximum output current capability of the pull-down current source module.

[0017] Compared with the prior art, the present invention has the following advantages and beneficial effects: In the current-driven architecture, the pull-up / pull-down current source module is directly connected to the gate without external resistors in series. When the switch is off, the pull-down current source is reused to form a low-resistance path of "gate → OFF pin → VEE", which is equivalent to the Miller clamp function. There is no need to design a separate Miller clamp circuit and corresponding power transistor, which significantly saves chip area and device cost. The pull-down current source module can adjust the magnitude of the second current signal through the logic processing module, providing a low-impedance path from the OFF pin to VEE to achieve soft pull-down function. This process does not require external resistors or dedicated SSD pins, which reduces the user's component procurement costs, shrinks the chip package size, and reduces the difficulty of PCB layout. The logic processing module combines the gate voltage detection signal to control the controlled current source. When the gate voltage reaches the Miller voltage, it switches to a constant current mode and maintains a low-resistance path when it approaches the preset voltage. This makes the switching process more compatible with the characteristics of power devices, reduces switching losses and electromagnetic interference, and improves system efficiency. Attached Figure Description

[0018] To more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly described below. It should be understood that the following drawings only show some embodiments of the present invention and should not be considered as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort. In the drawings: Figure 1 This is a schematic diagram of a voltage-type driver chip and its peripheral device configuration during use. Figure 2 This is a waveform diagram of some signal voltages and currents when a voltage-type driver chip is working; Figure 3 This is a circuit diagram of a current-driven chip circuit proposed in an embodiment of the present invention; Figure 4 This is a diagram showing the operating timing of a current-driven chip circuit and the voltage and current waveforms at each node, as proposed in an embodiment of the present invention. Figure 5 This is a circuit schematic diagram of a current-driven chip circuit proposed in an embodiment of the present invention; Figure 6 This is a diagram showing the operating timing of a current-driven chip circuit and the voltage and current waveforms at each node, as proposed in an embodiment of the present invention.

[0019] The symbols in the attached image are explained as follows: 10 - Logic processing module, 20 - Pull-up current source module, 30 - Pull-down current source module, 21 - First controlled current source circuit, 31 - Second controlled current source circuit, 211 - First detection circuit, 212 - First pre-drive circuit, 213 - First controlled current source, 311 - Second detection circuit, 312 - Second pre-drive circuit, 313 - Second controlled current source. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the embodiments and accompanying drawings. The illustrative embodiments and descriptions of the present invention are only used to explain the present invention and are not intended to limit the present invention.

[0021] It should be noted that the terms "comprising" and "having" and any variations thereof in the specification, claims, and accompanying drawings of this invention are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to other steps or units inherent in the device.

[0022] The terminology used in the various embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to limit the various embodiments of the invention. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which the various embodiments of the invention pertain. The terms (such as those defined in commonly used dictionaries) are to be interpreted as having the same meaning as in the context of the relevant technical field and are not to be interpreted as having an idealized or overly formal meaning, unless clearly defined in the various embodiments of the invention.

[0023] Embodiments of the present invention provide a current-driven chip circuit for power devices. This chip circuit architecture can dynamically adjust the magnitude of the driving current according to the output voltage of the driving chip circuit during operation. This current-driven chip circuit architecture differs from the traditional voltage-driven chip circuit architecture. This architecture can control the magnitude of the output current of the driving circuit in real time, thereby saving external current-limiting resistors during use. Moreover, thanks to the current-driven circuit architecture, the driving chip circuit can reuse the driving output power transistor as a pull-down power transistor during design, saving chip area.

[0024] Please see Figures 1-2 , Figure 1 This describes common voltage-type driver chips and their associated peripheral device configurations. Figure 2 This describes the voltage and current waveforms of some signals when the voltage-type driver chip is working. The architecture of the voltage-type driver chip mainly includes a pull-up switch power transistor circuit and its output pin ON, a pull-down switch power transistor output circuit and its output pin OFF, an active Miller clamp circuit and its input pin AMC, a soft pull-down input pin SSD, a chip power supply pin VDD and a chip ground pin VEE, as well as external resistors RON and ROFF.

[0025] The switch control signal controls the full conduction state of the pull-up power transistor and the pull-down power transistor. Resistors RON and ROFF are used to adjust the charging / discharging current from the ON / OFF pin to the gate of the IGBT. The AMC pin is directly connected to the gate of the IGBT outside the chip. Resistor RSSD is added between the SSD pin and the gate of the IGBT to adjust the pull-down current during soft pull-down.

[0026] The main working process of this voltage-type driver chip is as follows: when the pull-up switch is turned on, the current flows through VDD from the pull-up power transistor -> ON -> RON -> IGBT gate to charge the IGBT; when the pull-down switch is turned on, the current flows through the IGBT gate -> ROFF -> OFF -> VEE to discharge the IGBT gate; if the circuit needs to enter the soft pull-down state, the pull-down switch is turned off, and the soft pull-down switch MNSSD discharges the IGBT gate through the resistor RSSD with current limiting.

[0027] Because the pull-up and pull-down switches of voltage-type driver chips have very low on-resistance, when the switching transistor is turned on, there is a low-impedance path between the power supply VDD / ground VEE and the IGBT gate. At the instant the pull-up / pull-down switch is turned on, the current from the power supply to the IGBT gate or from the IGBT gate to ground is very large. Figure 2The pull-up / pull-down current waveforms are shown. Therefore, in order to control the current value in the low-impedance path and to adjust the IGBT's turn-on and turn-off times, the voltage-driven drive circuit needs to connect resistors in series between the ON pin and the IGBT gate, and between the OFF pin and the IGBT gate, as shown. Figure 1 The external resistors RON and ROFF are shown.

[0028] On the other hand, due to the series resistance ROFF between the OFF pin and the IGBT gate, the path from the OFF pin to the IGBT gate is no longer a low-impedance path. To prevent interference from the IGBT gate voltage caused by the IGBT's Miller capacitance (CM), an additional low-impedance path from the IGBT gate to the VEE is required, typically called a Miller clamp circuit. Adding a Miller clamp circuit necessitates a separate AMC pin, directly connected to the IGBT gate to provide a low-impedance Miller clamp path. Simultaneously, a separate low-impedance switch needs to be designed internally within the chip. The SSD pin of the voltage-type drive circuit is typically used to provide a fixed current path between the IGBT gate and the VEE to implement the IGBT's soft-turn-off function, but a resistor RSSD is also needed to set this fixed current path.

[0029] In summary, the traditional voltage-based drive architecture has the following drawbacks: (1) When in use, external devices RON and ROFF are required to adjust the ON and OFF currents, which increases the cost of chip use; (2) If soft shutdown function is required, an external resistor RSSD must be added to set the soft shutdown current, and the chip will therefore have to add an SSD pin. At the same time, a corresponding on switch needs to be added internally, which will increase the cost of use and increase the chip area; (3) The chip needs to provide additional AMC pins and AMC pull-down power switches to implement AMC protection function, which will also reduce the chip integration and increase the chip area overhead.

[0030] To address the aforementioned problems, this invention proposes a driving architecture for a current-driven chip, see [link to relevant documentation]. Figures 3-4 As shown, Figure 3 The circuit diagram of this current-type drive chip is shown. Figure 4 The operating timing and voltage and current waveforms of each node of the current-type drive chip circuit are shown. The current-type drive circuit consists of a logic processing module 10, a pull-up current source module 20, and a pull-down current source module 30.

[0031] In this invention, the logic processing module 10 employs a programmable logic controller (PLC). The logic processing module 10 has a signal receiving terminal for receiving switch control signals, a signal output terminal for outputting current source control signals, and a logic processing circuit. The logic processing circuit processes the switch control signals into current source control signals based on circuit logic. These current source control signals are used to control the output current of the pull-up current source module 20 and the pull-down current source module 30. By controlling the output current, the switching transistors are turned on and off, particularly for IGBT / SiC voltage-type control devices.

[0032] The pull-up current source module 20 has a signal receiving terminal for receiving current source control signals, a first output terminal ON connected to the gate of the switching transistor, and a first controlled current source circuit 21. The first controlled current source circuit 21 implements the core function of the pull-up current source module. It is driven by a controllable current source and adjusts the first current signal output to the gate according to the current source control signal of the logic processing module. The first current signal is connected to the gate through the first output terminal ON, thereby driving the switching transistor to conduct.

[0033] The pull-down circuit source module 30 has a signal receiving terminal for receiving current source control signals, a second output terminal OFF connected to the gate of the switching transistor, and a second controlled current source circuit 31. The second controlled current source circuit 31 implements the core function of the pull-down current source module. It is driven by a controllable current source and adjusts the second current signal output to the second output terminal OFF according to the current source control signal of the logic processing module. The second current signal passes through the gate to the second output terminal OFF, thereby driving the switching transistor to turn off.

[0034] In the aforementioned current-driven chip circuit, the logic processing module 10 selects whether to activate the pull-up current source module 20 or the pull-down current source module 30 based on the switch control signal. Specifically, when the switch control signal changes from low to high, the logic processing module 10 activates the pull-up current source module 20 and deactivates the pull-down current source module 30, using the pull-up current source module 20 to charge the switching transistor; when the switch control signal changes from high to low, the logic processing module 10 deactivates the pull-up current source module 20 and activates the pull-down current source module 30, using the pull-down current source module 30 to discharge the switching transistor.

[0035] Since the controlled current source can adjust the output current, the charging / discharging process of the gate is driven by the current, eliminating the need for additional external resistors. Furthermore, the pull-down function is achieved by reusing the pull-down current source module, thereby saving external resistors and chip area.

[0036] In some embodiments, the first controlled current source circuit 21 includes a first detection circuit 211, a first pre-drive circuit 212, and a first controlled current source 213. The first detection circuit 211 is connected to the first output terminal ON and the first pre-drive circuit 212. The first detection circuit 211 is used to detect the voltage of the gate, obtain a first detection signal, and send the first detection signal to the first pre-drive circuit 212.

[0037] The first pre-drive circuit 212 is also connected to the logic processing module 10 and the first controlled current source 213. The first pre-drive circuit 212 adjusts the first control signal output to the first controlled current source 213 according to the current source control signal of the logic processing module 10 and the first detection signal of the first detection circuit 211.

[0038] The first controlled current source 213 is also connected to the first output terminal ON, and it adjusts the first current signal output to the gate according to the first control signal of the first pre-drive circuit 212.

[0039] The first controlled current source circuit 21 operates as follows: When the switch control signal changes from low to high, the logic processing module 10 activates the pull-up current source module 20, while the pull-down current source module 30 is off, entering the pull-up control stage. The first controlled current source circuit 21 then regulates the current output to the gate to charge the switching transistor. This process includes two stages, see [link to relevant documentation]. Figure 4 As shown: (1) When the first detection circuit 211 detects that the voltage of the first output terminal ON is low, and sends the detection signal to the first pre-drive circuit 212, the first pre-drive circuit 212 controls the first controlled current source 213 to output the maximum controlled current to the first output terminal ON according to the first detection signal, so as to quickly charge the gate and obtain the minimum turn-on delay; (2) When the first detection circuit 211 detects that the voltage of the first output terminal reaches the Miller voltage of the switching transistor, the first pre-drive circuit 212 controls the first controlled current source 213 to output the preset constant current to the first output terminal ON according to the first detection signal, so as to perform constant current charging.

[0040] Furthermore, the current-driven chip circuit provides a low-impedance path from the chip power supply pin VDD to the gate, and connects the first output terminal to the chip power supply pin VDD. During the pull-up control phase, when the first detection circuit 211 detects that the voltage of the first output terminal reaches the preset maximum voltage, the first pre-drive circuit 212 controls the first controlled current source 213 to operate in a fully on state according to the first detection signal. At this time, a low-impedance path from the chip power supply pin VDD -> first output terminal ON -> gate is provided for the gate.

[0041] like Figure 4As shown, when the IGBT gate voltage approaches the preset maximum voltage, the operating voltage margin of the controlled current source gradually decreases, and the output current of the second output terminal ON gradually decreases, deviating from its preset value. Therefore, a low-impedance path between ON and VDD is provided for the gate.

[0042] In some embodiments, the second controlled current source circuit 31 includes a second detection circuit 311, a second pre-drive circuit 312, and a second controlled current source 313. The second detection circuit 311 is connected to the second output terminal OFF and the second pre-drive circuit 312, and is used to detect the voltage of the gate, obtain a second detection signal, and send the second detection signal to the second pre-drive circuit 312. The second pre-drive circuit 312 is also connected to the logic processing module 10 and the second controlled current source 313, and adjusts the second control signal output to the second controlled current source 313 according to the current source control signal and the second detection signal. The second controlled current source 313 is also connected to the second output terminal OFF, and adjusts the second current signal flowing into the gate according to the second control signal.

[0043] Furthermore, the second output terminal OFF is also connected to the chip ground pin VEE to provide a low-impedance path from the gate to the chip ground pin VEE, thereby realizing the soft pull-down function.

[0044] The second controlled current source circuit 31 operates as follows: when the switch control signal changes from high level to low level, the logic processing module 10 shuts down the pull-up current source module 20 and turns on the pull-down current source module 30, entering the pull-down control stage. The second controlled current source circuit 31 adjusts the current output to the second output terminal OFF to discharge the switching transistor.

[0045] Specifically, see Figure 4 As shown, the discharge control process includes the following stages: (1) When the second detection circuit 311 detects that the voltage of the second output terminal OFF is high, the second pre-drive circuit 312 controls the second controlled current source 313 to output the maximum controlled current to the second output terminal OFF according to the second detection signal, so as to quickly discharge the gate and obtain the minimum turn-off delay. (2) When the second detection circuit 311 detects that the voltage of the second output terminal OFF reaches the Miller voltage, the second pre-drive circuit 312 controls the second controlled current source 313 to output a preset constant current to the second output terminal OFF according to the second detection signal, thereby reducing the gate discharge speed. (3) When the second detection circuit 311 detects that the voltage of the second output terminal OFF reaches the preset minimum voltage, the second pre-drive circuit 312 controls the second controlled current source 313 to operate in a fully on state according to the second detection signal. At this time, the gate discharges along the low-resistance path of gate -> second output terminal OFF -> chip ground pin VEE. Figure 4 As shown, when the IGBT gate voltage approaches the minimum preset voltage, the output current of the OFF pin will gradually decrease and deviate from its preset value as the operating voltage margin of the controlled current source gradually decreases.

[0046] In this implementation, since the ON and OFF pins of the chip directly output current to drive the IGBT gate, there is no need to add external resistors RON and ROFF. Furthermore, no additional AMC pin is needed to implement a low-impedance AMC path, as the OFF pin and the IGBT gate are already low-impedance paths without RON and ROFF. The current-driven chip circuit also does not require additional SSD pins or soft-pull-down power devices. By configuring logic within the driver chip, when the gate requires soft pull-down, the current at the OFF pin is adjusted by controlling the controlled current source. The soft pull-down current flows directly from the OFF pin to the VEE, further saving internal chip area, reducing the number of pins, and improving chip integration.

[0047] In some implementations, the logic processing module 10 is also connected to the first detection circuit 211 and the second detection circuit 311 to obtain the first detection signal and the second detection signal. Based on the gate voltage, the gate charging / discharging demand is analyzed, and the current source control signal input to the pull-up current source module 20 or the pull-down current source module 30 is adjusted to ultimately control the output current of the controlled current source and realize the charging, discharging, active pull-down, and soft pull-down functions of the switching transistor.

[0048] Furthermore, the logic processing module 10 is also connected to a protection device (such as overcurrent protection and desaturation protection of the chip) to receive protection control signals from the protection device and to implement active pull-down and soft pull-down functions by configuring processing logic in the logic processing module.

[0049] Specifically, when the switch control signal changes from high to low and the gate voltage reaches the Miller voltage, the pull-up current source is shut down as needed based on the logic states of the switch control signal and the protection control signal. Simultaneously, the second controlled current source 313 is controlled to output a second current (pull-down current) to the second output terminal OFF at its maximum output current capability, maintaining a low-impedance path from the gate to the chip ground pin VEE until the switch control signal returns to a high level (starting the next power transistor turn-on process), thus achieving active pull-down functionality. When a signal is sent from the preceding overcurrent protection module or other protection modules, soft pull-down is required. The logic processing module combines the logic states of the switch control signal and the protection control signal to shut down the pull-up current source as needed, while simultaneously controlling the pull-down current source to partially open, providing the required soft pull-down current capability. During overcurrent protection or desaturation protection, a constant current discharge is required for OFF. Therefore, when the protection control signal is active, a constant current discharge function for OFF can be achieved.

[0050] like Figure 5 The diagram shown is a circuit schematic of a possible current-driven chip circuit. The voltage waveforms and ON / OFF current waveforms at each node during operation are as follows: Figure 6 As shown. The logic processing module 10 consists of logic gate circuits. The first pre-drive circuit 212 and the second pre-drive circuit 312 each consist of four inverters. The first detection module 211 and the second detection module 312 consist of two sets of filter circuits and comparators. VREF1 is the ON voltage, which is the reference voltage for the high detection module. It can be set according to the specific driving device; for example, VREF1 can generally be set to VDD-1.5V. VREF2 is the constant current charging detection level during the turn-on period of the external power transistor; taking IGBT as an example, it can generally be set to 9V. VREF3 is the constant current discharging detection level during the turn-off period of the external power transistor; taking IGBT as an example, it can generally be set to 9V. VREF4 is the OFF voltage, which is the reference voltage for the low detection module. It can be set according to the specific driving device; for example, VREF4=1.5V.

[0051] Therefore, compared to the traditional voltage-driven architecture, the current-driven architecture proposed in this invention not only saves on external resistors RON, ROFF, and RSSD, but also eliminates the need for AMC and SSD pull-down power transistors, significantly reducing the internal chip area and lowering chip cost. Simultaneously, it reduces the number of chip pins, further decreasing the chip package size and saving PBC area and usage costs during chip application. The reduced pin count simplifies wiring configuration during chip application and reduces the complexity of system PCB design.

[0052] In some embodiments, the logic processing module 10 further includes an input terminal for receiving pull-up current adjustment signals and pull-down current adjustment signals, as well as a processing circuit for processing the pull-up current adjustment signals and pull-down current adjustment signals. The pull-up current adjustment signal is used to control the maximum output current capability level of the pull-up current source module 20, and the pull-down current adjustment signal is used to control the maximum output current capability level of the pull-down current source module 30. The pull-up current adjustment signal and the pull-down current adjustment signal can independently adjust their respective pull-up current and pull-down current capability levels, thereby adjusting the appropriate drive current output level according to different drive loads and controlling the drive speed.

[0053] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A current-mode drive chip circuit for a power device, characterized in that, include: The logic processing module (10) is used to receive the switch control signal and process the switch control signal into a current source control signal; The pull-up current source module (20) has a first output terminal connected to the gate of the switching transistor and a first controlled current source circuit (21); the first controlled current source circuit (21) is used to adjust the first current signal output to the gate according to the current source control signal to drive the switching transistor to turn on. The pull-down current source module (30) has a second output terminal connected to the gate and a second controlled current source circuit (31); the second controlled current source circuit (31) is used to adjust the second current signal flowing into the gate according to the current source control signal to drive the switch to turn off.

2. The current-mode drive chip circuit for the power device according to claim 1, characterized in that, The first controlled current source circuit (21) includes a first detection circuit (211), a first pre-drive circuit (212), and a first controlled current source (213). The first detection circuit (211) is connected to the first output terminal and the first pre-drive circuit (212) to detect the voltage of the gate, obtain a first detection signal, and send the first detection signal to the first pre-drive circuit (212). The first pre-drive circuit (212) is also connected to the logic processing module (10) and the first controlled current source (213) for adjusting the first control signal output to the first controlled current source (213) according to the current source control signal and the first detection signal; The first controlled current source (213) is also connected to the first output terminal and is used to adjust the first current signal output to the gate according to the first control signal.

3. The current-mode drive chip circuit for the power device according to claim 2, characterized in that, The first output terminal is also connected to the chip power supply pin VDD to provide a low-impedance path from the chip power supply pin VDD to the gate.

4. The current-mode drive chip circuit for the power device according to claim 3, characterized in that, The adjustment method for the first current signal is as follows: When the switch control signal changes from low level to high level, the logic processing module (10) turns on the pull-up current source module (20) and turns off the pull-down current source module (30). When the first detection circuit (211) detects that the voltage of the first output terminal is low, the first pre-drive circuit (212) controls the first controlled current source (213) to output the maximum controlled current to the first output terminal according to the first detection signal, so as to quickly charge the gate. When the first detection circuit (211) detects that the voltage at the first output terminal reaches the Miller voltage, the first pre-drive circuit (212) controls the first controlled current source (213) to output a preset constant current to the first output terminal according to the first detection signal. When the first detection circuit (211) detects that the voltage of the first output terminal reaches the preset maximum voltage, the first pre-drive circuit (212) controls the first controlled current source (213) to work in a fully on state according to the first detection signal, so as to provide a low-impedance path from the chip power supply pin VDD to the gate.

5. The current-mode drive chip circuit for the power device according to any one of claims 2-4, characterized in that, The second controlled current source circuit (31) includes a second detection circuit (311), a second pre-drive circuit (312), and a second controlled current source (313). The second detection circuit (311) is connected to the second output terminal and the second pre-drive circuit (312) to detect the voltage of the gate, obtain a second detection signal, and send the second detection signal to the second pre-drive circuit (312). The second pre-drive circuit (312) is also connected to the logic processing module (10) and the second controlled current source (313) for adjusting the second control signal output to the second controlled current source (313) based on the current source control signal and the second detection signal; The second controlled current source (313) is also connected to the second output terminal for adjusting the second current signal flowing into the gate based on the second control signal.

6. The current-mode drive chip circuit for the power device according to claim 5, characterized in that, The second output terminal is also connected to the chip ground pin VEE to provide a low-impedance path from the gate to the chip ground pin VEE.

7. The current-mode drive chip circuit for the power device according to claim 6, characterized in that, The adjustment method for the second current signal is as follows: When the switch control signal changes from high level to low level, the logic processing module (10) shuts down the pull-up current source module (20) and turns on the pull-down current source module (30). When the second detection circuit (311) detects that the voltage of the second output terminal is high, the second pre-drive circuit (312) controls the second controlled current source (313) to output the maximum controlled current to the second output terminal according to the second detection signal, so as to quickly discharge the gate; When the second detection circuit (311) detects that the voltage at the second output terminal reaches the Miller voltage, the second pre-drive circuit (312) controls the second controlled current source (313) to output a preset constant current to the second output terminal according to the second detection signal; When the second detection circuit (311) detects that the voltage at the second output terminal reaches the preset minimum voltage, the second pre-drive circuit (312) controls the second controlled current source (313) to operate in a fully on state according to the second detection signal, so as to provide a low-impedance path from the gate to the chip ground pin VEE.

8. The current-mode drive chip circuit for the power device according to claim 5, characterized in that, The logic processing module (10) is also connected to the first detection circuit (211) and the second detection circuit (311) to obtain the first detection signal and the second detection signal; The logic processing module is further configured to adjust the current source control signal based on the switch control signal, the first detection signal, and the second detection signal.

9. The current-mode drive chip circuit for the power device according to claim 8, characterized in that, The logic processing module (10) is also used to receive a protection control signal; the logic processing module is also used to, when the switch control signal is low and the voltage of the gate reaches the Miller voltage, control the second controlled current source (313) to output a pull-down current to the second output terminal with the maximum output current capability according to the logic state of the switch control signal and the protection control signal, so as to maintain the low impedance path from the gate to the chip ground pin VEE until the switch control signal turns high.

10. The current-mode drive chip circuit for the power device according to claim 1, characterized in that, The logic processing module (10) further includes an input terminal for receiving pull-up current adjustment signals and pull-down current adjustment signals, and a processing circuit for processing the pull-up current adjustment signals and pull-down current adjustment signals; the pull-up current adjustment signal is used to control the maximum output current capability level of the pull-up current source module (20), and the pull-down current adjustment signal is used to control the maximum output current capability level of the pull-down current source module (30).

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