Broadband simulation active phased array receiving system and received signal processing method thereof

Abstract

The invention discloses a broadband analog active phased array receiving system and a received signal processing method thereof, the receiving system can eliminate ISI (International Standard Interference) among complex digital signals output by each downlink by accurately controlling the occurrence time difference of ADC (Analog to Digital Converter) sampling clocks of each downlink, and the processing precision of incoming wave signals is higher than that of the prior art; according to the received signal processing method, the phase of a radio frequency analog signal received by each antenna unit is controlled through a numerical control phase shifter, and the occurrence time difference of an intermediate frequency digital signal output by each ADC is controlled through a sampling clock, so that complex digital signals from a specified direction and output by each downlink can be subjected to equal-phase superposition; the calculation precision of the proposed algorithm is higher than that of an existing algorithm. The method is suitable for broadband wireless communication and broadband simulation active phased array radar receiving systems, and is also suitable for narrowband wireless communication and narrowband simulation active phased array radar receiving systems, the signal processing precision is higher, and the calculation precision of the algorithm is also higher.

Description

Technical Field

[0001] This invention relates to the field of analog active phased array receiving technology, specifically to a broadband analog active phased array receiving system and its received signal processing method. Background Technology

[0002] When the direction of the incoming wave deviates from the array normal, the spatial phase difference generated between different frequency components of the incoming signal in a specified direction varies between different antenna elements. Existing narrowband analog active phased array receiver systems are designed for the center frequency f0 of the incoming signal. The corresponding narrowband signal reception methods only compensate for the spatial phase difference generated between different antenna elements at a single frequency f0, without compensating for the spatial phase differences generated between different antenna elements for other frequency components of the incoming signal. Only when... The narrowband signal receiving algorithm is accurate only when B represents the bandwidth of the analog signal carried by the incoming signal. However, when the incoming signal is a narrowband signal... When the value is small, for example The incoming signal can be approximated as a single-frequency signal, and in engineering, a narrowband analog active phased array receiver system can still be used to process the incoming signal. However, with the development of... As the value increases, the calculation accuracy of the narrowband signal receiving algorithm decreases.

[0003] When the direction of arrival deviates from the array normal, the arrival signal from a specified direction will generate a time difference of arrival (TDOA) when reaching different antenna elements. The larger the array electrical size (the ratio of the array physical size to the wavelength of the center frequency) and the larger the angle at which the direction of arrival deviates from the array normal, the larger the TDOA. Theoretically, as long as... A broadband analog active phased array receiver system should be used to process the incoming signal. Existing broadband analog active phased array receiver systems use delay lines in each downlink to compensate for the time difference of arrival (TDOA). These delay lines are analog signal delay devices. To accurately cancel the TDOA within bandwidth B, the amplitude-frequency response of the delay line within bandwidth B should be constant, and its phase-frequency response should be linear. Linear phase means that the group delay of the delay line is constant. When the incoming signal is a broadband signal... When it is large, for example Achieving distortion-free processing of the input analog signal using the delay line is extremely difficult because: If the amplitude-frequency characteristic deviates from a constant and / or the phase-frequency characteristic deviates from linear phase, the delay line will distort the processing of the input analog signal. That is, the waveform shape of the output analog signal of the delay line will change compared to its input analog signal, reducing the accuracy of subsequent signal processing. Furthermore, if the group delay of the delay line deviates from the time difference of arrival (TDOA) it is meant to eliminate, inter-symbol interference (ISI) will occur between the complex digital signals output from different downlinks, increasing the bit error rate of the received signal processing. On the other hand, existing received signal processing algorithms for broadband analog active phased arrays only compensate for the spatial phase difference generated between different antenna elements due to the center frequency of the incoming signal, failing to compensate for the spatial phase differences generated between different antenna elements for other frequency components of the incoming signal, resulting in low computational accuracy. Summary of the Invention

[0004] To address the problems of signal distortion, inter-symbol interference, and low computational accuracy in existing technologies, this invention provides a broadband analog active phased array receiving system and its received signal processing method. The receiving system, by precisely controlling the timing difference of the sampling clocks of each downlink analog-to-digital converter (ADC), can eliminate inter-symbol interference between the complex digital signals output from each downlink, achieving higher processing accuracy for incoming signals than existing broadband analog active phased array receiving systems. The received signal processing method, by controlling the phase of the RF analog signal received by each antenna element using a digitally controlled phase shifter, eliminates the spatial phase difference between different antenna elements for all frequency components of the incoming signal from a specified direction. Furthermore, by controlling the timing difference of the sampling clocks of each ADC, it eliminates inter-symbol interference between the intermediate frequency digital signals from a specified direction output by different ADCs. This enables the complex digital signals from a specified direction output by each downlink to be superimposed with equal phase. The proposed algorithm achieves higher computational accuracy than existing algorithms.

[0005] A broadband analog active phased array receiving system includes an antenna array, which can be a two-dimensional planar array, a two-dimensional conformal array, a one-dimensional linear array, or a one-dimensional conformal array. Each antenna element of the antenna array is connected to a downlink via a duplexer. The radio frequency analog signal received by each antenna element is output as a complex digital signal via the corresponding downlink. The hardware structure and parameter settings of the downlink are as follows:

[0006] When the antenna array adopts a two-dimensional planar array, the two-dimensional planar array is composed of M rows of one-dimensional linear arrays when viewed horizontally, and N columns of one-dimensional linear arrays when viewed vertically, denoted by d. x The spacing between adjacent antenna elements in a longitudinal one-dimensional linear array is represented by d. yLet m represent the spacing between adjacent antenna elements in a horizontal one-dimensional linear array, m = 0, 1…M-1 represent the row number of the two-dimensional planar array, n = 0, 1…N-1 represent the column number of the two-dimensional planar array, and mn represent the sequence number of the antenna element in the m-th row and n-th column and its connected downlink. The mn-th downlink includes, in sequence, the mn-th duplexer, the mn-th limiter, the mn-th low-noise amplifier (LNA), the mn-th digitally controlled attenuator, the mn-th digitally controlled phase shifter, the mn-th analog multiplier, the mn-th analog low-pass filter (LPF), the mn-th ADC, and the mn-th quadrature digital demodulator. The mn-th quadrature digital demodulator is divided into two branches, and the input of each branch is connected to the output of the mn-th ADC. One branch includes, in sequence, the mn-th first digital multiplier and the mn-th first finite impulse response (FIR) LPF, and the other branch includes, in sequence, the mn-th second digital multiplier and the mn-th second FIR. The receiving system uses a shared local analog sine wave generator (LPF). The analog sine wave signal generated by this generator is connected to the other input of the mn-th analog multiplier. The receiving system also uses a shared local digital sine wave generator (DGF). This DGF generates two mutually orthogonal digital sine waves: one connected to the other input of the mn-th first digital multiplier, and the other connected to the other input of the mn-th second digital multiplier. The digital signal output from the mn-th first FIR LPF, as its real part, and the digital signal output from the mn-th second FIR LPF, as its imaginary part, constitute the complex digital signal output by the mn-th downlink. The attenuation of the mn-th digitally controlled attenuator is set to -20log. 10 (W i [m,n] decibels, where i represents the direction the main lobe points towards the incoming wave (θ). i ,φ i The receiver pattern number, W i [m,n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the two-dimensional planar array, θ i The elevation angle, φ, represents the angle between the direction of the incoming wave and the array normal. i The azimuth angle representing the direction of arrival of the wave is the angle between the vertical projection of the direction of arrival of the wave onto the array plane and the longitudinal axis. i ,φ i (Specified by the user; the phase shift amount of the mn-th CNC phase shifter is set to...) radians, f0 represents (θ) i ,φ i The center frequency of the incoming wave signal from the direction of θ, where B represents (θ). i ,φ i The bandwidth of the analog signal carried by the directional incoming wave signal, where c represents the speed of light; the frequency of the analog sine wave signal generated by the local analog sine wave generator is set to... The cutoff frequency of all analog LPFs is set to B; the mn-th ADC sampling clock is set to be earlier than the 00-th ADC sampling clock. The timing is as follows: The digital frequencies of the two mutually orthogonal digital sine signals generated by the local digital sine wave generator are both set to [value missing]. The digital cutoff frequencies of all first FIR LPFs and second FIR LPFs are set to [value missing].

[0007] When the antenna array adopts a two-dimensional conformal array, a two-dimensional planar array is constructed based on the two-dimensional conformal array. The downlink hardware structure of the two-dimensional conformal array is the same as that of the two-dimensional planar array downlink. The difference in parameter settings is that the attenuation of the mn-th numerically controlled attenuator is set to -20log. 10 (W i [m,n]) decibels, W i [m,n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the two-dimensional conformal array, and the phase shift of the mn-th numerically controlled phase shifter is set to... In radians, the mn-th ADC sampling clock is set to be earlier than the 00-th ADC sampling clock. Time appears, among which This represents the difference between the mn-th antenna element of a two-dimensional conformal array and the mn-th antenna element of a two-dimensional planar array at (θ) i ,φ i The distance difference in the direction;

[0008] When the antenna array uses a one-dimensional linear array, it consists of N antenna elements. The distance between adjacent antenna elements is denoted by d. The sequence number of the nth antenna element and its connected downlink is represented by n = 0, 1…N-1. The hardware structure of the downlink of a one-dimensional linear array is the same as that of a two-dimensional planar array. Its nth downlink includes, in sequence, an nth duplexer, an nth limiter, an nth LNA, an nth digitally controlled attenuator, an nth digitally controlled phase shifter, an nth analog multiplier, an nth analog LPF, an nth ADC, and an nth quadrature digital demodulator. The nth quadrature digital demodulator is divided into two branches, each with its input connected to the output of the nth ADC. One branch includes, in sequence, the nth first digital multiplier and the nth first FIR LPF; the other branch includes, in sequence, the nth second digital multiplier and the nth second FIR LPF. The digital signal output from the nth first FIR LPF is used as the real part and is then compared with the nth second FIR LPF. The digital signal output by the LPF, as the imaginary part, constitutes the complex digital signal output by the nth downlink. The parameter setting difference is that the attenuation of the nth digitally controlled attenuator is set to -20log. 10 (W i [n]) decibels, W i[n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the one-dimensional linear array, and the phase shift of the n-th numerically controlled phase shifter is set to... In radians, the sampling clock of the nth ADC is set to be earlier than the sampling clock of the 0th ADC. Time appears, θ i θ represents the angle between the direction of arrival and the array normal, where i represents the direction the main lobe points towards the direction of arrival. i The receiver pattern number, the direction of arrival θ i As specified by the user;

[0009] When the antenna array uses a one-dimensional conformal array, a one-dimensional linear array is constructed based on the one-dimensional conformal array. The downlink hardware structure of the one-dimensional conformal array is the same as that of the one-dimensional linear array downlink, with the parameter settings differing only in that the attenuation of the nth numerically controlled attenuator is set to -20log. 10 (W i [n]) decibels, W i [n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the one-dimensional conformal array, and the phase shift amount of the n-th numerically controlled phase shifter is set to... In radians, the sampling clock of the nth ADC is set to be earlier than the sampling clock of the 0th ADC.

[0010] Time appears, among which This represents the nth antenna element of a one-dimensional conformal array and the nth antenna element of a one-dimensional linear array at θ. i The difference in distance along the direction.

[0011] A received signal processing method, wherein the received signal processing method is based on the broadband analog active phased array receiving system; i represents the received pattern number in which the main lobe points to the direction of arrival, l represents the antenna element and its connected downlink number, and ... This represents the time of arrival (TOA) of the incoming signal from a specified direction at the l-th antenna element and at the reference antenna element. The RF analog signal received by the l-th antenna element passes through the l-th duplexer, the l-th limiter, and the l-th LNA to obtain the RF analog signal output by the l-th LNA. The RF analog signal output by the l-th LNA has its amplitude controlled by the l-th digitally controlled attenuator according to a window function. The RF analog signal output by the l-th digitally controlled attenuator has its phase controlled by the l-th digitally controlled phase shifter. Let the phase shift of the l-th digitally controlled phase shifter be... The phase shift amount generated by each CNC phase shifter eliminates the spatial phase difference between different antenna elements for all frequency components within the bandwidth B of the incoming wave signal from the specified direction. f0 represents the center frequency of the incoming wave signal from the specified direction, and B represents the bandwidth of the analog signal carried by the incoming wave signal from the specified direction. The RF analog signal output by the l-th CNC phase shifter is passed through the l-th analog multiplier and the l-th analog LPF to obtain the l-th intermediate frequency analog signal. The l-th intermediate frequency analog signal is passed through the l-th ADC to obtain the l-th intermediate frequency digital signal. The sampling clock of the l-th ADC is advanced compared to the sampling clock of the reference ADC. The timing difference between the sampling clocks of each ADC eliminates inter-symbol interference between intermediate frequency (IF) digital signals from designated directions output by different ADCs, thereby eliminating inter-symbol interference between complex digital signals from designated directions output by each downlink. The l-th IF digital signal is processed by the l-th quadrature digital demodulator to obtain the complex digital signal output by the l-th downlink. The proposed receiving signal processing algorithm accumulates the complex digital signals output by each downlink, ensuring that the complex digital signals from designated directions output by each downlink are superimposed in phase to obtain the complex digital signal received by the i-th receiving direction pattern. The specific technical solution is as follows:

[0012] When the antenna array adopts a two-dimensional planar array, the radio frequency analog signal received by the mn-th antenna element is processed by the mn-th duplexer, the mn-th limiter, and the mn-th LNA to obtain the radio frequency analog signal output by the mn-th LNA, which is represented by R. 00 (t) represents the RF analog signal output by the 00th LNA, R 00 (t) contains (θ) i ,φ i ) Directional incoming wave signal It means that a i (t) represents (θ) i ,φ i The amplitude signal of the analog signal carried by the directional incoming wave signal. Represent (θ) i ,φ i The phase signal of the analog signal carried by the directional wave signal, where t represents the continuous time independent variable, and f0 represents (θ) i ,φ i The center frequency of the incoming wave signal is θ, where i represents the direction the main lobe points (θ). i ,φ i The receive pattern number, denoted by R mn (t) represents the RF analog signal output by the mn-th LNA, R mn (t) contains (θ) i ,φ i ) Directional incoming wave signal express, Reaching the mn-th antenna element ratio Arrival at the 00th antenna element in advance Time, then R mn (t) Its amplitude is controlled by the mn-th numerically controlled attenuator, and the attenuation of the mn-th numerically controlled attenuator is set to -20log. 10 (W i [m,n]) decibels, W i [m,n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the two-dimensional planar array; the RF analog signal output by the mn-th digitally controlled attenuator is represented by A. mn (t) indicates that A mn (t) contains (θ) i ,φ i ) Directional incoming wave signal A mn (t) Its phase is controlled by the mn-th numerically controlled phase shifter, and the phase shift amount of the mn-th numerically controlled phase shifter is... radians, B represents (θ) i ,φ i The bandwidth of the analog signal carried by the incoming directional wave signal, and the RF analog signal output by the mn-th digitally controlled phase shifter are represented by P. mn (t) indicates that P mn (t) contains (θ) i ,φ i ) Directional incoming wave signal Let o(t) = 2cos(2πf1t) represent the local analog sine wave signal generated by the local analog sine wave generator, and f1 represent the frequency of the local analog sine wave signal. The value of f1 must satisfy the following conditions: P mn The output signal obtained by multiplying (t) and o(t) by the mn-th analog multiplier is used to obtain the intermediate frequency analog signal by passing it through the mn-th analog LPF. mn (t) represents the cutoff frequency of all simulated LPFs, where I is the cutoff frequency. mn (t) contains elements from (θ) i ,φ i Intermediate frequency analog signal in the direction of) I mn (t) The intermediate frequency digital signal output by the mn-th ADC is used by I mn [k] indicates that k represents the discrete-time independent variable of the digital signal, and the sampling clock of the mn-th ADC is advanced by the sampling clock of the 00-th ADC. The time interval appears, and the sampling time interval of all ADCs is... I mn [k] contains elements from (θ) i ,φ i Intermediate frequency digital signal in the direction of) in All ADC outputs come from (θ) i ,φ i Intermediate frequency digital signal in the direction of) Synchronously arriving at their respective quadrature digital demodulators, eliminating the differences in ADC outputs from (θ) i ,φ i Inter-symbol interference between intermediate frequency digital signals in the (θ) direction is eliminated, thereby removing interference from (θ) at the downlink outputs of each line. i ,φ i Inter-symbol interference between complex digital signals in the direction of ); the local digital sine wave generator produces two mutually orthogonal digital sine waves, one of which is used for This indicates that another route is used It means, I mn [k] and O c [k] The output signal obtained by multiplying by the first digital multiplier of the mnth generation is used as the digital signal output by the first FIR LPF of the mnth generation. mn [k] indicates that S mn [k] contains elements from (θ) i ,φ i Digital signals in the direction I mn [k] and O s The output signal obtained by multiplying by the mn-th second digital multiplier is used as the digital signal output by the mn-th second FIR LPF and X. mn [k] indicates that X mn [k] contains elements from (θ) i ,φ i Digital signals in the direction The digital cutoff frequencies of all the first FIR LPF and second FIR LPF are 1. S mn [k] as the real part and X mn [k] forms the complex digital signal C of the mn-th downlink output as its imaginary part. mn [k]=S mn [k]+jX mn [k], j represents the imaginary unit, C mn [k] contains elements from (θ) i ,φ i Complex digital signals in the direction All Same phase indicates that the phase shift generated by the mn-th numerically controlled phase shifter is the same. The radian was eliminated (θ) i ,φ iThe spatial phase difference generated between different antenna elements for all frequency components within the bandwidth B of the incoming signal from the direction of travel; the receiving signal processing algorithm for the i-th receiving pattern of the two-dimensional planar array is as follows:

[0013]

[0014] Where R i [k] represents the complex digital signal received by the i-th receiving pattern of the two-dimensional planar array, C mn [k] represents the complex digital signal output by the mn-th downlink of the two-dimensional planar array, C mn [k] is obtained through the signal processing of the mn-th downlink of the above two-dimensional planar array; the algorithm of equation (1) makes the output of all downlinks from (θ) i ,φ i Complex digital signals in the direction Equal-phase superposition yields the complex digital signal received by the i-th receiving pattern; the baseband complex digital signal received by the i-th receiving pattern of the two-dimensional planar array.

[0015] When a two-dimensional conformal antenna array is used, a two-dimensional planar array is constructed based on the two-dimensional conformal array. The signal processing flow of the downlink of the two-dimensional conformal array is the same as that of the two-dimensional planar array downlink. The difference in signal processing is that the attenuation of the mn-th numerically controlled attenuator of the two-dimensional conformal array is -20log. 10 (W i [m,n]) decibels, W i [m,n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the two-dimensional conformal array, and the phase shift of the mn-th numerically controlled phase shifter of the two-dimensional conformal array is... In radians, the mn-th ADC sampling clock of a two-dimensional conformal array is ahead of the 00-th ADC sampling clock. The timing is as follows; the receiving signal processing algorithm for the i-th receiving pattern of the two-dimensional conformal array is:

[0016]

[0017] Where R i [k] represents the complex digital signal received by the i-th receiving pattern of the two-dimensional conformal array, C mn [k] represents the complex digital signal output by the mn-th downlink of the two-dimensional conformal array, C mn [k] is obtained through signal processing of the mn-th downlink of the two-dimensional conformal array; the algorithm of equation (2) makes the output of all downlinks from (θ) i ,φ iThe complex digital signals in the i-th receiving pattern are obtained by superimposing them in equal phase from the complex digital signals in the i-th receiving pattern; the baseband complex digital signal received by the i-th receiving pattern of the two-dimensional conformal array.

[0018] When the antenna array uses a one-dimensional linear array, the signal processing flow of the downlink of the one-dimensional linear array is the same as that of the two-dimensional planar array downlink. The difference in signal processing is that the attenuation of the nth numerically controlled attenuator of the one-dimensional linear array is -20log. 10 (W i [n] decibels, where i represents the direction θ from which the main lobe points to the incoming wave. i The receive pattern number, W i [n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the one-dimensional linear array, and the phase shift of the n-th numerically controlled phase shifter of the one-dimensional linear array is... In radians, the sampling clock of the nth ADC of a one-dimensional linear array is ahead of the sampling clock of the 0th ADC. The timing is as follows; the signal processing algorithm for the i-th receiving pattern of a one-dimensional linear array is:

[0019]

[0020] Where R i [k] represents the complex digital signal received by the i-th receiving pattern of the one-dimensional linear array, C n [k] represents the complex digital signal output by the nth downlink of the one-dimensional linear array, C n [k] is obtained through signal processing of the nth downlink of a one-dimensional linear array; the algorithm of equation (3) makes all downlink outputs from θ i The complex digital signals in the direction are superimposed with equal phase to obtain the complex digital signal received by the i-th receiving pattern; the baseband complex digital signal received by the i-th receiving pattern of the one-dimensional linear array.

[0021] When a one-dimensional conformal array is used for the antenna array, a one-dimensional linear array is constructed based on the one-dimensional conformal array. The signal processing flow of the downlink of the one-dimensional conformal array is the same as that of the one-dimensional linear array downlink. The difference in signal processing is that the attenuation of the nth numerically controlled attenuator of the one-dimensional conformal array is -20log. 10 (W i [n]) decibels, W i [n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the one-dimensional conformal array. In radians, the sampling clock of the nth ADC of a one-dimensional conformal array is earlier than the sampling clock of the 0th ADC. The timing is as follows; the receiving signal processing algorithm for the i-th receiving pattern of a one-dimensional conformal array is:

[0022]

[0023] Where R i [k] represents the complex digital signal received by the i-th receiving pattern of the one-dimensional conformal array, C n [k] represents the complex digital signal output by the nth downlink of the one-dimensional conformal array, C n [k] is obtained through signal processing of the nth downlink of the one-dimensional conformal array; the algorithm of equation (4) makes all downlink outputs from θ i The complex digital signals in the direction are superimposed with equal phase to obtain the complex digital signal received by the i-th receiving pattern; the baseband complex digital signal received by the i-th receiving pattern of the one-dimensional conformal array.

[0024] The beneficial effects of the broadband analog active phased array receiving system and its received signal processing method are as follows:

[0025] 1. Existing broadband analog active phased array receiver systems use delay lines to compensate for the time difference of arrival, which results in signal distortion and inter-symbol interference. The broadband analog active phased array receiver system, by precisely controlling the time difference of the sampling clock of each downlink ADC, ensures that the intermediate frequency digital signals output by all ADCs from the specified direction arrive synchronously at their respective quadrature digital demodulators, eliminating inter-symbol interference between the complex digital signals output by each downlink from the specified direction. This results in higher processing accuracy of the incoming wave signal compared to existing broadband analog active phased array receiver systems.

[0026] 2. Different frequency components of the incoming wave signal from a specified direction generate different spatial phase differences between different antenna elements. Existing receiving signal processing algorithms only compensate for the spatial phase difference generated between different antenna elements at the center frequency f0 of the incoming wave signal, resulting in low calculation accuracy. The receiving signal processing method described above can eliminate the spatial phase difference generated between different antenna elements at all frequency components within the bandwidth of the incoming wave signal from a specified direction, making all downlink output complex digital signals from the specified direction superimposed in phase, resulting in higher calculation accuracy.

[0027] 3. Because the frequency f1 of the local analog sine wave signal is... The broadband analog active phased array receiver system will receive the center frequency of the intermediate frequency analog signal. By minimizing the sampling clock frequency of the ADC, manufacturing costs are reduced to a minimum. Furthermore, this enables the broadband analog active phased array receiver system to handle ultra-wideband incoming signals. The value can reach as high as 1.

[0028] 4. The broadband analog active phased array receiving system and its received signal processing method are applicable to broadband wireless communication (e.g., 5G / 6G mobile communication, broadband satellite internet, broadband Wi-Fi, etc.) and broadband analog active phased array radar (e.g., spread spectrum radar, frequency modulated pulse radar, frequency modulated continuous wave radar, etc.) receiving systems. They are also applicable to narrowband wireless communication and narrowband analog active phased array radar receiving systems, and have higher processing accuracy for incoming wave signals. The calculation accuracy of the received signal processing algorithm is also higher. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of the present invention and the prior art, the accompanying drawings used in the description of the embodiments of the present invention and the prior art are briefly introduced below. The accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 A schematic diagram of the structure of a two-dimensional planar array;

[0031] Figure 2 Hardware structure and signal processing flowchart of each downlink of the two-dimensional array;

[0032] Figure 3 A schematic diagram of a one-dimensional linear array;

[0033] Figure 4 Hardware structure and signal processing flowchart for each downlink of a one-dimensional array.

[0034] In the diagram: 201, the mn-th orthogonal digital demodulator of the two-dimensional array; 202, the complex digital signal output from the 0th downlink of the two-dimensional array; 203, the complex digital signal output from the (M-1)(N-1)th downlink of the two-dimensional array; 401, the n-th orthogonal digital demodulator of the one-dimensional array; 402, the complex digital signal output from the 0th downlink of the one-dimensional array; 403, the complex digital signal output from the (N-1)th downlink of the one-dimensional array. Detailed Implementation

[0035] The technical solution of the present invention will be clearly and completely described below with reference to the accompanying drawings. The following description only describes some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, other embodiments obtained by those skilled in the art without creative effort are all within the protection scope of the present invention.

[0036] A broadband analog active phased array receiving system includes an antenna array, which can be a two-dimensional planar array, a two-dimensional conformal array, a one-dimensional linear array, or a one-dimensional conformal array. Each antenna element of the antenna array is connected to a downlink via a duplexer. The radio frequency analog signal received by each antenna element is output as a complex digital signal via the corresponding downlink. The hardware structure and parameter settings of the downlink are as follows:

[0037] When the antenna array adopts a two-dimensional planar array, refer to Figure 1 A two-dimensional planar array, viewed horizontally, consists of M rows of one-dimensional linear arrays, and viewed vertically, consists of N columns of one-dimensional linear arrays. Let d x The spacing between adjacent antenna elements in a longitudinal one-dimensional linear array is represented by d. y The spacing between adjacent antenna elements in a horizontal one-dimensional linear array is represented by m = 0, 1…M-1, the row number of the two-dimensional planar array is represented by n = 0, 1…N-1, and the column number of the two-dimensional planar array is represented by mn. The downlink number of the antenna element in the m-th row and n-th column and its connection is represented by mn. (Refer to...) Figure 2 The mn-th downlink includes, in sequence, the mn-th duplexer, the mn-th limiter, the mn-th LNA, the mn-th digitally controlled attenuator, the mn-th digitally controlled phase shifter, the mn-th analog multiplier, the mn-th analog LPF, the mn-th ADC, and the mn-th quadrature digital demodulator 201. The mn-th quadrature digital demodulator 201 is divided into two branches, the input of each branch being connected to the output of the mn-th ADC. One branch includes, in sequence, the mn-th first digital multiplier and the mn-th first FIR LPF, and the other branch includes, in sequence, the mn-th second digital multiplier and the mn-th second FIR LPF. The receiving system uses a shared local analog sine wave generator (LPF). The analog sine wave signal generated by the local LPF is connected to the other input of the mn-th analog multiplier. The receiving system also uses a shared local digital sine wave generator (DGF). The DGF generates two mutually orthogonal digital sine waves; one is connected to the other input of the mn-th first digital multiplier, and the other is connected to the other input of the mn-th second digital multiplier. The digital signal output from the mn-th first FIR LPF, as its real part, and the digital signal output from the mn-th second FIR LPF, as its imaginary part, constitute the complex digital signal output by the mn-th downlink. The attenuation of the mn-th digitally controlled attenuator is set to -20log. 10 (W i [m,n] decibels, where i represents the direction the main lobe points towards the incoming wave (θ). i ,φ i The receiver pattern number, W i [m,n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the two-dimensional planar array, as shown in the reference. Figure 1 θ i The elevation angle, φ, represents the angle between the direction of the incoming wave and the array normal. i The azimuth angle representing the direction of incoming waves is the angle between the vertical projection of the direction of incoming waves onto the array plane (xy plane) and the vertical axis (x-axis). i ,φ i (Specified by the user; the phase shift amount of the mn-th CNC phase shifter is set to...) radians, f0 represents (θ) i ,φ i The center frequency of the incoming wave signal from the direction of θ, where B represents (θ). i ,φ i The bandwidth of the analog signal carried by the directional incoming wave signal, where c represents the speed of light; the frequency of the analog sine wave signal generated by the local analog sine wave generator is set to... The cutoff frequency of all analog LPFs is set to B; the mn-th ADC sampling clock is set to be earlier than the 00-th DC sampling clock. The timing is as follows: The digital frequencies of the two mutually orthogonal digital sine signals generated by the local digital sine wave generator are both set to [value missing]. The digital cutoff frequencies of all first FIR LPFs and second FIR LPFs are set to [value].

[0038] When the antenna array adopts a two-dimensional conformal array, a two-dimensional planar array is constructed based on the two-dimensional conformal array. The downlink hardware structure of the two-dimensional conformal array is the same as that of the two-dimensional planar array downlink. The difference in parameter settings is that the attenuation of the mn-th numerically controlled attenuator is set to -20log. 10 (W i [m,n]) decibels, W i [m,n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the two-dimensional conformal array, and the phase shift of the mn-th numerically controlled phase shifter is set to... In radians, the mn-th ADC sampling clock is set to be earlier than the 00-th ADC sampling clock. Time appears, among which This represents the difference between the mn-th antenna element of a two-dimensional conformal array and the mn-th antenna element of a two-dimensional planar array at (θ) i ,φ i The distance difference in the direction;

[0039] When the antenna array uses a one-dimensional linear array, refer to Figure 3 A one-dimensional linear array consists of N antenna elements, where the distance between adjacent antenna elements is denoted by d. The sequence number of the nth antenna element and its connected downlink is represented by n = 0, 1…N-1. (Refer to...) Figure 4The hardware structure of the downlink of the one-dimensional linear array is the same as that of the downlink of the two-dimensional planar array. The nth downlink includes, in sequence, an nth duplexer, an nth limiter, an nth LNA, an nth digitally controlled attenuator, an nth digitally controlled phase shifter, an nth analog multiplier, an nth analog LPF, an nth ADC, and an nth quadrature digital demodulator 401. The nth quadrature digital demodulator 401 is divided into two branches, each with its input connected to the output of the nth ADC. One branch includes, in sequence, an nth first digital multiplier and an nth first FIR LPF; the other branch includes, in sequence, an nth second digital multiplier and an nth second FIR LPF. The digital signal output from the nth first FIR LPF, as the real part, and the digital signal output from the nth second FIR LPF, as the imaginary part, constitute the complex digital signal output by the nth downlink. The parameter setting difference is that the attenuation of the nth digitally controlled attenuator is set to -20log. 10 (W i [n]) decibels, W i [n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the one-dimensional linear array, and the phase shift of the n-th numerically controlled phase shifter is set to... In radians, the sampling clock of the nth ADC is set to be earlier than the sampling clock of the 0th ADC. The time appears, refer to Figure 3 θ i θ represents the angle between the direction of arrival and the array normal, where i represents the direction the main lobe points towards the direction of arrival. i The receiver pattern number, the direction of arrival θ i As specified by the user;

[0040] When the antenna array uses a one-dimensional conformal array, a one-dimensional linear array is constructed based on the one-dimensional conformal array. The downlink hardware structure of the one-dimensional conformal array is the same as that of the one-dimensional linear array downlink, with the parameter settings differing only in that the attenuation of the nth numerically controlled attenuator is set to -20log. 10 (W i [n]) decibels, W i [n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the one-dimensional conformal array, and the phase shift amount of the n-th numerically controlled phase shifter is set to... In radians, the sampling clock of the nth ADC is set to be earlier than the sampling clock of the 0th ADC.

[0041] Time appears, among which This represents the nth antenna element of a one-dimensional conformal array and the nth antenna element of a one-dimensional linear array at θ. i The difference in distance along the direction.

[0042] A received signal processing method, wherein the received signal processing method is based on the broadband analog active phased array receiving system; i represents the receiving pattern number of the main lobe pointing towards the direction of arrival, and l represents the antenna element and its connected downlink number (l generally refers to the antenna element and its connected downlink number of a two-dimensional planar array, a two-dimensional conformal array, a one-dimensional linear array, or a one-dimensional conformal array). This represents the time of arrival (TOA) of the incoming signal from a specified direction at the l-th antenna element and at the reference antenna element. The RF analog signal received by the l-th antenna element passes through the l-th duplexer, the l-th limiter, and the l-th LNA to obtain the RF analog signal output by the l-th LNA. The RF analog signal output by the l-th LNA has its amplitude controlled by the l-th digitally controlled attenuator according to a window function. The RF analog signal output by the l-th digitally controlled attenuator has its phase controlled by the l-th digitally controlled phase shifter. Let the phase shift of the l-th digitally controlled phase shifter be... The phase shift amount generated by each CNC phase shifter eliminates the spatial phase difference between different antenna elements for all frequency components within the bandwidth B of the incoming wave signal from the specified direction. f0 represents the center frequency of the incoming wave signal from the specified direction, and B represents the bandwidth of the analog signal carried by the incoming wave signal from the specified direction. The RF analog signal output by the l-th CNC phase shifter is passed through the l-th analog multiplier and the l-th analog LPF to obtain the l-th intermediate frequency analog signal. The l-th intermediate frequency analog signal is passed through the l-th ADC to obtain the l-th intermediate frequency digital signal. The sampling clock of the l-th ADC is advanced compared to the sampling clock of the reference ADC. The timing difference between the sampling clocks of each ADC eliminates inter-symbol interference between intermediate frequency (IF) digital signals from designated directions output by different ADCs, thereby eliminating inter-symbol interference between complex digital signals from designated directions output by each downlink. The l-th IF digital signal is processed by the l-th quadrature digital demodulator to obtain the complex digital signal output by the l-th downlink. The proposed receiving signal processing algorithm accumulates the complex digital signals output by each downlink, ensuring that the complex digital signals from designated directions output by each downlink are superimposed in phase to obtain the complex digital signal received by the i-th receiving direction pattern. The specific technical solution is as follows:

[0043] When the antenna array adopts a two-dimensional planar array, refer to Figure 1-2 Without loss of generality, taking the 00th antenna element as the reference antenna element, the 00th ADC as the reference ADC, and the 00th downlink as the reference downlink, the RF analog signal received by the mnth antenna element is processed by the mnth duplexer, the mnth limiter, and the mnth LNA to obtain the RF analog signal output by the mnth LNA. R 00 (t) represents the RF analog signal output by the 00th LNA. Without loss of generality, R 00 (t) contains (θ) i ,φ i ) Directional incoming wave signal It means that a i (t) represents (θ) i ,φ i The amplitude signal of the analog signal carried by the directional incoming wave signal. Represent (θ) i ,φ i The phase signal of the analog signal carried by the directional incoming wave signal, where t represents the continuous time independent variable, and f0 represents (θ) i ,φ i The center frequency of the incoming wave signal is θ, where i represents the direction the main lobe points (θ). i ,φ i The receive pattern number, denoted by R mn (t) represents the RF analog signal output by the mn-th LNA, R mn (t) contains (θ) i ,φ i ) Directional incoming wave signal This indicates that the direction of the incoming wave (θ) i ,φ i As can be seen from the two-dimensional planar array structure, Reaching the mn-th antenna element ratio Arrival at the 00th antenna element in advance Time, then R mn (t) Its amplitude is controlled by the mn-th numerically controlled attenuator, and the attenuation of the mn-th numerically controlled attenuator is set to -20log. 10 (W i [m,n]) decibels, W i [m,n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the two-dimensional planar array. Commonly used window functions include rectangular window function, Taylor window function, Chebyshev window function, Hamming window function, Hann window function, Blackman window function, Gaussian window function, Kaiser window function, etc. The RF analog signal output by the mn-th digitally controlled attenuator is represented by A. mn (t) indicates that A mn (t) contains (θ) i ,φ i ) Directional incoming wave signal A mn (t) Its phase is controlled by the mn-th numerically controlled phase shifter, and the phase shift amount of the mn-th numerically controlled phase shifter is... radians, B represents (θ) i ,φ i The bandwidth of the analog signal carried by the incoming directional wave signal, and the RF analog signal output by the mn-th digitally controlled phase shifter are represented by P. mn (t) indicates that P mn (t) contains (θ)i ,φ i ) Directional incoming wave signal Without loss of generality, let o(t) = 2cos(2πf1t) represent the local analog sine wave signal generated by the local analog sine wave generator, and let f1 represent the frequency of the local analog sine wave signal. The value of f1 must satisfy the following conditions: P mn The output signal obtained by multiplying (t) and o(t) by the mn-th analog multiplier, and then passing it through the mn-th analog LPF to obtain the intermediate frequency analog signal, is used by I. mn (t) represents the cutoff frequency of all simulated LPFs, where I is the cutoff frequency. mn (t) contains elements from (θ) i ,φ i Intermediate frequency analog signal in the direction of) I mn (t) The intermediate frequency digital signal output by the mn-th ADC is used by I mn [k] indicates that k represents the discrete-time independent variable of the digital signal, in order to account for all... To perform synchronous sampling, the technical approach adopted in this application is as follows: the sampling clock of the mn-th ADC is advanced compared to the sampling clock of the 00-th ADC. Time appears ( If the value is negative, it indicates a delayed occurrence. All A DC sampling time intervals are... I mn [k] contains elements from (θ) i ,φ i Intermediate frequency digital signal in the direction of)

[0044] in Equation (A) shows that all ADC outputs come from (θ) i ,φ i Intermediate frequency digital signal in the direction of) The signals arrive synchronously at their respective quadrature digital demodulators 201, eliminating the differences in output from (θ) between different ADCs. i ,φ i Inter-symbol interference between intermediate frequency digital signals in the (θ) direction is eliminated, thereby removing interference from (θ) at the downlink outputs of each line. i ,φ i Inter-symbol interference between complex digital signals in the direction of ); the local digital sine wave generator produces two mutually orthogonal digital sine waves, without loss of generality, one of which is used for This indicates that another route is used It means, I mn [k] and O c [k] The output signal obtained by multiplying by the first digital multiplier of the mnth generation is used as the digital signal output by the first FIR LPF of the mnth generation. mn[k] indicates that S mn [k] contains elements from (θ) i ,φ i Digital signals in the direction I mn [k] and O s The output signal obtained by multiplying by the mn-th second digital multiplier is used as the digital signal output by the mn-th second FIR LPF and X. mn [k] indicates that X mn [k] contains elements from (θ) i ,φ i Digital signals in the direction The digital cutoff frequencies of all the first FIRLPF and second FIRLPF are 1. S mn [k] as the real part and X mn [k] forms the complex digital signal C of the mn-th downlink output as its imaginary part. mn [k]=S mn [k]+jX mn [k], j represents the imaginary unit, C mn [k] contains elements from (θ) i ,φ i Complex digital signals in the direction

[0045] Equation (B) shows that all Same phase indicates that the phase shift generated by the mn-th numerically controlled phase shifter is the same. The radian was eliminated (θ) i ,φ i The spatial phase difference generated between different antenna elements for all frequency components within the bandwidth B of the incoming signal from the direction of travel; the receiving signal processing algorithm for the i-th receiving pattern of the two-dimensional planar array is as follows:

[0046]

[0047] Where R i [k] represents the complex digital signal received by the i-th receiving pattern of the two-dimensional planar array, C mn [k] represents the complex digital signal output by the mn-th downlink of the two-dimensional planar array, C mn [k] is obtained through the signal processing of the mn-th downlink of the above two-dimensional planar array; the algorithm of equation (1) makes the output of all downlinks from (θ) i ,φ i Complex digital signals in the direction Equal phase superposition yields the complex digital signal received in the i-th receiving pattern; since R i The sampling time interval of [k] is The baseband complex digital signal received by the i-th receiving pattern of the two-dimensional planar array The sampling time interval is Take R i [k] The average of two adjacent sample values ​​is used as Value, then

[0048] Furthermore, It can also be used for R mn (t) is obtained by performing multi-stage downconversion;

[0049] When a two-dimensional conformal antenna array is used, a two-dimensional planar array is constructed based on the two-dimensional conformal array. The signal processing flow of the downlink of the two-dimensional conformal array is the same as that of the two-dimensional planar array downlink. The difference in signal processing is that the attenuation of the mn-th numerically controlled attenuator of the two-dimensional conformal array is -20log. 10 (W i [m,n]) decibels, W i [m,n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the two-dimensional conformal array, and the phase shift of the mn-th numerically controlled phase shifter of the two-dimensional conformal array is... In radians, the mn-th ADC sampling clock of a two-dimensional conformal array is ahead of the 00-th ADC sampling clock. The timing is as follows; the receiving signal processing algorithm for the i-th receiving pattern of the two-dimensional conformal array is:

[0050]

[0051] Where R i [k] represents the complex digital signal received by the i-th receiving pattern of the two-dimensional conformal array, C mn [k] represents the complex digital signal output by the mn-th downlink of the two-dimensional conformal array, C mn [k] is obtained through signal processing of the mn-th downlink of the two-dimensional conformal array; similarly, the algorithm of equation (2) makes all downlink outputs from (θ) i ,φ i The complex digital signals in the i-th receiving pattern are obtained by superimposing them in equal phase from the complex digital signals in the i-th receiving pattern; the baseband complex digital signal received by the i-th receiving pattern of the two-dimensional conformal array.

[0052] When the antenna array uses a one-dimensional linear array, refer to Figure 3-4 The signal processing flow of the downlink of a one-dimensional linear array is the same as that of the downlink of a two-dimensional planar array. The difference in signal processing is that the attenuation of the nth numerically controlled attenuator of the one-dimensional linear array is -20log. 10 (W i[n] decibels, where i represents the direction θ from which the main lobe points to the incoming wave. i The receive pattern number, W i [n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the one-dimensional linear array, and the phase shift of the n-th numerically controlled phase shifter of the one-dimensional linear array is... In radians, the sampling clock of the nth ADC of a one-dimensional linear array is ahead of the sampling clock of the 0th ADC. The timing is as follows; the signal processing algorithm for the i-th receiving pattern of a one-dimensional linear array is:

[0053]

[0054] Where R i [k] represents the complex digital signal received by the i-th receiving pattern of the one-dimensional linear array, C n [k] represents the complex digital signal output by the nth downlink of the one-dimensional linear array, C n [k] is obtained through signal processing of the nth downlink of a one-dimensional linear array; similarly, the algorithm in equation (3) makes all downlink outputs from θ i The complex digital signals in the direction are superimposed with equal phase to obtain the complex digital signal received by the i-th receiving pattern; the baseband complex digital signal received by the i-th receiving pattern of the one-dimensional linear array.

[0055] When a one-dimensional conformal array is used for the antenna array, a one-dimensional linear array is constructed based on the one-dimensional conformal array. The signal processing flow of the downlink of the one-dimensional conformal array is the same as that of the one-dimensional linear array downlink. The difference in signal processing is that the attenuation of the nth numerically controlled attenuator of the one-dimensional conformal array is -20log. 10 (W i [n]) decibels, W i [n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the one-dimensional conformal array. In radians, the sampling clock of the nth ADC of a one-dimensional conformal array is earlier than the sampling clock of the 0th ADC. The timing is as follows; the receiving signal processing algorithm for the i-th receiving pattern of a one-dimensional conformal array is:

[0056]

[0057] Where R i [k] represents the complex digital signal received by the i-th receiving pattern of the one-dimensional conformal array, C n [k] represents the complex digital signal output by the nth downlink of the one-dimensional conformal array, C n[k] is obtained through signal processing of the nth downlink of the one-dimensional conformal array; similarly, the algorithm of equation (4) makes all downlink outputs from θ i The complex digital signals in the direction are superimposed with equal phase to obtain the complex digital signal received by the i-th receiving pattern; the baseband complex digital signal received by the i-th receiving pattern of the one-dimensional conformal array.

[0058] The above embodiments have provided a detailed description of the present invention, but the present invention is not limited to the above embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the concept of the present invention, and these equivalent modifications or substitutions are all included within the scope defined by the claims of this application.

Claims

1. A broadband analog active phased array receiving system, characterized in that, The receiving system includes an antenna array, which can be a two-dimensional planar array, a two-dimensional conformal array, a one-dimensional linear array, or a one-dimensional conformal array. Each antenna element of the antenna array is connected to a downlink via a duplexer. The radio frequency analog signal received by each antenna element is output as a complex digital signal through the corresponding downlink. The hardware structure and parameter settings of the downlink are as follows: When the antenna array adopts a two-dimensional planar array, the two-dimensional planar array is composed of M rows of one-dimensional linear arrays when viewed horizontally, and N columns of one-dimensional linear arrays when viewed vertically, denoted by d. x The spacing between adjacent antenna elements in a longitudinal one-dimensional linear array is represented by d. y Let m represent the spacing between adjacent antenna elements in a horizontal one-dimensional linear array, m = 0, 1…M-1 represent the row number of the two-dimensional planar array, n = 0, 1…N-1 represent the column number of the two-dimensional planar array, and mn represent the sequence number of the antenna element in the m-th row and n-th column and its connected downlink. The mn-th downlink includes, in sequence, the mn-th duplexer, the mn-th limiter, the mn-th LNA, the mn-th digitally controlled attenuator, the mn-th digitally controlled phase shifter, the mn-th analog multiplier, the mn-th analog LPF, the mn-th ADC, and the mn-th quadrature digital demodulator. The mn-th quadrature digital demodulator is divided into two branches, and the input of each branch is connected to the output of the mn-th ADC. One branch includes, in sequence, the mn-th first digital multiplier and the mn-th first FIR LPF, and the other branch includes, in sequence, the mn-th second digital multiplier and the mn-th second FIR LPF. The receiving system uses a shared local analog sine wave generator (LPF). The analog sine wave signal generated by this generator is connected to the other input of the mn-th analog multiplier. The receiving system also uses a shared local digital sine wave generator (DGF). This DGF generates two mutually orthogonal digital sine waves: one connected to the other input of the mn-th first digital multiplier, and the other connected to the other input of the mn-th second digital multiplier. The digital signal output from the mn-th first FIR LPF, as its real part, and the digital signal output from the mn-th second FIR LPF, as its imaginary part, constitute the complex digital signal output by the mn-th downlink. The attenuation of the mn-th digitally controlled attenuator is set to -20log. 10 (W i [m,n] decibels, where i represents the direction the main lobe points towards the incoming wave (θ). i ,φ i The receiver pattern number, W i [m,n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the two-dimensional planar array, θ i The elevation angle φ represents the direction of the incoming wave. i The azimuth angle representing the direction of incoming wave, the direction of incoming wave (θ) i ,φ i ) As specified by the user; The phase shift amount of the mn-th numerically controlled phase shifter is set as follows: radians, f0 represents (θ) i ,φ i The center frequency of the incoming wave signal from the direction of θ, where B represents (θ). i ,φ i The bandwidth of the analog signal carried by the directional incoming wave signal, where c represents the speed of light; the frequency of the analog sine wave signal generated by the local analog sine wave generator is set to... The cutoff frequency of all analog LPFs is set to B; the mn-th ADC sampling clock is set to be earlier than the 00-th ADC sampling clock. The timing is as follows: The digital frequencies of the two mutually orthogonal digital sine signals generated by the local digital sine wave generator are both set to [value missing]. The digital cutoff frequencies of all first FIR LPFs and second FIR LPFs are set to [value]. When the antenna array adopts a two-dimensional conformal array, a two-dimensional planar array is constructed based on the two-dimensional conformal array. The downlink hardware structure of the two-dimensional conformal array is the same as that of the two-dimensional planar array downlink. The difference in parameter settings is that the attenuation of the mn-th numerically controlled attenuator is set to -20log. 10 (W i [m,n]) decibels, W i [m,n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the two-dimensional conformal array, and the phase shift of the mn-th numerically controlled phase shifter is set to... In radians, the mn-th ADC sampling clock is set to be earlier than the 00-th ADC sampling clock. Time appears, among which This represents the difference between the mn-th antenna element of a two-dimensional conformal array and the mn-th antenna element of a two-dimensional planar array at (θ) i ,φ i The distance difference in the direction; When the antenna array uses a one-dimensional linear array, it consists of N antenna elements. The distance between adjacent antenna elements is denoted by d. The sequence number of the nth antenna element and its connected downlink is represented by n = 0, 1…N-1. The hardware structure of the downlink of a one-dimensional linear array is the same as that of a two-dimensional planar array. The nth downlink includes, in sequence, the nth duplexer, nth limiter, nth LNA, nth digitally controlled attenuator, nth digitally controlled phase shifter, nth analog multiplier, nth analog LPF, nth ADC, and nth quadrature digital demodulator. The nth quadrature digital demodulator is divided into two branches, each with its input connected to the output of the nth ADC. One branch includes, in sequence, the nth first digital multiplier and the nth first FIR LPF; the other branch includes, in sequence, the nth second digital multiplier and the nth second FIR LPF. The digital signal output from the nth first FIR LPF is used as the real part and is then compared with the nth second FIR LPF. The digital signal output by the LPF, as the imaginary part, constitutes the complex digital signal output by the nth downlink. The parameter setting difference is that the attenuation of the nth digitally controlled attenuator is set to -20log. 10 (W i [n]) decibels, W i [n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the one-dimensional linear array, and the phase shift of the n-th numerically controlled phase shifter is set to... In radians, the sampling clock of the nth ADC is set to be earlier than the sampling clock of the 0th ADC. Time appears, θ i θ represents the angle between the direction of arrival and the array normal, where i represents the direction the main lobe points towards the direction of arrival. i The receiver pattern number, the direction of arrival θ i As specified by the user; When the antenna array uses a one-dimensional conformal array, a one-dimensional linear array is constructed based on the one-dimensional conformal array. The downlink hardware structure of the one-dimensional conformal array is the same as that of the one-dimensional linear array downlink, with the parameter settings differing only in that the attenuation of the nth numerically controlled attenuator is set to -20log. 10 (W i [n]) decibels, W i [n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the one-dimensional conformal array, and the phase shift amount of the n-th numerically controlled phase shifter is set to... In radians, the sampling clock of the nth ADC is set to be earlier than the sampling clock of the 0th ADC. Time appears, among which This represents the nth antenna element of a one-dimensional conformal array and the nth antenna element of a one-dimensional linear array at θ. i The difference in distance along the direction.

2. A method for processing received signals, characterized in that, The received signal processing method is based on the broadband analog active phased array receiving system of claim 1; i represents the receiving pattern number of the main lobe pointing towards the direction of arrival, l represents the antenna element and its connected downlink number, and so on. This represents the time of arrival (TOA) of the incoming signal from a specified direction at the l-th antenna element and at the reference antenna element. The RF analog signal received by the l-th antenna element passes through the l-th duplexer, the l-th limiter, and the l-th LNA to obtain the RF analog signal output by the l-th LNA. The RF analog signal output by the l-th LNA has its amplitude controlled by the l-th digitally controlled attenuator according to a window function. The RF analog signal output by the l-th digitally controlled attenuator has its phase controlled by the l-th digitally controlled phase shifter. Let the phase shift of the l-th digitally controlled phase shifter be... In radians, f0 represents the center frequency of the incoming signal from a specified direction, and B represents the bandwidth of the analog signal carried by the incoming signal from a specified direction. The RF analog signal output from the l-th numerically controlled phase shifter is passed through the l-th analog multiplier and the l-th analog LPF to obtain the l-th intermediate frequency analog signal. The l-th intermediate frequency analog signal is then passed through the l-th ADC to obtain the l-th intermediate frequency digital signal. The sampling clock of the l-th ADC is advanced compared to the sampling clock of the reference ADC. When the time arrives, the l-th intermediate frequency digital signal is processed by the l-th quadrature digital demodulator to obtain the complex digital signal output by the l-th downlink. The proposed receiving signal processing algorithm accumulates the complex digital signals output by each downlink to obtain the complex digital signal received by the i-th receiving pattern.

3. The receiving signal processing method according to claim 2, characterized in that, When the antenna array adopts a two-dimensional planar array, the radio frequency analog signal received by the mn-th antenna element is processed by the mn-th duplexer, the mn-th limiter, and the mn-th LNA to obtain the radio frequency analog signal output by the mn-th LNA, which is represented by R. mn (t) represents the RF analog signal output by the mn-th LNA, R mn (t) Its amplitude is controlled by the mn-th numerically controlled attenuator, and the attenuation of the mn-th numerically controlled attenuator is set to -20log. 10 (W i [m,n] decibels, where i represents the direction the main lobe points towards the incoming wave (θ). i ,φ i The receiver pattern number, W i [m,n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the two-dimensional planar array, and the RF analog signal output by the mn-th digitally controlled attenuator is represented by A. mn (t) indicates that A mn (t) Its phase is controlled by the mn-th numerically controlled phase shifter, and the phase shift amount of the mn-th numerically controlled phase shifter is... radians, f0 represents (θ) i ,φ i The center frequency of the incoming wave signal from the direction of θ, where B represents (θ). i ,φ i The bandwidth of the analog signal carried by the incoming directional wave signal, and the RF analog signal output by the mn-th digitally controlled phase shifter are represented by P. mn Let o(t) = 2cos(2πf1t) represent the local analog sine wave signal generated by the local analog sine wave generator, and let f1 represent the frequency of the local analog sine wave signal. The value of f1 must satisfy the following conditions: P mn The output signal obtained by multiplying (t) and o(t) by the mn-th analog multiplier, and then passing it through the mn-th analog LPF to obtain the intermediate frequency analog signal, is used by I. mn (t) represents the cutoff frequency of all simulated LPFs, where I is the cutoff frequency. mn (t) The intermediate frequency digital signal output by the mn-th ADC is used by I mn [k] indicates that k represents the discrete-time independent variable of the digital signal, and the sampling clock of the mn-th ADC is advanced by the sampling clock of the 0th ADC. The time interval appears, and the sampling time interval of all ADCs is... The local digital sine wave generator produces two mutually orthogonal digital sine waves, one of which is used for... This indicates that another route is used It means, I mn [k] and O c [k] The output signal obtained by multiplying by the first digital multiplier of the mnth generation is used as the digital signal output by the first FIR LPF of the mnth generation. mn [k] indicates that I mn [k] and O s The output signal obtained by multiplying by the mn-th second digital multiplier is used as the digital signal output by the mn-th second FIR LPF and X. mn [k] indicates that the digital cutoff frequencies of all first FIRLPF and second FIR LPF are 1. S mn [k] as the real part and X mn [k] forms the complex digital signal C of the mn-th downlink output as its imaginary part. mn [k]=S mn [k]+jX mn [k], j represents the imaginary unit; the signal processing algorithm for the i-th receiving pattern of the two-dimensional planar array is as follows: Where R i [k] represents the complex digital signal received by the i-th receiving pattern of the two-dimensional planar array, C mn [k] represents the complex digital signal output by the mn-th downlink of the two-dimensional planar array, C mn [k] is obtained through the signal processing of the mn-th downlink of the two-dimensional planar array; the baseband complex digital signal received by the i-th receiving pattern of the two-dimensional planar array.

4. The receiving signal processing method according to claim 3, characterized in that, When a two-dimensional conformal antenna array is used, a two-dimensional planar array is constructed based on the two-dimensional conformal array. The signal processing flow of the downlink of the two-dimensional conformal array is the same as that of the two-dimensional planar array downlink. The difference in signal processing is that the attenuation of the mn-th numerically controlled attenuator of the two-dimensional conformal array is -20log. 10 (W i [m,n]) decibels, W i [m,n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the two-dimensional conformal array, and the phase shift of the mn-th numerically controlled phase shifter of the two-dimensional conformal array is... In radians, the mn-th ADC sampling clock of a two-dimensional conformal array is ahead of the 00-th ADC sampling clock. The timing is as follows; the receiving signal processing algorithm for the i-th receiving pattern of the two-dimensional conformal array is: Where R i [k] represents the complex digital signal received by the i-th receiving pattern of the two-dimensional conformal array, C mn [k] represents the complex digital signal output by the mn-th downlink of the two-dimensional conformal array, C mn [k] is obtained through signal processing of the mn-th downlink of the two-dimensional conformal array; the baseband complex digital signal received by the i-th receiving pattern of the two-dimensional conformal array.

5. The method for processing received signals according to claim 3, characterized in that, When the antenna array uses a one-dimensional linear array, the signal processing flow of the downlink of the one-dimensional linear array is the same as that of the two-dimensional planar array downlink. The difference in signal processing is that the attenuation of the nth numerically controlled attenuator of the one-dimensional linear array is -20log. 10 (W i [n] decibels, where i represents the direction θ from which the main lobe points to the incoming wave. i The receive pattern number, W i [n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the one-dimensional linear array, and the phase shift of the n-th numerically controlled phase shifter of the one-dimensional linear array is... In radians, the sampling clock of the nth ADC of a one-dimensional linear array is ahead of the sampling clock of the 0th ADC. The timing is as follows; the signal processing algorithm for the i-th receiving pattern of a one-dimensional linear array is: Where R i [k] represents the complex digital signal received by the i-th receiving pattern of the one-dimensional linear array, C n [k] represents the complex digital signal output by the nth downlink of the one-dimensional linear array, C n [k] is obtained through signal processing of the nth downlink of a one-dimensional linear array; the baseband complex digital signal received by the ith receiving pattern of the one-dimensional linear array.

6. The method for processing received signals according to claim 5, characterized in that, When a one-dimensional conformal array is used for the antenna array, a one-dimensional linear array is constructed based on the one-dimensional conformal array. The signal processing flow of the downlink of the one-dimensional conformal array is the same as that of the one-dimensional linear array downlink. The difference in signal processing is that the attenuation of the nth numerically controlled attenuator of the one-dimensional conformal array is -20log. 10 (W i [n]) decibels, W i [n] represents the normalized amplitude-weighted window function corresponding to the i-th receiving pattern of the one-dimensional conformal array. In radians, the sampling clock of the nth ADC of a one-dimensional conformal array is earlier than the sampling clock of the 0th ADC. The timing is as follows; the receiving signal processing algorithm for the i-th receiving pattern of a one-dimensional conformal array is: Where R i [k] represents the complex digital signal received by the i-th receiving pattern of the one-dimensional conformal array, C n [k] represents the complex digital signal output by the nth downlink of the one-dimensional conformal array, C n [k] is obtained through signal processing of the nth downlink of the one-dimensional conformal array; the baseband complex digital signal received by the ith receiving pattern of the one-dimensional conformal array.

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