Data packet routing method, device and equipment and computer readable storage medium

Abstract

The invention discloses a data packet routing method, device and equipment and a computer readable storage medium, which are applied to the technical field of network-on-chip, and comprise the following steps: determining an initial first-level node and a target first-level node corresponding to a data packet; determining a path state from an initial first-level node to a second-level node in the first-level nodes to obtain a first-level first routing vector; determining path states from all the second-level nodes to the target first-level node based on the global list to obtain a first-level second routing vector; the global list is a path state from each secondary node to all primary nodes; and determining an optimal path from the initial first-level node to the target first-level node based on the first-level first routing vector and the first-level second routing vector, and routing the data packet based on the optimal path. Through the first-level first routing vector and the first-level second routing vector, the optimal path for data transmission is adaptively explored and selected, the transmission delay of the data packet is shortened, and the routing efficiency of the data packet is improved.

Description

Technical Field

[0001] This invention relates to the field of on-chip network technology, and in particular to a data packet routing method, apparatus, device, and computer-readable storage medium. Background Technology

[0002] In traditional hardware implementations, each routing node randomly selects an idle path for transmission based solely on the current output path status. This routing suffers from severe randomness, potentially requiring multiple selections at secondary nodes before a path to the target output port is found. Alternatively, when secondary nodes are severely congested, randomly selecting a secondary node for routing may result in data packets frequently detouring through tertiary nodes, exacerbating congestion at both levels and increasing transmission latency within the network topology, leading to low routing efficiency.

[0003] It is evident that improving the efficiency of data packet routing is a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide a data packet routing method, apparatus, device and computer-readable storage medium, which solves the problem of low efficiency in data packet routing in the prior art.

[0005] To address the aforementioned technical problems, this invention provides a data packet routing method applied to a three-tier CLOS network, comprising:

[0006] Determine the initial first-level node and the target first-level node corresponding to the data packet; wherein, the initial first-level node is the node corresponding to the input port, and the target first-level node is the node corresponding to the output port;

[0007] Determine the path status from the initial first-level node to the second-level node in the first-level node to obtain the first-level first routing vector;

[0008] Based on the global list, the path status from all secondary nodes to the target primary node is determined, and the primary second routing vector is obtained; wherein, the global list is the path status from each secondary node to all primary nodes;

[0009] The optimal path between the initial first-level node and the target first-level node is determined based on the first-level first routing vector and the second-level first routing vector, and the data packet is routed based on the optimal path.

[0010] On the one hand, determining the optimal path between the initial first-level node and the target first-level node based on the first-level first routing vector and the second-level first routing vector includes:

[0011] Perform a bitwise AND operation on the first-level routing vector and the second-level routing vector to obtain the first-level bitwise AND result;

[0012] Determine whether there is a free path in the first-level bitwise AND result;

[0013] If there are free paths, the optimal path is determined from the free paths, and the path status from the initial first-level node to the corresponding second-level node in the optimal path is updated.

[0014] If no free path exists, select one free path to the second-level node based on the first-level routing vector, and update the path status of the selected free path to occupied.

[0015] On the one hand, when an idle path exists, the optimal path is determined from the idle paths, and the path status from the initial first-level node to the corresponding second-level node in the optimal path is updated, including:

[0016] Determine the first and second level nodes corresponding to the free paths selected by the first-level nodes;

[0017] Determine the routing status from the first secondary node to the primary node to obtain the second-level first routing vector;

[0018] Based on the second-level first routing vector, determine whether the path from the first second-level node to the target first-level node is currently idle;

[0019] When the path is idle, the optimal path is determined as the final optimal path.

[0020] On the one hand, after determining whether the path from the first secondary node to the target primary node is currently idle based on the second-level first routing vector, the method further includes:

[0021] When the path is not idle, determine to route to the third-level node;

[0022] Determine the path status from the first second-level node to all third-level nodes to obtain the first routing vector of the third level;

[0023] Based on the first routing vector of the third level, determine the idle target third-level node, determine the path status from the idle target third-level node to the second-level node, and obtain the second routing vector of the third level.

[0024] Determine the path status from all current second-level nodes to the target first-level node to obtain the third-level routing vector;

[0025] The final optimal path is determined based on the third-level second routing vector and the third-level third routing vector.

[0026] On one hand, based on the first routing vector of the third level, idle target third-level nodes are determined, and the path status from the idle target third-level nodes to the second-level nodes is determined, resulting in the second routing vector of the third level, including:

[0027] Based on the first routing vector of the third level, determine the idle target third-level node, determine the path status from the idle target third-level node to the second-level node, and obtain the initial second routing vector of the third level;

[0028] The initial third-level second routing vector and the data accompanying vector are bitwise ANDed to obtain the third-level second routing vector; wherein, the data accompanying vector is the vector that determines that the path to the first second-level node is invalid.

[0029] On the one hand, before determining the path status from all second-level nodes to the target first-level node based on the global list and obtaining the first-level second routing vector, the process also includes:

[0030] Determine the update vector from each second-level node to all first-level nodes, and determine the global list locking matrix based on the update vector;

[0031] Perform a bitwise OR operation on each column of the global list locking matrix to determine the locking vector;

[0032] When querying the path status from the target query second-level node to the target first-level node in the global list, the corresponding bit of the locking vector is queried based on the target first-level node;

[0033] If the corresponding bit indicates that an update is in progress, the global list cannot be queried;

[0034] If the corresponding bit indicates that it is not in an update state, then the step of determining the path status from all secondary nodes to the target primary node based on the global list is performed to obtain the primary second routing vector.

[0035] On the one hand, the optimal path between the initial first-level node and the target first-level node is determined based on the first-level first routing vector and the second-level first routing vector, and the data packets are routed based on the optimal path, including:

[0036] Based on the first-level routing vector and the second-level routing vector, determine the free path between the initial first-level node and the target first-level node;

[0037] The optimal path is selected from the available paths based on the optimal path determination method; wherein, the optimal path determination method is the method for selecting the fastest available path.

[0038] The present invention also provides a packet routing device for use in a three-level CLOS network, comprising:

[0039] The input node and output node determination module is used to determine the initial first-level node and the target first-level node corresponding to the data packet; wherein, the initial first-level node is the node corresponding to the input port, and the target first-level node is the node corresponding to the output port;

[0040] The first-level routing vector determination module is used to determine the path status from the initial first-level node to the second-level node in the first-level nodes, and obtain the first-level first routing vector;

[0041] The first-level second routing vector determination module is used to determine the path status from all second-level nodes to the target first-level node based on a global list, thereby obtaining the first-level second routing vector; wherein, the global list is the path status from each second-level node to all first-level nodes;

[0042] The packet routing module is used to determine the optimal path between the initial first-level node and the target first-level node based on the first-level first routing vector and the second-level first routing vector, and to route the packet based on the optimal path.

[0043] The present invention also provides a packet routing device, comprising:

[0044] Memory, used to store computer programs;

[0045] A processor for executing the computer program to implement the steps of the packet routing method described above.

[0046] The present invention also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the above-described data packet routing method.

[0047] The present invention also provides a computer program product, including a computer program / instructions that, when executed by a processor, implement the steps of the above-described data packet routing method.

[0048] To address the aforementioned technical problems, embodiments of the present invention provide a data packet routing method, which may include: determining an initial first-level node and a target first-level node corresponding to a data packet; wherein the initial first-level node is the node corresponding to an input port, and the target first-level node is the node corresponding to an output port; determining the path status from the initial first-level node to a second-level node in the first-level nodes to obtain a first-level first routing vector; determining the path status from all second-level nodes to the target first-level node based on a global list to obtain a second-level first routing vector; wherein the global list is the path status from each second-level node to all first-level nodes; determining the optimal path between the initial first-level node and the target first-level node based on the first-level first routing vector and the second-level first routing vector, and routing the data packet based on the optimal path.

[0049] As can be seen from the above technical solution, the beneficial effects of the present invention are as follows: Compared with the current blind and random routing, the present invention, when routing data packets, by querying the path status to the target first-level node in the global list and combining it with the independent path status within the current node, achieves adaptive exploration and selection of the optimal path for data transmission, shortens data packet transmission delay, and improves data packet routing efficiency.

[0050] The present invention also provides a data packet routing device, apparatus, and computer-readable storage medium, which also have the above-mentioned beneficial effects. Attached Figure Description

[0051] To more clearly illustrate the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0052] Figure 1 This is a schematic diagram of a three-level CLOS network topology;

[0053] Figure 2 A flowchart of a data packet routing method provided in an embodiment of the present invention;

[0054] Figure 3 This is a schematic diagram of a global status list query mechanism according to an embodiment of the present invention;

[0055] Figure 4 This is a schematic diagram of a global state list update provided in an embodiment of the present invention;

[0056] Figure 5 This refers to the routing method of the first-level node in the adaptive shortest path selection implementation scheme proposed in this embodiment of the invention;

[0057] Figure 6 This is a schematic diagram of the routing method for a level 1 node in a traditional routing implementation scheme;

[0058] Figure 7 This is a schematic diagram of a two-level node routing method in an adaptive shortest path selection implementation scheme provided by an embodiment of the present invention;

[0059] Figure 8 This invention provides a routing method for three levels of nodes in an adaptive shortest path selection implementation scheme.

[0060] Figure 9 This is a block diagram of the hardware implementation of level 1 and level 3 nodes provided in an embodiment of the present invention;

[0061] Figure 10 This is a block diagram of the hardware implementation of a level 2 node provided in an embodiment of the present invention;

[0062] Figure 11 This is a schematic diagram illustrating a data packet processing method within a level 1 node 0.

[0063] Figure 12 This is a schematic diagram illustrating the extraction of routing status from level 2 node 5 to all level 1 nodes, provided by an embodiment of the present invention.

[0064] Figure 13 This invention provides a schematic diagram of a route from a current level 2 node to a target level 1 node 7, as provided in an embodiment of the invention.

[0065] Figure 14 This is a schematic diagram illustrating how to update the routing status of level 2 node 5 to level 1 node 7 in a global list to "occupied" according to an embodiment of the present invention.

[0066] Figure 15 This is a schematic diagram illustrating a data packet processing method within a level 1 node 0, as provided in an embodiment of the present invention.

[0067] Figure 16 This is a schematic diagram of the routing status from Level 2 node 4 to all Level 1 nodes, provided as an embodiment of the present invention.

[0068] Figure 17 A schematic diagram illustrating the formation of routing vectors by three-level nodes, provided in an embodiment of the present invention;

[0069] Figure 18 This is a schematic diagram of a 3-level node 4-processing method provided in an embodiment of the present invention;

[0070] Figure 19 This is a schematic diagram illustrating packet routing at a level 2 node 5, as provided in an embodiment of the present invention.

[0071] Figure 20 This is a schematic diagram of a routing process from a current level 2 node 5 to a target level 1 node 6, provided by an embodiment of the present invention.

[0072] Figure 21 A schematic diagram illustrating a routing state update for a Level 2 node (Node 5) according to an embodiment of the present invention;

[0073] Figure 22 This is a schematic diagram of the structure of a data packet routing device provided in an embodiment of the present invention;

[0074] Figure 23 This is a structural diagram of a data packet routing device provided in an embodiment of the present invention. Detailed Implementation

[0075] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present invention.

[0076] The terms "comprising" and "having," and any variations thereof, in the specification and accompanying drawings of this invention are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the steps or units listed, but may include steps or units not listed.

[0077] Some terms that appear in the description of the embodiments of the present invention are subject to the following interpretation:

[0078] Strictly non-blocking network: In any case, for a valid request in the network (a valid request is one in which both the output port of the originating node and the input port of the destination routing node are empty), there is at least one path.

[0079] The topology of a computer network refers to the abstract connection method exhibited by various network devices (such as routers and switches), including computers, to interconnect the network. Computer network topology focuses on this connection relationship and its graphical representation, rather than the details of the connected computers or devices. A topology diagram clearly shows the wiring connections between nodes in the entire network and the overall network structure. Nodes primarily refer to the various active devices connected in the network; therefore, the computer network topology is composed of nodes and links. Figure 1 As shown, Figure 1 This diagram illustrates a three-level CLOS network topology, which consists of three levels corresponding to routing nodes at levels 1, 2, and 3. In this topology, every connection is bidirectional, meaning there are two round-trip routing paths between any two routing nodes or between an input / output port and a routing node. Figure 1 The topology shown has 8 Level 1 nodes, each connected to 4 input / output ports; 7 Level 2 nodes, each with 8 data paths connected to Level 1 nodes; and 6 Level 3 nodes, each with 7 data paths connected to Level 2 nodes. This topology is a strictly non-blocking three-level CLOS network. For a C(m,n,r) network, a network is considered strictly non-blocking when m>=2n-1. Figure 1Topology, each level-1 node is connected to 4 input / output ports. That is, n = 4, and there are 7 level-2 nodes, that is, m = 7). That is to say, for any input port, there always exists an idle path from a level-2 node to the target level-1 node for data transmission.

[0080] In traditional hardware implementation solutions, each routing node only randomly selects an idle path for transmission based on the output path status of the current node. The routing is seriously blind. When the routing of level-2 nodes is severely blocked, randomly selecting a level-2 node for routing (the path from this level-2 node to the target level-1 node is occupied) may cause the problem that data packets frequently circle around level-3 nodes multiple times. While exacerbating the blocking degree of level-2 and level-3 nodes, it also increases the transmission delay of data packets in the topology network. To address this problem, this patent proposes an adaptive routing hardware implementation solution. In this solution, the transmission of data packets not only needs to combine the status of each output path of the current node, but also combines the information of the target nodes of each data packet. In each routing node, an optimal path is adaptively selected from numerous idle paths for data routing, eliminating the blindness of data packet transmission in traditional implementation solutions, significantly shortening the data transmission delay, and improving the execution efficiency of the network topology.

[0081] To enable those skilled in the art to better understand the solution of the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0082] Next, a data packet routing method provided by an embodiment of the present invention will be introduced in detail. Figure 2 It is a flowchart of a data packet routing method provided by an embodiment of the present invention, which is applied to a three-level CLOS network. The method may include:

[0083] S101, determine the initial level-1 node and the target level-1 node corresponding to the data packet; where the initial level-1 node is the node corresponding to the input port, and the target level-1 node is the node corresponding to the output port.

[0084] Each step in this embodiment can be executed by a specified electronic device, which can specifically be a server, a portable terminal, or other forms. For example, the execution subject of this embodiment can be each node. The data packet in this embodiment is a data packet that needs to be routed. For ease of understanding, for example, input port 0 – output port 31. At this time, according to Figure 1 It can be known, or based on the high three bits of the port label, that the initial level-1 node is 0 and the target level-1 node is 7. That is, the initial level-1 node is the starting point of data packet routing, and the target level-1 node is the end point of data packet routing. It should be noted that in the present invention, "one" is the Chinese character form of Chinese numerals, and "1" is the digital form of Arabic numerals. When labeling nodes, they have exactly the same meaning.

[0085] It should be further explained that before determining the path status from all second-level nodes to the target first-level node based on the global list and obtaining the first-level second routing vector, the process may further include: determining the update vector from each second-level node to all first-level nodes; determining the global list locking matrix based on the update vectors; determining the locking vector by performing a bitwise OR operation on each column of the global list locking matrix; when querying the path status from the target second-level node to the target first-level node in the global list, querying the corresponding bit of the locking vector according to the target first-level node; if the corresponding bit indicates that it is being updated, the global list cannot be queried; if the corresponding bit indicates that it is not being updated, then the step of determining the path status from all second-level nodes to the target first-level node based on the global list and obtaining the first-level second routing vector is performed. This embodiment prevents errors in obtaining the target path status by setting a global list locking vector and preventing other nodes from querying the same path status during the list update operation.

[0086] S102, determine the path status from the initial first-level node to the second-level node in the first-level node, and obtain the first-level first routing vector.

[0087] In this embodiment, a routing state list can be stored inside the first-level node, and the first routing vector can be obtained based on this routing state list. As shown in Table 1, Table 1 is the routing state list (within the node) from the current first-level node to all second-level nodes provided in this embodiment of the invention.

[0088] Table 1. List of routing statuses from the current Level 1 node to all Level 2 nodes.

[0089]

[0090] Each Level 1 node has an independent routing status list as shown in Table 1. This list is used by the Level 1 node to query and maintain the status of all paths routed to Level 2 nodes. Status 0 indicates that the path is occupied (unavailable), and status 1 indicates that the path is available. Initially, all entries are 1. In this embodiment, the current Level 1 node is the (initial Level 1 node).

[0091] S103, determine the path status from all secondary nodes to the target primary node based on the global list, and obtain the primary second routing vector; wherein, the global list is the path status from each secondary node to all primary nodes.

[0092] In this embodiment, the global list is a list of routing statuses from all level 2 nodes to level 1 nodes. For example, Table 2 is a schematic table of a global list.

[0093] Table 2 A Global List

[0094]

[0095] In the implementation scheme proposed in this invention, a global list as shown in Table 2 is set up. This list maintains the routing status from all level 2 nodes in the topology to the target level 1 node. This global list is presented through a register group, enabling simultaneous updates of every entry in every row of the global list. State 0 indicates that the path is occupied (path unavailable), and state 1 indicates that the path is available. Initially, all entries are 1. This list can be jointly maintained by all level 2 nodes, meaning that whenever any level 2 node occupies or releases a path, the corresponding entry in this list needs to be updated. The setting of this list is crucial to the implementation scheme in this patent. First, let's introduce the maintenance and query mechanism of this global list: as follows... Figure 3 As shown, Figure 3 This is a schematic diagram of a global state list query mechanism according to an embodiment of the present invention. Each row of the global list is updated by the corresponding level 2 nodes. Assume the update vector from level 2 node 0 to all level 1 nodes is 01001010 (where 1 represents an update and 0 represents no update), the update vector from level 2 node 1 to all level 1 nodes is 01011010, the update vector from level 2 node 2 to all level 1 nodes is 11011010, the update vectors from level 2 nodes 3, 4, and 5 to all level 1 nodes are 00000000, and the update vector from level 2 node 1 to all level 1 nodes is 10011010. At this point, the update vectors corresponding to all level 2 nodes are... A global list locking matrix is ​​constructed, and each column of the matrix is ​​bitwise ORed to obtain the global list locking vector 11011010 (where 1 in the global list locking vector indicates that the path to the corresponding target level 1 node is being updated). When a level 1, 2, or 3 node needs to query a certain entry in the global list to obtain the idle status of the path to the target level 1 node, it needs to query the corresponding bit in the global list locking vector based on the high 3 bits of its target node. If the corresponding bit is 1, it means that the path status in that direction is being updated, and the global list cannot be queried at this time; if the corresponding bit is 0, the corresponding entry in the global list can be queried directly to proceed with the subsequent routing process.

[0096] like Figure 4 As shown, Figure 4 This is a schematic diagram of a global state list update provided by an embodiment of the present invention. Based on each row of the global list locking matrix, each element in the global state list is updated; that is, the corresponding position in the list containing element 1 in the global list locking matrix is ​​updated to either occupied or free (in the global state list, 1 represents free, and 0 represents occupied). This global state list query and update mechanism prevents other nodes from querying the same path state during the list update operation, thus avoiding errors in obtaining the target path state, by setting a global list locking vector. Simultaneously, this query mechanism enables real-time, accurate, and parallel execution of all node queries, improving query efficiency.

[0097] S104. Determine the optimal path between the initial first-level node and the target first-level node based on the first-level first routing vector and the second-level first routing vector, and route the data packets based on the optimal path.

[0098] In this embodiment, the optimal path is the shortest route, or the path with the highest routing efficiency. When multiple optimal paths exist, selection can be based on either the first 1 of the vector or the last 1, as long as an available path can be located. For ease of understanding, Figure 5 The routing method for level 1 nodes in the adaptive shortest path selection implementation scheme proposed in this embodiment of the invention is as follows: Based on the high 3 bits of the target node label (target output port), select all path states from the global list of level 2 nodes to the target level 1 node to form a first-level second routing vector; query the path state list from level 1 node to level 2 node within the current level 1 node and form a first-level first routing vector; perform a bitwise AND operation on the routing vectors formed in the above two steps. In the result, "1" indicates that both data paths from the current level 1 node to the corresponding level 2 node and from the corresponding level 2 node to the target level 1 node are in an idle state, that is, the optimal path from the current level 1 node output to the target level 1 node. In the result, "0" indicates a non-optimal path. The result of the bitwise AND operation is evaluated: if the result is not all zeros, the bitwise AND result is used as a routing vector. Based on the first 1 of the vector, an optimal path for the current level 1 node is determined, and the status of the selected path to the corresponding level 2 node is updated to occupied (entries are cleared to 0). If the result is all zeros, it means there is no optimal path where both the data paths from the current level 1 node to the corresponding level 2 node and from the corresponding level 2 node to the target level 1 node are idle. In this case, the routing status from the current level 1 node to the level 2 node is used as a routing vector. Based on the first 1 of the vector, an idle path to the level 2 node is selected, and the status of the selected path is updated to occupied (entries are cleared to 0). Traditional implementations, however, simply select one idle path to the level 2 node without considering the target node's information; that is, they do not select the optimal path. For example… Figure 6 This diagram illustrates the routing method of a level 1 node in a traditional routing implementation scheme. The traditional scheme forms a routing vector by querying the current path status from the level 1 node to the level 2 node. The first 1 of the vector is used to query the result to determine an idle path and transmit the data to the level 2 node. After the path is determined, the routing status list inside the level 1 node is updated, and the status of the selected path from the level 1 node to the level 2 node is changed to occupied.

[0099] It should be further noted that, based on any of the above embodiments, the determination of the optimal path between the initial first-level node and the target first-level node based on the first-level first routing vector and the second-level first routing vector may include:

[0100] S1041, Perform a bitwise AND operation on the first-level routing vector and the second-level routing vector to obtain the first-level bitwise AND result;

[0101] S1042, Determine if there is a free path in the first-level bitwise AND result;

[0102] S1043, If there is an idle path, determine the optimal path from the idle path and update the path status from the initial first-level node to the corresponding second-level node in the optimal path;

[0103] S1044, if there is no free path, select one free path to the second-level node based on the first routing vector of the first level, and update the path status of the selected free path to occupied.

[0104] In this embodiment, based on the routing vector corresponding to the bitwise result, it can be determined whether there exists a vector with a value of 1. If the result is not all 0s, it indicates that there are two optimal paths where both the data paths from the current level 1 node to the corresponding level 2 node and from the corresponding level 2 node to the target level 1 node are in an idle state. If the result is all 0s, it indicates that there are no two optimal paths where both the data paths from the current level 1 node to the corresponding level 2 node and from the corresponding level 2 node to the target level 1 node are in an idle state. In this case, an idle path to the level 2 node is selected, and the selected path status is updated to occupied. At this point, routing can be performed by routing the data packet to the level 2 node and level 3 node, then back to the level 2 node, and finally to the target level 1 node.

[0105] It should be further explained that, based on any of the above embodiments, the process of determining the optimal path from the available paths and updating the path status from the initial first-level node to the corresponding second-level node in the optimal path when an available path exists can include: determining the first and second-level nodes corresponding to the available paths selected by the first-level node; determining the routing status from the first and second-level nodes to the first-level node to obtain a second-level first routing vector; determining whether the path from the first and second-level nodes to the target first-level node is currently available based on the second-level first routing vector; and determining the optimal path as the final optimal path when the path is available. In this embodiment, to ensure successful routing, when a data packet is routed to a second-level node, the second-level node needs to again determine whether the path to the target first-level node is currently available. Routing will only proceed if the path is available. This improves the accuracy of data packet routing. For example, as... Figure 7 As shown, Figure 7This diagram illustrates the routing method of level 2 nodes in an adaptive shortest path selection implementation scheme provided by an embodiment of the present invention. The difference from traditional schemes lies in the following: the routing status list from the current level 2 node to all level 1 nodes is maintained uniformly by a global list of all level 2 nodes. The route vector is extracted from the global list using the current level 2 node's label. Furthermore, after the path from a level 2 node to a level 1 node is confirmed, the update of the path status is no longer managed independently by each level 2 node internally, but rather each node updates its own global list, which is then maintained collectively.

[0106] It should be further noted that, based on any of the above embodiments, after determining whether the path from the first or second-level node corresponding to the optimal path to the target first-level node is idle based on the second-level first routing vector, it may further include:

[0107] Step 1: When the path is not idle, determine the route to the third-level node;

[0108] Step 2: Determine the path status from the first and second level nodes to all third level nodes to obtain the first routing vector of the third level;

[0109] Step 3: Based on the first routing vector of the third level, determine the idle target third-level nodes, determine the path status from the idle target third-level nodes to the second-level nodes, and obtain the second routing vector of the third level;

[0110] Step 4: Determine the path status from all current second-level nodes to the target first-level node to obtain the third-level routing vector;

[0111] Step 5: Determine the final optimal path based on the Level 3 second routing vector and the Level 3 third routing vector.

[0112] In this embodiment, each level 2 node is independently configured as follows: Figure 3 As shown, Table 3 is a list of routing statuses (within the node) from the current level 2 node to all level 3 nodes.

[0113] Table 3. List of routing statuses from the current Level 2 node to all Level 3 nodes.

[0114]

[0115] Each Level 2 node independently maintains a routing status list as shown in Table 3. This list is used by the Level 2 node to query and maintain the status of all paths routed to the Level 3 node. Status 0 indicates the path is occupied (unavailable), and status 1 indicates the path is available (available). Initially, all entries are set to 1. When the path from the current Level 2 node to the target Level 1 node is not available, a route is determined to be sent to the Level 3 node. At this point, according to... Figure 7 It can be seen that the idle target third-level node will be determined based on the first 1 of the vector.

[0116] In this embodiment, the path status from the idle target third-level node to the second-level node is determined, and the execution subject of the third-level second routing vector is the third-level node. Table 4 is the routing status list from the current third-level node to all second-level nodes. Each third-level node independently sets the routing status list as shown in Table 4. This list is used by each third-level node to query and maintain the status of all paths to the second-level nodes. Status 0 indicates that the path is occupied (path unavailable), and status 1 indicates that the path is idle (path available). In the initial state, all entries are 1.

[0117] Table 4. List of routing statuses from the current Level 3 node to all Level 2 nodes

[0118]

[0119] To facilitate understanding of this invention, current conventional implementations simply select one available and free path to route to the level 2 node during path selection, without considering the state of the path from the level 2 node to the target level 1 node. That is, they do not select the optimal path. If the path from the level 2 node to the target level 1 node is occupied, data packets may have to detour through level 3 nodes multiple times, increasing data packet transmission latency and exacerbating congestion at both level 2 and level 3 nodes. In contrast, this invention... Figure 8 As shown, Figure 8 The routing method for level 3 nodes in the adaptive shortest path selection implementation scheme proposed in this embodiment of the invention is as follows: Based on the high 3 bits of the target node label, select all path states from the global list of path states from level 2 nodes to the target level 1 node to form a routing vector; query the path states from the current level 3 node to all level 2 nodes, and modify the path states of the level 2 nodes that have already been passed in the path states to invalid through data accompanying information, and form a routing vector; perform a bitwise AND operation on the routing vectors formed in the above two steps. In the result, "1" indicates that both data paths from the current level 3 node to the corresponding level 2 node and from the corresponding level 2 node to the target level 1 node are in an idle state, that is, the optimal path from the current level 3 node to the target level 1 node. In the result, "0" indicates a non-optimal path. The result of the bitwise AND operation is evaluated as follows: if the result is not all zeros, the bitwise AND result is used as a routing vector. Based on the first 1 of the vector, an optimal path for the current level 3 node is determined, and the status of the selected path to the corresponding level 2 node is updated to occupied (entries are cleared to 0). If the result is all zeros, it means there are no optimal paths where both the current level 3 node to the corresponding level 2 node and the corresponding level 2 node to the target level 1 node are idle. In this case, the routing status from the current level 3 node to the level 2 node is used as a routing vector. Based on the first 1 of the vector, an idle path to the level 2 node is selected, and the status of the selected path is updated to occupied (entries are cleared to 0).

[0120] It should be further explained that, based on any of the above embodiments, determining the idle target third-level nodes based on the first third-level routing vector, determining the path status from the idle target third-level nodes to the second-level nodes, and obtaining the second third-level routing vector can include: determining the idle target third-level nodes based on the first third-level routing vector, determining the path status from the idle target third-level nodes to the second-level nodes, and obtaining an initial second third-level routing vector; performing a bitwise AND operation between the initial second third-level routing vector and the data accompanying vector to obtain the second third-level routing vector; wherein, the data accompanying vector is a vector that determines that the path status to the first and second-level nodes is invalid. In this embodiment, by using data accompanying information (accompanying vector) (marking the second-level nodes that have already been passed), the path status of the second-level nodes that have already been passed in the path status is modified to invalid, that is, the corresponding table entry is modified to 0, to prevent data packets from being repeatedly routed to the same second-level nodes, thus avoiding duplicate routing like in traditional schemes and improving routing efficiency.

[0121] It should be further explained that, based on any of the above embodiments, the determination of the optimal path between the initial first-level node and the target first-level node based on the first-level first routing vector and the second-level first routing vector, and the routing of the data packets based on the optimal path, may include: determining an idle path between the initial first-level node and the target first-level node based on the first-level first routing vector and the second-level first routing vector; selecting a path from the idle path as the optimal path based on a set optimal path determination method; wherein, the set optimal path determination method is the method of selecting the fastest idle path. This embodiment does not specify a particular optimal path determination method; for example, the optimal path determination method may be a vector head search or a vector tail search.

[0122] It should be further explained that this embodiment can determine the duration of packet routing for each node. When the duration exceeds a set value, a reminder message is sent to check the node. By checking the node in a timely manner, packet routing efficiency is improved, preventing packets from remaining at the node indefinitely if the node fails.

[0123] An embodiment of the present invention provides a data packet routing method, which may include: S101, determining an initial first-level node and a target first-level node corresponding to a data packet; wherein, the initial first-level node is the node corresponding to an input port, and the target first-level node is the node corresponding to an output port; S102, determining the path status from the initial first-level node to the second-level nodes in the first-level nodes to obtain a first-level first routing vector; S103, determining the path status from all second-level nodes to the target first-level node based on a global list to obtain a second-level first routing vector; wherein, the global list is the path status from each second-level node to all first-level nodes; S104, determining the optimal path between the initial first-level node and the target first-level node based on the first-level first routing vector and the second-level first routing vector, and routing the data packet based on the optimal path. The beneficial effects of this invention are as follows: In traditional hardware implementations, data packets randomly select transmission paths based solely on the current node's free path vector. When the randomly selected path from a level 2 node to the target level 1 node is blocked, data transmission may involve multiple detours through level 2 and 3 nodes, increasing data packet transmission latency and exacerbating the congestion pressure on level 2 and 3 nodes. This paper proposes an adaptive routing hardware implementation scheme. This scheme sets up a global list of path states from level 2 nodes to level 1 nodes and proposes a list query and update mechanism for this global list. This mechanism prevents other nodes from querying the same path during list updates by setting a global list locking vector. The path status is not accurately determined, which can lead to errors in obtaining the target path status. Simultaneously, this query mechanism enables real-time, accurate, and parallel execution of query entries across all nodes, improving query efficiency. In this adaptive routing hardware implementation, when data packets are routed, they adaptively explore and select the optimal data transmission path by querying the path status to the target level 1 node and combining this with the output path status vectors and accompanying routing information within the current node. This ensures that data packet transmission always follows the optimal route of the current node, significantly reducing data packet transmission latency. It also alleviates the problem of multiple data packet detours in traditional implementations and the congestion pressure on level 2 and level 3 nodes in the topology network, thus improving the transmission efficiency of the interconnected system.

[0124] For a clearer understanding of this invention, please refer to the following details. Figure 9 , Figure 9 The hardware implementation block diagram of level 1 and level 3 nodes provided in this embodiment of the invention may specifically include: a global path list query module, a current node output path status query and management module, a route vector bitwise AND operation module, a route selection vector generation module, a vector first 1 lookup module, and a route direction management module. These six modules are described below:

[0125] Global Path List Query Module: This module is responsible for querying the global list (path status from all level 2 nodes to all level 1 nodes) by the target node number, and extracting the path status from all level 2 nodes to the target level 1 node to form a routing vector;

[0126] Current Node Output Path Status Query and Management Module: This module is mainly responsible for querying the status of the current level 1 and level 3 nodes' output paths and forming routing vectors; it is also responsible for maintaining the status of locking and unlocking each output path.

[0127] Routing Vector Bitwise AND Operation Module: This module is mainly responsible for performing bitwise AND operations on the routing vectors generated by the above two modules;

[0128] Routing vector generation module: This module generates the final routing vector by performing a bitwise AND operation.

[0129] Vector First 1 Lookup Module: This module is responsible for selecting an idle path from the final generated routing vector;

[0130] Routing direction management module: This module is responsible for transmitting input data to the next node according to the selected path.

[0131] The difference between level 3 nodes and level 1 nodes is that level 3 nodes will mark the level 2 nodes that have been visited based on the accompanying information (accompaniment vector).

[0132] For a clearer understanding of this invention, please refer to the following details. Figure 10 , Figure 10 The hardware implementation block diagram of the level 2 node provided in this embodiment of the invention may specifically include:

[0133] The hardware implementation block diagram of the level 2 node is as follows: Figure 10 As shown, it includes: a global path list query and maintenance module, an output 3-level node path status query and management module, a route selection vector generation module, a vector first 1 lookup module, and a route direction management module. The following describes these five modules:

[0134] Global Path List Query and Maintenance Module: This module is responsible for querying the path status from the current node to the target first-level node in the global list using the target node number and the current second-level node number; at the same time, this module is also responsible for updating the path status in the global list.

[0135] Output Level 3 Node Path Status Query and Management Module: This module is mainly responsible for querying the path status of the current Level 2 node outputting Level 3 nodes and forming routing vectors; it is also responsible for maintaining the locking and unlocking status of each output path.

[0136] Routing vector generation module: This module generates the final routing vector by performing a bitwise AND operation.

[0137] Vector First 1 Lookup Module: This module is responsible for selecting an idle path from the final generated routing vector;

[0138] Routing direction management module: This module is responsible for transmitting input data to the next node according to the selected path.

[0139] To facilitate understanding of this invention, an example is given with input port 0 and output port 31.

[0140] like Figure 11 , Figure 11 This is a schematic diagram illustrating a data packet processing method within level 1 node 0, which may specifically include:

[0141] The high 3 bits of the target node 31 label are 111=7. From the global list of routing states from level 2 nodes to the target level 1 node, select all path states from level 2 nodes to the target level 1 node 7, forming the routing vector 1011011. Query the list of path states from level 1 node 0 to all level 2 nodes within the current level 1 node 0, forming the routing vector 1000110. Perform a bitwise AND operation (1000110 & 1011011) on the routing vectors formed in the above two steps, and the result is 1000010. The result contains two 1s, indicating the existence of two optimal paths: Optimal Path 1: Level 1 node 0 to Level 2 node 5, Level 2 node 5 to target Level 1 node 7; Optimal Path 2: Level 1 node 0 to Level 2 node 0, Level 2 node 0 to target Level 1 node 7. The bitwise AND result 1000010 is used as the routing vector. Based on the first 1 of the vector, the optimal path of the current Level 1 node is determined: Level 1 node 0 to Level 2 node 5, Level 2 node 5 to target Level 1 node 7. Within Level 1 node 0, the path status to Level 2 node 5 is updated to occupied (entry is cleared to 0).

[0142] like Figure 12 As shown, Figure 12 This is a schematic diagram illustrating the extraction of routing states from Level 2 node 5 to all Level 1 nodes, provided by an embodiment of the present invention. When a data packet arrives at Level 2 node 5, the routing states from Level 2 node 5 to all Level 1 nodes are extracted from the global list of path states from Level 2 nodes to Level 1 nodes and formed into a vector 10111111.

[0143] like Figure 13 As shown, Figure 13This is a routing diagram from the current level 2 node to the target level 1 node 7 provided in an embodiment of the present invention. The high 3 bits of the target node 31 label are 111. The status of the 7th column in the query vector 10111111 is 1 (indicating that the path from the current level 2 node 5 to the target level 1 node 7 is idle and available). At this time, the path is selected to route the data packet to the target level 1 node 7.

[0144] Finally, as Figure 14 As shown, Figure 14 This is a schematic diagram illustrating how the routing status of level 2 nodes 5 to level 1 nodes 7 in the global list is updated to occupied, and the table entries are cleared to 0, as provided in this embodiment of the invention.

[0145] To facilitate understanding of this invention, an example is given with input port 0 and output port 27.

[0146] like Figure 15 , Figure 15 A schematic diagram illustrating a data packet processing method within a level 1 node 0, provided by an embodiment of the present invention, may include:

[0147] The high 3 bits of the target node 27 label are 110=6. From the global list of routing states from level 2 nodes to the target level 1 node, select all path states from level 2 nodes to the target level 1 node 6, forming the routing vector 0011111. Query the list of path states from level 1 node 0 to all level 2 nodes within the current level 1 node 0, forming the routing vector 1000100. Perform a bitwise AND operation (1000100&0011111) on the routing vectors formed in the above two steps, and the result is 0000100. The result contains a single 1, indicating the existence of an optimal path, corresponding to: Level 1 node 0 to Level 2 node 4, and Level 2 node 4 to the target Level 1 node 6. The bitwise AND result 0000100 is used as the routing vector. Based on the first 1 of the vector, the optimal path is determined: Level 1 node 0 to Level 2 node 4, and Level 2 node 4 to the target Level 1 node 6. Within Level 1 node 0, the path status to Level 2 node 4 is updated to occupied (the entry is cleared to 1000000).

[0148] like Figure 16 As shown, Figure 16 This is a schematic diagram illustrating the routing status from a Level 2 node 4 to all Level 1 nodes, provided in an embodiment of the present invention. When a data packet arrives at Level 2 node 4, the routing status from Level 2 node 4 to all Level 1 nodes is extracted from the global list of path status from Level 2 nodes to Level 1 nodes and formed into a vector 10100000.

[0149] like Figure 17 As shown, Figure 17This is a schematic diagram of a three-level node routing vector formation according to an embodiment of the present invention. The high 3 bits of the target node 27 label are 110. The status of the 6th column in the query vector 10100000 is 0 (indicating that the path from the current level 2 node 4 to the target level 1 node 6 is occupied). At this time, the data packet needs to be routed to the level 3 node. Query the path status from level 2 node 4 to all level 3 nodes to form the routing vector 101110. By searching the first 1 of the vector, the path to the level 3 node is determined: from level 2 node 4 to level 3 node 4. At the same time, the status of the path to level 3 node 4 is updated to occupied (the table entry is cleared to 0, becoming 101100). Finally, the data accompanying information is updated to 1111011 (where 1 indicates that the corresponding level 2 node has not been passed, and 0 indicates that the corresponding level 2 node has been passed; the accompanying information is set to prevent the data packet from being routed repeatedly to the same level 2 and level 3 nodes).

[0150] The data packet arrives at level 3 node 4, and the processing within level 3 node 4 is as follows: Figure 18 As shown, Figure 18 A schematic diagram of a 3-level node 4-processing method provided in an embodiment of the present invention:

[0151] Based on the high 3 bits 110 of the target node 27, select all path states from the global list of routing states from level 2 nodes to the target level 1 node to form a routing vector 0011011; query the current level 3 node 4: the path state 1011110 from the current level 3 node 4 to all level 2 nodes, and perform a bitwise AND operation with the accompanying data information 1111011 to modify the path states to invalidate the paths that have already passed level 2 node 4, forming a routing vector 1011010; perform a bitwise AND operation (1011010&0011011) on the routing vectors formed in the above two steps, and the result is 0011010. The result contains three 1s, indicating the existence of three optimal paths: Optimal Path 1: Level 3 node 4 to Level 2 node 5, Level 2 node 5 to target Level 1 node 6; Optimal Path 2: Level 3 node 4 to Level 2 node 3, Level 2 node 3 to target Level 1 node 6; Optimal Path 3: Level 3 node 4 to Level 2 node 2, Level 2 node 2 to target Level 1 node 6. The bitwise AND result 0011010 is used as the routing vector. Based on the first 1 of the vector, the optimal path 1 is determined: Level 3 node 4 to Level 2 node 5, Level 2 node 5 to target Level 1 node 6. Within Level 3 node 4, the path status to Level 2 node 5 is updated to occupied (the entry is cleared to 0, becoming 1011100).

[0152] like Figure 19 As shown, Figure 19This is a schematic diagram illustrating packet routing at a level 2 node 5 according to an embodiment of the present invention. When a packet arrives at level 2 node 5, the routing states from level 2 node 5 to all level 1 nodes are extracted from the global list of path states from level 2 nodes to level 1 nodes and formed into a vector 10111111.

[0153] like Figure 20 As shown, Figure 20 This is a schematic diagram of a routing process from the current level 2 node 5 to the target level 1 node 6, provided by an embodiment of the present invention. The high 3 bits of the target node 27 label are 110, and the status of the 6th column in the query vector 10111111 is 1 (indicating that the path from the current level 2 node 5 to the target level 1 node 6 is idle and available). At this time, this path is selected to route the data packet to the target level 1 node 6.

[0154] Finally, as Figure 21 As shown, Figure 21 This is a schematic diagram illustrating a routing status update for a level 2 node 5 according to an embodiment of the present invention. The routing status of level 2 node 5 to level 1 node 6 in the global list is updated to occupied (the entry is cleared to 0, becoming 10111101). At this point, the data packet has been routed to the target node, and transmission is complete.

[0155] The above embodiments propose a global target path list query and maintenance mechanism. This mechanism prevents other nodes from querying the same path status during list updates, thus avoiding errors in obtaining the target path status. Simultaneously, this global list, composed of register groups, combined with the query and maintenance mechanism, enables real-time, accurate, and parallel execution of entry maintenance and queries, improving query efficiency. This list is maintained and updated by all level 2 nodes, and queries can be performed on all level 1, level 2, and level 3 nodes in the topology. This global list query and maintenance mechanism provides the target path status in real-time for the data routing process, enabling the acquisition of the optimal path. A strictly non-blocking bidirectional three-level CLOS network adaptive routing hardware implementation scheme is proposed, including hardware execution schemes for each node in the topology. In this hardware scheme, when data packets are routed, the path status to the target level 1 node is queried in the global list. Combined with the independent output path status vector and routing accompanying information within the current node, the optimal path for data transmission is adaptively explored and selected, shortening data packet transmission latency, alleviating the blocking pressure on level 2 and level 3 nodes, and improving the system's transmission efficiency.

[0156] The beneficial effects of the technical solution of this invention are as follows: This invention proposes an adaptive routing hardware implementation scheme based on a strictly non-blocking bidirectional CLOS network. In this implementation scheme, a global list of path states from level 2 nodes to level 1 nodes is set up. When data packets are routed, the path states to the target level 1 node are queried, and combined with the output path state vectors and routing information of each node, the optimal path for data transmission is adaptively explored and selected. This ensures that data packet transmission always follows the optimal route of the current node, significantly shortening the transmission delay of data packets. At the same time, it alleviates the problem of data packets taking multiple detours in traditional implementation schemes, and also alleviates the congestion pressure of level 2 and level 3 nodes in the topology network, improving the transmission efficiency of the interconnection system.

[0157] The data packet routing device provided in the embodiments of the present invention will be described below. The data packet routing device described below can be referred to in correspondence with the data packet routing method described above.

[0158] Figure 22 A schematic diagram of a data packet routing device provided in an embodiment of the present invention may include:

[0159] The input node and output node determination module 100 is used to determine the initial first-level node and the target first-level node corresponding to the data packet; wherein, the initial first-level node is the node corresponding to the input port, and the target first-level node is the node corresponding to the output port;

[0160] The first-level routing vector determination module 200 is used to determine the path status from the initial first-level node to the second-level node in the first-level nodes, and obtain the first-level first routing vector;

[0161] The first-level second routing vector determination module 300 is used to determine the path status from all second-level nodes to the target first-level node based on a global list, thereby obtaining the first-level second routing vector; wherein, the global list is the path status from each second-level node to all first-level nodes;

[0162] The packet routing module 400 is used to determine the optimal path between the initial first-level node and the target first-level node based on the first-level first routing vector and the second-level first routing vector, and to route the packet based on the optimal path.

[0163] Furthermore, based on any of the above embodiments, the packet routing module 400 may include:

[0164] A first-level bitwise AND result determination unit is used to perform a bitwise AND calculation on the first-level first routing vector and the first-level second routing vector to obtain a first-level bitwise AND result.

[0165] The first free path determination unit is used to determine whether there is a free path in the first-level bitwise AND result;

[0166] The first path state update unit is used to determine the optimal path from the available paths when there are available paths, and update the path state from the initial first-level node to the corresponding second-level node in the optimal path.

[0167] The second path status update unit is used to select one free path to the second-level node based on the first-level first routing vector when there is no free path, and update the path status of the selected free path to occupied.

[0168] Furthermore, based on any of the above embodiments, the first path state update unit may include:

[0169] The first and second level nodes determine the sub-units, which are used to determine the first and second level nodes corresponding to the free paths selected by the first level nodes;

[0170] The second-level first routing vector determination subunit is used to determine the routing status from the first second-level node to the first-level node and obtain the second-level first routing vector;

[0171] The idle path determination subunit is used to determine whether the path from the first secondary node to the target primary node is currently idle based on the second-level first routing vector.

[0172] The final optimal path determination subunit is used to determine the optimal path as the final optimal path when the path is idle.

[0173] Furthermore, based on any of the above embodiments, the above data packet routing device may further include:

[0174] A routing module for third-level nodes is used to determine routing to third-level nodes when the path is not idle;

[0175] The Level 3 First Route Vector Determination Module is used to determine the path status from the first and second level nodes to all level 3 nodes, and obtain the Level 3 First Route Vector.

[0176] The Level 3 Second Routing Vector Determination Module is used to determine the idle target Level 3 nodes based on the Level 3 First Routing Vector, determine the path status from the idle target Level 3 nodes to the Level 2 nodes, and obtain the Level 3 Second Routing Vector.

[0177] The third-level routing vector determination module is used to determine the path status from all current second-level nodes to the target first-level node, and obtain the third-level routing vector.

[0178] The final optimal path determination module is used to determine the final optimal path based on the third-level second routing vector and the third-level third routing vector.

[0179] Furthermore, based on any of the above embodiments, the third-level second routing vector determination module may include:

[0180] The initial third-level second routing vector determination unit is used to determine the idle target third-level nodes based on the third-level first routing vector, determine the path status from the idle target third-level nodes to the second-level nodes, and obtain the initial third-level second routing vector.

[0181] The third-level second routing vector determination unit is used to perform a bitwise AND operation on the initial third-level second routing vector and the data accompanying vector to obtain the third-level second routing vector; wherein, the data accompanying vector is a vector that determines the path to the first second-level node to be invalid.

[0182] Furthermore, based on any of the above embodiments, the above data packet routing device may further include:

[0183] The global list locking matrix determination module is used to determine the update vector from each second-level node to all first-level nodes, and to determine the global list locking matrix based on the update vector;

[0184] The lock vector determination module is used to perform a bitwise OR operation on each column of the global list lock matrix to determine the lock vector.

[0185] The corresponding bit determination module is used to query the corresponding bit of the locking vector based on the target first-level node when querying the path status from the target second-level node to the target first-level node in the global list;

[0186] The non-queryable module is used to prevent querying the global list if the corresponding bit indicates that it is being updated.

[0187] The queryable module is used to perform the step of determining the path status from all secondary nodes to the target primary node based on the global list if the corresponding bit indicates that it is not in an updated state, and thus obtaining the primary second routing vector.

[0188] Furthermore, based on any of the above embodiments, the packet routing module 400 may include:

[0189] A first-level free path determination unit is used to determine the free path between the initial first-level node and the target first-level node based on the first-level first routing vector and the second-level first routing vector.

[0190] An optimal path determination unit is used to select a path from the available paths as the optimal path based on a set optimal path determination method; wherein, the set optimal path determination method is the method for selecting the fastest available path.

[0191] It should be noted that the order of the modules and units in the above-mentioned data packet routing device can be changed without affecting the logic.

[0192] Figure 22 The description of the features in the corresponding embodiments can be found in [reference needed]. Figure 22 The relevant descriptions of the corresponding embodiments will not be repeated here.

[0193] This invention provides a data packet routing device, which may include: an input node and output node determination module 100, used to determine an initial first-level node and a target first-level node corresponding to a data packet; wherein the initial first-level node is the node corresponding to an input port, and the target first-level node is the node corresponding to an output port; a first-level routing vector determination module 200, used to determine the path status from the initial first-level node to a second-level node in the first-level nodes, to obtain a first-level first routing vector; a first-level second routing vector determination module 300, used to determine the path status from all second-level nodes to the target first-level node based on a global list, to obtain a second-level first routing vector; wherein the global list is the path status from each second-level node to all first-level nodes; and a data packet routing module 400, used to determine the optimal path between the initial first-level node and the target first-level node based on the first-level first routing vector and the second-level first routing vector, and to route the data packet based on the optimal path. Compared with the current blind routing, this invention, when routing data packets, by querying the path status to the target first-level node in the global list and combining it with the independent path status within the current node, achieves adaptive exploration and selection of the optimal path for data transmission, shortens data packet transmission delay, and improves data packet routing efficiency.

[0194] The following describes a data packet routing device provided by an embodiment of the present invention. The data packet routing device described below can be referred to in correspondence with the data packet routing method described above.

[0195] Figure 23 A structural diagram of a data packet routing device provided in an embodiment of the present invention is shown below. Figure 23 As shown, the packet routing device includes: a memory 60 for storing computer programs;

[0196] The processor 61 is used to implement the steps of the data packet routing method as described in the above embodiments when executing a computer program.

[0197] The packet routing device provided in this embodiment may include, but is not limited to, smartphones, tablets, laptops, or desktop computers.

[0198] The processor 61 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 61 may be implemented using at least one hardware form selected from Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), and Programmable Logic Array (PLA). The processor 61 may also include a main processor and a coprocessor. The main processor, also known as the Central Processing Unit (CPU), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, the processor 61 may integrate a Graphics Processing Unit (GPU), which is responsible for rendering and drawing the content to be displayed on the screen. In some embodiments, the processor 61 may also include an Artificial Intelligence (AI) processor, which handles computational operations related to machine learning.

[0199] The memory 60 may include one or more computer-readable storage media, which may be non-transitory. The memory 60 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In this embodiment, the memory 60 is used to store at least the following computer program 601, which, after being loaded and executed by the processor 61, is capable of implementing the relevant steps of the packet routing method disclosed in any of the foregoing embodiments. In addition, the resources stored in the memory 60 may also include an operating system 602 and data 603, and the storage method may be temporary or permanent storage. The operating system 602 may include Windows, Unix, Linux, etc. The data 603 may include, but is not limited to, data required by the packet routing method.

[0200] In some embodiments, the packet routing device may further include a display screen 62, an input / output interface 63, a communication interface 64, a power supply 65, and a communication bus 66.

[0201] Those skilled in the art will understand that Figure 23 The structure shown does not constitute a limitation on the packet routing device and may include more or fewer components than illustrated.

[0202] It is understood that if the packet routing method in the above embodiments is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the current technology, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and executes all or part of the steps of the methods in the various embodiments of the present invention. The aforementioned storage medium includes: USB flash drive, mobile hard drive, read-only memory (ROM), random access memory (RAM), electrically erasable programmable ROM, register, hard disk, removable disk, CD-ROM, magnetic disk, or optical disk, and other media capable of storing program code.

[0203] Based on this, embodiments of the present invention also provide a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the data packet routing method described above.

[0204] The data packet routing method provided by the embodiments of the present invention has been described in detail above. The various embodiments in the specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to the method section.

[0205] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0206] The present invention has provided a detailed description of a data packet routing method, apparatus, device, and computer-readable storage medium. Specific examples have been used to illustrate the principles and implementation methods of the invention. The descriptions of these embodiments are merely illustrative of the method and its core ideas. It should be noted that those skilled in the art can make various improvements and modifications to the invention without departing from its principles, and these improvements and modifications also fall within the scope of protection of the present invention.

Claims

1. A data packet routing method, characterized in that, Applied to Level 3 CLOS networks, including: Determine the initial first-level node and the target first-level node corresponding to the data packet; wherein, the initial first-level node is the node corresponding to the input port, and the target first-level node is the node corresponding to the output port; Determine the path status from the initial first-level node to the second-level node in the first-level node to obtain the first-level first routing vector; Based on the global list, the path status from all secondary nodes to the target primary node is determined, and the primary second routing vector is obtained; wherein, the global list is the path status from each secondary node to all primary nodes; The optimal path between the initial first-level node and the target first-level node is determined based on the first-level first routing vector and the second-level first routing vector, and the data packet is routed based on the optimal path.

2. The data packet routing method according to claim 1, characterized in that, Determining the optimal path between the initial first-level node and the target first-level node based on the first-level first-order routing vector and the second-level first-order routing vector includes: Perform a bitwise AND operation on the first-level routing vector and the second-level routing vector to obtain the first-level bitwise AND result; Determine whether there is a free path in the first-level bitwise AND result; If there are free paths, the optimal path is determined from the free paths, and the path status from the initial first-level node to the corresponding second-level node in the optimal path is updated. If no free path exists, select one free path to the second-level node based on the first-level routing vector, and update the path status of the selected free path to occupied.

3. The data packet routing method according to claim 2, characterized in that, If an idle path exists, the optimal path is determined from the idle paths, and the path status from the initial first-level node to the corresponding second-level node in the optimal path is updated, including: Determine the first and second level nodes corresponding to the free paths selected by the first-level nodes; Determine the routing status from the first secondary node to the primary node to obtain the second-level first routing vector; Based on the second-level first routing vector, determine whether the path from the first second-level node to the target first-level node is currently idle; When the path is idle, the optimal path is determined as the final optimal path.

4. The data packet routing method according to claim 3, characterized in that, After determining whether the path from the first secondary node to the target primary node is currently free based on the secondary first routing vector, the method further includes: When the path is not idle, determine to route to the third-level node; Determine the path status from the first second-level node to all third-level nodes to obtain the first routing vector of the third level; Based on the first routing vector of the third level, determine the idle target third-level node, determine the path status from the idle target third-level node to the second-level node, and obtain the second routing vector of the third level. Determine the path status from all current second-level nodes to the target first-level node to obtain the third-level routing vector; The final optimal path is determined based on the third-level second routing vector and the third-level third routing vector.

5. The data packet routing method according to claim 4, characterized in that, Based on the first routing vector of the third level, an idle target third-level node is determined, and the path status from the idle target third-level node to the second-level node is determined, resulting in the second routing vector of the third level, including: Based on the first routing vector of the third level, determine the idle target third-level node, determine the path status from the idle target third-level node to the second-level node, and obtain the initial second routing vector of the third level; The initial third-level second routing vector and the data accompanying vector are bitwise ANDed to obtain the third-level second routing vector; wherein, the data accompanying vector is the vector that determines that the path to the first second-level node is invalid.

6. The data packet routing method according to any one of claims 1 to 5, characterized in that, Before determining the path status from all second-level nodes to the target first-level node based on the global list and obtaining the first-level second routing vector, the process also includes: Determine the update vector from each second-level node to all first-level nodes, and determine the global list locking matrix based on the update vector; Perform a bitwise OR operation on each column of the global list locking matrix to determine the locking vector; When querying the path status from the target query second-level node to the target first-level node in the global list, the corresponding bit of the locking vector is queried based on the target first-level node; If the corresponding bit indicates that an update is in progress, the global list cannot be queried; If the corresponding bit indicates that it is not in an update state, then the step of determining the path status from all secondary nodes to the target primary node based on the global list is performed to obtain the primary second routing vector.

7. The data packet routing method according to claim 1, characterized in that, Determining the optimal path between the initial first-level node and the target first-level node based on the first-level first routing vector and the second-level first routing vector, and routing the data packets based on the optimal path, including: Based on the first-level routing vector and the second-level routing vector, determine the free path between the initial first-level node and the target first-level node; The optimal path is selected from the available paths based on the optimal path determination method; wherein, the optimal path determination method is the method for selecting the fastest available path.

8. A data packet routing device, characterized in that, Applied to Level 3 CLOS networks, including: The input node and output node determination module is used to determine the initial first-level node and the target first-level node corresponding to the data packet; wherein, the initial first-level node is the node corresponding to the input port, and the target first-level node is the node corresponding to the output port; The first-level routing vector determination module is used to determine the path status from the initial first-level node to the second-level node in the first-level nodes, and obtain the first-level first routing vector; The first-level second routing vector determination module is used to determine the path status from all second-level nodes to the target first-level node based on a global list, thereby obtaining the first-level second routing vector; wherein, the global list is the path status from each second-level node to all first-level nodes; The packet routing module is used to determine the optimal path between the initial first-level node and the target first-level node based on the first-level first routing vector and the second-level first routing vector, and to route the packet based on the optimal path.

9. A data packet routing device, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the steps of the packet routing method as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the packet routing method as described in any one of claims 1 to 7.

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