TBC battery, preparation method thereof and photovoltaic module comprising TBC battery

Abstract

The invention provides a TBC battery, a preparation method thereof and a photovoltaic module comprising the TBC battery, and relates to the technical field of photovoltaic module production and manufacturing. According to the preparation method of the TBC battery, the doping concentration of a boron source in a passivation contact structure is effectively improved by adopting a laser doping mode, so that the contact resistance is reduced, and the efficiency of the TBC battery is improved; meanwhile, compared with traditional LPCVD, the P-Poly layer prepared through PECVD has the advantages that the winding degree is reduced, cleaning and removing in the later period are facilitated, and therefore the electric leakage risk is effectively reduced; in addition, the front surface of the TBC battery obtained by the preparation method is not shielded by any metal grid line, so that the current density and the open-circuit voltage of the battery can be well improved. Therefore, the TBC battery prepared by the invention has the technical advantages of high battery efficiency and small electric leakage risk, and can be widely applied to the preparation process of photovoltaic modules.

Description

Technical Field

[0001] This invention relates to the field of photovoltaic module manufacturing technology, and in particular to a TBC cell, its preparation method, and a photovoltaic module containing the same. Background Technology

[0002] IBC (Interdigitated back contact solar cell) is short for interdigitated back contact solar cell. Benefiting from its grid-free front design and the interdigitated junction arrangement of the positive and negative electrodes on the back, the IBC cell is one of the most promising and efficient solar cell structures for silicon-based solar cells. To further improve the conversion efficiency of IBC solar cells, researchers often combine tunneling oxide passivated contacts (TBCs) with IBCs to form tunneling oxide passivated and interdigitated back contact solar cells (TBCs).

[0003] However, the passivation contact structure on the back of existing TBC batteries is mainly formed by boron diffusion to achieve uniform doping. This process results in high interfacial recombination and high contact resistance, leading to low battery efficiency. Therefore, it is both necessary and urgent to research and develop a novel TBC battery structure and fabrication method to improve the efficiency of TBC batteries.

[0004] In view of this, the present invention is hereby proposed. Summary of the Invention

[0005] The purpose of this invention is to provide a TBC battery and its preparation method. The TBC battery prepared by the method has technical advantages over existing TBC batteries, such as high battery efficiency and low leakage risk. This TBC battery can be widely used in the preparation process of photovoltaic modules.

[0006] In order to achieve the above-mentioned objectives of the present invention, the following technical solution is adopted:

[0007] This invention provides a method for preparing a TBC battery, the method comprising:

[0008] (A) A SiO2 tunneling layer, a polycrystalline silicon layer (i-Poly-Si layer) and a BSG layer are sequentially deposited on the back side of a silicon substrate. Then, a boron source in the BSG layer is pushed into the polycrystalline silicon layer to form a boron-doped polycrystalline silicon layer (B-Poly-Si layer) by laser doping.

[0009] The silicon substrate is a silicon wafer that has undergone double-sided polishing.

[0010] (B) The back side of the silicon substrate after step (A) is locally laser patterned to remove the BSG layer at the negative electrode. Then, the SiO2 tunneling layer and boron-doped polysilicon layer at the negative electrode are removed by polishing and cleaning.

[0011] (C) A P-Poly layer is deposited on the back electrode of the silicon substrate after the treatment in step (B) using the PECVD (Plasma Enhanced Chemical Vapor Deposition) method. The P-Poly layer includes a second tunneling layer (second SiO2 tunneling layer), a phosphorus-doped polycrystalline silicon layer and a PSG layer in sequence along the back side of the silicon substrate away from the silicon substrate.

[0012] Annealing then activates the boron in the boron-doped polycrystalline silicon layer and the phosphorus in the phosphorus-doped polycrystalline silicon layer.

[0013] (D) Perform secondary laser patterning on the back side of the silicon substrate after step (C) to remove the PSG layer at the non-back electrode.

[0014] Then, polishing and cleaning are performed to remove the boron-doped polysilicon layer, PSG and BSG layers on the non-negative electrode side of the silicon wafer, and a pyramid textured structure is formed on the front side of the silicon wafer.

[0015] (E) The silicon substrate after step (D) is subjected to surface passivation treatment, and then electrodes are printed on the back side. After sintering and annealing, TBC cells are obtained.

[0016] Furthermore, in step (A), the percentage of laser power in the laser doping is 50-80%, and the scanning speed is 20000-45000 mm / s.

[0017] Furthermore, in step (A), the SiO2 tunneling layer, polycrystalline silicon layer, and BSG layer are prepared using the LPCVD method;

[0018] Preferably, the thickness of the SiO2 tunneling layer is 1.2–1.8 nm;

[0019] Preferably, the thickness of the polycrystalline silicon layer is 80–150 nm;

[0020] Preferably, the thickness of the BSG layer is 80–100 nm.

[0021] Furthermore, in step (B), the laser power percentage for local laser patterning is 20-80%, and the scanning speed is 20000-45000 mm / s;

[0022] And / or, the polishing and cleaning method for removing the SiO2 tunneling layer and the boron-doped polysilicon layer at the negative electrode in step (B) is an alkaline etching method;

[0023] Preferably, the etching solution used in the alkaline etching method is a KOH solution with a concentration of 3-5%;

[0024] Preferably, the etching temperature of the alkaline etching method is 50–80°C;

[0025] Preferably, the etching time of the alkaline etching method is 300-600 s.

[0026] Furthermore, in step (C), the thickness of the second tunneling layer (second SiO2 tunneling layer) is 1.2–1.8 nm;

[0027] And / or, in step (C), the thickness of the phosphorus-doped polycrystalline silicon layer 5 is 80–150 nm.

[0028] And / or, the thickness of the PSG layer in step (C) is 10–50 nm.

[0029] And / or, the annealing temperature in step (C) is 900-950°C, and the annealing time is 60-100 min.

[0030] Furthermore, in step (D), the laser power percentage for the secondary laser patterning process is 20-80%, and the scanning speed is 20000-45000 mm / s;

[0031] And / or, in step (D) of the polishing and cleaning process, an alkaline bath process is used to remove the boron-doped polycrystalline silicon layer;

[0032] And / or, in step (D) polishing and cleaning, a chain polishing method is used to remove the PSG and BSG layers;

[0033] And / or, the front pyramid textured surface is formed during the polishing and cleaning process in step (D).

[0034] Furthermore, the surface passivation treatment in step (E) includes:

[0035] An AlOx film is deposited on both sides of a silicon substrate using atomic layer deposition (ALD), and then a SiNx film is deposited on both sides of the silicon substrate using PECVD.

[0036] Preferably, the AlOx film thickness is 3–6 nm;

[0037] Preferably, the SiNx film thickness is 60–100 nm.

[0038] Furthermore, in step (E), the sintering annealing temperature is 680–800°C, and the sintering annealing time is 1–5 min.

[0039] The present invention provides a TBC battery, which is mainly prepared by the above-mentioned TBC battery preparation method.

[0040] A TBC battery, the TBC battery comprising: a battery silicon wafer substrate and grid lines located on a first surface of the silicon wafer substrate;

[0041] The first surface is the back side of the silicon substrate, and the gate lines on the first surface include n+ diffusion regions and p+ diffusion regions arranged in a comb-like parallel staggered pattern.

[0042] The p+ diffusion region includes a SiO2 tunneling layer and a boron-doped polycrystalline silicon layer sequentially along the back side of the silicon substrate and away from the silicon substrate, with a laser doping region between the SiO2 tunneling layer and the boron-doped polycrystalline silicon layer;

[0043] A positive electrode is printed on the boron-doped polycrystalline silicon layer, and a back AlOx film and a back SiNx film are sequentially deposited on the boron-doped polycrystalline silicon layer. The positive electrode passes through the back AlOx film and the back SiNx film.

[0044] The n+ diffusion region includes a second tunneling layer (second SiO2 tunneling layer) and a phosphorus-doped polycrystalline silicon layer in sequence along the back side of the silicon substrate and away from the silicon substrate;

[0045] A negative electrode is printed on the phosphorus-doped polycrystalline silicon layer, and a back AlOx film and a back SiNx film are sequentially deposited on the phosphorus-doped polycrystalline silicon layer. The negative electrode passes through the back AlOx film and the back SiNx film.

[0046] The first surface, relative to the other side of the silicon substrate, is the front side of the silicon substrate;

[0047] The front side of the silicon substrate has a pyramidal textured surface, and an AlOx film and a SiNx film are sequentially disposed along the front side of the silicon substrate in a direction away from the silicon substrate.

[0048] The present invention provides a photovoltaic module, the photovoltaic module comprising the above-mentioned TBC cell.

[0049] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0050] The present invention provides a method for fabricating a TBC battery. This method employs laser doping to effectively increase the doping concentration of the boron source in the passivated contact structure, thereby reducing contact resistance and improving the efficiency of the TBC battery. Simultaneously, the use of PECVD (plasma-enhanced chemical vapor deposition) to prepare the P-Poly layer reduces the deflection compared to traditional LPCVD (low-pressure chemical vapor deposition), facilitating subsequent cleaning and removal, and effectively reducing the risk of leakage. Furthermore, the TBC battery prepared by this method has no metal grid lines obstructing the front side, which can significantly improve the battery's current density and open-circuit voltage.

[0051] The TBC battery provided by this invention has no metal grid lines obstructing the front side, which can significantly improve the battery's current density and open-circuit voltage. The passivated contact structure on the back side increases the concentration of boron source doping by using laser doping, thereby reducing contact resistance and improving battery efficiency. At the same time, the TBC battery of this application also has the effect of reducing the risk of leakage.

[0052] The TBC cells provided in this application can be widely used in the manufacturing process of photovoltaic modules. Attached Figure Description

[0053] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0054] Figure 1 A process flow diagram of the TBC battery preparation method provided by the present invention;

[0055] Figure 2 This is a schematic diagram of the structure of the TBC battery cell provided in Embodiment 1 of the present invention.

[0056] Icons: 1-Silicon substrate; 2-SiO2 tunneling layer; 3-Boron-doped polycrystalline silicon layer; 31-Laser-doped region; 4-Second tunneling layer; 5-Phosphorus-doped polycrystalline silicon layer; 6-Positive electrode; 7-Negative electrode; 8-Back side AlOx film; 9-Back side SiNx film; 10-Front side AlOx film; 11-Front side SiNx film. Detailed Implementation

[0057] The technical solution of the present invention will be clearly and completely described below with reference to the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0058] According to one aspect of the present invention, a method for preparing a TBC battery, the method comprising:

[0059] (A) A SiO2 tunneling layer 2, a polycrystalline silicon layer and a BSG layer are sequentially deposited on the back side of a silicon substrate 1. Then, a boron source in the BSG layer is pushed into the polycrystalline silicon layer to form a boron-doped polycrystalline silicon layer 3 by laser doping.

[0060] The silicon substrate 1 is a silicon wafer that has undergone double-sided polishing.

[0061] (B) The back side of the silicon substrate 1 after step (A) is locally laser patterned to remove the BSG layer at the negative electrode. Then, the SiO2 tunneling layer 2 and the boron-doped polycrystalline silicon layer 3 at the negative electrode are removed by polishing and cleaning.

[0062] (C) A P-Poly layer is deposited at the back electrode of the silicon substrate 1 after the treatment in step (B) using the PECVD (plasma-enhanced chemical vapor deposition) method. The P-Poly layer includes a second tunneling layer 4, a phosphorus-doped polysilicon layer 5 and a PSG layer in sequence along the back of the silicon substrate 1 in the direction away from the silicon substrate 1.

[0063] Annealing then activates the boron in boron-doped polycrystalline silicon layer 3 and the phosphorus in phosphorus-doped polycrystalline silicon layer 5.

[0064] (D) Perform a second laser patterning process on the back side of the silicon substrate 1 after step (C) to remove the PSG layer at the non-back electrode.

[0065] Subsequently, polishing and cleaning were performed to remove the boron-doped polysilicon layer 3, PSG and BSG layers on the non-negative electrode side of the silicon wafer, and a pyramidal textured structure was formed on the front side of the silicon wafer.

[0066] (E) The silicon substrate 1 after step (D) is subjected to surface passivation treatment, and then electrodes are printed on the back side. After sintering and annealing, TBC solar cells are obtained.

[0067] The present invention provides a method for fabricating a TBC battery. This method employs laser doping to effectively increase the doping concentration of the boron source in the passivated contact structure, thereby reducing contact resistance and improving the efficiency of the TBC battery. Simultaneously, the PECVD method used in this application to fabricate the P-Poly layer reduces the deflection compared to traditional LPCVD (low-pressure chemical vapor deposition), facilitating cleaning and removal, and effectively reducing the risk of leakage. Furthermore, the TBC battery prepared by this method has no metal grid lines obstructing the front side, which can significantly improve the battery's current density and open-circuit voltage.

[0068] Figure 1 A process flow diagram of the TBC battery preparation method provided in this application.

[0069] To better illustrate the technical solution of this application, the applicant, in conjunction with... Figure 1 The preparation steps and process parameters of the TBC battery in this application are described in detail below:

[0070] (1) Double-sided polishing:

[0071] A silicon substrate 1 is provided and the silicon substrate 1 is subjected to double-sided polishing.

[0072] The silicon substrate 1 is a silicon wafer with a resistivity of 0.4 to 1.6 Ω·cm and a thickness of 130 ± 5 μm.

[0073] (2) Preparation of SiO2 tunneling layer and i-Poly-Si layer by LPCVD:

[0074] A SiO2 tunneling layer 2 and a polycrystalline silicon layer (i-Poly-Si) are sequentially deposited on the back side of the silicon substrate 1 using LPCVD technology; wherein:

[0075] The SiO2 tunneling layer 2 has a thickness of 1.2–1.8 nm, uses O2 as the gas, has a gas flow rate of 20,000–30,000 sccm, a deposition time of 400–600 s, and a deposition temperature of 500–700 °C.

[0076] The i-Poly-Si layer has a thickness of 80–150 nm, and the gases used are SiH4 and N2 with flow rates of 10,000–20,000 sccm and 15,000–30,000 sccm, respectively. The deposition time is 1,000–2,000 s, and the deposition temperature is 500–700 °C.

[0077] (3) Boron diffusion preparation of BSG layer:

[0078] A BSG layer is deposited on the surface of the polycrystalline silicon layer described in step (2) using a boron diffusion process; wherein the thickness of the BSG layer is 80-100 nm.

[0079] The gases used for depositing the BSG layer are BCl3, O2 and N2, with a BCl3 flow rate of 100-600 sccm, an O2 flow rate of 15000-30000 sccm and an N2 flow rate of 15000-30000 sccm.

[0080] (4) Laser doping:

[0081] The boron source in the BSG layer described in step (3) is advanced into the amorphous silicon layer using a laser doping process to form boron doping;

[0082] The laser power percentage is 50-80%, and the scanning speed is 20000-45000 mm / s;

[0083] It should be noted that the passivation contact structure on the back of the TBC battery in this application uses laser doping to dope the boron source, which effectively increases the boron source concentration in the boron-doped polycrystalline silicon layer 3, thereby reducing the contact resistance and improving the battery efficiency.

[0084] It should be noted that in the laser doping step of advancing the boron source in the BSG layer into the amorphous silicon layer, the scanning speed is used to control the time and degree of laser doping, so as to achieve the purpose of advancing the boron source in the BSG layer into the amorphous silicon layer to form boron doping by using laser doping.

[0085] (5) Laser patterning:

[0086] The BSG layer at the negative electrode is removed using a laser patterning process, while the BSG layer at the positive electrode 6 is retained; the laser power percentage is 20-80%, and the scanning speed is 20000-45000 mm / s;

[0087] (6) First polishing and cleaning:

[0088] The SiO2 layer and B-Poly-Si layer at the negative electrode are removed using a polishing and cleaning process; the polishing and cleaning process involves removing the SiO2 layer at the back electrode using an alkaline etching method, wherein:

[0089] The etching solution used in the alkaline etching method is a KOH solution with a concentration of 3-5%, the etching temperature is 50-80℃, and the etching time is 300-600s.

[0090] (7) PECVD process for preparing the second tunneling layer 4, P-Poly:

[0091] A P-Poly layer is deposited at the back electrode using a PECVD process. The P-Poly layer, along the back side of the silicon substrate 1 towards the direction away from the silicon substrate 1, consists sequentially of a second tunneling layer 4, a phosphorus-doped polycrystalline silicon layer 5 (P-Poly-Si layer), and a PSG layer. The required gases are N2O, PH3, H2, and SiH4, wherein:

[0092] The SiO2 tunneling layer 2 has a thickness of 1.2–1.8 nm, uses N2O as the gas, has a gas flow rate of 8000–10000 sccm, a deposition temperature of 350–500 °C, and a pressure of 1500–1700 mtorr.

[0093] The phosphorus-doped polycrystalline silicon layer 5 has a thickness of 80-150 nm. The gases used are PH3, H2 and SiH4. The flow rate ratio of PH3 and SiH4 is 1:2 to 1:5. The deposition temperature is 350-500℃, the pressure is 1500-1700 mtorr, and the H2 flow rate is 4000-6000 sccm.

[0094] The PSG layer thickness is 10-50 nm, the gas used is SiH4 and N2O, the gas flow ratio is 1:3-1:8, the deposition temperature is 350-500℃, and the pressure is 1500-1700 mtorr.

[0095] It should be noted that the PECVD method used in this application to prepare the P-Poly layer reduces the winding compared to the traditional LPCVD method, which facilitates subsequent cleaning and removal and effectively reduces the risk of leakage.

[0096] (8) Annealing activation:

[0097] The boron in the boron-doped polycrystalline silicon layer 3 and the phosphorus in the phosphorus-doped polycrystalline silicon layer 5 are activated by an annealing process.

[0098] The annealing temperature is 900–950℃, and the time is 60–100 min.

[0099] (9) Laser secondary patterning:

[0100] The PSG layer at the non-back electrode location of silicon substrate 1 was removed using a laser patterning method.

[0101] The laser power percentage for the secondary laser patterning is 20%–80%, and the scanning speed is 20,000–45,000 mm / s;

[0102] (10) Second polishing and cleaning:

[0103] The B-Poly-Si layer, PSG and BSG layers on the non-negative electrode side of the back side are removed using a polishing and cleaning process, forming a pyramidal textured structure on the front side, wherein:

[0104] The B-Poly-Si layer is prepared by an alkaline bath process, wherein the alkaline bath process formula is 3-5% KOH, 0.5-1% additives, 4-8% H2O2, the temperature is 60-80℃, and the time is 400-600s.

[0105] The additive is isopropanol at a concentration of 2-10% or NaOH at a concentration of 0.1-3%.

[0106] The PSG and BSG layer removal process is a chain polishing removal, and the chain tank is an HF solution with a concentration of 4-8%.

[0107] The pyramid-shaped velvet surface is prepared using an alkaline bath process. The alkaline bath process formula is 3-5% KOH, 0.5-1% additives, and 4-8% H2O2, with a temperature of 60-80℃ and a time of 400-600s.

[0108] The additive is isopropanol at a concentration of 2-10% or NaOH at a concentration of 0.1-3%.

[0109] (11) Front and back ALD:

[0110] An AlOx film is deposited on the front and back sides of the silicon substrate 1 after the treatment in step (10) using an atomic layer deposition process;

[0111] The AlOx film thickness is 3–6 nm, the deposition temperature is 100–300 °C, and the deposition time is 20–50 min.

[0112] The required flow rate ratio of gas TMA to water for the AlOx membrane is (1-2):(3-5);

[0113] (12) Front and back SiN film layers:

[0114] A SiNx film was deposited on both the front and back sides using PECVD process;

[0115] The SiNx film thickness is 60–100 nm, the deposition temperature is 350–500 °C, and the deposition time is 30–80 min.

[0116] The required flow rate ratio of the gases N3H, SiH4, and N2O for the SiNx membrane is (1-3):(5-15):(3-13).

[0117] (13) Screen printing:

[0118] A positive electrode 6 and a negative electrode 7 are printed on the back side of the silicon substrate 1;

[0119] (14) Sintering annealing:

[0120] The silicon substrate 1 with printed electrodes is sintered and annealed to obtain a TBC solar cell.

[0121] The sintering annealing temperature is 680–800℃, and the annealing time is 1–5 min.

[0122] According to one aspect of the present invention, a TBC battery is provided, wherein the TBC battery is mainly prepared by the above-described method for preparing a TBC battery.

[0123] The TBC battery provided by this invention has no metal grid lines obstructing the front side, which can significantly improve the battery's current density and open-circuit voltage. The passivated contact structure on the back side increases the concentration of boron source doping by using laser doping, thereby reducing contact resistance and improving battery efficiency. At the same time, the TBC battery of this application also has the effect of reducing the risk of leakage.

[0124] According to one aspect of the present invention, a photovoltaic module includes the aforementioned TBC cell.

[0125] The TBC cells provided in this application can be widely used in the fabrication of photovoltaic modules.

[0126] The technical solution of the present invention will be further described below with reference to the embodiments.

[0127] Example 1

[0128] Figure 2 This is a schematic diagram of the structure of the TBC battery cell provided in this embodiment.

[0129] A TBC battery, the TBC battery comprising: a silicon substrate 1 and grid lines located on a first surface of the silicon substrate 1;

[0130] The first surface is the back side of the silicon substrate 1, and the gate lines on the first surface include n+ diffusion regions and p+ diffusion regions arranged in a comb-like parallel staggered pattern.

[0131] The p+ diffusion region includes a SiO2 tunneling layer 2 and a boron-doped polycrystalline silicon layer 3 sequentially along the back side of the silicon substrate 1 and away from the silicon substrate 1. A laser doping region 31 is located between the SiO2 tunneling layer 2 and the boron-doped polycrystalline silicon layer 3.

[0132] A positive electrode 6 is printed on the boron-doped polycrystalline silicon layer 3. A back AlOx film layer 8 and a back SiNx film layer 9 are also deposited sequentially on the boron-doped polycrystalline silicon layer 3. The positive electrode 6 passes through the back AlOx film layer 8 and the back SiNx film layer 9.

[0133] The n+ diffusion region includes a second tunneling layer 4 and a phosphorus-doped polycrystalline silicon layer 5 sequentially along the back side of the silicon substrate 1 and away from the silicon substrate 1.

[0134] A negative electrode 7 is printed on the phosphorus-doped polycrystalline silicon layer 5. A back AlOx film layer 8 and a back SiNx film layer 9 are also deposited sequentially on the phosphorus-doped polycrystalline silicon layer 5. The negative electrode 7 passes through the back AlOx film layer 8 and the back SiNx film layer 9.

[0135] The first surface, opposite to the silicon substrate 1, is the front side of the silicon substrate 1;

[0136] The front side of the silicon substrate 1 has a pyramidal textured surface, and an AlOx film 10 and a SiNx film 11 are sequentially disposed along the front side of the silicon substrate 1 in a direction away from the silicon substrate 1.

[0137] The method for preparing the TBC battery includes:

[0138] (1) Provide a silicon substrate 1 and perform double-sided polishing on the silicon substrate 1. Then, use LPCVD process to sequentially apply a SiO2 tunneling layer 2 and a polycrystalline silicon layer (i-Poly-Si) on the back side of the silicon substrate 1.

[0139] Wherein: the SiO2 tunneling layer 2 has a thickness of 1.5 nm, the gas used is O2, the gas flow rate is 25000 sccm, the deposition time is 500 s, and the deposition temperature is 600 ℃.

[0140] The i-Poly-Si layer has a thickness of 120 nm, and the gases used are SiH4 and N2 with flow rates of 15000 sccm and 25000 sccm, respectively. The deposition time is 1500 s and the deposition temperature is 600 °C.

[0141] (2) A BSG layer is deposited on the surface of the polysilicon layer in step (1) using a boron diffusion process;

[0142] Wherein: the thickness of the BSG layer is 90nm;

[0143] The gases used for depositing the BSG layer are BCl3, O2 and N2, with a BCl3 flow rate of 300 sccm, an O2 flow rate of 25000 sccm and an N2 flow rate of 25000 sccm.

[0144] (3) The boron source in the BSG layer described in step (2) is pushed into the amorphous silicon layer to form boron doping (B-Poly-Si) using laser doping technology;

[0145] The laser power percentage is 650%, and the scanning speed is 38000 mm / s;

[0146] (4) The BSG layer at the negative electrode of silicon substrate 1 after step (3) is removed by laser patterning process, while the BSG layer at the positive electrode 6 is retained.

[0147] The laser power percentage is 50%, and the scanning speed is 30000 mm / s;

[0148] (5) The SiO2 layer and B-Poly-Si layer at the negative electrode of silicon substrate 1 after step (4) are removed by polishing and cleaning process; the polishing and cleaning process is to remove the SiO2 layer at the back electrode by alkaline etching, wherein:

[0149] The etching solution used in the alkaline etching method is a 4% KOH solution, the etching temperature is 60°C, and the etching time is 450s.

[0150] (6) A P-Poly layer is deposited at the back electrode using PECVD. The P-Poly layer, along the back side of the silicon substrate 1 and moving away from the silicon substrate 1, forms a second tunneling layer 4, a phosphorus-doped polycrystalline silicon layer 5 (P-Poly-Si layer), and a PSG layer. The required gases are N2O, PH3, H2, and SiH4, wherein:

[0151] The second tunneling layer 4 has a thickness of 1.5 nm, uses N2O as the gas, has a gas flow rate of 9000 sccm, a deposition temperature of 420℃, and a pressure of 1600 mtorr.

[0152] The phosphorus-doped polycrystalline silicon layer 5 has a thickness of 80-150 nm. The gases used are PH3, H2 and SiH4, with a flow rate ratio of PH3 to SiH4 of 1:3. The deposition temperature is 420℃, the pressure is 1600 mtorr, and the H2 flow rate is 5000 sccm.

[0153] The PSG layer thickness is 10-50 nm, the gas used is SiH4 and N2O, the gas flow ratio is 1:5, the deposition temperature is 420℃, and the pressure is 1600 mtorr.

[0154] (7) The boron in the boron-doped polycrystalline silicon layer 3 and the phosphorus in the phosphorus-doped polycrystalline silicon layer 5 are activated by annealing process;

[0155] The annealing temperature is 920℃ and the time is 80 minutes.

[0156] (8) The PSG layer at the non-back electrode of silicon substrate 1 after annealing in step (7) is removed by laser patterning.

[0157] The laser power percentage is 50%, and the scanning speed is 30000 mm / s;

[0158] (9) The B-Poly-Si layer, PSG and BSG layers on the non-negative electrode side of the back side are removed by polishing and cleaning process, forming a pyramidal textured structure on the front side, wherein:

[0159] The B-Poly-Si layer is prepared using an alkaline bath process. The alkaline bath process formula is 4% KOH, 0.8% additives, and 5% H2O2, with a temperature of 70℃ and a time of 500s.

[0160] The PSG and BSG layer removal process is a chain polishing removal, and the chain tank is an HF solution with a concentration of 6%.

[0161] The pyramid-shaped velvet surface is prepared using an alkaline bath process. The alkaline bath process formula is 4% KOH, 0.8% additives, and 5% H2O2, with a temperature of 70℃ and a time of 500s.

[0162] (10) An AlOx film is deposited on the front and back sides of the silicon substrate 1 after the treatment in step (9) using an atomic layer deposition process;

[0163] The AlOx film has a thickness of 5 nm, a deposition temperature of 200 °C, and a deposition time of 35 min.

[0164] The required flow ratio of gas TMA to water for the AlOx membrane is 1:4.

[0165] (11) A SiNx film is deposited on the front and back sides using PECVD process;

[0166] The SiNx film has a thickness of 800 nm, a deposition temperature of 420 °C, and a deposition time of 60 min.

[0167] The required flow rate ratio of the gases N3H, SiH4, and N2O for the SiNx membrane is 2:10:8.

[0168] (12) A positive electrode 6 and a negative electrode 7 are printed on the back side of the silicon substrate 1, and then the silicon substrate 1 with the printed electrodes is sintered and annealed to obtain a TBC cell.

[0169] Example 2

[0170] A TBC battery, wherein the method for preparing the TBC battery includes:

[0171] (1) Provide a silicon substrate 1 and perform double-sided polishing on the silicon substrate 1. Then, use LPCVD process to sequentially apply a SiO2 tunneling layer 2 and a polycrystalline silicon layer (i-Poly-Si) on the back side of the silicon substrate 1.

[0172] Wherein: the thickness of the SiO2 tunneling layer 2 is 1.2 nm, the gas used is O2, the gas flow rate is 20000 sccm, the deposition time is 400 s, and the deposition temperature is 500℃;

[0173] The i-Poly-Si layer has a thickness of 80 nm, and the gases used are SiH4 and N2 with flow rates of 10000 sccm and 15000 sccm, respectively. The deposition time is 1000 s and the deposition temperature is 500 °C.

[0174] (2) A BSG layer is deposited on the surface of the polysilicon layer in step (1) using a boron diffusion process;

[0175] Wherein: the thickness of the BSG layer is 80nm;

[0176] The gases used for depositing the BSG layer are BCl3, O2 and N2, with a BCl3 flow rate of 100 sccm, an O2 flow rate of 15000 sccm and an N2 flow rate of 15000 sccm.

[0177] (3) The boron source in the BSG layer described in step (2) is pushed into the amorphous silicon layer to form boron doping (B-Poly-Si) using laser doping technology;

[0178] The laser power percentage is 50%, and the scanning speed is 20000 mm / s;

[0179] (4) The BSG layer at the negative electrode of silicon substrate 1 after step (3) is removed by laser patterning process, while the BSG layer at the positive electrode 6 is retained.

[0180] The laser power percentage is 20%, and the scanning speed is 20000 mm / s;

[0181] (5) The SiO2 layer and B-Poly-Si layer at the negative electrode of silicon substrate 1 after step (4) are removed by polishing and cleaning process; the polishing and cleaning process is to remove the SiO2 layer at the back electrode by alkaline etching, wherein:

[0182] The etching solution used in the alkaline etching method is a 3% KOH solution, the etching temperature is 50°C, and the etching time is 300s.

[0183] (6) A P-Poly layer is deposited at the back electrode using PECVD. The P-Poly layer, along the back side of the silicon substrate 1 and moving away from the silicon substrate 1, forms a second tunneling layer 4, a phosphorus-doped polycrystalline silicon layer 5, and a PSG layer. The required gases are N2O, PH3, H2, and SiH4, wherein:

[0184] The second tunneling layer 4 has a thickness of 1.2 nm, uses N2O as the gas, has a gas flow rate of 8000 sccm, a deposition temperature of 350℃, and a pressure of 1500 mtorr;

[0185] The phosphorus-doped polycrystalline silicon layer 5 has a thickness of 80 nm. The gases used are PH3, H2 and SiH4, with a PH3 to SiH4 gas flow rate ratio of 1:2. The deposition temperature is 350 °C, the pressure is 1500 mtorr, and the H2 flow rate is 4000 sccm.

[0186] The PSG layer is 10 nm thick, and the gases used are SiH4 and N2O with a gas flow ratio of 1:3. The deposition temperature is 350 °C and the pressure is 1500 mtorr.

[0187] (7) The boron in the boron-doped polycrystalline silicon layer 3 and the phosphorus in the phosphorus-doped polycrystalline silicon layer 5 are activated by annealing process;

[0188] The annealing temperature is 9000℃ and the time is 60 minutes.

[0189] (8) The PSG layer at the non-back electrode of silicon substrate 1 after annealing in step (7) is removed by laser patterning.

[0190] The laser power percentage is 20%, and the scanning speed is 20000 mm / s;

[0191] (9) The B-Poly-Si layer, PSG and BSG layers on the non-negative electrode side of the back side are removed by polishing and cleaning process, forming a pyramidal textured structure on the front side, wherein:

[0192] The B-Poly-Si layer is prepared by an alkaline bath process, which consists of 3% KOH, 0.5% additives, and 4% H2O2, at a temperature of 60°C and a time of 4000s.

[0193] The PSG and BSG layer removal process is a chain polishing removal, and the chain tank is an HF solution with a concentration of 4%.

[0194] The pyramid-shaped velvet surface is prepared using an alkaline bath process. The alkaline bath process formula is 3% KOH, 0.5% additives, and 4% H2O2, with a temperature of 60℃ and a time of 400s.

[0195] (10) An AlOx film is deposited on the front and back sides of the silicon substrate 1 after the treatment in step (9) using an atomic layer deposition process;

[0196] The AlOx film has a thickness of 3 nm, a deposition temperature of 100 °C, and a deposition time of 20 min.

[0197] The required flow ratio of gas TMA to water for the AlOx membrane is 1:3;

[0198] (11) A SiNx film is deposited on the front and back sides using PECVD process;

[0199] The SiNx film has a thickness of 60 nm, a deposition temperature of 350 °C, and a deposition time of 30 min.

[0200] The required gas flow ratio of N3H, SiH4, and N2O for the SiNx membrane is 1:5:3;

[0201] (12) Same as Example 1.

[0202] Example 3

[0203] A TBC battery, wherein the method for preparing the TBC battery includes:

[0204] (1) Provide a silicon substrate 1 and perform double-sided polishing on the silicon substrate 1. Then, use LPCVD process to sequentially apply a SiO2 tunneling layer 2 and a polycrystalline silicon layer (i-Poly-Si) on the back side of the silicon substrate 1.

[0205] Wherein: the thickness of the SiO2 tunneling layer 2 is 1.8 nm, the gas used is O2, the gas flow rate is 30000 sccm, the deposition time is 600 s, and the deposition temperature is 700 ℃;

[0206] The i-Poly-Si layer has a thickness of 150 nm, and the gases used are SiH4 and N2 with flow rates of 20,000 sccm and 30,000 sccm, respectively. The deposition time is 2,000 s and the deposition temperature is 700 °C.

[0207] (2) A BSG layer is deposited on the surface of the polysilicon layer in step (1) using a boron diffusion process;

[0208] Wherein: the thickness of the BSG layer is 100nm;

[0209] The gases used for depositing the BSG layer are BCl3, O2 and N2, with a BCl3 flow rate of 600 sccm, an O2 flow rate of 30000 sccm and an N2 flow rate of 30000 sccm.

[0210] (3) The boron source in the BSG layer described in step (2) is pushed into the amorphous silicon layer to form boron doping (B-Poly-Si) using laser doping technology;

[0211] The laser power percentage is 80%, and the scanning speed is 45000 mm / s;

[0212] (4) The BSG layer at the negative electrode of silicon substrate 1 after step (3) is removed by laser patterning process, while the BSG layer at the positive electrode 6 is retained.

[0213] The laser power percentage is 80%, and the scanning speed is 45000 mm / s;

[0214] (5) The SiO2 layer and B-Poly-Si layer at the negative electrode of silicon substrate 1 after step (4) are removed by polishing and cleaning process; the polishing and cleaning process is to remove the SiO2 layer at the back electrode by alkaline etching, wherein:

[0215] The etching solution used in the alkaline etching method is a 5% KOH solution, the etching temperature is 80°C, and the etching time is 600s.

[0216] (6) A P-Poly layer is deposited at the back electrode using PECVD. The P-Poly layer, along the back side of the silicon substrate 1 and moving away from the silicon substrate 1, forms a second tunneling layer 4, a phosphorus-doped polycrystalline silicon layer 5, and a PSG layer. The required gases are N2O, PH3, H2, and SiH4, wherein:

[0217] The second tunneling layer 4 has a thickness of 1.8 nm, uses N2O as the gas, has a gas flow rate of 10000 sccm, a deposition temperature of 500℃, and a pressure of 1700 mtorr.

[0218] The phosphorus-doped polycrystalline silicon layer 5 has a thickness of 150 nm. The gases used are PH3, H2 and SiH4, with a flow rate ratio of PH3 to SiH4 of 1:5. The deposition temperature is 500 °C, the pressure is 1700 mtorr, and the H2 flow rate is 6000 sccm.

[0219] The PSG layer is 50 nm thick, and the gases used are SiH4 and N2O with a gas flow ratio of 1:8. The deposition temperature is 500 °C and the pressure is 1700 mtorr.

[0220] (7) The boron in the boron-doped polycrystalline silicon layer 3 and the phosphorus in the phosphorus-doped polycrystalline silicon layer 5 are activated by annealing process;

[0221] The annealing temperature is 950℃ and the time is 100min.

[0222] (8) The PSG layer at the non-back electrode of silicon substrate 1 after annealing in step (7) is removed by laser patterning.

[0223] The laser power percentage is 80%, and the scanning speed is 45000 mm / s;

[0224] (9) The B-Poly-Si layer, PSG and BSG layers on the non-negative electrode side of the back side are removed by polishing and cleaning process, forming a pyramidal textured structure on the front side, wherein:

[0225] The B-Poly-Si layer is prepared using an alkaline bath process. The alkaline bath process formula is 5% KOH, 1% additives, and 8% H2O2, with a temperature of 80℃ and a time of 600s.

[0226] The PSG and BSG layer removal process is a chain polishing removal, and the chain tank is an HF solution with a concentration of 8%.

[0227] The pyramid-shaped velvet surface is prepared using an alkaline bath process. The alkaline bath process formula is 5% KOH, 1% additives, and 8% H2O2, with a temperature of 80℃ and a time of 600s.

[0228] (10) An AlOx film is deposited on the front and back sides of the silicon substrate 1 after the treatment in step (9) using an atomic layer deposition process;

[0229] The AlOx film has a thickness of 6 nm, a deposition temperature of 300 °C, and a deposition time of 50 min.

[0230] The required flow ratio of gas TMA to water for the AlOx membrane is 2:5;

[0231] (11) A SiNx film is deposited on the front and back sides using PECVD process;

[0232] The SiNx film has a thickness of 100 nm, a deposition temperature of 500 °C, and a deposition time of 80 min.

[0233] The required gas flow ratio of N3H, SiH4, and N2O for the SiNx membrane is 3:15:13;

[0234] (12) Same as Example 1.

[0235] Examples 4-13

[0236] Examples 4-15 are identical to Example 1 except for some differences in film thickness. See Table 1 for specific differences in film thickness.

[0237] Table 1:

[0238]

[0239] Note: In Table 1 above, "-" indicates the same as in Example 1.

[0240] Comparative Example 1

[0241] This comparative example excludes the laser doping step (3) and uses existing methods to prepare the passivated contact structure, as follows:

[0242] A BSG layer is deposited on the surface of the polysilicon layer in step (1) using a boron diffusion process;

[0243] Wherein: the thickness of the BSG layer is 20nm;

[0244] The gases used for depositing the BSG layer are BCl3, O2 and N2, with a BCl3 flow rate of 250 sccm, an O2 flow rate of 30000 sccm and an N2 flow rate of 30000 sccm.

[0245] Comparative Example 2

[0246] Except for step (6) in which the P-Poly layer is deposited at the back electrode using the LPCVD process, the comparative example is the same as in Example 1.

[0247] Comparative Example 3

[0248] This comparative example is the same as Example 1 except that it does not include step (7) annealing activation.

[0249] Experimental Example 1

[0250] To demonstrate that the TBC battery prepared in this application has the technical advantages of high battery efficiency and low leakage risk, the performance of the TBC batteries prepared in Examples 1-13 and Comparative Examples 1-3 was tested. The specific methods are as follows:

[0251] The Eff and leakage ratio of solar cells were measured using a Halm tester.

[0252] See Table 2 below for specific results.

[0253] Table 2:

[0254] Group Battery efficiency Eff Leakage ratio Example 1 26.65％ 0.09％ Example 2 26.60％ 0.11％ Example 3 26.58％ 0.10％ Example 4 26.40％ 0.16％ Example 5 26.35％ 0.18％ Example 6 26.52％ 0.13％ Example 7 26.48％ 0.14％ Example 8 26.46％ 0.15％ Example 9 26.39％ 0.17％ Example 10 26.46％ 0.12％ Example 11 26.55％ 0.11％ Example 12 26.37％ 0.19％ Example 13 26.30％ 0.15％ Comparative Example 1 26.44％ 0.23％ Comparative Example 2 26.49％ 0.25％ Comparative Example 3 25.78％ 0.39％

[0255] As shown in the table above, the TBC solar cells prepared in Examples 1 to 3 of this application have a cell efficiency of 26.58 to 26.65% and a leakage rate of 0.09 to 0.10%, which have the technical advantages of high cell efficiency and low leakage risk.

[0256] The thicknesses of the SiO2 tunneling layer 2 and the i-Poly-Si layer in Examples 4 to 7 are not within the thickness range of Examples 1 to 3 of this application. The thicknesses of the second tunneling layer 4 and the phosphorus-doped polycrystalline silicon layer 5 in Examples 8 to 11 are not within the thickness range of Examples 1 to 3 of this application. Their battery efficiency and leakage ratio are poor and cannot achieve the technical effect of this application.

[0257] In Examples 12 and 13, the thickness of the AlOx film layer is not within the thickness range of Examples 1 to 3 of this application, and the battery efficiency is only 26.30 to 26.37%, and the leakage rate is 0.15 to 0.19%.

[0258] In contrast, Comparative Example 1, which does not include the laser doping step (3) of this application, has a lower battery efficiency of only 26.44%. At the same time, the BSG layer thickness in Comparative Example 1 is only 20nm, which poses a risk of over-etching during the subsequent BSG removal process, resulting in a higher leakage rate.

[0259] In contrast, Comparative Example 2, which uses LPCVD to deposit a P-Poly layer on the back electrode, has a higher leakage rate of 0.25% due to its higher deflection, making it difficult to remove later. This is in contrast to the technical solutions in Examples 1 to 13 of this application.

[0260] In contrast, in the implementation of Comparative Example 3 excluding the annealing activation step (7), the doping source of the amorphous silicon layer was not activated, so the battery efficiency was only 25.78%, and the passivation performance of the battery was poor, which also led to a high leakage rate.

[0261] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for preparing a TBC battery, characterized in that, The preparation method includes: (A) A SiO2 tunneling layer (2), a polycrystalline silicon layer and a BSG layer are sequentially deposited on the back side of a silicon substrate (1). Then, a boron source in the BSG layer is pushed into the polycrystalline silicon layer to form a boron-doped polycrystalline silicon layer (3) by laser doping. A laser doping region (31) is formed between the SiO2 tunneling layer (2) and the boron-doped polycrystalline silicon layer (3); The silicon substrate (1) is a silicon wafer that has undergone double-sided polishing. (B) The back side of the silicon substrate (1) after step (A) is locally laser patterned to remove the BSG layer at the negative electrode. Then, the SiO2 tunneling layer (2) and the boron-doped polycrystalline silicon layer (3) at the negative electrode are removed by polishing and cleaning. (C) A P-Poly layer is deposited at the back electrode of the silicon substrate (1) after the treatment in step (B) using the PECVD method. The P-Poly layer includes a second tunneling layer (4), a phosphorus-doped polycrystalline silicon layer (5) and a PSG layer in sequence along the back side of the silicon substrate (1) away from the silicon substrate (1). Annealing then activates the boron in the boron-doped polycrystalline silicon layer (3) and the phosphorus in the phosphorus-doped polycrystalline silicon layer (5); (D) Perform secondary laser patterning on the back side of the silicon substrate (1) after step (C) to remove the PSG layer at the non-back electrode. Subsequently, polishing and cleaning were performed to remove the boron-doped polysilicon layer (3), PSG and BSG layers on the non-negative electrode side of the back of the silicon wafer, and a pyramid textured structure was formed on the front side of the silicon wafer. (E) The silicon substrate (1) after step (D) is subjected to surface passivation treatment, and then electrodes are printed on the back side. After sintering and annealing, TBC cells are obtained.

2. The method for preparing a TBC battery according to claim 1, characterized in that, In step (A), the percentage of laser power in the laser doping is 50-80%, and the scanning speed is 20000-45000 mm / s.

3. The method for preparing a TBC battery according to claim 1, characterized in that, In step (A), the SiO2 tunneling layer (2), the polycrystalline silicon layer, and the BSG layer are prepared by LPCVD method; Preferably, the thickness of the SiO2 tunneling layer (2) is 1.2 to 1.8 nm; Preferably, the thickness of the polycrystalline silicon layer is 80–150 nm; Preferably, the thickness of the BSG layer is 80–100 nm.

4. The method for preparing a TBC battery according to claim 1, characterized in that, The laser power percentage for the local laser patterning process in step (B) is 20-80%, and the scanning speed is 20000-45000 mm / s; And / or, the polishing and cleaning method for removing the SiO2 tunneling layer (2) and the boron-doped polycrystalline silicon layer (3) at the negative electrode in step (B) is alkaline etching. Preferably, the etching solution used in the alkaline etching method is a KOH solution with a concentration of 3-5%; Preferably, the etching temperature of the alkaline etching method is 50–80°C; Preferably, the etching time of the alkaline etching method is 300-600 s.

5. The method for preparing a TBC battery according to claim 1, characterized in that, The thickness of the second tunneling layer (4) in step (C) is 1.2 to 1.8 nm; And / or, the thickness of the phosphorus-doped polycrystalline silicon layer (5) in step (C) is 80-150 nm; And / or, the thickness of the PSG layer in step (C) is 10–50 nm; And / or, the annealing temperature in step (C) is 900-950°C, and the annealing time is 60-100 min.

6. The method for preparing a TBC battery according to claim 1, characterized in that, In step (D), the laser power percentage for the secondary laser patterning process is 20-80%, and the scanning speed is 20000-45000 mm / s. And / or, in step (D) the polishing and cleaning process, an alkaline bath process is used to remove the boron-doped polycrystalline silicon layer (3); And / or, in step (D) polishing and cleaning, a chain polishing method is used to remove the PSG and BSG layers; And / or, the front pyramid textured surface is formed during the polishing and cleaning process in step (D).

7. The method for preparing a TBC battery according to claim 1, characterized in that, The surface passivation process in step (E) includes: An AlOx film was deposited on the front and back sides of a silicon substrate (1) using atomic layer deposition (ALD) and then a SiNx film was deposited on the front and back sides of the silicon substrate (1) using PECVD. Preferably, the AlOx film thickness is 3–6 nm; Preferably, the SiNx film thickness is 60–100 nm.

8. The method for preparing a TBC battery according to claim 1, characterized in that, In step (E), the sintering annealing temperature is 680–800°C, and the sintering annealing time is 1–5 min.

9. A TBC battery, characterized in that, The TBC cell includes: a silicon wafer substrate and grid lines located on a first surface of the silicon wafer substrate; The first surface is the back side of the silicon substrate (1), and the gate lines on the first surface include n+ diffusion regions and p+ diffusion regions arranged in a comb-like parallel staggered pattern. The p+ diffusion region includes a SiO2 tunneling layer (2) and a boron-doped polycrystalline silicon layer (3) in sequence along the back side of the silicon substrate (1) in the direction away from the silicon substrate (1), and there is a laser doping region (31) between the SiO2 tunneling layer (2) and the boron-doped polycrystalline silicon layer (3). A positive electrode (6) is printed on the boron-doped polycrystalline silicon layer (3). A back AlOx film layer (8) and a back SiNx film layer (9) are also deposited sequentially on the boron-doped polycrystalline silicon layer (3). The positive electrode (6) passes through the back AlOx film layer (8) and the back SiNx film layer (9). The n+ diffusion region includes a second tunneling layer (4) and a phosphorus-doped polycrystalline silicon layer (5) in sequence along the back side of the silicon substrate (1) in the direction away from the silicon substrate (1); A negative electrode (7) is printed on the phosphorus-doped polycrystalline silicon layer (5). A back AlOx film layer (8) and a back SiNx film layer (9) are also deposited sequentially on the phosphorus-doped polycrystalline silicon layer (5). The negative electrode (7) passes through the back AlOx film layer (8) and the back SiNx film layer (9). The first surface is the opposite side of the silicon substrate (1) to the silicon substrate (1); The front side of the silicon substrate (1) has a pyramidal textured surface, and a front AlOx film layer (10) and a front SiNx film layer (11) are sequentially disposed along the front side of the silicon substrate (1) in the direction away from the silicon substrate (1).

10. A photovoltaic module, characterized in that, The photovoltaic module includes the TBC battery as described in claim 9.

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