A Hall plate using a two-dimensional GaN electron gas film, its preparation method and application

Abstract

This invention relates to a Hall plate employing a two-dimensional CaN electron gas film, its preparation method, and its applications. The Hall plate comprises, from bottom to top, a substrate, a nucleation layer, a buffer layer, an insertion layer, and a barrier layer, forming a multilayer film. The cross-section of the multilayer film is rectangular, with four mesa symmetrically arranged on both sides. Four ohmic metals are disposed above the barrier layer. PAD metals are applied over the mesa and ohmic metals, and a SiO2 passivation layer is disposed above the ohmic metals and PAD metals. The high electron mobility of the Hall plate of this invention significantly improves magnetic field sensitivity, supports stable operation above 200°C, and has a higher frequency response capability (GHz level), making it suitable for high-speed detection scenarios.

Description

Technical Field

[0001] This invention relates to a Hall plate using a two-dimensional GaN electron gas film, its preparation method and application, belonging to the field of Hall device technology. Background Technology

[0002] Hall effect devices are the most important sensor elements for detecting magnetic fields and play an important role in industrial and agricultural production. In particular, with the development of power semiconductor devices, differential Hall current sensors, which indirectly obtain current by sensing the magnetic field generated by the current, have received much attention.

[0003] Early Hall devices were mainly made of silicon-based materials. Although low-cost mass production was achieved, the silicon standard process was difficult to be compatible with Hall devices, and the narrow bandgap (1.1 eV) resulted in insufficient sensitivity and temperature stability of Hall differential current sensors made with silicon processes.

[0004] With the application of compound semiconductors such as gallium arsenide (GaAs) and indium antimonide (InSb), the sensitivity and response speed of Hall devices have been significantly improved, but high-temperature performance and anti-interference capabilities still have shortcomings. As wide-bandgap semiconductor (such as GaN and SiC) technology matures further, combined with HEMT (high electron mobility transistor) structures, Hall devices now possess high sensitivity (nT level), high-temperature tolerance (>200°C), and high-frequency response (GHz level), driving the penetration of contactless sensing into high-end fields such as new energy vehicles, smart grids, and aerospace. With the surge in demand for high-temperature, high-reliability sensors in these fields, wide-bandgap semiconductor GaN (bandgap 3.4 eV) has become an ideal alternative material. Its high electron mobility transistor (HEMT) structure forms a two-dimensional electron gas (2DEG) through the AlGaN / GaN heterojunction interface, with a carrier concentration on the order of 10¹³ cm⁻² and a mobility exceeding 2000 cm² / (V·s), while also exhibiting high withstand voltage (>600 V) and low on-resistance. This characteristic gives GaN HEMTs a unique advantage in Hall effect applications.

[0005] With the maturation of MOCVD epitaxy and etching processes, researchers have begun to explore the multifunctional sensing potential of GaN HEMTs. Hall devices are gradually replacing traditional solutions in motor control, current detection, and extreme environment monitoring, becoming a new direction for high-performance non-contact sensing. Summary of the Invention

[0006] To address the shortcomings of existing technologies, this invention provides a Hall plate employing a GaN two-dimensional electron gas film. The high electron mobility of the Hall plate significantly improves magnetic field sensitivity, supports stable operation above 200°C, and has higher frequency response capability (GHz level), making it suitable for high-speed detection scenarios.

[0007] The present invention also provides a method for preparing and applying the Hall plate using the above-mentioned GaN two-dimensional electron gas film.

[0008] The technical solution of the present invention is as follows:

[0009] A Hall plate using a GaN two-dimensional electron gas film comprises, from bottom to top, a substrate, a nucleation layer, a buffer layer, an insertion layer, and a barrier layer, forming a multilayer film. The cross-section of the multilayer film is rectangular in the middle, with four mesa symmetrically arranged on both sides. Four ohmic metals are arranged on the upper side of the barrier layer. PAD metals are covered on the mesa and ohmic metals, and a SiO2 passivation layer is arranged on top of the ohmic metals and PAD metals.

[0010] According to a preferred embodiment of the present invention, the substrate material is selected from SiC, Si, sapphire, GaN, AlN or diamond, the nucleation layer material is AlN, the buffer layer material is GaN, the insertion layer material is AlN, the barrier layer material is AlGaN, and the ohmic metal material is a Ti / Al / Ni / Au metal stack or a Ti / Al / Ti / Au metal stack.

[0011] The thickness of the nucleation layer is 1-300 nm;

[0012] The buffer layer is an unintentionally doped GaN buffer layer or a doped high-resistivity GaN buffer layer, and the thickness of the buffer layer is 0.2-100μm;

[0013] The thickness of the insertion layer is 0-2 nm, and the thickness is not zero;

[0014] The molar ratio of Al components in the barrier layer is 0.10-0.40, and the thickness of the barrier layer is 5-40 nm.

[0015] More preferably, the substrate is a sapphire substrate;

[0016] The thickness of the nucleation layer is 100 nm;

[0017] The buffer layer is an unintentionally doped GaN buffer layer with a thickness of 2 μm;

[0018] The thickness of the insertion layer is 1 nm;

[0019] The molar ratio of Al components in the barrier layer is 0.2, and the thickness of the barrier layer is 20 nm.

[0020] The ohmic metal material is a Ti / Al / Ni / Au metal stack.

[0021] The above-mentioned method for preparing Hall plates using GaN two-dimensional electron gas films comprises the following steps:

[0022] S1. A core layer, a buffer layer, an insertion layer, and a barrier layer are sequentially grown on the substrate using metal-organic chemical vapor deposition (MOCVD).

[0023] S2. Metal evaporation / deposition and annealing are performed on the barrier layer to form AlGaN / GaN HEMT ohmic metal.

[0024] S3. PAD metal is formed by metal evaporation / deposition on the tabletop and ohmic metal;

[0025] S4. Deposit a SiO2 passivation layer over the ohmic metal and PAD metal;

[0026] S5. Remove part of the SiO2 passivation layer above the PAD metal layer, i.e., open a window, as required for subsequent packaging wire bonding.

[0027] According to a preferred embodiment of the present invention, in step S4, a SiO2 passivation layer is grown using low-pressure chemical vapor deposition (LPCVD) or plasma-enhanced chemical vapor deposition (PECVD).

[0028] In step S5, the SiO2 passivation layer is removed by inductively coupled plasma etching (ICP) or hydrofluoric acid etching.

[0029] An application of a Hall plate using a GaN two-dimensional electronic gas film is disclosed, which utilizes the Hall plate to assemble a coreless direct current sensing current sensor, including Hall plate one, Hall plate two and a signal conditioning chip, wherein Hall plate one and Hall plate two are differentially connected in series and then connected to the signal conditioning chip.

[0030] According to a preferred embodiment of the present invention, the signal conditioning dedicated chip includes a power manager, a gain temperature compensation algorithm controller, an output offset voltage regulator, an output buffer U3, a 16-bit R-2R digital offset voltage regulator I, a 16-bit R-2R digital offset voltage regulator II, a 10-bit R-2R digital signal amplitude regulator, a signal amplifier U1, a signal amplifier U4, a signal amplifier U5, a programmable gain switch SW1, a short-circuit detection differential comparator U6, a programmable short-circuit blanking time controller, and a digital programming interface;

[0031] Two 16-bit R-2R digital offset voltage regulators using 16 bits are the preferred structure. 15 bits or lower bits, such as 12 bits, can also be used, which reduces the circuit size but decreases the adjustment accuracy. 17 bits or higher (18-20 bits) can also be used, which improves the adjustment accuracy, but increases the circuit size and design complexity, and the benefits are not significant considering cost and other factors. A 10-bit R-2R digital signal amplitude regulator is the preferred structure. Lower or higher bit structures, such as 8 bits or 12 bits, can be used, but better efficiency cannot be obtained from cost and performance considerations.

[0032] Hall effect sensor 1 and Hall effect sensor 2 are respectively connected to 16-bit R-2R digital offset voltage regulator 1 and 16-bit R-2R digital offset voltage regulator 2. 16-bit R-2R digital offset voltage regulator 1 and 16-bit R-2R digital offset voltage regulator 2 are respectively connected to signal amplifier U1 and signal amplifier U4. Signal amplifier U1 and signal amplifier U4 are connected through programmable gain switch SW1. The output terminals of signal amplifier U1 and signal amplifier U4 are connected to signal amplifier U5. The output terminal of signal amplifier U5 is connected to a 10-bit R-2R digital signal amplitude regulator. The 10-bit R-2R digital signal amplitude regulator is also connected to a gain temperature compensation algorithm controller. The gain temperature compensation algorithm controller is connected to a temperature measurement PN junction through an ADC analog-to-digital converter. The output terminals of the 10-bit R-2R digital signal amplitude regulator and U2 are connected to an output buffer U3. The input terminal of operational amplifier U2 is connected to an output offset voltage regulator. The power manager is used for power supply.

[0033] The signal inputs of the short-circuit detection differential comparator are: a 16-bit R-2R digital offset voltage regulator and a 16-bit... The output terminals of the R-2R digital offset voltage regulator are HRSIG1 and HRSIG2. The threshold inputs of the short-circuit detection differential comparator are differential setting one and differential setting two. When the signal input difference exceeds the difference between the threshold differential setting one and differential setting two, the output of the short-circuit detection differential comparator reverses, indicating that a short circuit has been detected. Otherwise, it is normal. The output terminal of the short-circuit detection differential comparator is connected to a programmable short-circuit blanking time controller. In order to prevent false judgment, especially when the power device is turned on (within a few hundred ns), there will be current resonance caused by distributed parameters. Short-circuit detection needs to have a "time protection window", which is a "programmable short-circuit blanking time controller". The blanking time means that only when the short-circuit detection differential comparator continuously detects a short-circuit signal that exceeds the "blanking time" can it be judged that a short circuit has actually occurred. The function of the programmable short-circuit blanking time controller is to provide a time comparator to accurately determine the short circuit and output a short-circuit indication signal.

[0034] As the communication interface for the programmable part of the entire device, the digital programming interface is used in the dedicated chip involved in this invention. There are many variable programming settings inside, such as the input value of the 16-bit R-2R network, the programmable short-circuit blanking time, the non-volatile data memory, etc. These programmable items all require a digital programming interface to achieve communication with the outside world.

[0035] The steps for using the above-mentioned coreless direct current sensing current sensor are as follows:

[0036] (1) Place Hall plate 1 and Hall plate 2 on both sides of the near-field current. According to Ampere's circuital law, the magnetic field generated by the local current is opposite on both sides of the current. The magnetic field generated by the near-field current through Hall plate 1 and Hall plate 2 is opposite. Therefore, the signal of Hall plate 1 and Hall plate 2 connected in series is strengthened. The magnetic field of the far-field current passes through Hall plate 1 and Hall plate 2 in the same direction. Therefore, the Hall voltage generated by Hall plate 1 and Hall plate 2 must be opposite. The signals cancel each other out. This is the so-called "differential Hall current sensor".

[0037] (2) During the manufacturing process of the Hall plate, the uniformity of the GaN material and the symmetry of the electrode manufacturing will cause the output offset voltage of the Hall plate. According to the simulation and actual sample test results, the output offset voltage of the Hall plate reaches 10-20mV. However, under the current of 1A, the Hall voltage generated by the magnetic field generated by the current at a distance of 3mm from the Hall plate is only 40-60uV. Therefore, it is necessary to zero the offset voltage of the Hall plate. The 16Bits R-2R digital offset voltage regulator one and the 16Bits R-2R digital offset voltage regulator two zero the offset voltage of the Hall plate. According to the maximum offset voltage of the Hall plate of 25mV, the 16Bits R-2R architecture can achieve a zeroing accuracy of 25mV / 65535 = 0.38uV. According to the Hall voltage generated by the current of 1A of 50uV, after zeroing, the accuracy loss caused by the offset voltage is reduced to 0.38uV / 50uV = 0.76%.

[0038] (3) Signal amplification is performed using signal amplifiers U1 and U4;

[0039] (4) Since the Hall plate is made of GaN film, the electron mobility and electron density of GaN will change with temperature. These temperature-dependent changes have a significant impact on the Hall coefficient. Therefore, a temperature compensation circuit is needed to achieve a linear relationship between output voltage and current across the entire current and temperature range. The temperature compensation method is as follows:

[0040] First, the temperature of the PN junction is measured, and the Ube / ΔUbe method is used to achieve temperature-to-digital conversion;

[0041] Second, the gain temperature compensation algorithm controller performs temperature compensation based on the temperature measurement results. The output amplitude is adjusted according to the temperature through a 10-bit R-2R signal amplitude adjuster, thereby achieving temperature compensation of the current-output signal amplitude.

[0042] (5) During operation, when the short circuit detection differential comparator continuously detects a short circuit signal that exceeds the blanking time, it is determined that a short circuit has actually occurred. The programmable short circuit blanking time controller provides a time comparator to accurately determine the short circuit and outputs a short circuit indication signal.

[0043] The current sensor involved in this invention realizes the conversion of current to output voltage (current sensor function) on the one hand, and also includes short-circuit protection function on the other hand. In actual working conditions, there are many interference factors at the edge of pulse current. In order to prevent false operation of short-circuit detection, the short-circuit signal needs to be "filtered". A commonly used "filtering" method is to increase the short-circuit detection blanking time window Tx. That is, during the Tx time at the beginning of the pulse current, the short-circuit signal that the short-circuit detection circuit may generate is ignored. At the same time, the output of the short-circuit signal is also divided into two forms: level output and latched output. The so-called level output means that when the current exceeds the short-circuit threshold, the short-circuit detection comparator circuit outputs a "short-circuit indication level", and when the current is lower than the short-circuit threshold, the short-circuit detection comparator circuit outputs a "normal indication level". The so-called latched output means that when the short-circuit comparator determines that a short circuit has occurred, it will latch this state, and will continue to output a "short-circuit indication level" even when the current is lower than the short-circuit comparison threshold.

[0044] According to a preferred embodiment of the present invention, in step (2), the 16-bit R-2R digital offset voltage regulator one and the 16-bit R-2R digital offset voltage regulator two use an R-2R resistor network to achieve zero offset voltage adjustment.

[0045] According to a preferred embodiment of the present invention, in step (3), the signal amplifiers U1 and U4 have two output modes. One mode is 0-5V output, unidirectional output; the other mode is 2.5V±(0-2.5V), bidirectional output. The unidirectional output mode only processes the forward current, that is, it only detects the switching current flowing through the MOS in the bridge circuit. The bidirectional output mode can detect the switching current of the MOS in the bridge circuit and the freewheeling current flowing through the freewheeling diode.

[0046] The beneficial effects of this invention are as follows:

[0047] 1. The Hall plate of the present invention utilizes the property that high-purity GaN material itself is an insulator. By creating a conductive layer in the GaN insulating material, a high electron mobility conductive layer with a thickness of only 5-10 nm is created. This layer is also called the 2DEG layer (two-dimensional electron gas conductive layer). According to the generation mechanism of the Hall effect, firstly, the higher the electron mobility of the material, the higher the speed at which electrons can fly in the material; secondly, the electric field strength in the material must be maintained at a sufficiently high level. To maintain a high electric field strength under a limited driving current, the thickness of the conductive layer must be reduced to a sufficiently small size. To achieve this, the traditional process is slicing. However, due to the limitations of the slicing process, the slice thickness can only be reduced to 50-100 μm. This invention utilizes the insulator property of GaN itself, and the 2DEG layer obtained through film processing has a thickness of only 5-10 nm. Therefore, the Hall effect intensity is increased by nearly 10,000 times. To realize the fabrication of 2DEG (AlN and AlGaN heterojunction) on insulating GaN on a substrate, this invention needs to overcome the difference between the substrate and GaN material in terms of lattice properties. Therefore, an AlN layer is first fabricated as a nucleation layer. Taking advantage of the similarity between the lattice properties of AlN and GaN, a GaN buffer layer is grown on the AlN layer. Then, another AlN layer is grown as an insertion layer. Finally, an AlGaN layer is grown on the AlN insertion layer, and the 2DEG heterojunction conductive layer is obtained by annealing.

[0048] This manufacturing process is quite different from the traditional fabrication of Hall devices on Si, InAs, and GaAs. It results in a thinner conductive layer, a stronger Hall signal, and therefore higher sensitivity.

[0049] 2. The Hall plate of the present invention adopts the method of manufacturing two completely symmetrical Hall devices on a single unit, which is called a differential Hall current sensor. By using the principle that the magnetic fields of the two Hall devices are opposite in the near field magnetic field and the signal is enhanced, while the far field magnetic field is in the same direction and the signal is canceled, the purpose of overcoming the interference of the far field magnetic field is achieved.

[0050] In contrast, the sensor industry currently uses other semiconductor materials to manufacture Hall devices, such as Si, InAs, and GaAs. The differences between these materials and the GaN 2DEG layer of this invention are as follows:

[0051] The electron mobility of Si is approximately 1500 cm² / (V·s), which is not significantly different from that of GaN 2DEG. However, Si cannot be used to fabricate very thin films on insulating substrates, resulting in insufficient sensitivity of silicon-based Hall devices. Currently, there is also a process called SOI that can fabricate highly sensitive Hall devices on standard CMOS processes. SOI can obtain crystalline silicon films with a thickness of 20-50 nm, but the cost remains high. At present, the mainstream application of SOI is concentrated in the field of radio frequency devices. Hall devices fabricated on Si substrates have low sensitivity due to the large substrate thickness, requiring high-magnification and high-precision amplification circuits. They are also susceptible to noise interference in weak magnetic fields (below μT). Furthermore, the narrow bandgap (1.1 eV) of Si causes a sharp increase in leakage current at high temperatures, and the operating temperature is usually limited to -40°C to 150°C, which is difficult to meet the requirements of automotive electric drives or high-temperature industrial applications. Traditional materials generally suffer from problems such as weak radiation resistance and low voltage withstand rating (silicon-based devices are typically <200 V), and are prone to performance degradation or failure due to environmental stress in extreme scenarios such as high-voltage power electronics.

[0052] Both InAs and GaAs have the problem of being difficult to form very thin films on insulating substrates. Therefore, although these materials have high electron mobility, the sensitivity of the Hall devices fabricated is not as good as that of GaN 2DEG layers. In addition, the valence band width of InAs and GaAs is not as large as that of GaN, which determines that the Hall devices fabricated with them are easily affected by temperature and are not as good as those of GaN 2DEG layers.

[0053] 3. The current sensor of the present invention, on the one hand, provides an accurate, reliable, and low-cost current detection method, offering "current sensor" support for various applications requiring current detection. On the other hand, it has a built-in short-circuit detection function, which can support short-circuit protection for power components. For example, in SiC MOS application circuits, the timely and reliable short-circuit detection provided by the present invention can effectively improve the safety of SiC MOS applications, ensuring that the device can be shut down in time during a short circuit, preventing the accident from escalating. It can also be used for motor monitoring, for observing the rotor position of BLDC motors, and realizing sensorless FOC control. Of course, the current sensor involved in the present invention can also be used in any application that requires current detection and short-circuit protection, and is not limited to SiC power device applications. Attached Figure Description

[0054] Figure 1 This is a schematic diagram of the substrate structure in Embodiment 1 of the present invention.

[0055] Figure 2 This is a schematic diagram of the structure obtained after step S1 in Embodiment 1 of the present invention.

[0056] Figure 3This is a schematic diagram of the structure obtained after step S2 in Embodiment 1 of the present invention.

[0057] Figure 4 This is a schematic diagram of the structure obtained after step S3 in Embodiment 1 of the present invention.

[0058] Figure 5 This is a schematic diagram of the structure obtained after step S4 in Embodiment 1 of the present invention.

[0059] Figure 6 This is a schematic diagram of the structure obtained after step S5 in Embodiment 1 of the present invention.

[0060] Figure 7 This is a schematic diagram of the lateral fabrication of the device structure in Embodiment 1 of the present invention.

[0061] Figure 8 This is a schematic diagram of the magnetic field in Embodiment 1 of the present invention.

[0062] Figure 9 This is a circuit diagram of Embodiment 2 of the present invention;

[0063] Figure 10 This is a schematic diagram of the offset voltage zeroing circuit for Hall voltage using an R-2R resistor network in Embodiment 2 of the present invention. Detailed Implementation

[0064] The present invention will be further described below with reference to the embodiments and accompanying drawings, but is not limited thereto. Example 1:

[0065] A Hall plate using a GaN two-dimensional electron gas film comprises, from bottom to top, a substrate, a nucleation layer, a buffer layer, an insertion layer, and a barrier layer, forming a multilayer film. The cross-section of the multilayer film is rectangular in the middle, with four mesa symmetrically arranged on both sides. Four ohmic metals are arranged on the upper side of the barrier layer. PAD metals are covered on the mesa and ohmic metals, and a SiO2 passivation layer is arranged on top of the ohmic metals and PAD metals.

[0066] The ohmic metal and the PAD metal covering the platform are respectively PAD1, PAD2, PAD3, PAD4, PAD5, PAD6, and PAD7. PAD1 and PAD2 serve as the driving input electrodes of Hall device 1, PAD4 and PAD5 serve as the signal output electrodes, PAD3 and PAD2 serve as the driving input electrodes of Hall device 2, and PAD6 and PAD7 serve as the signal output electrodes. This invention fabricates two symmetrical Hall devices on a single unit.

[0067] In current detection, two Hall effect sensors are placed on either side of the current to be detected, see... Figure 8The magnetic field generated by the current to be detected is called the near-field magnetic field. According to Ampere's circuital law, the near-field magnetic field passes through the two Hall plates in opposite directions. Therefore, the outputs of the two Hall plates are "in reverse series". The outputs of the two Hall plates are strengthened by the near-field magnetic field, while the far-field magnetic field passes through the two Hall plates in the same direction, and their outputs cancel each other out. This is the origin of the word "differential" in differential Hall current sensor.

[0068] The substrate material is SiC, the nucleation layer material is AlN, the buffer layer material is GaN, the insertion layer material is AlN, and the barrier layer material is AlGaN.

[0069] The thickness of the nucleation layer is 100 nm;

[0070] The buffer layer is an unintentionally doped GaN buffer layer with a thickness of 2 μm;

[0071] The thickness of the insertion layer is 1 nm;

[0072] The molar ratio of Al components in the barrier layer is 0.2, and the thickness of the barrier layer is 20 nm.

[0073] The ohmic metal material is a Ti / Al / Ni / Au metal stack.

[0074] The above-mentioned method for preparing Hall plates using GaN two-dimensional electron gas films comprises the following steps:

[0075] S1. A core layer, a buffer layer, an insertion layer, and a barrier layer are sequentially grown on the substrate using metal-organic chemical vapor deposition (MOCVD).

[0076] S2. Metal evaporation / deposition and annealing are performed on the barrier layer to form AlGaN / GaN HEMT ohmic metal.

[0077] S3. PAD metal is formed by metal evaporation / deposition on the tabletop and ohmic metal;

[0078] S4. Deposit a SiO2 passivation layer over the ohmic metal and PAD metal;

[0079] S5. Remove part of the SiO2 passivation layer above the PAD metal layer, i.e., open a window, as required for subsequent packaging wire bonding.

[0080] According to a preferred embodiment of the present invention, in step S4, a SiO2 passivation layer is grown using low-pressure chemical vapor deposition (LPCVD) or plasma-enhanced chemical vapor deposition (PECVD).

[0081] In step S5, the SiO2 passivation layer is removed by inductively coupled plasma etching (ICP) or hydrofluoric acid etching.

[0082] Taking step S5 as an example, the specific process of etching the SiO2 passivation layer using inductively coupled plasma etching (ICP) is as follows:

[0083] S5-1. Spin-coat photoresist onto the SiO2 passivation layer;

[0084] S5-2. Using photolithography, the SiO2 passivation layer region to be etched is exposed on the photoresist.

[0085] S5-3. Etching SiO2 using an inductively coupled plasma device;

[0086] S5-4. Remove the coated photoresist so that the SiO2 passivation layer above part of the PAD metal is completely etched. Example 2:

[0087] An application of a Hall plate using a GaN two-dimensional electron gas film, assembling a coreless direct current sensing current sensor using the Hall plate described in Example 1, such as... Figure 9 As shown, it includes Hall effect chip 1, Hall effect chip 2, and a dedicated signal conditioning chip, wherein Hall effect chip 1 and Hall effect chip 2 are differentially connected in series and then connected to the dedicated signal conditioning chip.

[0088] The dedicated signal conditioning chip includes a power manager, a gain temperature compensation algorithm controller, an output offset voltage regulator, an output buffer U3, a 16-bit R-2R digital offset voltage regulator I, a 16-bit R-2R digital offset voltage regulator II, a 10-bit R-2R digital signal amplitude regulator, a signal amplifier U1, a signal amplifier U4, a signal amplifier U5, a programmable gain switch SW1, a short-circuit detection differential comparator U6, a programmable short-circuit blanking time controller, and a digital programming interface;

[0089] Hall effect sensor 1 and Hall effect sensor 2 are respectively connected to 16-bit R-2R digital offset voltage regulator 1 and 16-bit R-2R digital offset voltage regulator 2. 16-bit R-2R digital offset voltage regulator 1 and 16-bit R-2R digital offset voltage regulator 2 are respectively connected to signal amplifier U1 and signal amplifier U4. Signal amplifier U1 and signal amplifier U4 are connected through programmable gain switch SW1. The output terminals of signal amplifier U1 and signal amplifier U4 are connected to signal amplifier U5. The output terminal of signal amplifier U5 is connected to a 10-bit R-2R digital signal amplitude regulator. The 10-bit R-2R digital signal amplitude regulator is also connected to a gain temperature compensation algorithm controller. The gain temperature compensation algorithm controller is connected to a temperature measurement PN junction through an ADC analog-to-digital converter. The output terminals of the 10-bit R-2R digital signal amplitude regulator and U2 are connected to an output buffer U3. The input terminal of operational amplifier U2 is connected to an output offset voltage regulator. The power manager is used for power supply.

[0090] The signal inputs of the short-circuit detection differential comparator are: a 16-bit R-2R digital offset voltage regulator and a 16-bit... The output terminals of the R-2R digital offset voltage regulator are HRSIG1 and HRSIG2. The threshold inputs of the short-circuit detection differential comparator are differential setting one and differential setting two. When the signal input difference exceeds the difference between the threshold differential setting one and differential setting two, the output of the short-circuit detection differential comparator reverses, indicating that a short circuit has been detected. Otherwise, it is normal. The output terminal of the short-circuit detection differential comparator is connected to a programmable short-circuit blanking time controller. In order to prevent false judgment, especially when the power device is turned on (within a few hundred ns), there will be current resonance caused by distributed parameters. Short-circuit detection needs to have a "time protection window", which is a "programmable short-circuit blanking time controller". The blanking time means that only when the short-circuit detection differential comparator continuously detects a short-circuit signal that exceeds the "blanking time" can it be judged that a short circuit has actually occurred. The function of the programmable short-circuit blanking time controller is to provide a time comparator to accurately determine the short circuit and output a short-circuit indication signal.

[0091] As the communication interface for the programmable part of the entire device, the digital programming interface is used in the dedicated chip involved in this invention. There are many variable programming settings inside, such as the input value of the 16-bit R-2R network, the programmable short-circuit blanking time, the non-volatile data memory, etc. These programmable items all require a digital programming interface to achieve communication with the outside world.

[0092] The steps for using the above-mentioned coreless direct current sensing current sensor are as follows:

[0093] (1) In a three-phase inverter bridge circuit, the maximum interference experienced by one arm is the interference from the adjacent arm, that is, the interference of the far-field current. The distance between the far-field current and the near-field current is calculated as 60mm, and the distance between the Hall plate and the near-field current is calculated as 3mm. Then the contribution of the far-field current to the near-field sensor is 3 / 60 = 5%, which is a huge error and is unacceptable in engineering. In order to overcome the interference of the far-field current, Hall plate 1 and Hall plate 2 are placed on both sides of the near-field current. According to Ampere's circuital law, the magnetic field generated by the local current is opposite on both sides of the current. The magnetic field generated by the near-field current through Hall plate 1 and Hall plate 2 is opposite. Therefore, the signal of Hall plate 1 and Hall plate 2 connected in series is strengthened. Since the magnetic field of the far-field current passes through Hall plate 1 and Hall plate 2 in the same direction, the Hall voltage generated by Hall plate 1 and Hall plate 2 must be opposite. The signals cancel each other out. This is the so-called "differential Hall current sensor".

[0094] However, since the distance between the two Hall plates is not zero, the interference of the far-field current magnetic field on the two Hall plates cannot be completely canceled. According to the distance between the two Hall plates = 5mm, the residual amount of the adjacent field current = 5 / (60+2.5) *(60-2.5) = 0.00139 = 0.14%. This error is already very small and within an acceptable range.

[0095] (2) During the manufacturing process of the Hall plate, the uniformity of the GaN material and the symmetry of the electrode manufacturing will cause the output offset voltage of the Hall plate. According to the simulation and actual sample test results, the output offset voltage of the Hall plate reaches 10-20mV. However, under the current of 1A, the Hall voltage generated by the magnetic field generated by the current at a distance of 3mm from the Hall plate is only 40-60uV. Therefore, it is necessary to zero the offset voltage of the Hall plate. The 16Bits R-2R digital offset voltage regulator one and the 16Bits R-2R digital offset voltage regulator two can zero the offset voltage of the Hall plate. According to the maximum offset voltage of the Hall plate of 25mV, the 16Bits R-2R architecture can achieve a zeroing accuracy of 25mV / 65535 = 0.38uV. According to the Hall voltage generated by 1A current of 50uV, after zeroing, the accuracy loss caused by the offset voltage is reduced to 0.38uV / 50uV = 0.76%.

[0096] (3) Signal amplification is performed using signal amplifiers U1 and U4;

[0097] (4) Since the Hall plate is made of GaN film, the electron mobility and electron density of GaN will change with temperature. These temperature-dependent changes have a significant impact on the Hall coefficient. Therefore, a temperature compensation circuit is needed to achieve a linear relationship between output voltage and current across the entire current and temperature range. The temperature compensation method is as follows:

[0098] First, the temperature of the PN junction is measured, and the Ube / ΔUbe method is used to achieve temperature-to-digital conversion;

[0099] Second, the gain temperature compensation algorithm controller performs temperature compensation based on the temperature measurement results. The output amplitude is adjusted according to the temperature through a 10-bit R-2R signal amplitude adjuster, thereby achieving temperature compensation of the current-output signal amplitude.

[0100] (5) During operation, when the short circuit detection differential comparator continuously detects a short circuit signal that exceeds the blanking time, it is determined that a short circuit has actually occurred. The programmable short circuit blanking time controller provides a time comparator to accurately determine the short circuit and outputs a short circuit indication signal.

[0101] The current sensor involved in this invention realizes the conversion of current to output voltage (current sensor function) on the one hand, and also includes short-circuit protection function on the other hand. In actual working conditions, there are many interference factors at the edge of pulse current. In order to prevent false operation of short-circuit detection, the short-circuit signal needs to be "filtered". A commonly used "filtering" method is to increase the short-circuit detection blanking time window Tx. That is, during the Tx time at the beginning of the pulse current, the short-circuit signal that the short-circuit detection circuit may generate is ignored. At the same time, the output of the short-circuit signal is also divided into two forms: level output and latched output. The so-called level output means that when the current exceeds the short-circuit threshold, the short-circuit detection comparator circuit outputs a "short-circuit indication level", and when the current is lower than the short-circuit threshold, the short-circuit detection comparator circuit outputs a "normal indication level". The so-called latched output means that when the short-circuit comparator determines that a short circuit has occurred, it will latch this state, and will continue to output a "short-circuit indication level" even when the current is lower than the short-circuit comparison threshold.

[0102] According to a preferred embodiment of the present invention, in step (2), the 16-bit R-2R digital offset voltage regulator one and the 16-bit R-2R digital offset voltage regulator two employ an R-2R resistor network (e.g., Figure 10 (As shown) to achieve zero offset voltage. Based on R = 50K, the influence of the analog switch's on-state resistance on the overall resistance is less than 1 / 2000. Therefore, the analog switch's on-state resistance in the 8-bit R-2R network is 50000 / 2000 = 25 ohms.

[0103] According to a preferred embodiment of the present invention, in step (3), the signal amplifiers U1 and U4 have two output modes. One mode is 0-5V output, unidirectional output; the other mode is 2.5V±(0-2.5V), bidirectional output. The unidirectional output mode only processes the forward current, that is, it only detects the switching current flowing through the MOS in the bridge circuit. The bidirectional output mode can detect the switching current of the MOS in the bridge circuit and the freewheeling current flowing through the freewheeling diode.

[0104] If a unidirectional output is used, and the signal amplifier is a rail-rail output, then the maximum output voltage = VCC. Assuming 5V, the amplification factor for a 50A range device is approximately 5000 / 5.15 = 970 times (approximately 1000 times), while the amplification factor for a 1000A range device is 48.5 times (approximately 50 times). Similarly, the amplification factors for bidirectional output can be calculated to be approximately 500 times and 25 times, respectively. In air conditioning applications, the maximum current is approximately 5-6A (3P air conditioner), with an 8-fold margin, resulting in a maximum current of 48A. In electric vehicle applications, assuming a motor power of 60KW and a supply voltage of 400V, the maximum current is approximately 140-150A, with an 8-fold margin, resulting in a maximum current of 1200A. The signal amplification mode of this invention fully meets the requirements.

Claims

1. A Hall plate employing a GaN two-dimensional electron gas film, characterized in that, From bottom to top, it consists of a substrate, a nucleation layer, a buffer layer, an insertion layer, and a barrier layer, forming a multilayer film. The cross-section of the multilayer film is rectangular, with four mesa symmetrically arranged on both sides. Four ohmic metals are arranged on the upper side of the barrier layer. PAD metals are covered on the mesa and ohmic metals. A SiO2 passivation layer is arranged on top of the ohmic metals and PAD metals. The substrate material is selected from SiC, Si, sapphire, GaN, AlN or diamond, the nucleation layer material is AlN, the buffer layer material is GaN, the insertion layer material is AlN, the barrier layer material is AlGaN, and the ohmic metal material is Ti / Al / Ni / Au metal stack or Ti / Al / Ti / Au metal stack. The thickness of the nucleation layer is 1-300 nm; The buffer layer is an unintentionally doped GaN buffer layer or a doped high-resistivity GaN buffer layer, and the thickness of the buffer layer is 0.2-100μm; The thickness of the insertion layer is 0-2 nm, and the thickness is not zero; The molar ratio of Al components in the barrier layer is 0.10-0.40, and the thickness of the barrier layer is 5-40 nm.

2. The Hall plate employing a GaN two-dimensional electron gas film as described in claim 1, characterized in that, The substrate is a sapphire substrate; The thickness of the nucleation layer is 100 nm; The buffer layer is an unintentionally doped GaN buffer layer with a thickness of 2 μm; The thickness of the insertion layer is 1 nm; The molar ratio of Al components in the barrier layer is 0.2, and the thickness of the barrier layer is 20 nm. The ohmic metal material is a Ti / Al / Ni / Au metal stack.

3. The method for preparing a Hall plate using a GaN two-dimensional electron gas film as described in claim 2, characterized in that, The steps are as follows: S1. A core layer, a buffer layer, an insertion layer, and a barrier layer are sequentially grown on a substrate using metal-organic chemical vapor deposition. S2. An ohmic metal is formed by metal evaporation / deposition and annealing on the barrier layer. S3. PAD metal is formed by metal evaporation / deposition on the tabletop and ohmic metal; S4. Deposit a SiO2 passivation layer over the ohmic metal and PAD metal; S5. Remove part of the SiO2 passivation layer above the PAD metal layer.

4. The method for preparing a Hall plate using a GaN two-dimensional electron gas film as described in claim 3, characterized in that, In step S4, a SiO2 passivation layer is grown using low-pressure chemical vapor deposition or plasma-enhanced chemical vapor deposition. In step S5, the SiO2 passivation layer is removed by inductively coupled plasma etching or hydrofluoric acid etching.

5. An application of a Hall plate using a GaN two-dimensional electron gas film, wherein a coreless direct current sensing current sensor is assembled using the Hall plate as described in claim 1, characterized in that, It includes Hall effect sensor 1, Hall effect sensor 2, and a dedicated signal conditioning chip. Hall effect sensor 1 and Hall effect sensor 2 are differentially connected in series and then connected to the dedicated signal conditioning chip.

6. The application of the Hall plate using a GaN two-dimensional electron gas film as described in claim 5, characterized in that, The dedicated signal conditioning chip includes a power manager, a gain temperature compensation algorithm controller, an output offset voltage regulator, an output buffer U3, a digital offset voltage regulator I, a digital offset voltage regulator II, a digital signal amplitude regulator, a signal amplifier U1, a signal amplifier U4, a signal amplifier U5, a programmable gain switch SW1, a short-circuit detection differential comparator U6, a programmable short-circuit blanking time controller, and a digital programming interface. Hall effect sensor 1 and Hall effect sensor 2 are respectively connected to digital offset voltage regulator 1 and digital offset voltage regulator 2. Digital offset voltage regulator 1 and digital offset voltage regulator 2 are respectively connected to signal amplifier U1 and signal amplifier U4. Signal amplifier U1 and signal amplifier U4 are connected through programmable gain switch SW1. The output terminals of signal amplifier U1 and signal amplifier U4 are connected to signal amplifier U5. The output terminal of signal amplifier U5 is connected to digital signal amplitude regulator. Digital signal amplitude regulator is also connected to gain temperature compensation algorithm controller. Gain temperature compensation algorithm controller is connected to temperature measurement PN junction through ADC analog-to-digital converter. The output terminal of digital signal amplitude regulator and the output terminal of operational amplifier U2 are connected to output buffer U3. The input terminal of operational amplifier U2 is connected to output offset voltage regulator. Power manager is used for power supply. The signal inputs of the short-circuit detection differential comparator are the outputs of digital offset voltage regulator one and digital offset voltage regulator two: HRSIG1 and HRSIG2. The threshold inputs of the short-circuit detection differential comparator are differential setting one and differential setting two. When the signal input difference exceeds the difference between the threshold differential setting one and differential setting two, the output of the short-circuit detection differential comparator reverses, indicating that a short circuit has been detected. Otherwise, it is normal. The output of the short-circuit detection differential comparator is connected to a programmable short-circuit blanking time controller. The digital programming interface serves as the communication interface for the entire device.

7. The application of the Hall plate using a GaN two-dimensional electron gas film as described in claim 6, characterized in that, The steps for using a coreless direct current sensing sensor are as follows: (1) Place Hall plate 1 and Hall plate 2 on both sides of the near-field current respectively. According to Ampere's circuital law, the magnetic field generated by the local current is opposite on both sides of the current. The magnetic field generated by the near-field current through Hall plate 1 and Hall plate 2 is opposite. Therefore, the signal is strengthened by Hall plate 1 and Hall plate 2 connected in series. The magnetic field of the far-field current passes through Hall plate 1 and Hall plate 2 in the same direction. Therefore, the Hall voltage generated by Hall plate 1 and Hall plate 2 must be opposite, and the signals cancel each other out. (2) Zeroing the offset voltage of the Hall plate using 16-bit R-2R digital offset voltage regulator one and 16-bit R-2R digital offset voltage regulator two; (3) Signal amplification is performed using signal amplifiers U1 and U4; (4) Temperature compensation, the method is as follows: First, the temperature of the PN junction is measured, and the Ube / ΔUbe method is used to achieve temperature-to-digital conversion; Second, the gain temperature compensation algorithm controller performs temperature compensation based on the temperature measurement results, and adjusts the output amplitude according to the temperature through the signal amplitude adjuster, thereby realizing temperature compensation of the current-output signal amplitude. (5) During operation, when the short circuit detection differential comparator continuously detects a short circuit signal that exceeds the blanking time, it is determined that a short circuit has actually occurred. The programmable short circuit blanking time controller provides a time comparator to accurately determine the short circuit and outputs a short circuit indication signal.

8. The application of the Hall plate employing a GaN two-dimensional electron gas film as described in claim 7, characterized in that, In step (2), the 16-bit R-2R digital offset voltage regulator one and the 16-bit R-2R digital offset voltage regulator two use an R-2R resistor network to achieve zero offset voltage adjustment.

9. The application of the Hall plate using a GaN two-dimensional electron gas film as described in claim 7, characterized in that, In step (3), the signal amplifiers U1 and U4 have two output modes. One mode is 0-5V output, unidirectional output; the other mode is 2.5V±(0-2.5V), bidirectional output. The unidirectional output mode only processes the forward current, that is, it only detects the switching current flowing through the MOS in the bridge circuit. The bidirectional output mode detects the switching current of the MOS in the bridge circuit and the freewheeling current flowing through the freewheeling diode.

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