Task scheduling system and chip
By designing hardware circuits to implement reinforcement learning models for task scheduling, the problems of poor efficiency, real-time performance, and accuracy of processor task scheduling are solved, achieving real-time, efficient, and highly accurate task scheduling.
Patent Information
- Application Number
- CN202511071639.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-31
- Publication Date
- 2025-11-04
AI Technical Summary
Existing technologies for processor task scheduling have poor efficiency, real-time performance, and accuracy, especially in high-load system environments where they struggle to meet real-time scheduling requirements.
Design a task scheduling system and chip that uses a hardware circuit to implement a reinforcement learning model for task scheduling, including resource status monitoring, task feature analysis, and scheduling decision-making, through a resource monitor, task analyzer, scheduling decision-maker, and task allocator.
It achieves real-time and high-efficiency processor task scheduling, improves the accuracy of task scheduling, and allows for flexible adjustments to adapt to different task types and system requirements.
Smart Images
Figure CN120892158A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of computer processor scheduling, and more particularly, to a task scheduling system and a chip. BACKGROUND
[0002] In a computer system, with the increase of the number of processor cores and the improvement of task complexity, the processor needs to be scheduled, such as scheduling the processor by first come first served (FCFS), that is, scheduling according to the order of job or process arrival, which is simple and easy to implement, but may cause long waiting time of short jobs, and the efficiency, real-time performance and accuracy of task scheduling are poor.
[0003] To sum up, how to improve the efficiency, real-time performance and accuracy of processor task scheduling is a problem that needs to be solved by the technical personnel in the field at present. SUMMARY
[0004] The purpose of the present application is to provide a task scheduling system which can solve the technical problem of how to improve the efficiency, real-time performance and accuracy of processor task scheduling to some extent. The present application also provides a task scheduling chip.
[0005] In order to achieve the above purpose, the present application provides the following technical scheme:
[0006] A task scheduling system comprises:
[0007] A resource monitor for monitoring the original resource state of a processor, preprocessing the original resource state to obtain a target resource state;
[0008] A task analyzer for analyzing a to-be-processed task to obtain an original task feature of the to-be-processed task, preprocessing the original task feature to obtain a target task feature;
[0009] A scheduling decision maker for processing the target resource state and the target task feature according to a reinforcement learning model to obtain a scheduling result of the to-be-processed task;
[0010] A task allocator for allocating the to-be-processed task to the processor according to the scheduling result.
[0011] In an exemplary embodiment, it further comprises:
[0012] A feedback and updater for collecting execution feedback information of the to-be-processed task by the processor, and updating the scheduling decision maker according to the execution feedback information.
[0013] In an exemplary embodiment, the scheduling decision maker comprises:
[0014] A multi-modal input module is configured to receive the target resource state and the target task feature;
[0015] A feature fusion module is configured to perform weighted fusion on the target resource state and the target task feature to obtain a fusion feature;
[0016] A concept mapping module is configured to map the fusion feature to a virtual address space to obtain a concept mapping result;
[0017] An actual mapping module is configured to map the concept mapping result to an actual policy;
[0018] A weight optimization module is configured to update the weights of the concept mapping module and the actual mapping module;
[0019] An output module is configured to output a scheduling result of the to-be-processed task according to the actual measurement;
[0020] An error feedback module is configured to perform parameter correction on the feature fusion module and to correct the weights of the weight optimization module.
[0021] In an example embodiment, the scheduling decision maker is constructed based on a cerebellar neural network.
[0022] In an example embodiment, the resource monitor is connected to the processor, a memory corresponding to the processor, and a peripheral bus corresponding to the processor.
[0023] In an example embodiment, the original resource state of the processor is monitored, and the original resource state is preprocessed to obtain a target resource state, including:
[0024] The processor is monitored to obtain an original resource state of the processor, and the original resource state includes CPU utilization, memory usage information, and I / O bandwidth proportion;
[0025] The original resource state is classified into a normal resource state and an abnormal resource state;
[0026] The abnormal resource state is adjusted to an upper limit or a lower limit of a preset normal data range to obtain a corrected resource state;
[0027] The normal resource state and the corrected resource state are taken as candidate resource states;
[0028] The candidate resource states are standardized to obtain a target resource state.
[0029] In an example embodiment, the candidate resource states are standardized to obtain a target resource state, including:
[0030] In the candidate resource states, a first initial resource state is counted in a first numerical interval, and a second initial resource state is counted in a second numerical interval;
[0031] The first initial resource state is reduced according to a first coefficient to obtain a first reduced resource state;
[0032] The second initial resource state is enlarged according to a second coefficient to obtain a first enlarged resource state;
[0033] The first reduced resource state and the second enlarged resource state are taken as target resource states.
[0034] In an example embodiment, the analyzing of the to-be-processed task to obtain original task features of the to-be-processed task, and the preprocessing of the original task features to obtain target task features, include:
[0035] The to-be-processed task is analyzed to obtain original task features of the to-be-processed task, and the original task features include priority information, estimated execution time, and resource requirement information;
[0036] The original task features are normalized to obtain normalized task features;
[0037] The normalized task features are standardized to obtain target task features.
[0038] In an example embodiment, the standardizing of the normalized task features to obtain target task features includes:
[0039] In the normalized task features, a first initial task feature is counted in a third numerical interval, and a second initial task feature is counted in a fourth numerical interval;
[0040] The first initial task feature is reduced according to a third coefficient to obtain a first reduced task feature;
[0041] The second initial task feature is enlarged according to a fourth coefficient to obtain a first enlarged task feature;
[0042] The first reduced task feature and the second enlarged task feature are taken as target task features.
[0043] A task scheduling chip includes the task scheduling system as described in any of the above.
[0044] The application provides a task scheduling system, which comprises a resource monitor, a task analyzer, a scheduling decision maker and a task distributor. BRIEF DESCRIPTION OF DRAWINGS
[0045] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed in the embodiments or the prior art description will be briefly introduced as follows. Obviously, the drawings in the following description only belong to the embodiments of the present application, and other drawings can also be obtained by those skilled in the art without any creative effort on the basis of the provided drawings.
[0046] Figure 1 The structural schematic diagram of a task scheduling system provided by the present application is shown in the figure.
[0047] Figure 2 The connection schematic diagram of the resource monitor is shown in the figure.
[0048] Figure 3 The structural schematic diagram of the scheduling decision maker is shown in the figure.
[0049] Figure 4Fig. 2 is another structural schematic diagram of a task scheduling system;
[0050] Figure 5 Fig. 3 is a structural schematic diagram of a task scheduling chip. DETAILED DESCRIPTION
[0051] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.
[0052] In a computer system, as the number of processor cores increases and the complexity of tasks increases, the processor needs to be scheduled for tasks, which can be divided into software scheduling and hardware scheduling.
[0053] Software scheduling can be divided into first come first served (FCFS), short job first (SJF), priority scheduling, and time slice round robin scheduling. First come first served, that is, scheduling according to the order of job or process arrival, is simple and easy to implement, but may cause long waiting time for short jobs. Short job first scheduling predicts the shortest execution time of jobs, which can improve system throughput, but may cause long job starvation. Priority scheduling assigns a priority to each job or process, and runs high-priority tasks first, which may cause low-priority processes to wait for a long time. In time slice round robin, each process is assigned a fixed time slice to execute in turn, which ensures that each process can be responded in time, and is commonly used in time-sharing systems.
[0054] Hardware scheduling can be divided into hardware circuit scheduling and interrupt controller scheduling. Hardware circuit scheduling implements priority arbitration through the design of a specific circuit, such as building a priority encoder circuit with an encoder and a comparator to quickly determine the highest priority task. Interrupt controller scheduling, such as the interrupt controller of a multi-core processor, can distribute interrupt requests to different cores according to pre-set rules to implement task scheduling on different cores.
[0055] However, the software scheduling algorithm needs to run on a general-purpose processor, involving a large amount of calculation and data processing operations such as task feature analysis, resource state monitoring, calculation of reinforcement learning model, etc. Since the architecture of the general-purpose processor is not designed specifically for the scheduling algorithm, the processing speed is slow, which is difficult to meet the real-time scheduling requirements. And the software scheduling will be disturbed by other tasks of the operating system during execution, which may cause scheduling delay. Especially in a high-load system environment, scheduling delay will further increase, affecting the timely processing of tasks and the overall performance of the system. And some existing hardware scheduling schemes use fixed logic circuits to implement, which can only support specific scheduling algorithms and cannot be flexibly adjusted according to different task types and system requirements. The efficiency, real-time performance and accuracy of processor task scheduling are poor. In order to solve this situation, the present application provides a task scheduling system and chip, which schedules the processor according to reinforcement learning by designing hardware circuit.
[0056] Please refer to Figure 1 , Figure 1 The structure diagram of a task scheduling system provided by an embodiment of the present application.
[0057] The task scheduling system provided by an embodiment of the present application can include:
[0058] The resource monitor 101 is configured to monitor the original resource state of the processor, pre-process the original resource state, and obtain the target resource state;
[0059] The task analyzer 102 is configured to analyze the to-be-processed task, obtain the original task feature of the to-be-processed task, pre-process the original task feature, and obtain the target task feature;
[0060] The scheduling decision maker 103 is configured to process the target resource state and the target task feature according to the reinforcement learning model, and obtain the scheduling result of the to-be-processed task;
[0061] The task allocator 104 is configured to allocate the to-be-processed task to the processor according to the scheduling result.
[0062] In the exemplary embodiment, the original resource state collected by the resource monitor refers to resource information that can reflect the processing performance of the processor, which can include CPU utilization, memory usage, I / O bandwidth occupation, etc., and the resource state can be accurate to each processor core of the processor, so as to subsequently perform task scheduling in units of processor cores. And the pre-processing method of the original resource state can be flexibly determined according to application scenarios and data types, etc.
[0063] In a specific application scenario, the resource monitor can be composed of a dedicated data acquisition circuit to monitor the resource status of the processor in real time, such as CPU utilization, memory usage, I / O bandwidth occupation, etc. as described above. In order to enable the resource monitor to quickly and accurately obtain the resource status information of the processor, as shown in Figure 2 the resource monitor can be connected with the processor, the memory corresponding to the processor and the peripheral bus corresponding to the processor, so as to collect the corresponding resource status of the processor.
[0064] On this basis, the resource monitor monitors the original resource status of the processor, pre-processes the original resource status to obtain the target resource status, and can monitor the processor to obtain the original resource status of the processor, which includes CPU utilization, memory usage information and I / O bandwidth ratio; the original resource status is classified into normal resource status and abnormal resource status, for example, the normal value of each resource status can be set according to the performance of the processor, the original resource status is compared with the normal value, if a resource status in the original resource status is inconsistent with the normal value, the resource status can be classified as abnormal resource status, and correspondingly, if a resource status in the original resource status is consistent with the normal value, the resource status can be classified as normal resource status; the abnormal resource status is adjusted to the upper limit or lower limit of the preset normal data range to obtain the corrected resource status; the normal resource status and the corrected resource status are taken as candidate resource status; the candidate resource status is standardized to obtain the target resource status. It should be noted that the resource monitor can process the resource status in parallel, such as classifying the original resource status into normal resource status and abnormal resource status in parallel; adjusting the abnormal resource status to the upper limit or lower limit of the preset normal data range to obtain the corrected resource status in parallel; taking the normal resource status and the corrected resource status as candidate resource status in parallel; and standardizing the candidate resource status in parallel to obtain the target resource status, so as to improve the efficiency of processing the resource status.
[0065] In a specific application scenario, in the process of standardizing the candidate resource state to obtain the target resource state, the resource state can be preprocessed by scaling according to the numerical interval to which the resource state in the candidate resource state belongs, that is, the first initial resource state in the first numerical interval and the second initial resource state in the second numerical interval can be counted in the candidate resource state; the first initial resource state is scaled down by the first coefficient to obtain the first scaled-down resource state; the second initial resource state is scaled up by the second coefficient to obtain the first scaled-up resource state; and the first scaled-down resource state and the second scaled-up resource state are taken as the target resource state. The values of the first numerical interval, the second numerical interval, the first coefficient and the second coefficient can be flexibly determined according to the application scenario, and in this process, in order to avoid the target resource state exceeding the conventional value of the resource state, if the value of the first scaled-down resource state exceeds the lower limit of the corresponding resource state, the lower limit value is taken as the target resource state, if the value of the second scaled-up resource state exceeds the upper limit of the corresponding resource state, the upper limit value is taken as the target resource state, otherwise the first scaled-down resource state and the second scaled-up resource state are taken as the target resource state.
[0066] In order to facilitate understanding of the process of standardizing the candidate resource state, it is assumed that the first numerical interval is 0-0.5, the second numerical interval is 0.5-1.0, the first coefficient is 0.9, and the second coefficient is 1.1, then in the candidate resource state, the first initial resource state in 0-0.5 is counted, and the second initial resource state in 0.5-1.0 is counted; the first initial resource state is multiplied by 0.9 to be scaled down to obtain the first scaled-down resource state; the second initial resource state is multiplied by 1.1 to be scaled up to obtain the first scaled-up resource state; and the first scaled-down resource state and the second scaled-up resource state are taken as the target resource state.
[0067] In an exemplary embodiment, the task features collected by the task analyzer refer to features that can reflect the reference required when processing the task, which can include task priority information, task estimated execution time, resource demand information, task start execution time, task latest execution time, etc. And the way of preprocessing the original task features can be flexibly determined according to the application scenario and data type, etc.
[0068] In a specific application scenario, the task analyzer can analyze the tasks to be scheduled by using a logic circuit to quickly analyze the task features of the tasks, such as the priority, estimated execution time, resource demand, etc. as described above, to provide timely and accurate information for subsequent scheduling decisions.
[0069] On this basis, the task analyzer analyzes the to-be-processed task to obtain original task features of the to-be-processed task, and in the process of preprocessing the original task features to obtain target task features, the to-be-processed task can be analyzed to obtain original task features of the to-be-processed task, the original task features including priority information, estimated execution time and resource requirement information; the original task features are normalized to obtain normalized task features; and the normalized task features are standardized to obtain target task features.
[0070] In a specific application scenario, in the process of standardizing the normalized task features to obtain target task features, the task features in the normalized task features can be preprocessed by being scaled according to the numerical interval to which the task features belong, that is, in the normalized task features, a first initial task feature in a third numerical interval can be counted, and a second initial task feature in a fourth numerical interval can be counted; the first initial task feature is scaled down by a third coefficient to obtain a first scaled-down task feature; the second initial task feature is scaled up by a fourth coefficient to obtain a first scaled-up task feature; and the first scaled-down task feature and the second scaled-up task feature are taken as target task features. The values of the third numerical interval, the fourth numerical interval, the third coefficient and the fourth coefficient can be flexibly determined according to the application scenario, and in this process, in order to avoid the target task features exceeding the conventional values of the task features, if the value of the first scaled-down task feature exceeds the lower limit of the corresponding task feature, the lower limit value is taken as the target task feature, if the value of the second scaled-up task feature exceeds the upper limit of the corresponding task feature, the upper limit value is taken as the target task feature, otherwise the first scaled-down task feature and the second scaled-up task feature are taken as the target task features.
[0071] In order to facilitate understanding of the process of standardizing the normalized task features to obtain target task features, it is assumed that the third numerical interval is 0-0.5, the fourth numerical interval is 0.5-1.0, the third coefficient is 0.9, and the fourth coefficient is 1.1, then in the normalized task features, a first initial task feature in the interval 0-0.5 is counted, and a second initial task feature in the interval 0.5-1.0 is counted; the first initial task feature is multiplied by 0.9 to be scaled down to obtain a first scaled-down task feature; the second initial task feature is multiplied by 1.1 to be scaled up to obtain a first scaled-up task feature; and the first scaled-down task feature and the second scaled-up task feature are taken as target task features.
[0072] In an example embodiment, the scheduling decision maker implements the calculation of the reinforcement learning model based on a special logic circuit, the scheduling decision maker can include multiple processing modules, and each processing module can be responsible for different parts of the reinforcement learning model, such as state input processing, neural network calculation, action output, etc., so that the inference speed of the reinforcement learning model can be improved through parallel calculation of the logic circuit. At the same time, the scheduling decision maker can also flexibly adjust the parameters and structure of the reinforcement learning model according to the real-time requirements of task processing.
[0073] On this basis, as shown in Figure 3 , the task scheduling system provided by the present application can include: a multi-modal input module for receiving target resource state and target task characteristics; a feature fusion module for weighting and fusing the target resource state and the target task characteristics to obtain fused features, such as dynamically assigning weights and performing weighted fusion according to F=(w1*F cpu , w2*F mem , w3*F io ) T , w1, w2, and w3 represent weights, F cpu represents CPU utilization in the target resource state, F mem represents memory usage in the target resource state, and F io represents I / O bandwidth occupation in the target resource state; a concept mapping module (U→AC) for mapping the fused features to a virtual address space, adjacent input activation overlap storage units, and obtaining concept mapping results; an actual mapping module (AC→AP) for mapping the concept mapping results to an actual strategy, which can solve the high-dimensional storage explosion problem through hash compression; a weight optimization module for updating the weights of the concept mapping module and the actual mapping module, such as updating the output weight w j under gradient descent and adding a momentum term α to accelerate convergence: Δw j =n*error wj / y +α*Δw j- 1; an output module for outputting the scheduling result of the task to be processed according to the actual strategy, output y n =∑w j ; an error feedback module for comparing the output value with the actual value to generate an error, and correcting the parameters of the feature fusion module and the weights of the weight optimization module.
[0074] In a specific application scenario, considering that a cerebellar model articulation controller (CMAC) is a neural network based on local learning and is commonly used in control problems. The CMAC discretizes the input space into multiple overlapping receptive fields, each receptive field corresponding to a weight, thereby achieving the discretization of the continuous input space. The CMAC has advantages such as fast learning and local generalization, and can assist reinforcement learning to speed up reasoning. Therefore, the scheduling decision maker in this application can be constructed based on the CMAC, as shown in Figure 4 On this basis, in combination with the architecture shown in Figure 3 The CMAC can be used for function approximation in the scheduling decision maker, that is, the conceptual mapping module and the actual mapping module can be constructed based on the CMAC. In this way, the local generalization of the CMAC can be used to reduce the computational complexity of the conceptual mapping and the actual mapping in reinforcement learning, and the CMAC can be used to achieve friendly adaptability between reinforcement learning and hardware, thereby enhancing the continuous space processing capability of the hardware.
[0075] In an example embodiment, the scheduling result can include the processor core to which the to-be-scheduled task needs to be allocated and the execution order of the to-be-scheduled task. Accordingly, in the process of allocating the to-be-processed task to the processor by the task allocator 104, the to-be-scheduled task can be allocated to the corresponding processor core, and the processor core can be controlled to process the to-be-processed task according to the execution order.
[0076] In an example embodiment, considering that there can be a deviation between the task scheduling result output by the task scheduling system and the user demand, in order to reduce this deviation and improve the accuracy of task scheduling by the task scheduling system, the task scheduling system provided in this application can further include a feedback and updater 105 configured to collect execution feedback information of the processor on the to-be-processed task and update the scheduling decision maker according to the execution feedback information.
[0077] The task scheduling system provided in the application comprises a resource monitor, a task analyzer, a scheduling decision maker and a task distributor. The resource monitor is configured to monitor an original resource state of a processor, pre-process the original resource state, and obtain a target resource state. The task analyzer is configured to analyze a to-be-processed task, obtain an original task feature of the to-be-processed task, pre-process the original task feature, and obtain a target task feature. The scheduling decision maker is configured to process the target resource state and the target task feature according to a reinforcement learning model, and obtain a scheduling result of the to-be-processed task. The task distributor is configured to distribute the to-be-processed task to the processor according to the scheduling result. In the application, the resource monitor can detect the original resource state of the processor in real time, and can represent the real-time performance of the processor by means of the original resource state, so that the real-time performance can be used for subsequent task scheduling, thereby ensuring the real-time performance of the task scheduling. The resource monitor pre-processes the original resource state to obtain the target resource state, and the task analyzer pre-processes the original task feature to obtain the target task feature. The original resource state of the processor and the task feature of the to-be-scheduled task can be converted into data that can be processed by subsequent devices by means of the pre-processing, thereby avoiding the adverse effects of the data on subsequent processing, and ensuring the efficiency and accuracy of the subsequent data processing. On this basis, since the resource monitor, the task analyzer, the scheduling decision maker and the task distributor are hardware devices, and the scheduling decision maker processes the target resource state and the target task feature according to the reinforcement learning model to obtain the scheduling result, the application realizes the task scheduling of the processor according to the reinforcement learning model by means of the hardware. Since the hardware can process data in real time and efficiently, and the reinforcement learning model can accurately process data, the task scheduling system of the application can perform the task scheduling of the processor in real time, efficiently and accurately.
[0078] On the basis of the above-mentioned embodiments, the application further provides a task scheduling chip comprising the task scheduling system as described in any one of the above-mentioned embodiments, and of course, other devices required for constituting the chip. The application does not make specific limitations here.
[0079] In order to facilitate the understanding of the task scheduling chip provided in the application, it is assumed that the task scheduling chip is built on the basis of an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit). The structure for implementing the reinforcement learning in the task scheduling chip can be as follows Figure 5As shown, it includes a sensor interface, a feature extraction accelerator, a feature fusion unit, a concept mapping CMAC, an actual mapping CMAC, policy selection logic, an actuator interface, a reward signal interface, TD error calculation, a weight updating unit, etc. The functions of each device can be set according to the above embodiments, for example, the sensor interface can be used to receive target resource states and target task features, the feature extraction accelerator can be used to accelerate feature extraction, the feature fusion unit can be used to weight fuse target resource states and target task features to obtain fused features, the policy selection logic can be used for policy selection, the actuator interface can be used to output a scheduling result of a to-be-processed task according to an actual policy, and the weight updating unit can be used to correct parameters of a feature fusion module and correct weight values of a weight optimization module.
[0080] The related part of the task scheduling chip provided in the embodiments of the present application is described in detail in the corresponding part of the task scheduling system provided in the embodiments of the present application, which is not repeated here. In addition, the part of the above technical solutions provided in the embodiments of the present application that is consistent with the implementation principle of the corresponding technical solutions in the prior art is not described in detail, so as not to be too repetitive.
[0081] It should also be noted that the relational terms herein such as first and second and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any such actual relationship or order between such entities or actions. Moreover, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element preceded by "comprises a" does not, without more constraints, foreclose the existence of additional identical elements in the process, method, article, or apparatus that comprises the recited element.
[0082] The above description of disclosed embodiments enables a person skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to these embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A task scheduling system, characterized by, The method comprises the following steps: a resource monitor is used to monitor the original resource state of a processor, and the original resource state is preprocessed to obtain a target resource state; a task analyzer is used to analyze a to-be-processed task to obtain an original task feature of the to-be-processed task, and the original task feature is preprocessed to obtain a target task feature; a scheduling decision maker is used to process the target resource state and the target task feature according to a reinforcement learning model to obtain a scheduling result of the to-be-processed task; a task allocator is used to allocate the to-be-processed task to the processor according to the scheduling result.
2. The task scheduling system of claim 1, wherein, The method further comprises the following steps: a feedback and updater is used to collect execution feedback information of the processor on the to-be-processed task, and the scheduling decision maker is updated according to the execution feedback information.
3. The task scheduling system of claim 1, wherein, The scheduling decision maker comprises the following modules: a multi-modal input module is used to receive the target resource state and the target task feature; a feature fusion module is used to perform weighted fusion on the target resource state and the target task feature to obtain a fusion feature; a concept mapping module is used to map the fusion feature to a virtual address space to obtain a concept mapping result; an actual mapping module is used to map the concept mapping result to an actual strategy; a weight optimization module is used to update the weights of the concept mapping module and the actual mapping module; an output module is used to output the scheduling result of the to-be-processed task according to the actual measurement; an error feedback module is used to correct the parameters of the feature fusion module and correct the weights of the weight optimization module.
4. The task scheduling system of claim 3, wherein, The scheduling decision maker is constructed based on a cerebellar neural network.
5. The task scheduling system of claim 1, wherein, The resource monitor is connected to the processor, the memory corresponding to the processor, and the peripheral bus corresponding to the processor.
6. The task scheduling system of claim 5, wherein, The method of monitoring the original resource state of the processor, and preprocessing the original resource state to obtain a target resource state comprises the following steps: monitoring the processor to obtain the original resource state of the processor, wherein the original resource state comprises CPU utilization, memory usage information, and I / O bandwidth occupancy ratio; classifying the original resource state into normal resource state and abnormal resource state; adjusting the abnormal resource state to the upper limit or lower limit of the preset normal data range to obtain a corrected resource state; taking the normal resource state and the corrected resource state as candidate resource states; standardizing the candidate resource states to obtain a target resource state.
7. The task scheduling system of claim 6, wherein, The method of standardizing the candidate resource states to obtain a target resource state comprises the following steps: in the candidate resource states, a first initial resource state in a first numerical interval is counted, and a second initial resource state in a second numerical interval is counted; the first initial resource state is reduced according to a first coefficient to obtain a first reduced resource state; the second initial resource state is enlarged according to a second coefficient to obtain a first enlarged resource state; the first reduced resource state and the first enlarged resource state are taken as target resource states.
8. The task scheduling system of claim 1, wherein, The analyzing the to-be-processed task to obtain original task features of the to-be-processed task, pre-processing the original task features to obtain target task features comprises: The analyzing the to-be-processed task to obtain original task features of the to-be-processed task, the original task features comprising priority information, estimated execution time and resource requirement information; The original task features are normalized to obtain normalized task features; The normalized task features are standardized to obtain target task features.
9. The task scheduling system of claim 8, wherein, The standardizing the normalized task features to obtain target task features comprises: In the normalized task features, a first initial task feature in a third numerical interval is counted, and a second initial task feature in a fourth numerical interval is counted; The first initial task feature is reduced by a third coefficient to obtain a first reduced task feature; The second initial task feature is enlarged by a fourth coefficient to obtain a first enlarged task feature; The first reduced task feature and the first enlarged task feature are taken as target task features.
10. A task scheduling chip, characterized in that, The task scheduling system comprises any one of claims 1 to 9.