Switching element series voltage-sharing circuit, method and device and industrial power supply

Abstract

The invention relates to a switch element series connection voltage-sharing circuit, a switch element series connection voltage-sharing method and device, computer equipment, a storage medium and a computer program product. The circuit comprises at least two switch elements connected in series, and buffer circuits corresponding to the switch elements are connected with the switch elements in parallel and used for absorbing transient voltage spikes generated when the switch elements act. The voltage sampling unit is used for carrying out voltage sampling on the buffer circuit to obtain buffer voltage in the current switching period; the control circuit is used for acquiring each buffer voltage; determining a to-be-adjusted switching element and switching action time of the to-be-adjusted switching element according to each buffer voltage; and adjusting the switching time of the to-be-adjusted switching element in the next switching period according to the switching action time. The circuit can reduce the failure risk of a switch element, and improves the operation reliability of a high-voltage power system.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power electronics, in particular to a switching element series voltage equalization circuit, a switching element series voltage equalization method, a device, an industrial power supply, a computer device and a computer program product. BACKGROUND

[0002] With the formulation of the national energy strategy, photovoltaic and energy storage technologies are accelerating the evolution to high voltage levels, significantly improving the economy and efficiency of photovoltaic and energy storage systems. However, the widespread use of high-voltage power systems puts higher requirements on the voltage resistance of commonly used power semiconductor devices, such as metal oxide semiconductor field effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs), and other power semiconductor devices. For high-voltage application scenarios, power semiconductor devices are usually connected in series to form a power unit with higher voltage resistance to meet the use requirements of high-voltage power systems.

[0003] Due to differences in parameter inconsistency, driving signal delay, and driving signal edge slope, among other reasons, power semiconductor devices are prone to voltage imbalance when used in series, which can cause local voltage overvoltage breakdown of the switching element. Therefore, how to control the voltage of the series-connected switching element in a high-voltage power system, reduce the risk of switching element failure, and improve the operational reliability of the high-voltage power system is a problem that needs to be solved. SUMMARY

[0004] Therefore, it is necessary to provide a switching element series voltage equalization circuit, a switching element series voltage equalization method, a device, an industrial power supply, a computer device, and a computer program product that can reduce the risk of switching element failure and improve the operational reliability of a high-voltage power system.

[0005] In a first aspect, the present application provides a switching element series voltage equalization circuit, which includes at least two series-connected switching elements, a buffer circuit corresponding to each switching element, a voltage sampling unit corresponding to each switching element, and a control circuit connected to each voltage sampling unit and each switching element.

[0006] For each switching element, the buffer circuit corresponding to the switching element is connected in parallel with the switching element to absorb transient voltage spikes generated by the switching element when it is in action.

[0007] The voltage sampling unit corresponding to the switching element is used to sample the voltage of the buffer circuit in the current switching period to obtain the buffer voltage in the current switching period.

[0008] The control circuit is configured to acquire the buffer voltage of each of the switching elements, determine a switching element to be adjusted and a switching action time of the switching element to be adjusted from each of the switching elements according to the buffer voltage of each of the switching elements, and adjust the switching time of the switching element to be adjusted in the next switching cycle according to the switching action time.

[0009] In some embodiments, the buffer circuit comprises a diode, a filter capacitor and a capacitor discharge resistor.

[0010] The anode of the diode is connected to the first end of the switching element, and the cathode of the diode is connected to the second end of the switching element through the filter capacitor; and the capacitor discharge resistor is connected in parallel with the filter capacitor.

[0011] The filter capacitor absorbs the transient voltage spike generated by the switching element through the diode and discharges through the capacitor discharge resistor.

[0012] In some embodiments, the switching element is an N-channel metal oxide semiconductor field effect transistor, the anode of the diode is connected to the drain of the switching element, and the cathode of the diode is connected to the source of the switching element through the filter capacitor.

[0013] In some embodiments, the voltage sampling unit comprises a voltage dividing circuit and an operational amplifier circuit.

[0014] The voltage dividing circuit is connected in parallel with the filter capacitor, and is configured to reduce the voltage amplitude of the voltage signal collected from both ends of the filter capacitor.

[0015] The operational amplifier circuit is connected to the voltage dividing circuit and is configured to perform signal conditioning on the input voltage signal to obtain the buffer voltage in the current switching cycle.

[0016] In some embodiments, the control circuit comprises an analog-to-digital conversion unit and a control unit; the analog-to-digital conversion unit is connected to each of the voltage sampling units, and the control unit is connected to the analog-to-digital conversion unit and each of the switching elements.

[0017] The analog-to-digital conversion unit is configured to convert the buffer voltage collected by each of the voltage sampling units into a digital signal.

[0018] The control unit is configured to determine the change relationship of the buffer voltage of each of the switching elements with time in the current switching cycle according to each of the digital signals, determine a switching element to be adjusted and a switching action time of the switching element to be adjusted from each of the switching elements according to the difference between each of the change relationships, and adjust the switching time of the switching element to be adjusted in the next switching cycle according to the switching action time.

[0019] In a second aspect, the application further provides a method for voltage balancing of series-connected switching elements, applied to the voltage balancing circuit for series-connected switching elements as described above, and the method comprises:

[0020] obtaining a buffer voltage of each of the switching elements, each of the buffer voltages being obtained by voltage sampling of a buffer circuit corresponding to each of the switching elements in a current switching period;

[0021] determining a reference switching element and a switching element to be adjusted from the switching elements;

[0022] determining a switching action time of the switching element to be adjusted according to a difference between the buffer voltages of the reference switching element and the switching element to be adjusted;

[0023] adjusting a switching time of the switching element to be adjusted in a next switching period according to the switching action time.

[0024] In a third aspect, the application further provides a device for voltage balancing of series-connected switching elements, and the device comprises:

[0025] a buffer voltage obtaining module, configured to obtain a buffer voltage of each of the switching elements, each of the buffer voltages being obtained by voltage sampling of a buffer circuit corresponding to each of the switching elements in a current switching period;

[0026] a switching element classifying module, configured to determine a reference switching element and a switching element to be adjusted from the switching elements;

[0027] an adjustment information determining module, configured to determine a switching action time of the switching element to be adjusted according to a difference between the buffer voltages of the reference switching element and the switching element to be adjusted;

[0028] a voltage balancing adjusting module, configured to adjust a switching time of the switching element to be adjusted in a next switching period according to the switching action time.

[0029] In a fourth aspect, the application further provides an industrial power supply comprising the voltage balancing circuit for series-connected switching elements as described above.

[0030] In a fifth aspect, the application further provides a computer device comprising a memory and a processor, the memory storing a computer program, and the processor implements the steps of the method as described above when executing the computer program.

[0031] In a sixth aspect, the application further provides a computer program product comprising a computer program, which, when executed by a processor, implements the steps of the method as described above.

[0032] The switch element series voltage equalization circuit, the switch element series voltage equalization method, the device, the industrial power supply, the computer equipment and the computer program product, the switch element series voltage equalization circuit includes at least two series switch elements, and each switch element is provided with a corresponding buffer circuit, which can absorb the transient voltage peak generated when the switch element is in action, and reduce the risk of switch element failure, and each switch element is also provided with a corresponding voltage sampling unit, which is used for voltage sampling of the buffer circuit in the current switch cycle, obtaining the buffer voltage in the current switch cycle, and sending the buffer voltage to the control circuit. After obtaining the buffer voltage of each switch element, the control circuit can determine the switch element to be adjusted and the switch action time of the switch element to be adjusted according to the difference between the buffer voltages, and adjust the switch time of the switch element to be adjusted in the next switch cycle according to the switch action time, so that the switch element series dynamic equalization effect can be achieved in a short period, the switch element series uniform regulation efficiency is improved, and the operation reliability of the high-voltage power system is effectively improved. BRIEF DESCRIPTION OF DRAWINGS

[0033] Figure 1 The structure schematic diagram of the switch element series voltage equalization circuit in some embodiments is shown in the figure.

[0034] Figure 2 The structure schematic diagram of the buffer circuit in some embodiments is shown in the figure.

[0035] Figure 3 The structure schematic diagram of the voltage sampling unit in some embodiments is shown in the figure.

[0036] Figure 4 The structure schematic diagram of the switch element series voltage equalization circuit in some embodiments is shown in the figure.

[0037] Figure 5 The flowchart of the switch element series voltage equalization method in some embodiments is shown in the figure.

[0038] Figure 6 The flowchart of the switch element series voltage equalization method in some embodiments is shown in the figure.

[0039] Figure 7 The switch tube driving logic diagram in some embodiments is shown in the figure.

[0040] Figure 8 The switch tube opening current flow direction diagram in some embodiments is shown in the figure.

[0041] Figure 9 The conditioning circuit schematic diagram of the voltage sampling unit in some embodiments is shown in the figure.

[0042] Figure 10This is a schematic diagram showing the direction of the turn-off current when the switch is turned off in some embodiments;

[0043] Figure 11 This is a structural block diagram of a series voltage equalization device for switching elements in some embodiments;

[0044] Figure 12 This is a diagram showing the internal structure of a computer device in some embodiments. Detailed Implementation

[0045] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0046] In some embodiments, such as Figure 1 As shown, this application provides a series voltage equalization circuit for switching elements. The circuit includes at least two series-connected switching elements 101, a buffer circuit 102 and a voltage sampling unit 103 corresponding to each switching element 101, and a control circuit 104 connected to each voltage sampling unit 103 and each switching element 101.

[0047] For each switching element 101, a buffer circuit 102 corresponding to the switching element 101 is connected in parallel with the switching element 101 to absorb the transient voltage spikes generated when the switching element 101 is in operation.

[0048] The voltage sampling unit 103 corresponding to the switching element 101 is used to sample the voltage of the buffer circuit 102 in the current switching cycle to obtain the buffer voltage in the current switching cycle.

[0049] The switching element 101 is a device used to control the on / off state of the circuit. It manages the current path through rapid switching, thereby achieving voltage, current, or power conversion under efficient and controllable conditions. In high-voltage applications, the switching element 101 typically employs a fully controllable power semiconductor device, such as a metal-oxide-semiconductor field-effect transistor (MOSFET), an insulated-gate bipolar transistor (IGBT), or a thyristor.

[0050] The buffer circuit 102 is a key protection circuit used to protect the switching element 101. The buffer circuit 102 can be connected in parallel with the switching element 101 that needs to be protected, so as to absorb the transient voltage spikes generated when the switching element 101 is operating. Its working principle is to absorb or transfer the transient energy generated when the switching element 101 is operating, so as to prevent the switching element 101 from being subjected to electrical stress exceeding its rated value and reduce the risk of loss of the switching element 101.

[0051] The transient voltage spike is a transient high-voltage pulse far exceeding the normal working voltage generated in a very short time, for example, nanoseconds to microseconds, when the switching element 101 is rapidly switched on or off, which is one of the core causes of damage and failure of the switching element 101. It can be understood that the buffer circuit 102 can be any circuit structure capable of absorbing transient voltage spikes, for example, the buffer circuit 102 can be an RC buffer circuit, that is, a resistor and a capacitor are connected in series and then connected in parallel across the switching element 101. In the off stage, the capacitor can absorb the energy released by the parasitic inductance and relieve the voltage rise rate. In the on stage, the resistor can limit the capacitor discharge current to avoid excessive current impact on the switching tube.

[0052] The voltage sampling unit 103 is a voltage monitoring unit for sampling the voltage of the buffer circuit 102 to obtain the buffer voltage of the switching element 101 in the current switching period. The voltage sampling unit 103 can collect the voltage signal of the buffer circuit 102 corresponding to the switching element 101 in real time through a voltage dividing network in the current switching period, and obtain the buffer voltage by isolating and conditioning the voltage signal. It can be understood that each switching element 101 will only be sampled one buffer voltage in a switching period.

[0053] In some embodiments, the voltage sampling unit 103 can sample the voltage of the switching element 101 at the middle time of the switching period to obtain one buffer voltage of the switching element 101. For example, if the period of the switching period is 10 μs, the voltage sampling unit 103 can sample the voltage of the switching element 101 at 5 μs to obtain the buffer voltage of the switching element 101.

[0054] When the buffer circuit 102 absorbs the transient voltage spike of the corresponding switching element 101, charging and discharging will occur inside the buffer circuit 102. For example, the capacitor inside the RC buffer circuit will charge and discharge when absorbing the transient voltage spike, and the voltage across the capacitor will differ. The buffer voltage obtained by the voltage sampling unit 103 sampling the buffer circuit 102 can reflect the transient voltage spike absorption of the buffer circuit, and further represent the switching action time of the switching element 101.

[0055] The switching period is a complete time cycle of the switching element 101 from on to off to on again, and the specific period of the switching period is determined by the switching frequency of the switching element 101. A complete switching period can include an on stage and an off stage. The switching element 101 relies on periodic on-off to realize energy transfer.

[0056] The control circuit 104 is an intelligent core in the series voltage-sharing circuit of switching elements, and has logical processing functions such as coordination control, real-time calculation and decision-making. It can be understood that the control circuit 104 can include any control unit with logical processing capability, such as CPU, DSP, FPGA, ARM, CPLD, etc.

[0057] In the application scenario of high voltage level, if the switching elements 101 in series with each other are not synchronized when they act, the voltage across each switching element will be different, that is, not voltage-sharing. Taking the series voltage-sharing circuit of switching elements including two switching elements Q1 and Q2 in series as an example, Q1 corresponds to its own buffer circuit 1 and voltage sampling unit 1, and Q2 corresponds to its own buffer circuit 2 and voltage sampling unit 2. Assuming that Q1 and Q2 in the power topology are caused by the difference in device parameters in the circuit, Q2 is turned on after Q1 is turned on, and the turn-on current will charge the buffer circuit 2 of Q2, at this time, the voltage across Q2 will be greater than the voltage across Q1, that is, the voltage-sharing condition occurs.

[0058] Since the occurrence of the voltage-sharing condition will cause the voltage difference between Q2 and Q1, the control circuit 104 can accurately determine whether the voltage-sharing condition occurs in the series switching elements 101 according to the difference in the buffer voltage of each switching element 101 in the current switching period. Similarly, taking the series voltage-sharing circuit of switching elements including two switching elements Q1 and Q2 in series as an example, in the current switching period, the voltage sampling unit 1 will sample the switching voltage of the buffer circuit 1 to obtain the buffer voltage of Q1 in the current switching period. The voltage sampling unit 2 will sample the switching voltage of the buffer circuit 2 to obtain the buffer voltage of Q2 in the current switching period, and if there is a difference between the two buffer voltages, it means that Q1 and Q2 have a voltage-sharing condition.

[0059] Therefore, by the difference between the buffer voltages of the switching elements 101, it can be determined whether there is a difference in each switching time of the switching elements 101 in the current switching period, and then the switching element to be adjusted and the switching action time of the switching element to be adjusted can be determined from the switching elements.

[0060] Specifically, the control circuit 104 can obtain the buffer voltage of each switch element 101 through each voltage sampling unit 103, determine the switch element to be adjusted and the switch action time of the switch element to be adjusted from each switch element 101 according to the buffer voltage, and adjust the switch time of the switch element to be adjusted in the next switching period according to the switch action time. The switch action time is a time parameter in the next switching period that needs to be adjusted for the switch time of the switch element to be adjusted. By adjusting the switch time of the switch element to be adjusted according to the switch action time, the switch element to be adjusted can be synchronized with other switch elements 101 in the next switching period, and dynamic balance of the voltages across the switch elements 101 can be achieved.

[0061] In the above embodiments, the switch element series voltage balancing circuit includes at least two series switch elements, and each switch element is provided with a corresponding buffer circuit, which can absorb the transient voltage spike generated by the switch element when it is in action, and reduce the risk of failure of the switch element. Each switch element is also provided with a corresponding voltage sampling unit for collecting the voltage of the buffer circuit in the current switching period to obtain the buffer voltage in the current switching period, and sending the buffer voltage to the control circuit. After obtaining the buffer voltage of each switch element, the control circuit can determine the switch element to be adjusted and the switch action time of the switch element to be adjusted from each switch element according to the difference between the buffer voltages, and adjust the switch time of the switch element to be adjusted in the next switching period according to the switch action time. By performing closed-loop voltage balancing control cycle by cycle and dynamically adjusting the switch action time, the effect of dynamic balancing of the series switch elements can be achieved in a short period, the uniform adjustment efficiency of the series switch elements is improved, and the operation reliability of the high-voltage power system is effectively improved.

[0062] In the switch element series voltage balancing circuit, the buffer circuit is the core protection circuit for protecting the stable operation of the switch element and reducing the risk of switch element loss. In some embodiments, as shown in FIG. 2, the buffer circuit 102 includes a diode 201, a filter capacitor 202, and a capacitor discharge resistor 203. Figure 2

[0063] The positive electrode of the diode 201 is connected to the first end of the switch element 101, the negative electrode of the diode 201 is connected to the second end of the switch element 101 through the filter capacitor, and the capacitor discharge resistor 203 is connected in parallel with the filter capacitor 202. The filter capacitor 202 absorbs the transient voltage spike generated by the switch element 101 through the diode 201, and discharges through the capacitor discharge resistor 203.

[0064] ​The diode 201 is a core element in the buffer circuit 102 for providing a low impedance path at the moment of the switch element 101 being off, transferring parasitic energy and suppressing voltage spikes. The positive pole of the diode 201 is connected to the first end of the switch element 101, and the negative pole of the diode 201 is connected to the second end of the switch element 101 through the filter capacitor 202. It can be understood that the current flow direction of the switch element 101 is from the first end to the second end. Therefore, when the switch element 101 is off, the parasitic inductance in the circuit will generate a high voltage spike due to current mutation. When the spike voltage exceeds the bus voltage, the diode 201 is forward-biased to transfer the energy to the filter capacitor 202, thereby avoiding overvoltage of the switch element 101. During the conduction period of the switch element 101, the diode 201 is in reverse-biased state, thereby preventing the filter capacitor 202 from discharging through the switch element 101, ensuring that the buffer energy can only be released through the capacitor discharge resistor 203, and avoiding energy feedback to the bus or interference with the switching action.

[0065] The filter capacitor 202 is a core energy storage element in the buffer circuit 102 for absorbing the energy released by the parasitic inductance when the switch element 101 is off, and suppressing voltage spikes. At the moment of the switch element 101 being off, the energy stored by the parasitic inductance is absorbed by the filter capacitor 202, thereby avoiding the energy being applied to the switch element 101 in the form of a high voltage spike, and improving the operation safety of the switch element 101. During the conduction period of the switch element 101, the filter capacitor 202 can be discharged through the capacitor discharge resistor 203, thereby avoiding the residual voltage affecting the next switching period.

[0066] The capacitor discharge resistor 203 is an energy dissipation element in the buffer circuit 102 for orderly releasing the energy stored in the filter capacitor 202 during the conduction period of the switch element 101, thereby avoiding overvoltage risk caused by voltage accumulation. During the conduction period of the switch element 101, the capacitor discharge resistor 203 can convert the energy stored in the filter capacitor 202 into heat energy, thereby ensuring that the capacitor voltage is reset to the initial state before the next switching period. During the off period of the switch element 101, the diode 201 is on, and the filter capacitor 202 is charged, at which time the capacitor discharge resistor 203 does not work due to reverse-biased state.

[0067] Specifically, when the switch element 101 is off, the filter capacitor 202 in the buffer circuit 102 absorbs the transient voltage spike generated by the switch element 101 through the diode 201, thereby avoiding overvoltage of the switch element 101. During the conduction period of the switch element 101, the filter capacitor 202 can be discharged through the capacitor discharge resistor 203, thereby ensuring that the buffer energy can only be released through the capacitor discharge resistor 203, and avoiding energy feedback to the bus or interference with the switching action.

[0068] In the above embodiments, the switching element is buffered and protected by using a buffer circuit composed of a diode, a filter capacitor and a capacitor discharge resistor. Based on the synergistic effect among the diode, the filter capacitor and the capacitor discharge resistor, the voltage stress of the switching element during switching can be effectively suppressed, and the operation safety of the switching element is improved.

[0069] In some embodiments, the switching element can be an N-channel metal oxide semiconductor field effect transistor, the anode of the diode is connected to the drain of the switching element, and the cathode of the diode is connected to the source of the switching element through the filter capacitor.

[0070] The N-channel metal oxide semiconductor field effect transistor (NMOS) is a semiconductor device based on electric field effect to control current, which is widely used in power electronic systems as a high-efficiency switching element. The NMOS includes three terminals, i.e., source, drain and gate, and the current flows from the drain to the source.

[0071] Specifically, since the current of the NMOS flows from the drain to the source, the anode of the diode is connected to the drain of the NMOS, and the cathode of the diode is connected to the source of the NMOS through the filter capacitor, so that when the NMOS is turned off, the diode is turned on in the forward direction, and the electrical energy is transferred to the filter capacitor. During the conduction of the NMOS, the diode is in the reverse blocking state, preventing the filter capacitor from discharging through the NMOS.

[0072] In some embodiments, as shown in FIG. 3, Figure 3 The voltage sampling unit includes a voltage dividing circuit 301 and an operational amplifier circuit 302. The voltage dividing circuit 301 is connected in parallel with the filter capacitor 202, and is used to reduce the voltage amplitude of the voltage signal collected from both ends of the filter capacitor 202. The operational amplifier circuit 302 is connected with the voltage dividing circuit 301, and is used to process the input voltage signal to obtain the buffer voltage in the current switching period.

[0073] The voltage dividing circuit 301 is also called a high-resistance resistor voltage dividing circuit, which is used to reduce the voltage amplitude of the collected high voltage signal to a suitable range for the subsequent operational amplifier circuit 302. The voltage dividing circuit 301 is usually composed of a plurality of series resistors, and the two ends of the series resistors are connected with the two ends of the filter capacitor 202 to realize the parallel connection of the voltage dividing circuit 301 and the filter capacitor 202. The voltage amplitude of the voltage signal collected from both ends of the filter capacitor 202 will be reduced by the voltage dividing circuit 301. It can be understood that the voltage dividing ratio of the voltage dividing circuit 301 can be determined according to the resistance values of the resistors in the voltage dividing circuit 301.

[0074] Operational amplifier circuit 302 is a circuit composed of operational amplifiers used to condition (i.e., amplify) the acquired weak voltage signal to obtain the buffer voltage for the current switching cycle. Its principle mainly utilizes the "virtual short, virtual open" characteristics to proportionally amplify the input voltage to a safe range. The operational amplifier in operational amplifier circuit 302 can be a differential amplifier or an inverting amplifier to suppress common-mode noise and improve signal anti-interference capability.

[0075] Specifically, the voltage divider circuit 301 in the voltage sampling unit is connected in parallel with the filter capacitor 202. This allows for the step-down processing of the voltage signal generated by the filter capacitor 202 during the current switching cycle. The stepped-down voltage signal is then input to the operational amplifier circuit 302 connected to the voltage divider circuit 301. The operational amplifier circuit 302 amplifies and conditions the stepped-down voltage signal to obtain the buffer voltage for the current switching cycle.

[0076] In the above embodiments, by connecting the voltage divider circuit of the voltage sampling unit in parallel with the filter capacitor and collecting the voltage across the filter capacitor, the accuracy of voltage acquisition can be improved, while the filtering effect of the filter capacitor can ensure the safe operation of the voltage sampling unit.

[0077] In some embodiments, the control circuit includes an analog-to-digital converter (ADC) unit and a control unit, wherein the ADC unit is connected to each voltage sampling unit and the control unit is connected to the ADC unit and each switching element.

[0078] The analog-to-digital converter unit is used to convert the buffered voltages collected by each voltage sampling unit into digital signals.

[0079] An analog-to-digital converter (ADC) is an electronic device or circuit that converts continuously changing analog signals into discrete digital signals. The voltage signal acquired by the voltage sampling unit is a continuously changing analog signal. By converting this continuously changing analog signal into a discrete digital signal, the ADC enables information from the analog world to be processed and stored by a digital system. In other words, it enables the control unit to process and store the voltage information acquired by the voltage sampling unit.

[0080] Specifically, after acquiring the buffer voltage, each voltage sampling unit can input the buffer voltage to the connected analog-to-digital conversion unit. The analog-to-digital conversion unit can quantize and encode the received buffer voltage, convert it into a digital signal, and send the digital signal to the control unit.

[0081] The control unit receives the digital signals transmitted by the analog-to-digital conversion unit, determines the buffer voltages of the switch elements in the current switching period according to the digital signals, determines the switch element to be adjusted and the switching action time of the switch element to be adjusted according to the difference between the buffer voltages, and adjusts the switching time of the switch element to be adjusted in the next switching period according to the switching action time.

[0082] In the above embodiment, the information collected by the voltage sampling unit is digitally converted by the analog-to-digital conversion unit, so that the control unit can accurately use the voltage information collected by the voltage sampling unit, and the accuracy and processing efficiency of determining the switch element to be adjusted and the switching action time are improved.

[0083] In some embodiments, as shown in Figure 4 A switch element series voltage sharing circuit 400 is provided, which includes a plurality of series-connected switch tubes 401, a buffer circuit 102 and a voltage sampling unit 103 corresponding to each switch tube 401, an analog-to-digital conversion unit 402 connected to each voltage sampling unit 103, and a control unit 403 connected to the analog-to-digital conversion unit 402 and each switch tube 401.

[0084] The switch tube 401 can be an N-channel metal oxide semiconductor field effect transistor, the buffer circuit 102 includes a diode 201, a filter capacitor 202 and a capacitor discharge resistor 203, the anode of the diode 201 is connected to the drain of the switch tube 401, and the cathode of the diode 201 is connected to the source of the switch tube 401 through the filter capacitor 202. The control unit 403 can be a CPU, and the analog-to-digital conversion unit 402 can be an ADC.

[0085] In actual use, each switch tube 401 starts to periodically turn on and off. For each switch tube 401, when the switch tube 401 is off, the diode 201 in the buffer circuit 102 is forward-biased to divert the transient voltage spike to the filter capacitor 202, thereby avoiding the application of energy in the form of high voltage spikes to the switch tube 401 and improving the operating safety of the switch tube 401. When the switch tube 401 is turned on, the diode 201 will be in a reverse-biased state to prevent the filter capacitor 202 from discharging through the switch tube 401. At this time, the filter capacitor 202 will orderly release the stored energy through the capacitor discharge resistor 203, thereby avoiding the risk of overvoltage caused by voltage accumulation.

[0086] It can be understood that when selecting the type of filter capacitor 202, the designer needs to evaluate the capacitance value of the filter capacitor 202, the impact current at the power-on moment needs to be considered for the derating of the repeatable surge current value of the filter capacitor 202, and the power derating of the capacitor discharge resistor 203 of the filter capacitor 202 needs to be considered for the thermal factor.

[0087] In each switching cycle, the charging and discharging operations of the filter capacitor 202 will cause the voltage across the capacitor to produce switching sub-fluctuations, and the voltage across each filter capacitor 202 will be different when the voltage across each switching tube 401 is uneven. At this time, the voltage sampling unit 103 will sample the filter capacitor 202 for switching sub-fluctuations to obtain a buffer voltage, and send the buffer voltage to the analog-to-digital conversion unit 402 for processing.

[0088] It can be understood that, due to the voltage across the sampling capacitor, the voltage does not change abruptly, and the bandwidth of the voltage sampling unit and the slew rate of the operational amplifier are reduced.

[0089] The analog-to-digital conversion unit 402 can convert the received buffer voltage from an analog signal to a digital signal, and transmit the digital signal to the control unit 403.

[0090] After receiving each digital signal, the control unit 403 can determine the buffer voltage of each switching tube 401 in the current switching cycle according to each digital signal, determine the to-be-adjusted switching element and the switching action time of the to-be-adjusted switching element from each switching tube 401 according to the difference between each buffer voltage, and adjust the switching time of the to-be-adjusted switching element in the next switching cycle according to the switching action time.

[0091] In the above embodiment, the RCD hardware voltage balancing scheme is combined with the software algorithm dynamic adjustment to achieve the absorption of switching sub-voltage peaks in hardware while performing dynamic compensation of the drive off time in each cycle. In a few cycles, the dynamic balancing of the series switching tubes is achieved, thereby realizing the effect of dynamic balancing of the cascaded power switching in a high-voltage scenario. The entire voltage balancing control process has less debugging work, relatively low risk, obvious implementation effect, and can be used for voltage balancing control of mass production products.

[0092] Based on the same inventive concept, the embodiments of the present application also provide a switching element series voltage balancing method applied to the above-mentioned switching element series voltage balancing circuit.

[0093] In some embodiments, as shown in Figure 5 , a switching element series voltage balancing method is provided, which is applied to the control circuit 104 in Figure 1 for example, including the following steps:

[0094] S502, obtaining the buffer voltage of each switching element.

[0095] Each buffer voltage is obtained by the voltage sampling unit corresponding to each switching element sampling the voltage of the buffer circuit corresponding to each switching element in the current switching cycle.

[0096] The buffer circuit is a key protection circuit for device protection of the switching element. The buffer circuit can be connected in parallel with the switching element that needs protection to absorb the transient voltage spike generated by the switching element when it is in action. The working principle is to absorb or transfer the transient energy generated by the switching element when it is in action to avoid the switching element from bearing electrical stress exceeding its rated value and reduce the risk of switching element loss.

[0097] When the buffer circuit absorbs the transient voltage spike of the corresponding switching element, charging and discharging will occur inside the buffer circuit. For example, the filter capacitor inside the RCD buffer circuit will be charged and discharged when absorbing the transient voltage spike, and the voltage difference will occur between the two ends of the filter capacitor. The voltage sampling unit performs switch sampling on the filter capacitor to obtain the buffer voltage, which can reflect the transient voltage spike absorption of the filter capacitor, and the buffer voltage of the switching element in the current switching period can represent the switching time of the switching element in the current switching period. If there is a difference in the transient voltage spike absorption of the filter capacitors of the switching elements, for example, the buffer voltage value generated after the transient voltage spike absorption of the filter capacitor corresponding to a certain switching element is larger than that of other switching elements, which means that the switching time of the switching element is different from that of other switching elements, and the switching element may have a late switching situation.

[0098] Specifically, for each switching element, the voltage sampling unit of the switching element will sample the buffer circuit of the switching element to obtain the buffer voltage of the switching element in the current switching period, and send the buffer voltage to the control circuit. The control circuit can obtain the buffer voltage of each switching element.

[0099] S504, determining a reference switching element and a switching element to be adjusted from the switching elements.

[0100] The reference switching element is a switching element selected as a reference standard for switching time adjustment, and its switching state is regarded as the expected switching state of the switching elements. The switching element to be adjusted is a switching element that needs to calibrate its switching time according to the switching time of the reference switching element.

[0101] Specifically, the control circuit can determine the reference switching element and the switching element to be adjusted from the switching elements.

[0102] In some embodiments, the reference switching element can be pre-specified by the designer according to the actual element design situation, and the corresponding reference element identifier can be configured. The control circuit can determine the reference element identifier from the element identifiers of the switching elements, and determine the switching element corresponding to the reference element identifier as the reference switching element, and the other switching elements are the switching elements to be adjusted.

[0103] In some embodiments, the control circuit can randomly select one of the switching elements as the reference switching element, and the other switching elements as the switching elements to be adjusted.

[0104] S506, determining the switching action time of the switching element to be adjusted according to the difference between the buffer voltage of the reference switching element and the buffer voltage of the switching element to be adjusted.

[0105] In the switching period, the filter capacitor in the buffer circuit charges and discharges, and the voltage across the filter capacitor fluctuates. When the switching elements are unevenly stressed, the voltage across the filter capacitor of each switching element will be different. Therefore, for each switching element to be adjusted, the switching action time of the switching element to be adjusted can be determined according to the difference between the buffer voltage of the switching element to be adjusted and the buffer voltage of the reference switching element. It can be understood that the greater the difference between the buffer voltages, the longer the switching action time needs to be extended.

[0106] For example, when the switching element is in the on state, the voltage across the filter capacitor in the buffer circuit, i.e. the buffer voltage, is a stable value. When the switching element is in the off state, the voltage across the filter capacitor fluctuates, and the buffer voltage at this time will have a peak value. At this time, if the switching elements are unevenly stressed due to the difference in switching time, the buffer voltage corresponding to the filter capacitor generated by the switching element that is turned off first will be higher than the buffer voltage corresponding to the filter capacitor generated by the switching element that is turned off later. Conversely, if the switching element that is turned on later has a higher buffer voltage than the switching element that is turned off first.

[0107] Specifically, after determining the reference switching element and the switching element to be adjusted, for each switching element to be adjusted, the control circuit can compare the buffer voltage of the switching element to be adjusted with the reference buffer voltage of the reference switching element, determine the difference between the buffer voltage of the switching element to be adjusted and the reference buffer voltage, and determine the switching action time of the switching element to be adjusted based on the difference.

[0108] In some embodiments, the control circuit can look up the mapping relationship between the difference and the switching action time according to the difference, and take the switching action time that matches the difference as the switching action time of the switching element to be adjusted.

[0109] In some embodiments, the control circuit can also calculate the switching action time of the switching element to be adjusted according to the voltage difference and a preset time function.

[0110] S508, adjusting the switching time of the switching element to be adjusted in the next switching period according to the switching action time.

[0111] Specifically, the control circuit can adjust the switching time of the to-be-adjusted switching element in the next switching period according to the switching action time, so as to eliminate the uneven voltage between the series switching elements.

[0112] In some embodiments, the control circuit can drive the switching elements to turn off and turn on by generating a pulse width modulation (PWM) command. After determining the switching action time of the to-be-adjusted switching element, the control circuit can compensate the original PWM pulse width command of the to-be-adjusted switching element according to the switching action time, drive the to-be-adjusted switching element to act based on the compensated PWM, so as to adjust the switching time of the to-be-adjusted switching element and eliminate the uneven voltage between the series switching elements.

[0113] In the above embodiments, after obtaining the buffer voltages of the switching elements, for each to-be-adjusted switching element, the switching action time of the to-be-adjusted switching element can be determined according to the difference between the buffer voltages of the to-be-adjusted switching element and the reference switching element. The switching time of the to-be-adjusted switching element is adjusted in the next switching period according to the switching action time. Through the closed-loop voltage balancing control in each period, the switching time of the to-be-adjusted switching element is dynamically adjusted, which can achieve the effect of dynamic balancing of the series switching elements in a short period, improve the uniform adjustment efficiency of the series switching elements, and effectively improve the operation reliability of the high-voltage power system.

[0114] In some embodiments, as shown in Figure 6 , a series switching tube voltage balancing method is provided. The method is applied to the series switching tube voltage balancing circuit as shown in Figure 4 , and includes the following steps:

[0115] First, the control unit can generate corresponding PWM pulse width commands for each switching tube, and control the switching tubes to periodically turn on and turn off based on the PWM pulse width commands. For each switching tube, when the switching tube turns off, the diode in the buffer circuit turns on in the forward direction, and the transient voltage peak is transferred to the filter capacitor, so as to avoid the energy in the form of high voltage peak being applied to the switching tube, thereby improving the operation safety of the switching tube. When the switching tube turns on, the diode will be in a reverse blocking state, so as to prevent the filter capacitor from discharging through the switching tube. At this time, the filter capacitor will orderly release the stored energy through the capacitor discharge resistance, thereby avoiding the overvoltage risk caused by voltage accumulation.

[0116] In each switching cycle, the charging and discharging operation of the filter capacitor causes a switching sub-fluctuation of the voltage across the capacitor, and when uneven voltage appears in the series-connected switching tubes, the voltage across the filter capacitor of each stage will be different, at which time the voltage sampling unit will sample the filter capacitor to obtain a buffer voltage and send the buffer voltage to the analog-to-digital conversion unit for processing.

[0117] The analog-to-digital conversion unit converts the received buffer voltage from an analog signal to a digital signal and transmits the digital signal to the control unit.

[0118] After receiving each digital signal, the control unit generates a buffer voltage corresponding to the switching tube according to each digital signal. Then, the reference switching tube and the to-be-adjusted switching tube are determined from the switching tubes.

[0119] For each to-be-adjusted switching tube, the control unit can determine the difference degree of the buffer voltage between the to-be-adjusted switching tube and the reference switching tube, and determine the switching action time of the to-be-adjusted switching tube according to the difference degree.

[0120] The control unit compensates the original PWM pulse width command of the to-be-adjusted switching tube according to the switching action time, and drives the to-be-adjusted switching tube to act based on the compensated PWM, so as to adjust the switching time of the to-be-adjusted switching tube and eliminate the uneven voltage problem between the series-connected switching tubes. In the next switching cycle, the step of sampling the filter capacitor by the voltage sampling unit will continue to be executed, so as to realize the effect of dynamic balancing of the cascaded power switching in a high-voltage scenario.

[0121] For example, in the switching element series voltage balancing circuit, Figure 4 if the switching tubes Q1 and Q2 in the power topology have different circuit device parameters, Q2 is behind Q1, and the drive logic is as shown in Figure 7 At this time, the drive opening time of Q2 is obviously delayed compared with the drive opening time of Q1. When Q1 is opened first, as shown in Figure 8 the opening current Ion will charge the filter capacitor C2 of Q2, so that the voltage across Q2 will be greater than the voltage across Q1, that is, uneven voltage. The voltage sampling unit can collect the capacitor voltage of each switching tube as a buffer voltage, and after conditioning, the buffer voltage is sent to the analog-to-digital conversion unit. The conditioning circuit is as shown in Figure 9 The analog-to-digital conversion unit converts the buffer voltage into a digital signal and transmits it to the control unit CPU. The control unit CPU determines the buffer voltage corresponding to each switching tube according to each digital signal. Among them, Q2 is a to-be-adjusted switching tube, and the control unit CPU can determine the switching action time of Q2 according to the difference degree of the buffer voltage between Q2 and Q1. The switching action time of Q2 is Figure 7The hardware delay time is shown in the figure. The control unit CPU compensates the original PWM pulse width instruction of Q2 based on the switch action time, sends the compensated PWM pulse width instruction to Q2, compensates the turn-off time of Q2, delays the turn-off time of Q2, and turns off Q2 after the delay, so that Figure 10 As shown in the figure, the turn-off current Ioff will charge the filter capacitor C2 of Q1, and realize dynamic balance of the capacitor voltages of C1 and C2.

[0122] It should be understood that, although each step in the flowchart involved in each of the above-described embodiments is shown in sequence according to the arrow, these steps are not necessarily executed in the order indicated by the arrow. Unless otherwise specified herein, the execution of these steps is not strictly limited in sequence, and these steps can be executed in other orders. Moreover, at least part of the steps in the flowchart involved in each of the above-described embodiments can include multiple steps or stages, which are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily sequential, but can be alternately or alternately executed with at least part of other steps or steps or stages in other steps.

[0123] Based on the same inventive concept, the embodiments of the present application also provide an industrial power supply comprising the above-mentioned switch element series voltage sharing circuit. The structure and voltage sharing method of the switch element series voltage sharing circuit have been described in detail in the above-mentioned embodiments, and will not be repeated here.

[0124] Based on the same inventive concept, the embodiments of the present application also provide a switch element series voltage sharing device for implementing the above-mentioned switch element series voltage sharing method. The implementation scheme of the problem solving provided by the device is similar to the implementation scheme described in the above-mentioned method, so the specific limitations in one or more switch element series voltage sharing device embodiments provided below can refer to the limitations of the switch element series voltage sharing method in the above text, and will not be repeated here.

[0125] In some embodiments, as shown in Figure 11 A switch element series voltage sharing device 1100 is provided, comprising: a buffer voltage acquisition module 1101, a switch element classification module 1102, an adjustment information determination module 1103, and a voltage sharing adjustment module 1104, wherein:

[0126] The buffer voltage acquisition module 1101 is configured to acquire respective buffer voltages of the switch elements, each buffer voltage being obtained by a voltage sampling unit corresponding to each switch element, respectively sampling the buffer circuit corresponding to each switch element in a current switching period.

[0127] The switch element classification module 1102 is configured to determine a reference switch element and a switch element to be adjusted from the switch elements.

[0128] The adjustment information determination module 1103 is configured to determine a switch action time of the switch element to be adjusted according to a difference degree of the buffer voltages of the reference switch element and the switch element to be adjusted.

[0129] The voltage balance adjustment module 1104 is configured to adjust a switching time of the switch element to be adjusted in the next switching cycle according to the switch action time.

[0130] The above-mentioned modules in the switch element series voltage balance device can be realized by software, hardware or a combination thereof. The above-mentioned modules can be embedded in or independent of the processor in the computer device in hardware form, or can be stored in the memory in the computer device in software form, so as to be called and executed by the processor to perform the operations corresponding to the above-mentioned modules.

[0131] In some embodiments, a computer device is provided, which can be a control unit, and an internal structure diagram thereof can be as shown in Figure 12 The computer device includes a processor, a memory and a network interface connected through a system bus. The processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operating system and the computer program in the non-volatile storage medium to run. The database of the computer device is configured to store buffer voltages, switch elements to be adjusted, switch action times and the like. The network interface of the computer device is configured to communicate with an external terminal through a network connection. The computer program is executed by the processor to implement a switch element series voltage balance method.

[0132] Those skilled in the art can understand that Figure 12 The structure shown in the figure is only a block diagram of part of the structure related to the scheme of the present application, and does not constitute a limitation on the computer device to which the scheme of the present application is applied. The specific computer device can include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0133] In some embodiments, a computer device is provided, which includes a memory and a processor, and the memory stores a computer program. The processor implements the following steps when executing the computer program:

[0134] The buffer voltages of the switch elements are obtained by voltage sampling units corresponding to the switch elements, respectively, on the buffer circuits corresponding to the switch elements in the current switching cycle;

[0135] determining a reference switching element and a switching element to be adjusted from the switching elements;

[0136] determining a switching action time of the switching element to be adjusted according to a difference degree of the buffer voltages of the reference switching element and the switching element to be adjusted;

[0137] adjusting a switching time of the switching element to be adjusted in a next switching cycle according to the switching action time.

[0138] In some embodiments, a computer readable storage medium is provided, and the computer readable storage medium has stored thereon a computer program, and the computer program is executed by a processor to implement the following steps:

[0139] obtaining buffer voltages of the switching elements respectively, each buffer voltage being obtained by a voltage sampling unit corresponding to each switching element, and each buffer circuit corresponding to each switching element being respectively voltage sampled in a current switching cycle;

[0140] determining a reference switching element and a switching element to be adjusted from the switching elements;

[0141] determining a switching action time of the switching element to be adjusted according to a difference degree of the buffer voltages of the reference switching element and the switching element to be adjusted;

[0142] adjusting a switching time of the switching element to be adjusted in a next switching cycle according to the switching action time.

[0143] In some embodiments, a computer program product is provided, and the computer program product includes a computer program, and the computer program is executed by a processor to implement the following steps:

[0144] obtaining buffer voltages of the switching elements respectively, each buffer voltage being obtained by a voltage sampling unit corresponding to each switching element, and each buffer circuit corresponding to each switching element being respectively voltage sampled in a current switching cycle;

[0145] determining a reference switching element and a switching element to be adjusted from the switching elements;

[0146] determining a switching action time of the switching element to be adjusted according to a difference degree of the buffer voltages of the reference switching element and the switching element to be adjusted;

[0147] adjusting a switching time of the switching element to be adjusted in a next switching cycle according to the switching action time.

[0148] It should be noted that the user information (including but not limited to user equipment information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) involved in the present application are all information and data authorized by the user or authorized by all parties. And the acquisition, storage, processing, transmission, etc. of the data comply with the relevant provisions of laws and regulations.

[0149] A person of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing related hardware through a computer program. The computer program can be stored in a non-volatile computer readable storage medium, and when the computer program is executed, it can include the processes of the above-mentioned embodiments of each method. Any reference to a memory, database or other medium used in the embodiments provided by the present application can include at least one of a non-volatile and volatile memory. The non-volatile memory can include a read-only memory (Read-Only Memory, ROM), a magnetic tape, a floppy disk, a flash memory, an optical storage, a high-density embedded non-volatile memory, a resistive memory (ReRAM), a magnetoresistive random access memory (Magnetoresistive Random Access Memory, MRAM), a ferroelectric memory (Ferroelectric Random Access Memory, FRAM), a phase change memory (Phase Change Memory, PCM), a graphene memory, etc. The volatile memory can include a random access memory (Random Access Memory, RAM) or an external cache memory, etc. As an illustration but not limitation, the RAM can be in various forms, such as static random access memory (Static Random Access Memory, SRAM) or dynamic random access memory (Dynamic Random Access Memory, DRAM), etc. The database involved in the embodiments provided by the present application can include at least one of a relational database and a non-relational database. The non-relational database can include a distributed database based on a block chain, etc., without being limited thereto. The processor involved in the embodiments provided by the present application can be a general-purpose processor, a central processing unit, a graphics processing unit, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., without being limited thereto.

[0150] The technical features of the above embodiments can be combined in any way. To make the description concise, not all possible combinations of the technical features in the above embodiments are described, but as long as the combinations of the technical features do not exist contradictory, they should be considered as the scope of the present disclosure.

[0151] The above-described embodiments are merely illustrative of several embodiments of the present application, and the description is relatively specific and detailed, but should not be understood as a limitation on the scope of the patent. It should be noted that for those skilled in the art, without departing from the concept of the present application, a number of modifications and improvements can be made, which are all within the scope of the present application. Therefore, the scope of protection of the present application should be subject to the appended claims.

Claims

1. A voltage equalizing circuit for a series connection of switching elements, characterized by comprising: The circuit comprises at least two series-connected switching elements, a buffer circuit corresponding to each of the switching elements, a voltage sampling unit, and a control circuit connected to each of the voltage sampling units and each of the switching elements; For each of the switching elements, the buffer circuit corresponding to the switching element is connected in parallel to the switching element, for absorbing transient voltage spikes generated by the switching element when in action; The voltage sampling unit corresponding to the switching element is configured to sample the voltage of the buffer circuit in a current switching period, to obtain a buffer voltage in the current switching period; The control circuit is configured to obtain the buffer voltage of each of the switching elements, determine a to-be-adjusted switching element and a switching action time of the to-be-adjusted switching element from each of the switching elements according to each of the buffer voltages, and adjust the switching time of the to-be-adjusted switching element in a next switching period according to the switching action time.

2. The circuit of claim 1, wherein, The buffer circuit comprises a diode, a filter capacitor, and a capacitor discharge resistor; The anode of the diode is connected to a first end of the switching element, the cathode of the diode is connected to a second end of the switching element through the filter capacitor, and the capacitor discharge resistor is connected in parallel to the filter capacitor; The filter capacitor absorbs transient voltage spikes generated by the switching element through the diode and discharges through the capacitor discharge resistor.

3. The circuit of claim 2, wherein, The switching element is an N-channel metal oxide semiconductor field effect transistor, the anode of the diode is connected to the drain of the switching element, and the cathode of the diode is connected to the source of the switching element through the filter capacitor.

4. The circuit of claim 2, wherein, The voltage sampling unit comprises a voltage dividing circuit and an operational amplifier circuit; The voltage dividing circuit is connected in parallel to the filter capacitor, for reducing the voltage amplitude of a voltage signal collected from both ends of the filter capacitor; The operational amplifier circuit is connected to the voltage dividing circuit, for signal conditioning of an input voltage signal, to obtain the buffer voltage in the current switching period.

5. The circuit according to any one of claims 1 to 4, characterized in that The control circuit comprises an analog-to-digital conversion unit and a control unit; the analog-to-digital conversion unit is connected to each of the voltage sampling units, and the control unit is connected to the analog-to-digital conversion unit and each of the switching elements; The analog-to-digital conversion unit is configured to convert the buffer voltage collected by each of the voltage sampling units into a digital signal; The control unit is configured to determine the buffer voltage of each of the switching elements in the current switching period according to each of the digital signals, determine a to-be-adjusted switching element and a switching action time of the to-be-adjusted switching element from each of the switching elements according to the difference between each of the buffer voltages, and adjust the switching time of the to-be-adjusted switching element in a next switching period according to the switching action time.

6. A method of voltage equalization for series-connected switching elements, applied to the voltage equalization circuit for series-connected switching elements according to any one of claims 1 to 5, characterized by The method comprises: obtaining the buffer voltage of each of the switching elements, each of the buffer voltages being obtained by sampling the voltage of the buffer circuit corresponding to each of the switching elements in a current switching period; determining a reference switching element and a to-be-adjusted switching element from each of the switching elements; determining a switching action time of the switch element to be adjusted according to a difference degree of the buffer voltages of the reference switch element and the switch element to be adjusted; adjusting a switching time of the switch element to be adjusted in a next switching period according to the switching action time.

7. A voltage equalizing device for a series connection of switching elements, characterized by The device comprises: a buffer voltage obtaining module, configured to obtain respective buffer voltages of each switch element, each buffer voltage being obtained by voltage sampling of a buffer circuit corresponding to each switch element in a current switching period; a switch element classification module, configured to determine a reference switch element and a switch element to be adjusted from each switch element; an adjustment information determining module, configured to determine a switching action time of the switch element to be adjusted according to a difference degree of the buffer voltages of the reference switch element and the switch element to be adjusted; a voltage equalization adjustment module, configured to adjust a switching time of the switch element to be adjusted in a next switching period according to the switching action time.

8. An industrial power supply characterized by, The switch element series voltage equalization circuit comprises the switch element series voltage equalization circuit according to any one of claims 1 to 5. 9.A computer device, comprising a memory and a processor, wherein the memory stores a computer program, and the computer device is configured to perform the method according to any one of claims 1-8 when the computer program is executed by the processor. The processor executes the computer program to implement the steps of the method in claim 6.

10. A computer program product comprising a computer program, characterized in that, The computer program is executed by the processor to implement the steps of the method in claim 6.

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