A gradient bevel cut angle substrate, semiconductor layer and preparation method thereof

Abstract

The application discloses a gradient bevel angle substrate, a semiconductor layer and a preparation method thereof, and relates to the technical field of semiconductor devices. The gradient bevel angle substrate is used for the preparation of the semiconductor layer. The surface of the gradient bevel angle substrate comprises a center region, an edge region, and a transition region connected between the center region and the edge region. The bevel angle of the center region is 0°<theta1<0.2°, the surface step width of the center region is greater than or equal to 200 nm, the bevel angle of the edge region is 0.2°<theta2<1°, the surface step width of the edge region is less than or equal to 40 nm, and the bevel angle theta3 of the transition region continuously and gradually changes from the center region to the edge region. The application solves the problems of wavelength out of control, high dislocation density and low Micro LED mass transfer yield caused by thermal stress accumulation in the prior art by using the gradient bevel angle to manufacture the semiconductor layer.

Description

Technical Field

[0001] This invention relates to the field of semiconductor device technology, specifically to a gradient beveled substrate, a semiconductor layer, and a method for preparing the same. Background Technology

[0002] Currently, the bevel angle of commercially available sapphire substrates is uniformly 0.2°, specifically calibrated based on the processes of mainstream manufacturers such as Samsung and Epistar.

[0003] The aforementioned standard aims to balance wavelength uniformity and defect control, but in the actual production of white LEDs, a compromise is often reached: wavelength uniformity in the wafer center region is approximately ±1.5 nm, while the dislocation density at the wafer edge region remains ≥10. 10 cm -2 The current industry standard of 0.2° cannot be optimized in different areas, and in the process of Micro LED miniaturization, there are still problems such as uncontrolled edge wavelengths, excessive dislocation density, and thermal stress accumulation, resulting in low yield of Micro LED mass transfer. Summary of the Invention

[0004] To address the shortcomings of existing technologies, the present invention aims to provide a gradient beveled substrate, a semiconductor layer, and a method for fabricating the same, in order to solve the problems of low yield in MicroLED mass transfer caused by edge wavelength runaway, excessive dislocation density, and thermal stress accumulation.

[0005] A first aspect of the present invention is to provide a gradient beveled substrate for fabricating a semiconductor layer, wherein the surface of the gradient beveled substrate includes a central region, an edge region, and a transition region connecting the central region and the edge region;

[0006] Wherein, the chamfer angle of the central region is 0° < θ1 < 0.2°, the surface step width of the central region is ≥ 200nm, the chamfer angle of the edge region is 0.2° < θ2 < 1°, the surface step width of the edge region is ≤ 40nm, and the chamfer angle θ3 of the transition region gradually changes from the central region to the edge region.

[0007] According to one aspect of the above technical solution, the change in the chamfer angle of the transition region satisfies a linear gradient function: θ(r) = 0.1° + 0.5° × r / R;

[0008] In the formula, r is the radial coordinate of the substrate, R is the radius of the substrate, and 0 ≤ r ≤ R.

[0009] A second aspect of the present invention is to provide a Micro LED nitride semiconductor layer, comprising a gradient beveled substrate as described in the above technical solution, wherein a gradient strain buffer layer is provided on the gradient beveled substrate, and the gradient strain buffer layer fills the surface steps of the gradient beveled substrate on the gradient beveled substrate.

[0010] According to one aspect of the above technical solution, in the gradient strain buffer layer, the pre-set compressive stress in the region corresponding to the central region is >200MPa, and the thickness of the buffer layer in the corresponding region is 1.5μm-2μm; the pre-set compressive stress in the region corresponding to the edge region is <100MPa, and the thickness of the buffer layer in the corresponding region is 0.8μm-1.2μm; the difference in buffer layer thickness between the central region and the edge region is ≥0.5μm.

[0011] According to one aspect of the above technical solution, the gradient strain buffer layer is a composite layer stack, including a first annealing layer, a second nucleation layer and a third morphological transition layer stacked together.

[0012] The first annealing layer includes L annealing sublayers, where 1≤L≤6, and the growth temperature of the L annealing sublayers decreases layer by layer, the H2 flow rate increases layer by layer, and the annealing time increases layer by layer.

[0013] The second nucleation layer includes M nucleation sublayers, where 1 ≤ M ≤ 3, and the growth temperature of the M nucleation sublayers increases layer by layer, while the V / III ratio decreases layer by layer.

[0014] The third morphological transition layer includes N morphological transition sublayers, where 2≤N≤6, and the growth temperature of the N morphological transition sublayers increases layer by layer, the V / Ⅲ ratio increases layer by layer, the growth pressure decreases layer by layer, and the growth rate increases layer by layer.

[0015] According to one aspect of the above technical solution, the growth temperature of the first annealing layer is 900℃-1600℃, and the adjacent annealing sub-layers decrease in temperature by a gradient of 20℃, the H2 flow rate is ≥150sccm, and the annealing time is 10min-50min.

[0016] The growth temperature of the second nucleation layer is 800℃-1200℃, the V / Ⅲ ratio is 60-300, and the H2 flow rate is ≥200sccm;

[0017] The growth pressure of the third morphology transition layer is 100 torr-500 torr, the growth temperature is 800℃-1500℃, the H2 flow rate is ≥150 sccm, and the V / Ⅲ ratio ranges from 100 to 500.

[0018] According to an aspect of the above technical solution, after the second nucleation layer is grown, the preset compressive stress of the gradient strain buffer layer corresponding to the center region is greater than 200 MPa, and the preset tensile stress of the edge region is less than 100 MPa.

[0019] After the third morphological transition layer is grown, the thickness of the buffer layer corresponding to the center region is 1.5-2.0 microns, and the thickness of the buffer layer corresponding to the edge region is 0.8-1.2 microns.

[0020] According to an aspect of the above technical solution, after the third morphological transition layer is grown, the gradient strain buffer layer has a three-dimensional island structure in the region corresponding to the center region, and has a two-dimensional layer structure in the region corresponding to the edge region.

[0021] The third aspect of the present application provides a preparation method of a Micro LED nitride semiconductor layer, which is used to prepare the Micro LED nitride semiconductor layer in the above technical solution, and the preparation method comprises the following steps:

[0022] A gradient bevel cut angle substrate is provided.

[0023] A gradient strain buffer layer is deposited on the gradient bevel cut angle substrate.

[0024] An N-type gallium nitride layer, an active layer, a P-type electron blocking layer and a P-type Mg-doped gallium nitride layer are sequentially deposited on the gradient strain buffer layer.

[0025] According to an aspect of the above technical solution, the gradient bevel cut angle substrate is obtained by ion beam region-by-region etching, forming a center region, an edge region and a transition region transitionally connected between the center region and the edge region.

[0026] Compared with the prior art, the gradient bevel cut angle substrate, the semiconductor layer and the preparation method thereof have the following beneficial effects:

[0027] The present application provides a gradient bevel cut angle substrate, which includes a small bevel cut angle in the center region, forming a wide step, significantly extending the migration distance of In atoms in the epitaxial layer, reducing the component fluctuation in the quantum well, i.e. the epitaxial layer, thereby improving the wavelength consistency, and a large bevel cut angle in the edge region, forming a super-high step density, inducing dislocation bending through the step edge, blocking the longitudinal extension of dislocations, and a continuous and gradual transition surface between the center region and the edge region, the bevel cut angle of which gradually changes, which can effectively avoid the sudden stress between the gradient bevel cut angle substrate and the functional layer connected thereto, and the present application controls the balance between the bevel cut angle, the curvature and the stress, solves the physical limit contradiction of the traditional process, and greatly improves the Micro LED mass transfer yield. BRIEF DESCRIPTION OF DRAWINGS

[0028] The above and / or additional aspects and advantages of the present application will become apparent and more readily appreciated from the following description of the embodiments, taken in conjunction with the references to the following drawings, of which:

[0029] Figure 1 A schematic diagram of a partition of a gradient bevel angle substrate in an embodiment of the present application;

[0030] Figure 2 A schematic diagram of a topography of a gradient bevel angle substrate and an existing bevel angle substrate edge region in an embodiment of the present application;

[0031] Figure 3 A schematic diagram of a structure of a Micro LED nitride semiconductor layer in an embodiment of the present application;

[0032] Figure 4 A schematic diagram of a flow of a preparation method of a Micro LED nitride semiconductor layer in an embodiment of the present application. DETAILED DESCRIPTION

[0033] In order to make the objectives, features and advantages of the present application more apparent, the specific embodiments of the present application will be described in detail below with reference to the accompanying drawings. The accompanying drawings show several embodiments of the present application. However, the present application can be realized in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided so that the disclosure of the present application is more complete and comprehensive.

[0034] It should be noted that when an element is referred to as being "fixed" to another element, it can be directly on the other element or there can be an intervening element. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or there can be an intervening element. The terms "vertical", "horizontal", "left", "right", and similar expressions used herein are for illustrative purposes only.

[0035] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0036] Embodiment One

[0037] Please refer to Figure 1The first embodiment of the present application provides a gradient bevel angle substrate for the preparation of a semiconductor layer, a surface of the gradient bevel angle substrate comprising a center region, an edge region, and a transition region connected between the center region and the edge region;

[0038] wherein the bevel angle of the center region is 0°<θ1<0.2°, the surface step width of the center region is ≥200nm, the bevel angle of the edge region is 0.2°<θ2<1°, the surface step width of the edge region is ≤40nm, and the bevel angle θ3 of the transition region continuously and gradually changes from the center region to the edge region.

[0039] In addition, the change of the bevel angle of the transition region satisfies a linear gradient function: θ(r)=0.1°+0.5°×r / R.

[0040] In the formula, r is a radial coordinate of the substrate, R is a radius of the substrate, and 0≤r≤R.

[0041] First of all, it should be pointed out that the above-mentioned gradient bevel angle substrate can be any one of a sapphire substrate, a silicon substrate, a silicon carbide substrate, and a gallium nitride substrate, and in this embodiment, a 6-inch sapphire substrate is used for beveling to serve as a growth substrate of an epitaxial layer.

[0042] In this embodiment, the surface of the gradient bevel angle substrate is divided into a center region, an edge region, and a transition region connected between the center region and the edge region along an axial section thereof, and the transition region is transitionally connected between the center region and the edge region, that is, the relatively gentle connection between the center region and the edge region is realized through the provision of the transition region.

[0043] Specifically, the bevel angle of the center region is θ1, 0°<θ1<0.2°, for example, 0.1°, and the surface step width, i.e., the radial width, is ≥200nm; the bevel angle of the edge region is θ2, 0.2°<θ2<1°, for example, 0.6°, and the surface step width, i.e., the radial width, is ≤40nm; and the bevel angle of the transition region is θ3, and θ3 continuously and gradually changes from the outside edge of the center region to the inside edge of the edge region.

[0044] From the axial section, the gradient bevel angle substrate comprises two surfaces with constant bevel angles, i.e., the surfaces corresponding to the center region and the edge region, respectively, and a transition surface transitionally between the two surfaces, the transition surface being composed of a plurality of sub-transition surfaces with different bevel angles θ3, the plurality of bevel angles θ3 continuously and gradually changing from the center region to the edge region, specifically, the bevel angles θ3 corresponding to the plurality of sub-transition surfaces gradually increasing from the center region to the edge region, thereby realizing the transition of the surface morphology from the center region to the edge region.

[0045] As shown in Table 1, Table 1 is a comparison table of the theoretical step width corresponding to the substrate bevel angle and the actual width after high-temperature annealing.

[0046] Table 1

[0047]

[0048] Compared with the prior art, the gradient bevel angle substrate shown in the embodiment has the beneficial effects that:

[0049] The embodiment provides a gradient bevel angle substrate, which includes a small bevel angle arranged in a center region to form a wide step, significantly prolongs the migration distance of atoms in an epitaxial layer, reduces the component fluctuation in the quantum well, i.e., the epitaxial layer, a large bevel angle arranged in an edge region to form a super-high step density, effectively induces the bending annihilation of the edge dislocations, and a continuously and gradually changing transition surface arranged between the center region and the edge region, the bevel angle of the transition surface gradually changes, which can effectively avoid the sudden stress between the gradient bevel angle substrate and the functional layer connected thereto.

[0050] Embodiment Two

[0051] The second embodiment of the application provides a Micro LED nitride semiconductor layer, which includes the gradient bevel angle substrate in the above-mentioned embodiments, a gradient strain buffer layer is arranged on the gradient bevel angle substrate, and each surface step of the gradient bevel angle substrate is filled by the gradient strain buffer layer on the gradient bevel angle substrate.

[0052] In the gradient strain buffer layer, the preset compressive stress of the center region is greater than 200 MPa, the buffer layer thickness of the corresponding region is 1.5 μm-2 μm, the preset compressive stress of the edge region is less than 100 MPa, the buffer layer thickness of the corresponding region is 0.8 μm-1.2 μm, and the difference between the buffer layer thicknesses of the center region and the edge region is greater than or equal to 0.5 μm.

[0053] In the embodiment, the gradient strain buffer layer is a composite layer stack, which includes a first annealing layer, a second nucleation layer and a third morphology transition layer arranged in layers.

[0054] The first annealing layer includes L layers of annealing sub-layers, 1≤L≤6, the growth temperature of the L layers of annealing sub-layers decreases layer by layer, the H2 flow increases layer by layer, and the annealing time increases layer by layer.

[0055] The second nucleation layer includes M layers of nucleation sub-layers, 1≤M≤3, the growth temperature of the M layers of nucleation sub-layers increases layer by layer, and the V / III ratio decreases layer by layer.

[0056] The third morphology transition layer comprises N morphology transition sub-layers, 2≤N≤6, and the growth temperature, the V / III ratio, the growth pressure, and the growth rate of the N morphology transition sub-layers are increased, decreased, increased, and increased layer by layer, respectively.

[0057] In the embodiment, the growth temperature of the first annealing layer is 900-1600℃, the H2 flow rate is ≥150sccm, and the annealing time is 10-50min.

[0058] The growth temperature of the second nucleation layer is 800-1200℃, the V / III ratio is 60-300, and the H2 flow rate is ≥200sccm.

[0059] The growth pressure of the third morphology transition layer is 100-500torr, the growth temperature is 800-1500℃, the H2 flow rate is ≥150sccm, and the V / III ratio is 100-500.

[0060] In the embodiment, after the growth of the second nucleation layer, the preset compressive stress of the gradient strain buffer layer corresponding to the central region is >200MPa, and the preset tensile stress of the gradient strain buffer layer corresponding to the edge region is <100MPa.

[0061] After the growth of the third morphology transition layer, the thickness of the buffer layer corresponding to the central region is 1.5-2.0μm, and the thickness of the buffer layer corresponding to the edge region is 0.8-1.2μm.

[0062] In the embodiment, after the growth of the third morphology transition layer, the gradient strain buffer layer has a three-dimensional island structure in the region corresponding to the central region and a two-dimensional layer structure in the region corresponding to the edge region.

[0063] Specifically, in the embodiment, the semiconductor layer is a Micro LED nitride semiconductor layer, which comprises a gradient offcut angle substrate and an epitaxial layer on the gradient offcut angle substrate, and at least comprises a gradient strain buffer layer for filling the surface steps of different widths on the gradient offcut angle substrate and for fully combining the gradient strain buffer layer with the gradient offcut angle substrate.

[0064] More specifically, in the gradient strain buffer layer, the preset compressive stress of the region corresponding to the central region is >200MPa, the thickness of the buffer layer corresponding to the region is 1.5-2μm, the preset tensile stress of the region corresponding to the edge region is <100MPa, the thickness of the buffer layer corresponding to the region is 0.8-1.2μm, and the difference in the thickness of the buffer layer corresponding to the central region and the edge region is ≥0.5μm.

[0065] The gradient strain buffer layer comprises three composite layers stacked in sequence, specifically a first annealing layer, a second nucleation layer and a third morphology transition layer.

[0066] The first annealing layer comprises L annealing sub-layers, 1≤L≤6, that is, the first annealing layer comprises at least one layer and at most six layers. In the case that the first annealing layer comprises multiple annealing sub-layers, the growth temperature of the L annealing sub-layers decreases layer by layer, the H2 flow rate increases layer by layer, and the annealing temperature increases layer by layer along the epitaxial growth direction. The growth conditions of the first annealing layer satisfy: the growth temperature is 900-1600℃, each annealing sub-layer decreases by 20℃ step gradient, the H2 flow rate is ≥150sccm, and the annealing time is 10-50min.

[0067] Further, the second nucleation layer comprises M nucleation sub-layers, 1≤M≤3, that is, the second nucleation layer comprises at least one layer and at most three layers. In the case that the second nucleation layer comprises multiple nucleation sub-layers, the growth temperature of the M nucleation sub-layers increases layer by layer, the V / III ratio decreases layer by layer, and the second nucleation layer is an Al material layer along the epitaxial growth direction. The growth conditions of the second nucleation layer satisfy: the growth temperature is 800-1200℃, the V / III ratio is in the range of 60-300, and the H2 flow rate is ≥200sccm. After the growth of the second nucleation layer, the preset compressive stress of the center region corresponding region, that is, the center region of the buffer layer, is >200MPa, and the preset tensile stress of the edge region corresponding region, that is, the edge region of the buffer layer, is <100MPa.

[0068] Further, the third morphology transition layer comprises N morphology transition sub-layers, 2≤N≤6, that is, the third morphology transition layer comprises at least two layers and at most six layers. Along the epitaxial growth direction, the growth temperature of the N morphology transition sub-layers increases layer by layer, the V / III ratio increases layer by layer, the growth pressure decreases layer by layer, and the growth rate increases layer by layer. The third morphology transition layer is a GaN material layer. The growth conditions of the third morphology transition layer satisfy: the growth pressure is 100-500torr, the growth temperature is 800-1500℃, the H2 flow rate is ≥150sccm, and the V / III ratio is 100-500. After the growth of the third morphology transition layer, the total thickness of the center region corresponding region, that is, the center region of the buffer layer, is 1.5-2.0μm, the total thickness of the edge region corresponding region, that is, the edge region of the buffer layer, is 0.8-1.2μm, and the gradient strain buffer layer presents a three-dimensional island structure in the center region of the buffer layer and a two-dimensional layer structure in the edge region of the buffer layer.

[0069] Please refer to Figure 3The Micro LED nitride semiconductor layer shown in the embodiment specifically comprises the gradient offcut angle substrate 10 and the epitaxial layer, the epitaxial layer comprises the gradient strain buffer layer 20, i.e., the corresponding first annealing layer 21, the second nucleation layer 22 and the third morphology transition layer 23, and the epitaxial layer further comprises the N-type gallium nitride layer 30, the active layer 40, the P-type electron blocking layer 50 and the P-type Mg-doped gallium nitride layer 60 which are sequentially stacked on the gradient strain buffer layer 20.

[0070] Compared with the prior art, the Micro LED nitride semiconductor layer shown in the embodiment has the beneficial effects that:

[0071] The embodiment provides the gradient offcut angle substrate, includes setting a small offcut angle in the center region to form a wide step, significantly extends the migration distance of In atoms in the epitaxial layer, reduces the component fluctuation in the quantum well, i.e., the epitaxial layer, thereby improving the wavelength consistency, sets a large offcut angle in the edge region to form a super-high step density, induces dislocation bending through the step edge, blocks the longitudinal extension of dislocations, and sets a continuous and gradually changing transition surface between the center region and the edge region, the offcut angle of the transition surface gradually changes, which can effectively avoid the sudden stress between the gradient offcut angle substrate and the functional layer connected thereto, the embodiment balances the offcut angle, the curvature and the stress by proposing a control relationship, solves the physical limit contradiction of the traditional process, and can greatly improve the Micro LED mass transfer yield.

[0072] Embodiment three

[0073] Please refer to Figure 4 The third embodiment of the present application provides a preparation method of a Micro LED nitride semiconductor layer, which is used for preparing the Micro LED nitride semiconductor layer described in the above embodiments, and the preparation method comprises steps S10-S30.

[0074] Step S10, providing a gradient offcut angle substrate.

[0075] In the embodiment, the gradient offcut angle substrate is obtained by ion beam regionally etching, forming a center region, an edge region and a transition region which is transitionally connected between the center region and the edge region.

[0076] Specifically, the gradient offcut angle substrate can be any one of a sapphire substrate, a silicon substrate, a silicon carbide substrate, and a gallium nitride substrate, and in this embodiment, a 6-inch sapphire substrate is used as an epitaxial layer growth substrate. The gradient offcut angle substrate is obtained by ion beam zoned etching. A 250 eV low-energy ion beam is used for deep etching of the central region, the offcut angle θ1 is 0.1°, and the target step width is ≥200 nm, so as to widen the step and reduce the In component fluctuation. A 550 eV high-energy ion beam is used for deep etching of the edge region, the offcut angle θ2 is 0.6°, and the target step width is ≤40 nm, so as to narrow the step and form dislocation capture points. The energy linearly changes in the transition region, and the offcut angle gradually changes from 0.1° to 0.6°, so as to avoid sudden stress.

[0077] Step S20, depositing a gradient strain buffer layer on the gradient offcut angle substrate.

[0078] In this embodiment, the gradient strain buffer layer includes a first annealing layer, a second nucleation layer, and a third morphology transition layer. The first annealing layer includes an L-layer annealing sublayer, the second nucleation layer includes an M-layer nucleation sublayer, and the third morphology transition layer includes an N-layer morphology transition sublayer.

[0079] As a specific example, when growing the first annealing layer, the temperature of the reaction chamber is controlled at 1115-1130°C, the pressure is controlled at 100-150 torr, the H2 flow is controlled at 200-350 L, and the growth time is 10 min.

[0080] The second nucleation layer, specifically an AlN nucleation layer, is grown on the first annealing layer. When generating the second nucleation layer, the temperature of the reaction chamber is controlled at 700-1200°C, the pressure is controlled at 50-200 torr, NH3 is introduced as the N source, TMAl is introduced as the Al source, so that a GaN buffer layer is grown, and the thickness of the deposited GaN buffer layer is controlled at 5-30 nm.

[0081] The third morphology transition layer is grown on the second nucleation layer. When growing the third morphology transition layer, the temperature of the reaction chamber is controlled at 850-1200°C, the pressure is controlled at 150-500 torr, NH3 is introduced as the N source, and TMGa is introduced as the Ga source. The third morphology transition layer is composed of 6 layers of gradient sublayers. The growth temperature increases by 30°C, the pressure decreases by 50-100 torr, and the NH3 increases by 5 L.

[0082] Step S30, sequentially depositing an N-type gallium nitride layer, an active layer, a P-type electron blocking layer, and a P-type Mg-doped gallium nitride layer on the gradient strain buffer layer.

[0083] In the embodiment, after the gradient strain buffer layer is deposited on the gradient offcut angle substrate, the gradient strain buffer layer is taken as a buffer unit, and a gallium nitride layer, i.e., an N-type gallium nitride layer, an active layer, a P-type electron blocking layer and a P-type Mg-doped gallium nitride layer are sequentially deposited thereon.

[0084] Compared with the prior art, the preparation method of the Micro LED nitride semiconductor layer has the beneficial effects that:

[0085] The embodiment provides a gradient offcut angle substrate, includes a small offcut angle in the center region to form a wide step, significantly extends the migration distance of In atoms in the epitaxial layer, reduces the component fluctuation in the quantum well, i.e., the epitaxial layer, thereby improving the wavelength consistency, a large offcut angle is arranged in the edge region to form a super-high step density, the dislocation is bent through the step edge to block the longitudinal extension of the dislocation, and a continuous and gradually changing transition surface is arranged between the center region and the edge region, the offcut angle of the transition surface gradually changes, which can effectively avoid the sudden stress between the gradient offcut angle substrate and the functional layer connected thereto, the embodiment balances the offcut angle, the curvature and the stress by controlling the balance relationship, solves the physical limit contradiction of the traditional process, and can greatly improve the Micro LED mass transfer yield.

[0086] Comparative Example One

[0087] The comparative example uses a sapphire substrate with a uniform offcut angle of 0.2° and a corresponding grown nitride structure, and does not prepare the gradient strain buffer layer.

[0088] The edge region atomic force microscope comparison (reference Figure 2 ) and XRD (double crystal flexure) measurement results of the gallium nitride epitaxial structure prepared in the above embodiment and the comparative example, and the wavelength uniformity σλ, the edge dislocation density and the mass transfer yield results are compared, as shown in Table 2:

[0089] Table 2

[0090]

[0091] In the description of the present specification, the description of the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" and the like means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0092] The above embodiments only express several implementation manners of the present application, which are described in a more specific and detailed manner, but cannot be understood as a limitation on the patent scope of the present application. It should be noted that, for ordinary skilled persons in the art, several modifications and improvements can be made without departing from the concept of the present application, which all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A graded bevel angle substrate, characterized by, The surface of the gradient bevel angle substrate for preparing a semiconductor layer comprises a center region, an edge region, and a transition region connecting between the center region and the edge region; Wherein, the bevel angle of the center region is 0°<θ1<0.2°, the surface step width of the center region is ≥200nm, the bevel angle of the edge region is 0.2°<θ2<1°, the surface step width of the edge region is ≤40nm, and the bevel angle θ3 of the transition region continuously and gradually changes from the center region to the edge region.

2. The gradient chamfered corner substrate of claim 1, wherein The change of the bevel angle of the transition region satisfies a linear gradient function: θ(r)=0.1°+0.5°×r / R; Wherein, r is the radial coordinate of the substrate, R is the radius of the substrate, and 0≤r≤R. 3.A Micro LED nitride semiconductor layer, characterized by, The gradient strain buffer layer is provided on the gradient bevel angle substrate of claim 1 or 2, and each surface step of the gradient bevel angle substrate is filled by the gradient strain buffer layer on the gradient bevel angle substrate. 4.The Micro LED nitride semiconductor layer of claim 3, wherein, In the gradient strain buffer layer, the preset compressive stress of the center region is >200MPa, the buffer layer thickness of the corresponding region is 1.5μm-2μm, the preset compressive stress of the edge region is <100MPa, the buffer layer thickness of the corresponding region is 0.8μm-1.2μm, and the difference of the buffer layer thickness corresponding to the center region and the edge region is ≥0.5μm. 5.The Micro LED nitride semiconductor layer of claim 4, wherein, The gradient strain buffer layer is a composite layer stack, comprising a first annealing layer, a second nucleation layer, and a third morphology transition layer which are stacked. Wherein, the first annealing layer comprises L layers of annealing sub-layers, 1≤L≤6, the growth temperature of the L layers of annealing sub-layers decreases layer by layer, the H2 flow increases layer by layer, and the annealing time increases layer by layer; The second nucleation layer comprises M layers of nucleation sub-layers, 1≤M≤3, the growth temperature of the M layers of nucleation sub-layers increases layer by layer, and the V / Ⅲ ratio decreases layer by layer; The third morphology transition layer comprises N layers of morphology transition sub-layers, 2≤N≤6, the growth temperature of the N layers of morphology transition sub-layers increases layer by layer, the V / Ⅲ ratio increases layer by layer, the growth pressure decreases layer by layer, and the growth rate increases layer by layer. 6.The Micro LED nitride semiconductor layer of claim 5, wherein, The growth temperature of the first annealing layer is 900℃-1600℃, and the adjacent annealing sub-layers decrease by 20℃, the H2 flow is ≥150sccm, and the annealing time is 10min-50min; The growth temperature of the second nucleation layer is 800℃-1200℃, the V / Ⅲ ratio is 60-300, and the H2 flow is ≥200sccm; The growth pressure of the third morphology transition layer is 100torr-500torr, the growth temperature is 800℃-1500℃, the H2 flow is ≥150sccm, and the V / Ⅲ ratio is 100-500. 7.The Micro LED nitride semiconductor layer of claim 6, wherein, After the second nucleation layer is grown, the preset compressive stress of the gradient strain buffer layer corresponding to the center region is >200MPa, and the preset tensile stress of the edge region is <100MPa. After the third morphology transition layer is grown, the thickness of the buffer layer corresponding to the center region is 1.5-2.0 μm, and the thickness of the buffer layer corresponding to the edge region is 0.8-1.2 μm. 8.The Micro LED nitride semiconductor layer of claim 7, wherein, After the third morphology transition layer is grown, the gradient strain buffer layer has a three-dimensional island structure in the region corresponding to the center region and a two-dimensional layer structure in the region corresponding to the edge region. 9.A method for manufacturing a Micro LED nitride semiconductor layer, characterized by, A method for preparing the Micro LED nitride semiconductor layer of any one of claims 3-8, the method comprising: providing a gradient offcut angle substrate; depositing a gradient strain buffer layer on the gradient offcut angle substrate; sequentially depositing an N-type gallium nitride layer, an active layer, a P-type electron blocking layer, and a P-type Mg-doped gallium nitride layer on the gradient strain buffer layer. 10.The method of claim 9, wherein the method further comprises, after the forming of the first and second layers, forming a third layer on the second layer, the third layer including a third material different from the first and second materials. The gradient offcut angle substrate is obtained by ion beam etching in different regions to form a center region, an edge region, and a transition region transitionally connected between the center region and the edge region.

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