Method, apparatus, device, medium and program product for streaming quantum random number generation

Abstract

The application provides a stream quantum random number generation method, device, equipment, medium and program product. The method comprises the following steps: in response to a random number generation instruction, iteratively performing the following operations: stream receiving an i-th original data block in each original random number sequence; based on a clock cycle of the i-th original data block, generating a pseudo-random character sequence sub-segment of the clock cycle in real time according to a target pseudo-random sequence and a hash matrix; calculating a temporary random sub-sequence of the clock cycle according to the pseudo-random character sequence sub-segment and the i-th original data block; generating a target random number sequence and a new target pseudo-random sequence respectively according to a plurality of temporary random sub-sequences of a plurality of clock cycles, so as to process the next original random number sequence by using the new target pseudo-random sequence.

Description

Technical Field

[0001] This invention relates to the fields of quantum information and cryptography, and more specifically, to a method, apparatus, device, medium, and program product for generating streaming quantum random numbers. Background Technology

[0002] Quantum random number generators (QRNGs) utilize the fundamental randomness of quantum mechanics to generate high-quality random numbers. However, the raw data generated directly from a quantum random number generator device is often not uniformly random and may leak some information due to device defects. Therefore, a post-processing step called "randomness extraction" is needed to extract high-quality, information-theoretically safe random numbers from the raw data.

[0003] The related technologies consume a lot of logical computing resources and take a long time to perform post-processing operations on the raw data directly generated from the quantum random number generator device. Summary of the Invention

[0004] In view of this, embodiments of the present invention provide a streaming quantum random number generation method, apparatus, device, medium, and program product.

[0005] One aspect of this invention provides a streaming quantum random number generation method, comprising:

[0006] In response to the random number generation command, the following operations are performed iteratively:

[0007] Streaming reception of the i-th raw data block in each raw random number sequence;

[0008] Based on the clock cycle of the i-th original data block, pseudo-random character sequence sub-fragments of the clock cycle are generated in real time according to the target pseudo-random sequence and hash matrix.

[0009] Based on the aforementioned pseudo-random character sequence sub-segment and the aforementioned i-th original data block, calculate the aforementioned temporary random sub-sequence of the clock cycle;

[0010] Based on multiple temporary random subsequences over multiple clock cycles, a target random number sequence and a new target pseudo-random sequence are generated respectively, so as to process the next original random number sequence using the new target pseudo-random sequence.

[0011] According to an embodiment of the present invention, based on a target pseudo-random sequence and a hash matrix, a pseudo-random character sequence sub-fragment of the aforementioned clock cycle is generated in real time, including:

[0012] Configure the initial pseudo-random sequence;

[0013] Generate the target pseudo-random sequence and the hash matrix based on the initial pseudo-random sequence described above.

[0014] Based on the aforementioned target pseudo-random sequence and the aforementioned hash matrix, a pseudo-random character sequence sub-fragment for the aforementioned clock cycle is generated.

[0015] According to an embodiment of the present invention, the hash matrix includes multiple initial sub-matrices divided according to the column direction, and one of the initial sub-matrices corresponds to one clock cycle.

[0016] According to an embodiment of the present invention, generating a pseudo-random character sequence sub-fragment of the clock period based on the target pseudo-random sequence and the hash matrix includes:

[0017] Based on the clock cycle of the i-th original data block, determine the target submatrix corresponding to the i-th original data block from among the multiple initial submatrices of the hash matrix;

[0018] Based on the aforementioned target pseudo-random sequence and the aforementioned target sub-matrix, the aforementioned pseudo-random character sequence sub-fragments are generated and stored in a register.

[0019] According to an embodiment of the present invention, generating the pseudo-random character sequence sub-fragments based on the target pseudo-random sequence and the target sub-matrix includes:

[0020] The matrix-vector computation subunit is used to perform target operations on the target pseudo-random sequence and the target submatrix to obtain the pseudo-random character sequence sub-fragments. The target operations include at least one of bitwise AND operation and XOR summation operation.

[0021] According to an embodiment of the present invention, the target submatrix comprises multiple rows of matrix elements.

[0022] According to an embodiment of the present invention, a matrix-vector computation subunit is used to perform target operations on the target pseudo-random sequence and the target submatrix to obtain the pseudo-random character sequence sub-fragments, including:

[0023] For each row of the matrix elements, the computational subunit performs logical operations on the matrix elements of the row and the target pseudo-random sequence to generate bit row segments.

[0024] The above-mentioned bit row segments are accumulated using the accumulation sub-unit to generate the above-mentioned pseudo-random character sequence sub-segment.

[0025] According to an embodiment of the present invention, multiple computational subunits are used to perform logical operations on matrix elements of different rows in parallel, wherein the logical operations include performing logical operations on the matrix elements of the rows and the target pseudo-random sequence to generate bit row segments.

[0026] According to an embodiment of the present invention, a target random number sequence and a new target pseudo-random sequence are generated based on multiple temporary random subsequences of multiple clock cycles, including:

[0027] A temporary random number sequence is generated based on multiple temporary random subsequences stored in a register over multiple clock cycles.

[0028] The temporary random number sequence is segmented based on the preset sequence segmentation rules to obtain the target random number sequence and the new target pseudo-random sequence.

[0029] According to an embodiment of the present invention, the length of the temporary random number sequence is equal to the length of the original random number sequence.

[0030] According to an embodiment of the present invention, the temporary random number sequence is segmented based on a preset sequence segmentation rule to obtain the target random number sequence and the new target pseudo-random sequence, including:

[0031] The temporary random number sequence is segmented based on the length of the target pseudo-random sequence to obtain the target random number sequence and the new target pseudo-random sequence. The length of the target random number sequence is less than the length of the original random number sequence, and the length of the new target pseudo-random sequence is the same as the length of the target pseudo-random sequence.

[0032] Another aspect of the present invention provides a streaming quantum random number generation device, comprising:

[0033] The receiving module is used to iteratively receive the i-th original data block in each original random number sequence in response to the random number generation instruction;

[0034] The seed management module is used to generate pseudo-random character sequence sub-fragments for the aforementioned clock cycle based on the clock cycle of the i-th original data block, according to the target pseudo-random sequence and hash matrix.

[0035] The calculation module is used to calculate the temporary random subsequence of the clock cycle based on the pseudo-random character sequence sub-fragment and the i-th original data block.

[0036] The accumulation module is used to generate a target random number sequence and a new target pseudo-random sequence based on multiple temporary random subsequences over multiple clock cycles, so as to process the next original random number sequence using the new target pseudo-random sequence.

[0037] Another aspect of the present invention provides an electronic device, including: one or more processors; and a memory for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors cause the one or more processors to implement the method described above.

[0038] Another aspect of the present invention provides a computer-readable storage medium storing computer-executable instructions, which, when executed, are used to implement the method described above.

[0039] Another aspect of the present invention provides a computer program product including computer-executable instructions that, when executed, implement the method described above.

[0040] According to an embodiment of the present invention, each original data block in the original random number sequence is received in a streaming manner; based on the clock period of the original data block, pseudo-random character sequence segments are generated in real time according to the target pseudo-random sequence and hash matrix; temporary random subsequences are calculated based on the pseudo-random character sequence segments and the original data block; and a target random number sequence and a new target pseudo-random sequence are generated based on multiple temporary random subsequences. Since this embodiment receives multiple original data blocks in the original random number sequence in a streaming manner, determines the corresponding pseudo-random character sequence segments based on the clock period of each original data block, and calculates the temporary random subsequence for each original data block, by decomposing the calculation of the target random number sequence into multiple decomposition algorithms synchronized with the data stream, the problem of consuming a large amount of logical computing resources caused by directly using the hash matrix and the original random number sequence for calculation can be avoided, thereby improving computational efficiency and reducing the occupancy rate of logical computing resources. Attached Figure Description

[0041] The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0042] Figure 1 A flowchart of a streaming quantum random number generation method according to an embodiment of the present invention is shown;

[0043] Figure 2 A flowchart of a streaming quantum random number generation method according to another embodiment of the present invention is shown;

[0044] Figure 3 A schematic diagram of parallel computing according to an embodiment of the present invention is shown;

[0045] Figure 4 A schematic diagram illustrating the generation of a target random number sequence according to an embodiment of the present invention is shown;

[0046] Figure 5 A block diagram of a streaming quantum random number generator according to an embodiment of the present invention is shown;

[0047] Figure 6 A block diagram of an electronic device suitable for implementing the methods described above, according to an embodiment of the present invention, is shown. Detailed Implementation

[0048] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the invention. In the following detailed description, numerous specific details are set forth to provide a thorough understanding of the embodiments of the invention for ease of explanation. However, it will be apparent that one or more embodiments may be practiced without these specific details. Furthermore, descriptions of well-known structures and techniques are omitted in the following description to avoid unnecessarily obscuring the concept of the invention.

[0049] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. The terms “comprising,” “including,” etc., as used herein indicate the presence of the stated features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0050] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein are to be interpreted in a manner consistent with the context of this specification, and not in an idealized or overly rigid way.

[0051] When using expressions such as "at least one of A, B, and C," the expression should generally be interpreted in accordance with the meaning commonly understood by a person skilled in the art (e.g., "a system having at least one of A, B, and C" should include, but is not limited to, systems having A alone, having B alone, having C alone, having A and B, having A and C, having B and C, and / or having A, B, and C, etc.). When using expressions such as "at least one of A, B, or C," the expression should generally be interpreted in accordance with the meaning commonly understood by a person skilled in the art (e.g., "a system having at least one of A, B, or C" should include, but is not limited to, systems having A alone, having B alone, having C alone, having A and B, having A and C, having B and C, and / or having A, B, and C, etc.).

[0052] Randomness extraction is essentially the same as privacy amplification in Quantum Key Distribution (QKD). The widely used techniques in this field are hash functions based on the Toeplitz matrix. However, Toeplitz matrix-based schemes typically employ a block-based processing model, performing a matrix-vector multiplication on a complete block of original random data. This model introduces significant technical bottlenecks in practical applications.

[0053] (1) Real-time bottleneck: Toeplitz matrix multiplication is a typical "accumulate first, process later" block operation. The system must wait and cache a complete, fixed-size original data block (e.g., thousands or tens of thousands of bits) before it can start a one-time extraction calculation. This mode introduces unavoidable processing delays, resulting in the output of the final random number being intermittent rather than a continuous stream, which severely restricts its application in scenarios such as high-speed quantum communication that require continuous, low-latency random numbers.

[0054] (2) Huge computational and resource overhead: Implementing large-scale Toeplitz matrix multiplication in hardware faces severe resource challenges. When a high proportion of random numbers needs to be extracted from massive amounts of raw data, the dimension of the Toeplitz matrix used will be extremely large. This directly leads to high computational logic consumption: implementing a complete matrix-vector multiplication requires a large number of parallel multipliers (AND gates) and a huge accumulator (XOR tree). In order to complete the computation in a limited time, a highly parallel hardware structure is often required, which not only consumes hardware logic resources drastically, but also leads to significant dynamic power consumption, becoming the main bottleneck of hardware implementation.

[0055] In view of this, embodiments of the present invention provide a streaming quantum random number generation method, apparatus, device, medium, and program product. The method includes, in response to a random number generation instruction, iteratively performing the following operations: streaming the i-th original data block in each original random number sequence; generating, in real time, a pseudo-random character sequence sub-segment for the clock period based on the clock period of the i-th original data block, according to a target pseudo-random sequence and a hash matrix; calculating a temporary random sub-sequence for the clock period based on the pseudo-random character sequence sub-segment and the i-th original data block; and generating a target random number sequence and a new target pseudo-random sequence based on multiple temporary random sub-sequences for multiple clock periods, respectively, to process the next original random number sequence using the new target pseudo-random sequence.

[0056] Figure 1 A flowchart of a streaming quantum random number generation method according to an embodiment of the present invention is shown.

[0057] like Figure 1As shown, the streaming quantum random number generation method includes iteratively executing operations S101 to S104 in response to a random number generation instruction.

[0058] In operation S101, the i-th raw data block in each raw random number sequence is received in a streaming manner.

[0059] In operation S102, based on the clock cycle of the i-th original data block, pseudo-random character sequence sub-fragments of the clock cycle are generated in real time according to the target pseudo-random sequence and hash matrix.

[0060] In operation S103, a temporary random subsequence of the clock cycle is calculated based on the pseudo-random character sequence sub-fragment and the i-th original data block.

[0061] In operation S104, a target random number sequence and a new target pseudo-random sequence are generated based on multiple temporary random subsequences over multiple clock cycles, so as to process the next original random number sequence using the new target pseudo-random sequence.

[0062] According to embodiments of the present invention, a random number generation instruction can be input by a worker on a quantum communication device or other electronic device, and the electronic device automatically generates the random number generation instruction in response to the operation. Streaming can refer to receiving data one after another.

[0063] According to an embodiment of the present invention, the original random number sequence can be generated by a device such as an entropy source capable of providing original random numbers, and the original random number sequence... It can be a random number sequence of length n (e.g., n=1536) with a small bias (i.e., following a Gaussian distribution).

[0064] According to an embodiment of the present invention, for each original random number sequence, the i-th original data block of length k-bit in the stream received from the original random number sequence is... Based on the clock period i of the i-th original data block, according to the target pseudo-random sequence And a hash matrix M, to generate pseudo-random character sequence fragments in real time for clock period i. The clock period can be determined by the clock signal.

[0065] According to an embodiment of the present invention, based on a pseudo-random character sequence sub-fragment and the i-th original data block Calculate the temporary random subsequence of the clock period As shown in formula (1):

[0066] (1)

[0067] in, This indicates a splicing operation.

[0068] According to an embodiment of the present invention, in the original random number sequence of After all the original data blocks have completed the calculation of the temporary random subsequence, it can be based on multiple clock cycles. Each temporary random subsequence generates a target random number sequence and a new target pseudo-random sequence. The target random number sequence serves as the final output corresponding to the original random number sequence, while the new target pseudo-random sequence can be further combined with a hash matrix to generate pseudo-random character sequence fragments for processing the next original random number sequence.

[0069] According to an embodiment of the present invention, each original data block in the original random number sequence is received in a streaming manner; based on the clock period of the original data block, pseudo-random character sequence segments are generated in real time according to the target pseudo-random sequence and hash matrix; temporary random subsequences are calculated based on the pseudo-random character sequence segments and the original data block; and a target random number sequence and a new target pseudo-random sequence are generated based on multiple temporary random subsequences. Since this embodiment receives multiple original data blocks in the original random number sequence in a streaming manner, determines the corresponding pseudo-random character sequence segments based on the clock period of each original data block, and calculates the temporary random subsequence for each original data block, by decomposing the calculation of the target random number sequence into multiple decomposition algorithms synchronized with the data stream, the problem of consuming a large amount of logical computing resources caused by directly using the hash matrix and the original random number sequence for calculation can be avoided, thereby improving computational efficiency and reducing the occupancy rate of logical computing resources.

[0070] Figure 2 A flowchart of a streaming quantum random number generation method according to another embodiment of the present invention is shown.

[0071] According to an embodiment of the present invention, see Figure 2 Based on the target pseudo-random sequence and hash matrix, pseudo-random character sequence sub-fragments for the clock cycle are generated in real time, including: configuring the initial pseudo-random sequence; generating the target pseudo-random sequence and hash matrix based on the initial pseudo-random sequence; and generating pseudo-random character sequence sub-fragments for the clock cycle based on the target pseudo-random sequence and hash matrix.

[0072] According to an embodiment of the present invention, the initial pseudo-random sequence can be configured by the staff, for example, the staff provides a sequence of length m+n-1 as the initial pseudo-random sequence.

[0073] According to an embodiment of the present invention, the target pseudo-random sequence can be obtained by splitting the initial pseudo-random sequence. and A hash matrix M of dimension, where the target pseudo-random sequence length Related to hardware performance, for example, the length can be any value between 256 and 2048 bits, such as... .in, The values ​​of n and m can be adjusted according to actual needs. For example, n is 1536 and m is 1024, with the unit being bits.

[0074] In one specific embodiment, a fixed-length subsequence can be periodically extracted from the initial pseudo-random sequence as data for a submatrix of the hash matrix, which can reduce the use of computing resources.

[0075] According to an embodiment of the present invention, based on the target pseudo-random sequence With the hash matrix M, pseudo-random character sequence fragments corresponding to the clock cycle of the original data block can be generated. .

[0076] According to an embodiment of the present invention, the hash matrix M includes components divided according to the column direction. indivual The initial submatrix of dimension is denoted as . One initial submatrix corresponds to one clock cycle, and each initial submatrix has a length of... .

[0077] According to an embodiment of the present invention, see Figure 2 Based on the target pseudo-random sequence and the hash matrix, a pseudo-random character sequence sub-fragment for the clock cycle is generated, including: determining the target sub-matrix corresponding to the i-th original data block from multiple initial sub-matrices of the hash matrix according to the clock cycle of the i-th original data block; generating a pseudo-random character sequence sub-fragment based on the target pseudo-random sequence and the target sub-matrix, and storing it in a register.

[0078] According to an embodiment of the present invention, based on the clock period i of the i-th original data block ( From 0 to ( ), determine the i-th original data block from multiple initial sub-matrices of the hash matrix. dimensional target submatrix Based on the target pseudo-random sequence and target submatrix Generate pseudo-random character sequence fragments .

[0079] According to an embodiment of the present invention, by decomposing the hash matrix into sub-matrices corresponding to different clock cycles, the massive matrix operations are decomposed into smaller, more manageable sub-matrices. The computation within each clock cycle is relatively small and fixed, thus achieving an optimal balance between resource consumption and computational efficiency.

[0080] According to an embodiment of the present invention, generating a pseudo-random character sequence sub-fragment based on a target pseudo-random sequence and a target submatrix includes: performing a target operation on the target pseudo-random sequence and the target submatrix using a matrix-vector computation subunit to obtain a pseudo-random character sequence sub-fragment, wherein the target operation includes at least one of bitwise AND operation and XOR summation operation.

[0081] According to an embodiment of the present invention, the matrix-vector computation subunit performs logical operations on hash matrix data and pseudo-random vector data. This module can perform operations based on a target pseudo-random sequence. and target submatrix Generate pseudo-random character sequence fragments As shown in formula (2):

[0082] (2)

[0083] Among them, in formula (2) " The "" indicates bitwise AND and XOR summation operations, the purpose of which is to perform bitwise AND operations on matrix forms. and vector form Perform calculations in different dimensions.

[0084] According to an embodiment of the present invention, different pseudo-random character sequence fragments are calculated by utilizing matrix-vector computation sub-unit distribution. This can reduce the utilization rate of logical computing resources while improving computing efficiency.

[0085] Figure 3 A schematic diagram of parallel computing according to an embodiment of the present invention is shown.

[0086] According to an embodiment of the present invention, the target submatrix comprises multiple rows of matrix elements.

[0087] According to an embodiment of the present invention, a matrix-vector computation subunit is used to perform target operations on a target pseudo-random sequence and a target submatrix to obtain a pseudo-random character sequence sub-fragment. The method includes: for each row of matrix elements, using a computation subunit to perform logical operations on the matrix elements of the row and the target pseudo-random sequence to generate a bit row fragment; and using an accumulation subunit to accumulate multiple bit row fragments to generate a pseudo-random character sequence sub-fragment.

[0088] According to an embodiment of the present invention, the matrix-vector computation subunit can perform calculations according to the rows of the target submatrix. Specifically, for each row of matrix elements, a computation subunit can be used to compute the matrix elements of that row and the target pseudo-random sequence. Perform logical operations to generate bit row segments corresponding to each row. Therefore, for n / k target submatrices, they can be processed in parallel by n / k computational subunits (e.g., ...). Figure 3 In the computational subunits (components 1, 2, ..., n / k), after the matrix elements of all rows have been calculated, the pseudo-random character sequence sub-fragments are obtained by accumulating multiple bit row segments through an accumulation subunit. .

[0089] According to embodiments of the present invention, when performing logical calculations using computational subunits, multiple computational subunits can be used to perform calculations on multiple rows of matrix elements simultaneously in parallel, thereby further improving computational efficiency, such as... Figure 3 As shown. Specifically, taking advantage of the parallelization of hardware circuits, multiple parallel computing sub-units are created through a genvar loop. Within one clock cycle, bitwise AND (&) and XOR summation (^) operations are performed on the input target submatrix and target pseudo-random sequence simultaneously, thereby obtaining pseudo-random character sequence sub-fragments.

[0090] Figure 4 A schematic diagram illustrating the generation of a target random number sequence according to an embodiment of the present invention is shown.

[0091] According to an embodiment of the present invention, generating a target random number sequence and a new target pseudo-random sequence based on multiple temporary random subsequences of multiple clock cycles includes: generating a temporary random number sequence based on multiple temporary random subsequences of multiple clock cycles stored in a register; and segmenting the temporary random number sequence based on a preset sequence segmentation rule to obtain the target random number sequence and the new target pseudo-random sequence.

[0092] According to an embodiment of the present invention, see Figure 4 The calculation module can calculate a temporary random subsequence corresponding to each original data block under the action of a counter and a clock signal. The counter stores the results in a register within the accumulator module. Based on the clock signal and the valid signal of the original random number, the counter can count the values. At this time, the accumulator module can store multiple temporary random subsequences corresponding to multiple clock cycles in the register. Accumulate the results to generate a temporary random number sequence. .

[0093] According to an embodiment of the present invention, the accumulation module further performs the accumulation on the temporary random number sequence based on a preset sequence segmentation rule. The target random number sequence can then be obtained. and new target pseudo-random sequence .

[0094] According to an embodiment of the present invention, the length of the temporary random number sequence is equal to the length of the original random number sequence.

[0095] According to an embodiment of the present invention, a temporary random number sequence is segmented based on a preset sequence segmentation rule to obtain a target random number sequence and a new target pseudo-random sequence, including:

[0096] The temporary random number sequence is segmented based on the length of the target pseudo-random sequence to obtain the target random number sequence and a new target pseudo-random sequence. The length of the target random number sequence is less than the length of the original random number sequence, and the length of the new target pseudo-random sequence is the same as the length of the target pseudo-random sequence.

[0097] According to an embodiment of the present invention, when the accumulation module performs a segmentation operation on a temporary random number sequence of length n, the first m bits can be used as the final output random number sequence corresponding to the original random number sequence, i.e., the target random number sequence. Simultaneously, it can send a valid random number signal to indicate the target random number sequence. Effective, after The digits are then used as the target pseudo-random sequence for calculating the next original random number sequence.

[0098] It should be noted that the initial pseudo-random sequence can respond to update instructions from staff (e.g., ...). Figure 2 The initial pseudo-random sequence is updated at the set update frequency, allowing it to be reset within a specific period. For example, after resetting to a new initial pseudo-random sequence, the currently incomplete original random number sequence can be calculated using the original initial pseudo-random sequence. Once the original random number sequence has been calculated, the new initial pseudo-random sequence is used for calculation, instead of using the new target pseudo-random sequence generated during the previous original random number sequence processing.

[0099] Figure 5 A block diagram of a streaming quantum random number generator according to an embodiment of the present invention is shown.

[0100] like Figure 5 As shown, the streaming quantum random number generator 500 includes a receiving module 510, a seed management module 520, a calculation module 530, and an accumulation module 540.

[0101] The receiving module 510 is used to iteratively receive the i-th original data block in each original random number sequence in response to the random number generation instruction.

[0102] The seed management module 520 is used to generate pseudo-random character sequence sub-fragments of the clock cycle in real time based on the clock cycle of the i-th original data block, according to the target pseudo-random sequence and hash matrix.

[0103] The calculation module 530 is used to calculate a temporary random subsequence of the clock cycle based on the pseudo-random character sequence sub-fragments and the i-th original data block.

[0104] The accumulation module 540 is used to generate a target random number sequence and a new target pseudo-random sequence based on multiple temporary random subsequences over multiple clock cycles, so as to process the next original random number sequence using the new target pseudo-random sequence.

[0105] According to an embodiment of the present invention, each original data block in the original random number sequence is received in a streaming manner; based on the clock period of the original data block, pseudo-random character sequence segments are generated in real time according to the target pseudo-random sequence and hash matrix; temporary random subsequences are calculated based on the pseudo-random character sequence segments and the original data block; and a target random number sequence and a new target pseudo-random sequence are generated based on multiple temporary random subsequences. Since this embodiment receives multiple original data blocks in the original random number sequence in a streaming manner, determines the corresponding pseudo-random character sequence segments based on the clock period of each original data block, and calculates the temporary random subsequence for each original data block, by decomposing the calculation of the target random number sequence into multiple decomposition algorithms synchronized with the data stream, the problem of consuming a large amount of logical computing resources caused by directly using the hash matrix and the original random number sequence for calculation can be avoided, thereby improving computational efficiency and reducing the occupancy rate of logical computing resources.

[0106] According to an embodiment of the present invention, the seed management module 520 includes a configuration submodule, a first generation submodule, and a second generation submodule.

[0107] The configuration submodule is used to configure the initial pseudo-random sequence.

[0108] The first generation submodule is used to generate the target pseudo-random sequence and hash matrix based on the initial pseudo-random sequence.

[0109] The second generation submodule is used to generate pseudo-random character sequence fragments for a clock cycle based on the target pseudo-random sequence and the hash matrix.

[0110] According to an embodiment of the present invention, the hash matrix includes multiple initial sub-matrices divided in the column direction, and one initial sub-matrix corresponds to one clock cycle.

[0111] According to an embodiment of the present invention, the second generation submodule includes a determining unit and a first generation unit.

[0112] The determining unit is used to determine the target submatrix corresponding to the i-th original data block from multiple initial submatrices of the hash matrix based on the clock cycle of the i-th original data block.

[0113] The first generation unit is used to generate pseudo-random character sequence sub-fragments based on the target pseudo-random sequence and the target submatrix, and store them in a register.

[0114] According to an embodiment of the present invention, the first generation unit includes a matrix-vector computation subunit.

[0115] The matrix-vector computation subunit is used to perform target operations on the target pseudo-random sequence and the target submatrix to obtain pseudo-random character sequence fragments. The target operations include at least one of bitwise AND operation and XOR summation operation.

[0116] According to an embodiment of the present invention, the target submatrix comprises multiple rows of matrix elements.

[0117] According to an embodiment of the present invention, the matrix-vector calculation subunit includes a calculation subunit and an accumulation subunit.

[0118] The computation subunit is used to perform logical operations on the matrix elements of each row and the target pseudo-random sequence to generate bit row segments.

[0119] The accumulator subunit is used to accumulate multiple bit row segments to generate pseudo-random character sequence sub-segments.

[0120] According to an embodiment of the present invention, multiple computational subunits perform logical operations on matrix elements of different rows in parallel, wherein the logical operations include performing logical operations on matrix elements of the rows and a target pseudo-random sequence to generate bit row segments.

[0121] According to an embodiment of the present invention, the accumulation module 540 includes a second generation unit and a obtaining unit.

[0122] The second generation unit is used to generate a temporary random number sequence based on multiple temporary random subsequences stored in a register for multiple clock cycles.

[0123] The unit is used to segment the temporary random number sequence based on a preset sequence segmentation rule to obtain the target random number sequence and a new target pseudo-random sequence.

[0124] According to an embodiment of the present invention, the length of the temporary random number sequence is equal to the length of the original random number sequence.

[0125] According to an embodiment of the present invention, the obtaining unit includes obtaining sub-units.

[0126] The resulting sub-unit is used to segment the temporary random number sequence based on the length of the target pseudo-random sequence, resulting in a target random number sequence and a new target pseudo-random sequence. The length of the target random number sequence is less than the length of the original random number sequence, and the length of the new target pseudo-random sequence is the same as the length of the target pseudo-random sequence.

[0127] Any one or more of the modules, units, and subunits, or at least a portion thereof, of the functions of any one or more of them according to embodiments of the present invention can be implemented in one module. Any one or more of the modules, units, and subunits according to embodiments of the present invention can be implemented by dividing them into multiple modules. Any one or more of the modules, units, and subunits according to embodiments of the present invention can be at least partially implemented as hardware circuits, such as Field Programmable Gate Arrays (FPGAs), Programmable Logic Arrays (PLAs), Systems-on-Chip, Systems-on-Substrate, Systems-on-Package, Application-Specific Integrated Circuits (ASICs), or implemented by hardware or firmware through any other reasonable means of integrating or packaging circuits, or implemented by any one of software, hardware, and firmware, or by a suitable combination of any of these. Alternatively, one or more of the modules, units, and subunits according to embodiments of the present invention can be at least partially implemented as computer program modules, which, when run, can perform corresponding functions.

[0128] For example, any plurality of the receiving module 510, seed management module 520, calculation module 530, and accumulation module 540 can be combined into one module / unit / subunit, or any one of these modules / units / subunits can be split into multiple modules / units / subunits. Alternatively, at least part of the functionality of one or more of these modules / units / subunits can be combined with at least part of the functionality of other modules / units / subunits and implemented in one module / unit / subunit. According to embodiments of the present invention, at least one of the receiving module 510, seed management module 520, calculation module 530, and accumulation module 540 can be at least partially implemented as hardware circuitry, such as a field-programmable gate array (FPGA), a programmable logic array (PLA), a system-on-a-chip, a system-on-a-substrate, a system-on-package, an application-specific integrated circuit (ASIC), or any other reasonable means of integrating or packaging the circuitry, or implemented in software, hardware, or firmware, or in any suitable combination of any of these three implementation methods. Alternatively, at least one of the receiving module 510, seed management module 520, calculation module 530, and accumulation module 540 may be implemented at least partially as a computer program module, which can perform corresponding functions when the computer program module is run.

[0129] It should be noted that the streaming quantum random number generation device part in the embodiments of the present invention corresponds to the streaming quantum random number generation method part in the embodiments of the present invention. For a detailed description of the streaming quantum random number generation device part, please refer to the streaming quantum random number generation method part, which will not be repeated here.

[0130] Figure 6 A block diagram of an electronic device suitable for implementing the methods described above, according to an embodiment of the present invention, is shown. Figure 6 The electronic device shown is merely an example and should not be construed as limiting the functionality and scope of use of the embodiments of the present invention.

[0131] like Figure 6 As shown, an electronic device 600 according to an embodiment of the present invention includes a processor 601, which can perform various appropriate actions and processes according to a program stored in read-only memory (ROM) 602 or a program loaded from storage portion 608 into random access memory (RAM) 603. The processor 601 may include, for example, a general-purpose microprocessor (e.g., a CPU), an instruction set processor and / or an associated chipset and / or a special-purpose microprocessor (e.g., an application-specific integrated circuit (ASIC)), etc. The processor 601 may also include onboard memory for caching purposes. The processor 601 may include a single processing unit or multiple processing units for performing different actions of the method flow according to an embodiment of the present invention.

[0132] RAM 603 stores various programs and data required for the operation of electronic device 600. Processor 601, ROM 602, and RAM 603 are interconnected via bus 604. Processor 601 executes various operations of the method flow according to embodiments of the present invention by executing programs in ROM 602 and / or RAM 603. It should be noted that the programs may also be stored in one or more memories other than ROM 602 and RAM 603. Processor 601 may also execute various operations of the method flow according to embodiments of the present invention by executing programs stored in said one or more memories.

[0133] According to an embodiment of the present invention, the electronic device 600 may further include an input / output (I / O) interface 605, which is also connected to a bus 604. The electronic device 600 may also include one or more of the following components connected to the input / output (I / O) interface 605: an input section 606 including a keyboard, mouse, etc.; an output section 607 including a cathode ray tube (CRT), liquid crystal display (LCD), etc., and a speaker, etc.; a storage section 608 including a hard disk, etc.; and a communication section 609 including a network interface card such as a LAN card, modem, etc. The communication section 609 performs communication processing via a network such as the Internet. A drive 610 is also connected to the input / output (I / O) interface 605 as needed. A removable medium 611, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., is installed on the drive 610 as needed so that computer programs read from it can be installed into the storage section 608 as needed.

[0134] According to embodiments of the present invention, the method flow according to embodiments of the present invention can be implemented as a computer software program. For example, embodiments of the present invention include a computer program product comprising a computer program carried on a computer-readable storage medium, the computer program containing program code for performing the method shown in the flowchart. In such embodiments, the computer program can be downloaded and installed from a network via communication section 609, and / or installed from removable medium 611. When the computer program is executed by processor 601, it performs the functions defined in the system of the embodiments of the present invention. According to embodiments of the present invention, the systems, devices, apparatuses, modules, units, etc., described above can be implemented by computer program modules.

[0135] The present invention also provides a computer-readable storage medium, which may be included in the device / apparatus / system described in the above embodiments; or it may exist independently and not assembled into the device / apparatus / system. The computer-readable storage medium carries one or more programs, which, when executed, implement the method according to the embodiments of the present invention.

[0136] According to embodiments of the present invention, the computer-readable storage medium may be a non-volatile computer-readable storage medium. Examples include, but are not limited to: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this invention, the computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0137] For example, according to embodiments of the present invention, a computer-readable storage medium may include the ROM 602 and / or RAM 603 described above and / or one or more memories other than ROM 602 and RAM 603.

[0138] Embodiments of the present invention also include a computer program product comprising a computer program containing program code for performing the methods provided in the embodiments of the present invention. When the computer program product is run on an electronic device, the program code is used to enable the electronic device to implement the methods provided in the embodiments of the present invention.

[0139] When the computer program is executed by the processor 601, it performs the functions defined in the system / apparatus of this embodiment of the invention. According to embodiments of the invention, the systems, apparatuses, modules, units, etc., described above can be implemented by computer program modules.

[0140] In one embodiment, the computer program may rely on a tangible storage medium such as an optical storage device or a magnetic storage device. In another embodiment, the computer program may also be transmitted and distributed in the form of signals over a network medium, and downloaded and installed via the communication section 609, and / or installed from the removable medium 611. The program code contained in the computer program can be transmitted using any suitable network medium, including but not limited to: wireless, wired, etc., or any suitable combination thereof.

[0141] According to embodiments of the present invention, program code for executing the computer programs provided in the embodiments of the present invention can be written in any combination of one or more programming languages. Specifically, these computational programs can be implemented using high-level procedural and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages ​​include, but are not limited to, languages ​​such as Java, C++, Python, "C", or similar programming languages. The program code can be executed entirely on the user's computing device, partially on the user's device, partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0142] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram or flowchart, and combinations of blocks in a block diagram or flowchart, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions. Those skilled in the art will understand that the features described in the various embodiments of the present invention can be combined and / or combined in various ways, even if such combinations or combinations are not explicitly described in the present invention. In particular, the features described in the various embodiments of the present invention can be combined and / or combined in various ways without departing from the spirit and teachings of the present invention. All such combinations and / or pairings fall within the scope of this invention.

[0143] The embodiments of the present invention have been described above. However, these embodiments are merely illustrative and not intended to limit the scope of the invention. Although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination. The scope of the invention is defined by the embodiments and their equivalents. Various substitutions and modifications can be made by those skilled in the art without departing from the scope of the invention, and all such substitutions and modifications should fall within the scope of the invention.

Claims

1. A method for generating streaming quantum random numbers, characterized in that, The method comprises the following steps: in response to a random number generation instruction, configuring an initial pseudo-random sequence; generating a target pseudo-random sequence and a hash matrix according to the initial pseudo-random sequence; iteratively performing the following operations: streaming receiving an i-th original data block in each original random number sequence; based on the clock cycle of the i-th original data block, generating a pseudo-random character sequence sub-segment of the clock cycle in real time according to the target pseudo-random sequence and the hash matrix; calculating a temporary random sub-sequence of the clock cycle according to the pseudo-random character sequence sub-segment and the i-th original data block; generating a temporary random number sequence according to a plurality of temporary random sub-sequences of a plurality of clock cycles stored in a register; based on the length of the target pseudo-random sequence, performing segmentation processing on the temporary random number sequence to obtain a target random number sequence and a new target pseudo-random sequence, so as to process the next original random number sequence by using the new target pseudo-random sequence.

2. The method of claim 1, wherein, The hash matrix comprises a plurality of initial sub-matrices divided in the column direction, and one initial sub-matrix corresponds to one clock cycle; wherein, generating the pseudo-random character sequence sub-segment of the clock cycle according to the target pseudo-random sequence and the hash matrix comprises: determining a target sub-matrix corresponding to the i-th original data block from a plurality of initial sub-matrices of the hash matrix according to the clock cycle of the i-th original data block; generating the pseudo-random character sequence sub-segment according to the target pseudo-random sequence and the target sub-matrix, and storing it in a register.

3. The method of claim 2, wherein, Generating the pseudo-random character sequence sub-segment according to the target pseudo-random sequence and the target sub-matrix comprises: performing target operation on the target pseudo-random sequence and the target sub-matrix by using a matrix-vector calculation sub-unit to obtain the pseudo-random character sequence sub-segment, wherein the target operation comprises at least one of bitwise AND operation and exclusive OR summation operation.

4. The method of claim 3, wherein, The target sub-matrix comprises a plurality of matrix elements in rows; wherein, performing target operation on the target pseudo-random sequence and the target sub-matrix by using a matrix-vector calculation sub-unit to obtain the pseudo-random character sequence sub-segment comprises: for each row of the matrix elements, performing logical operation on the row of matrix elements and the target pseudo-random sequence by using a calculation sub-unit to generate a bit row segment; performing accumulation processing on a plurality of the bit row segments by using an accumulation sub-unit to generate the pseudo-random character sequence sub-segment.

5. The method of claim 4, wherein, The logical operation of the matrix elements in different rows is performed in parallel by using a plurality of calculation sub-units, wherein the logical operation comprises performing logical operation on the row of matrix elements and the target pseudo-random sequence to generate a bit row segment.

6. The method of claim 1, wherein, The length of the temporary random number sequence is equal to the length of the original random number sequence; the length of the target random number sequence is less than the length of the original random number sequence, and the length of the new target pseudo-random sequence is the same as the length of the target pseudo-random sequence.

7. A streaming quantum random number generator device, comprising: The method comprises the following steps: a receiving module is configured to configure an initial pseudo-random sequence in response to a random number generation instruction, and generate a target pseudo-random sequence and a hash matrix according to the initial pseudo-random sequence; iteratively receiving a i-th original data block in each original random number sequence in a streaming manner; a seed management module comprising: a second generating submodule configured to generate a pseudo-random character sequence sub-segment of a clock cycle according to the target pseudo-random sequence and the hash matrix; a calculating module configured to calculate a temporary random sub-sequence of the clock cycle according to the pseudo-random character sequence sub-segment and the i-th original data block; an accumulating module comprising: a second generating unit configured to generate a temporary random number sequence according to a plurality of temporary random sub-sequences of a plurality of clock cycles stored in a register; a obtaining sub-unit configured to split the temporary random number sequence based on a length of the target pseudo-random sequence to obtain the target random number sequence and a new target pseudo-random sequence, so as to process a next original random number sequence by using the new target pseudo-random sequence.

8. An electronic device, comprising: comprising: one or more processors; a memory for storing one or more programs, wherein the one or more programs, when executed by the one or more processors, cause the one or more processors to implement the method of any one of claims 1 to 6.

9. A computer-readable storage medium having stored thereon executable instructions that cause a processor-based system to perform steps comprising: The instruction, when executed by the processor, causes the processor to implement the method of any one of claims 1 to 6.

10. A computer program product comprising a computer program, characterized in that, The computer program, when executed by the processor, implements the method according to any one of claims 1 to 6. The computer program, when executed by the processor, implements the method according to any one of claims 1 to 6.

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