Traffic control apparatus and method on a switch chip
By introducing QoS and signaling control units onto the switching chip, and combining pending transaction control and signaling request modes, the bandwidth and latency requirements of traditional switching chips in multi-port connected devices are solved, achieving efficient and reliable data transmission and resource optimization.
Patent Information
- Application Number
- CN202511445550.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-11
- Publication Date
- 2025-12-12
- Estimated Expiration
- 2045-10-11
AI Technical Summary
Traditional switching chips cannot meet the bandwidth and latency requirements of different devices when handling devices connected to multiple ports, leading to congestion and performance degradation. In particular, low-latency tasks may be blocked when handling mixed tasks such as video streaming or AI training, and the excessive number of logic levels makes it difficult for the physical design to converge.
By introducing QoS control units and signaling control units on the switching chip, precise control and priority management of traffic can be achieved through unfinished transaction control, transmission rate control and transaction delay control, combined with active and passive signaling request modes. Virtual channel management mode and pre-allocated signaling resources are adopted to optimize the data transmission path.
It effectively supports efficient access from multiple source nodes under different traffic requirements, reduces initial latency, improves transmission reliability and access efficiency, avoids uneven resource allocation and complexity, and meets the performance requirements of different devices.
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Figure CN120915735B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application relates to a flow control device and method on a switching chip, and belongs to the technical field of switching chips. BACKGROUND
[0002] The switching network on the switching chip is a key indicator of performance. In traditional design, the devices connected by each port have the same priority. At the same time, a polling arbitration method is used for arbitration of multiple ports. Due to different requirements of different devices for bandwidth and delay, congestion occurs in the switching network, which cannot meet the performance requirements of the devices. As disclosed in patent CN202210521547.0, "Network-on-chip architecture and related device, data transmission system", when arbitrating, the problem that low-latency tasks may be blocked when processing video streams or AI (artificial intelligence) training mixed tasks at the same time is not considered. In addition, the switching network generally uses a request, waiting, and response mode for transmission, which may cause too many logical levels and physical design convergence problems, thereby causing performance degradation.
[0003] Based on this, the application is proposed. SUMMARY
[0004] The application provides a flow control device and method on a switching chip, and the specific technical solutions are as follows:
[0005] In a first aspect, a flow control device on a switching chip comprises:
[0006] An input QoS control unit at the source node end provides QoS control for message transmission of the source node;
[0007] A primary switching network and a secondary switching network exchange transactions issued by nodes, obtain ID information according to addresses, and send to target ports;
[0008] A signaling control unit manages flow forwarding through a dedicated signaling channel;
[0009] An output QoS control unit at the destination node end performs QoS control on transactions that are about to access the destination node; the output QoS control unit at the destination node end performs priority regulation and storage on received transactions by implementing a virtual channel management mode for different flow requirements.
[0010] Further improvement, the input QoS control unit at the source node end comprises an unfinished transaction regulation module, a transaction sending rate regulation module, and a transaction delay regulation module;
[0011] The unfinished transaction regulation module is used to set an upper limit on the number of concurrent transactions for a given source node, implement flow limitation for devices that tolerate low delay for high bandwidth, and constrain unfinished transactions of the devices through a preset proportion threshold.
[0012] The transaction sending rate regulation module is used to control the maximum bandwidth of the connected source node, and its functions include quantitatively restricting the transaction sending rate of the source node based on the traffic specification mechanism and configuring the maximum data transmission amount in a specific time window;
[0013] The transaction delay regulation module is used to adjust the priority attribute of each transaction.
[0014] In a further improvement, the signaling control unit acquires signaling resources before the initiation of packet transmission, thereby establishing the access condition for transaction transmission.
[0015] In a further improvement, the signaling control unit has a pre-allocation signaling function and supports a pre-allocation signaling option, thereby eliminating the initialization delay of the first transmission and reserving system queue space for subsequent data transmission by reserving signaling resources in advance.
[0016] In a further improvement, the signaling control unit has an active request mode, including the following steps:
[0017] 1) The master node initiates a signaling request actively;
[0018] 2) After verifying the availability of resources, the signaling control unit sends a signaling to the master node, thereby completing the signaling return process;
[0019] 3) After obtaining the signaling authorization, the master node initiates transaction packet sending, thereby completing the data interaction process.
[0020] In a further improvement, the signaling control unit has a passive response mode, including the following steps:
[0021] 1) The master node initiates a transaction packet sending request directly;
[0022] 2) The signaling control unit monitors the system resource state in real time, and if the signaling resources are insufficient, the transmission is suspended, and the transaction packet sent by the master node is stored;
[0023] 3) The signaling control unit automatically triggers a signaling request process;
[0024] 4) After receiving the valid signaling returned from the slave node, resource locking is completed;
[0025] 5) The signaling control unit resumes the suspended transmission, so that the data transmission continues, and the transaction packet sending is completed.
[0026] In a second aspect, a traffic control method on a switching chip is provided, which is implemented by using the traffic control device on the switching chip, and includes the following steps:
[0027] The source node sends a transaction packet to an input QoS control unit at the source node end;
[0028] The input QoS control unit at the source node end regulates the input flow at the source node end:
[0029] An input transaction of a primary switching network is generated according to the regulated transaction window;
[0030] The primary switching network receives the transaction packet, applies for signaling, and receives the issued signaling after the application is accepted;
[0031] The signaling control unit manages the flow forwarding through a special signaling channel, and generates an input transaction of a secondary switching network;
[0032] The secondary switching network receives the transaction packet, applies for signaling, and receives the issued signaling after the application is accepted;
[0033] The signaling control unit manages the flow forwarding through a special signaling channel, and outputs the transaction of the secondary switching network to an output QoS control unit at the destination node end;
[0034] The output QoS control unit at the destination node end stores the received transaction packet, and controls the flow through a capacity threshold line;
[0035] The output QoS control unit at the destination node end sends the transaction packet to the destination node;
[0036] The input QoS control unit at the source node end regulates the input flow at the source node end, and generates an input transaction of a primary switching network;
[0037] The signaling control unit manages the flow forwarding through a special signaling channel, and generates an input transaction of a secondary switching network;
[0038] The signaling control unit manages the flow forwarding through a special signaling channel, and outputs the transaction of the secondary switching network to a lower module;
[0039] The output QoS control unit at the destination node end stores the received transaction packet, and controls the flow through a water level.
[0040] In a further improvement, the input QoS control unit at the source node end regulates the input flow through three modes of uncompleted transaction regulation, sending rate regulation and transaction delay regulation, the uncompleted transaction regulation is realized through an uncompleted transaction regulation module, the sending rate regulation is realized through a transaction sending rate regulation module, and the transaction delay regulation is realized through a transaction delay regulation module.
[0041] The present application has the following advantages:
[0042] 1. The application can support multiple source nodes to efficiently access the same destination node under different traffic requirements, avoiding the overhead and complexity of designing multiple ports for the destination node.
[0043] 2. The application reduces the initial delay and ensures transmission reliability by designing a dedicated signaling for the virtual channel.
[0044] 3. The application improves the access efficiency of nodes with different traffic requirements by setting the capacity of QoS values. BRIEF DESCRIPTION OF DRAWINGS
[0045] Figure 1 is a top-level architecture diagram of the switching chip system.
[0046] Figure 2 is a component diagram of the input QoS control unit of the source node end.
[0047] Figure 3 is a signaling active request mode diagram.
[0048] Figure 4 is a signaling passive response mode diagram.
[0049] Figure 5 is a diagram of the output QoS control unit of the destination node end.
[0050] Figure 6 is a capacity control diagram of the output QoS control unit of the destination node end. DETAILED DESCRIPTION
[0051] To make the purpose, technical solutions and advantages of the application clearer, the application will be further described in detail below in combination with the drawings and examples. It should be understood that the specific examples described here are only used to explain the application and do not limit the application.
[0052] Example 1
[0053] The application is aimed at devices connected to multiple ports on a switching chip, which have different traffic requirements. It provides a traffic control device on a switching chip, effectively solving the problem of uneven resource allocation caused by bandwidth competition among nodes. The switching chip system containing the traffic control device on the switching chip described in the application is shown in Figure 1 The application sets QoS (Quality of Service) control units and signaling control units inside the switching chip, specifically including:
[0054] 1. Source node and destination node: The source node and the destination node are devices connected externally to the switching chip. According to the device's demand for traffic, the source node is mainly divided into three types: high-bandwidth, high-latency-tolerant source node type 0 (referred to as source node 0) represented by GPU (graphics processing unit); source node type 1 (referred to as source node 1) represented by display devices that need real-time response; and low-bandwidth, low-latency-tolerant source node type 2 (referred to as source node 2) represented by CPU (central processing unit).
[0055] 2. Input QoS control unit at the source node end, mainly providing QoS control for message transmission of the source node.
[0056] The input QoS control unit at the source node end, as shown in Figure 2 , mainly includes an unfinished transaction control module, a transaction sending rate control module, and a transaction delay control module.
[0057] The unfinished transaction control module is used to set the upper limit of the number of concurrent transactions for a given source node, implement traffic limitation for high-bandwidth single-tolerant low-latency devices, and constrain their unfinished transactions through a pre-set proportion threshold. At the same time, the unfinished transaction control module can ensure that the queue reserves available space for high-priority, low-latency transactions, and avoid blocking the queue of critical transactions through a dynamic resource allocation mechanism.
[0058] The transaction sending rate control module is used to control the maximum bandwidth of the connected source node, and its functions include quantitatively constraining the transaction sending rate of the source node based on the traffic specification mechanism, and configuring the maximum data transmission amount within a specific time window. The transaction sending rate control module provides fine bandwidth allocation capability, and realizes traffic shaping of the source node sending behavior through a signaling algorithm.
[0059] The transaction delay control module is used to adjust the priority attribute of each transaction, and its effect mainly lies in providing a priority dynamic adjustment mechanism for delay-sensitive source nodes such as processors, which can assign different priorities according to transaction types or address space attributes. Through the priority rising and falling strategy triggered by the delay threshold, the service quality of delay-sensitive transactions is guaranteed, and the processing delay fluctuation of the critical path is reduced.
[0060] 3. Primary switching network and secondary switching network: The primary switching network and the secondary switching network mainly exchange transactions issued by nodes, obtain ID (identity marker) information according to the address, and send to the target port.
[0061] 4. Signaling control unit: The signaling control unit uses a signaling request system as the core mechanism of the internal protocol, realizes precise control of the message transmission process through ordered allocation and management of signaling resources, and the transmission of signaling is carried out through a dedicated channel, which is different from the channel for sending transaction packets. Its core technical features mainly lie in:
[0062] 4.1, Signaling control mechanism: Before the initiation of message transmission, signaling resources must be acquired to establish the access conditions for transaction transmission, effectively avoid bus resource conflicts, and ensure the orderliness and reliability of data transmission.
[0063] 4.2, Pre-allocation signaling function: Support pre-allocation signaling options, reserve signaling resources in advance, eliminate the initialization delay of the first transmission, and reserve system queue space for subsequent data transmission, significantly improving the transmission efficiency of high-priority transactions.
[0064] 4.3, The signaling control unit has two configurable working modes to adapt to the data transmission needs in different application scenarios. The transmission of signaling is paired, and the active request is called the master node, and the passive request is called the slave node.
[0065] Mode one: active request mode, as shown in Figure 3
[0066] ①, the master node initiates a signaling request;
[0067] ②, the signaling control unit verifies the availability of resources and sends a signaling to the master node, completing the signaling return process;
[0068] ③, the master node initiates transaction packet transmission after obtaining signaling authorization, completing the data interaction process.
[0069] This mode is suitable for scenarios with high requirements for transmission timing controllability, and resources are allocated on demand through the master node's independent application.
[0070] Mode two: passive response mode, as shown in Figure 4
[0071] ①, the master node directly initiates a transaction packet transmission request;
[0072] ②, the signaling control unit monitors the system resource state in real time, and if the signaling resources are insufficient, it will suspend transmission and store the transaction packet sent by the master node;
[0073] ③, the signaling control unit automatically triggers the signaling request process;
[0074] ④, after receiving the valid signaling returned by the slave node, the resource locking is completed;
[0075] ⑤, the signaling control unit resumes the suspended transmission to continue data transmission and complete the transmission of transaction packets.
[0076] This mode realizes dynamic balance and efficient use of bus resources through a dynamic response mechanism without affecting the master node's transmission initiation autonomy.
[0077] 5、Output QoS control unit of destination node end: the output QoS control unit of the destination node end mainly controls the QoS of the transaction about to access the destination node, and controls the priority and stores the received transaction by implementing the virtual channel management mode of different traffic requirements.
[0078] As shown in Figure 5 , the source nodes are divided into source node 0, source node 1 and source node 2 according to different traffic requirements, which correspond to three types of traffic requirements of GPU, Display (display device) and CPU respectively. When the devices of the three different traffic requirement types access the destination node at the same time, the paths of source node 0 accessing the destination node are defined as virtual channel C0, the paths of source node 1 accessing the destination node are defined as virtual channel C1, and the paths of source node 2 accessing the destination node are defined as virtual channel C2. The QoS control unit records the types of transactions about to arrive at the destination node and marks the transactions of different traffic requirements.
[0079] When the number of the same transaction type reaches a certain capacity, the transmission of the corresponding virtual channel is stopped by means of stop signaling. For example, when the number of the transmission of source node 0 reaches Figure 5 , the transmission of the corresponding channel is stopped, thereby stopping the transmission of virtual channel C0.
[0080] Similarly, when the transaction of virtual channel C2 reaches the critical line of the capacity, the transmission of the transaction of virtual channel C2 is also stopped.
[0081] Figure 5 0, 1 and 2 in the QoS control unit in represent the transaction packets sent by source node 0, source node 1 and source node 2 respectively, which are marked and stored in the QoS control unit.
[0082] Figure 6As shown, when the transaction capacity in the QoS control unit increases, its QoS tolerance decreases; assuming that the transaction QoS sent by source node 0 is 0x7, the transaction QoS sent by source node 1 is 0xF, the transaction QoS sent by source node 2 is 0xA, and the default QoS is 0x0, when the number of transactions in the QoS control unit is less than a certain threshold (the certain threshold can be configured and selected according to the scene), transactions with any QoS value can access; when the number of transactions stored in the QoS control unit reaches the capacity critical line 0, only transactions with a QoS value greater than or equal to 0x7 can access the destination node; when the number of transactions stored in the QoS control unit reaches the capacity critical line 1, only transactions with a QoS value greater than or equal to 0xA can access the destination node, at this time, since the QoS of source node 0 is 0x7, source node 0 will be blocked and cannot access the destination node; when the number of transactions stored in the QoS control unit reaches the capacity critical line 2, only transactions with a QoS value equal to 0xF can access the destination node, at this time, since the QoS of source node 2 is 0xA, source node 2 will be blocked and cannot access the destination node.
[0083] In the QoS (Quality of Service) protocol, the hexadecimal values 0x7, 0xF, 0xA, and 0x0 represent different priority states.
[0084] Embodiment 2
[0085] The flow of the traffic control method on the switch chip is as follows:
[0086] The source node sends a transaction packet to the input QoS control unit at the source node end;
[0087] The input QoS control unit at the source node end adjusts the entry end traffic: adjustment is performed in three ways, namely, uncompleted transaction adjustment, sending rate adjustment, and transaction delay adjustment; the uncompleted transaction adjustment is implemented by an uncompleted transaction adjustment module, the sending rate adjustment is implemented by a transaction sending rate adjustment module, and the transaction delay adjustment is implemented by a transaction delay adjustment module.
[0088] The first-level switching network generates input transactions according to the adjusted transaction windows;
[0089] The first-level switching network receives transaction messages, applies for signaling, and receives the issued signaling after the application is accepted;
[0090] The signaling control unit manages traffic forwarding through a dedicated signaling channel and generates input transactions of the second-level switching network;
[0091] The second-level switching network receives transaction messages, applies for signaling, and receives the issued signaling after the application is accepted;
[0092] The signaling control unit manages traffic forwarding through a dedicated signaling channel, and outputs the secondary switching network transaction to the output QoS control unit at the destination node end;
[0093] The output QoS control unit at the destination node end stores the received transaction packet, and performs traffic control through a capacity threshold line;
[0094] The output QoS control unit at the destination node end sends the transaction packet to the destination node;
[0095] The input QoS control unit at the source node end adjusts the source node entrance traffic, and generates the input transaction of the primary switching network;
[0096] The signaling control unit manages traffic forwarding through a dedicated signaling channel, and generates the input transaction of the secondary switching network;
[0097] The signaling control unit manages traffic forwarding through a dedicated signaling channel, and outputs the secondary switching network transaction to the lower-level module;
[0098] The output QoS control unit at the destination node end stores the received transaction packet, and performs traffic control through a water level.
[0099] The above merely describes the preferred embodiments of the present application and is not intended to limit the present application. Any modification, equivalent replacement, and improvement within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A flow control device on a switch chip, characterized in that, The application relates to a traffic control device on a switching chip, which comprises the following parts: an input QoS control unit at a source node end, which provides QoS control for message transmission of the source node; a primary switching network and a secondary switching network, which switch transactions sent by nodes, obtain ID information according to addresses, and send to target ports; a signaling control unit, which manages traffic forwarding through a special signaling channel; an output QoS control unit at a destination node end, which performs QoS control on transactions about to access the destination node; the output QoS control unit at the destination node end performs priority regulation and storage on received transactions through a virtual channel management mode of different traffic requirements; the input QoS control unit at the source node end comprises an unfinished transaction regulation module, a transaction sending rate regulation module and a transaction delay regulation module; the unfinished transaction regulation module is used for setting an upper limit of the number of concurrent transactions for a given source node, implementing traffic limitation for devices with high bandwidth but low delay tolerance, and restraining unfinished transactions of the devices through a preset proportion threshold; the transaction sending rate regulation module is used for controlling the maximum bandwidth of a connected source node, and functions of the transaction sending rate regulation module include quantitatively restraining the transaction sending rate of the source node based on a traffic specification mechanism and configuring the maximum data transmission amount in a specific time window; the transaction delay regulation module is used for adjusting the priority attribute of each transaction.
2. The flow control device on a switch chip according to claim 1, wherein: The signaling control unit acquires signaling resources before message transmission is initiated, so as to establish an access condition of transaction transmission.
3. The flow control device on a switch chip of claim 1, wherein: The signaling control unit has a pre-allocation signaling function and supports a pre-allocation signaling option, signaling resources are reserved in advance, initialization delay of the first transmission is eliminated, and system queue space is reserved for subsequent data transmission.
4. The traffic control device on a switch chip according to claim 1, wherein: The signaling control unit has an active request mode, which comprises the following steps: 1) a master node initiates a signaling request actively; 2) after verifying resource availability, the signaling control unit sends a signaling to the master node, and completes a signaling return process; 3) after obtaining a signaling authorization, the master node initiates transaction packet sending, and completes a data interaction process.
5. The flow control device on a switch chip of claim 1, wherein: The signaling control unit has a passive response mode, which comprises the following steps: 1) a master node directly initiates a transaction packet sending request; 2) the signaling control unit monitors system resource states in real time, and if signaling resources are insufficient, the signaling control unit suspends transmission and stores the transaction packet sent by the master node; 3) the signaling control unit automatically triggers a signaling request process; 4) after receiving valid signaling returned by a slave node, resource locking is completed; 5) the signaling control unit resumes the suspended transmission, so that data transmission continues, and transaction packet sending is completed.
6. A method of flow control on a switch chip, the method comprising: The application is implemented by using the traffic control device on the switching chip, which comprises the following steps: a source node sends a transaction packet to an input QoS control unit at a source node end; the input QoS control unit at the source node end adjusts inlet traffic; an input transaction of a primary switching network is generated according to a regulated transaction window; after receiving a transaction message, the primary switching network applies for signaling, and receives the sent signaling after the application is accepted; a signaling control unit manages traffic forwarding through a special signaling channel, and generates an input transaction of a secondary switching network; The secondary switching network receives the transaction message, applies for signaling, and receives the signaling issued after the application is accepted; The signaling control unit manages traffic forwarding through a dedicated signaling channel, and outputs the secondary switching network transaction to the output QoS control unit at the destination node end; The output QoS control unit at the destination node end stores the received transaction packet and controls the traffic through a capacity threshold line; The output QoS control unit at the destination node end sends the transaction packet to the destination node; The input QoS control unit at the source node end adjusts the source node entry traffic to generate the input transaction of the primary switching network; The signaling control unit manages traffic forwarding through a dedicated signaling channel to generate the input transaction of the secondary switching network; The signaling control unit manages traffic forwarding through a dedicated signaling channel to output the secondary switching network transaction to the lower module; The output QoS control unit at the destination node end stores the received transaction packet and controls the traffic through a water level.
7. The method of flow control on a switch chip according to claim 6, wherein: The input QoS control unit at the source node end adjusts the entry traffic through three modes of uncompleted transaction control, transaction sending rate control and transaction delay control, the uncompleted transaction control is realized through an uncompleted transaction control module, the transaction sending rate control is realized through a transaction sending rate control module, and the transaction delay control is realized through a transaction delay control module.
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