A low noise amplifier circuit with improved stability and increased linearity in bypass

Abstract

The application discloses an improved stability and increased bypass linearity low noise amplifier circuit and relates to the technical field of radio frequency integrated circuits.The circuit comprises an input matching module, a low noise amplification module, an output matching module, a bypass module, a common source switch module and a negative feedback virtual ground module.The common source switch module is arranged to cut off a leakage path according to the cooperative control of an enable signal and a MOS switch tube, so as to improve the linearity of the bypass mode, and the negative feedback virtual ground module is arranged to form a negative feedback loop network with the output matching module, and then the high-frequency signal is fed back from the negative feedback loop network, so as to solve the stability problem under high gain.

Description

Technical Field

[0001] This invention relates to the field of radio frequency integrated circuit technology, and specifically to a low-noise amplifier circuit that improves stability and bypass linearity. Background Technology

[0002] As a core module of the RF front-end, the manufacturing process of a low-noise amplifier (LNO) significantly impacts the overall system performance. In recent years, silicon-on-insulator (SOS) technology has gained considerable popularity, which involves fabricating semiconductor devices within a thin silicon film on an insulating substrate. Since most parasitic effects originate from the interaction between the substrate and the device, SOS technology completely isolates the device from the substrate, greatly reducing parasitic effects. SOS technology offers advantages such as high speed, low power consumption, high integration density, good radiation resistance, and low cost. However, with advancements in wireless communication technology, increasingly stringent requirements are placed on the gain and linearity of the bypass mode of LNO amplifiers. Current SOS-based LNO amplifiers suffer from the following shortcomings:

[0003] (1) Stability issues under high gain: The cascode structure is prone to oscillation due to parasitic effects at high frequencies;

[0004] (2) Insufficient bypass linearity: The power signal leaks to ground through the parasitic capacitance of the common source transistor, resulting in distortion of the bypass mode. Summary of the Invention

[0005] To address the aforementioned shortcomings in the prior art, this invention provides a low-noise amplifier circuit that improves stability and enhances bypass linearity.

[0006] To achieve the above-mentioned objectives, the technical solution adopted by this invention is as follows:

[0007] A low-noise amplifier circuit for improving stability and bypass linearity includes an input matching module, a low-noise amplification module, an output matching module, a bypass module, a common-source switching module, and a negative feedback virtual ground module.

[0008] The first port of the input matching module is connected to the RF signal input terminal after passing through the parasitic inductance of the first bonding wire; the second port of the input matching module is grounded; the third port of the input matching module is connected to the first port of the low noise amplifier module; and the fourth port of the input matching module is connected to the first port of the bypass module.

[0009] The second port of the low-noise amplifier module is connected to the first port of the common-source switch module, the third port of the low-noise amplifier module is connected to the first port of the output matching module, and the fourth port of the low-noise amplifier module is connected to the first port of the negative feedback virtual ground module.

[0010] The second port of the output matching module is connected to the second port of the negative feedback virtual ground module; the third port of the output matching module is connected in parallel with the second port of the bypass module after passing through a switch, and its parallel port is connected to the RF signal output terminal after passing through capacitor C7 and the parasitic inductance of the fifth bonding wire in sequence.

[0011] The second port of the common source switch module is grounded after passing through the parasitic inductance of the second bonding line; the common source switch module includes a MOS switch controlled by an enable signal; the common source switch module is used to cut off the leakage path according to the coordinated control of the enable signal and the MOS switch to improve the linearity of the bypass mode;

[0012] The negative feedback virtual ground module (501) is used to generate series resonance, form low impedance, provide an equivalent AC ground so that the amplifier has amplification function, and generate a negative feedback loop network with the output matching module (301) to solve the stability problem under high gain.

[0013] Furthermore, the input matching module includes capacitor C1, inductor L1, capacitor C2, and inductor L2; one end of capacitor C1 and one end of inductor L2 are connected in parallel to serve as the first port of the input matching module, the other end of capacitor C1 is connected through inductor L1 to serve as the second port of the input matching module, the other end of inductor L2 is connected through capacitor C2 to serve as the fourth port of the input matching module, and the other end of inductor L2 is connected through capacitor C2 to serve as the third port of the input matching module; the input matching module is used to receive radio frequency signals and cancel the input parasitic capacitance in the radio frequency signals under silicon-on-insulator process, so as to realize the matching power transmission of radio frequency signals to the low noise amplifier module.

[0014] Furthermore, the low-noise amplifier module includes a MOS RF transistor M1 and a MOS RF transistor M2; the gate of the MOS RF transistor M1 serves as the first port of the low-noise amplifier module, the source of the MOS RF transistor M1 serves as the second port of the low-noise amplifier module, the drain of the MOS RF transistor M1 is connected to the source of the MOS RF transistor M2, the drain of the MOS RF transistor M2 serves as the third port of the low-noise amplifier module of the MOS RF transistor M2, and the gate of the MOS RF transistor M2 serves as the fourth port of the low-noise amplifier module; the low-noise amplifier module is used to amplify the RF signal according to the common source common gate structure to generate an amplified RF signal.

[0015] Furthermore, the output matching module includes inductor L3, capacitor C5, and capacitor C6; one end of inductor L3 and one end of capacitor C5 are connected in parallel to serve as the first port of the output matching module, the other end of inductor L3 serves as the second port of the output matching module, the other end of capacitor C5 and one end of capacitor C6 are connected in parallel to serve as the third port of the output matching module, and the other end of capacitor C6 is grounded; the output matching module is used to form an impedance matching network, which, together with the negative feedback virtual ground module, optimizes the output impedance to the maximum saturation power point and transmits the amplified RF signal to the load.

[0016] Furthermore, the bypass module includes capacitor C3, switch SW1, switch SW2, switch SW3 and switch SW4; one end of capacitor C3 serves as the first port of the bypass module, and the other end of capacitor C3 passes through switch SW1, switch SW2, switch SW3 and switch SW4 in sequence to serve as the second port of the bypass module; the bypass module is used to control the RF signal flow according to the switches so as to directly pass the RF signal in bypass mode.

[0017] Furthermore, the common-source switch module includes an enable signal ctrl1, an enable signal ctrl2, a resistor R2, a MOS switch M3, and a MOS switch M4. The drain of the MOS switch M3 serves as the first port of the common-source switch module. The gate of the MOS switch M3 is connected to both one end of the resistor R2 and the drain of the MOS switch M4. The other end of the resistor R2 is connected to the enable signal ctrl1. The gate of the MOS switch M4 is connected to the enable signal ctrl2. The source of the MOS switch M4 is grounded. The source of the MOS switch M3 serves as the second port of the common-source switch module.

[0018] Furthermore, in the common-source switch module, the leakage path is cut off according to the coordinated control of the enable signal and the MOS switch to improve the linearity of the bypass mode. Specifically, in amplifier mode, the VG1 bias level is high, the enable signal ctrl1 is high, and the enable signal Ctrl2 is low. When the size of the MOS switch M3 is greater than 500um and less than 2000um, it does not affect the performance of the various indicators in amplifier mode. In bypass mode, the VG1 bias level is low, the enable signal ctrl1 is low, the enable signal ctrl2 is high, the MOS switch M4 is turned on, and the enable signal ctrl1 is connected to ground through the MOS switch M4, ensuring that the enable signal ctrl1 is connected to the gate of the MOS switch M3 at a low level, thus turning off the MOS switch M3 and improving the linearity of the bypass mode.

[0019] Furthermore, the negative feedback virtual ground module includes capacitor C4, capacitor C8, a third bond wire parasitic inductance, and a fourth bond wire parasitic inductance; one end of capacitor C4 serves as the first port of the negative feedback virtual ground module, and the other end of capacitor C4, one end of capacitor C8, and one end of the fourth bond wire parasitic inductance are all connected to the second port of the negative feedback virtual ground module, the other end of capacitor C8 is connected to one end of the third bond wire parasitic inductance, the other end of the third bond wire parasitic inductance is grounded, and the other end of the fourth bond wire parasitic inductance is connected to voltage VDD.

[0020] The present invention has the following beneficial effects:

[0021] (1) The present invention improves the linearity of the bypass mode by setting a common source switch module to cut off the leakage path according to the coordinated control of the enable signal and the MOS switch.

[0022] (2) The present invention sets up a negative feedback virtual ground module to generate a negative feedback loop network with the output matching module, thereby enabling the high-frequency signal to be fed back from the negative feedback loop network, so as to solve the stability problem under high gain. Attached Figure Description

[0023] Figure 1 A schematic diagram of a low-noise amplifier circuit structure that improves stability and bypass linearity;

[0024] Figure 2 This is a schematic diagram of the common-source switch module structure;

[0025] Figure 3 This is a schematic diagram of the negative feedback virtual ground module structure.

[0026] Explanation of reference numerals in the attached diagram: 101, Input matching module; 201, Low noise amplification module; 301, Output matching module; 401, Bypass module; 402, Common source switch module; 501, Negative feedback virtual ground module. Detailed Implementation

[0027] The specific embodiments of the present invention are described below to enable those skilled in the art to understand the present invention. However, it should be understood that the present invention is not limited to the scope of the specific embodiments. For those skilled in the art, various changes are obvious as long as they are within the spirit and scope of the present invention as defined and determined by the appended claims. All inventions utilizing the concept of the present invention are protected.

[0028] like Figure 1 As shown, a low-noise amplifier circuit for improving stability and bypass linearity includes an input matching module 101, a low-noise amplification module 201, an output matching module 301, a bypass module 401, a common-source switching module 402, and a negative feedback virtual ground module 501.

[0029] In an optional embodiment of the present invention, the first port of the input matching module 101 is connected to the RF signal input terminal RF_IN via the parasitic inductance bonding1 of the first bonding line; the second port of the input matching module 101 is grounded; the third port of the input matching module 101 is connected to the first port of the low noise amplifier module 201; and the fourth port of the input matching module 101 is connected to the first port of the bypass module 401. The input matching module 101 includes a capacitor C1, an inductor L1, a capacitor C2, and an inductor L2; one end of capacitor C1 and one end of inductor L2 are connected in parallel to serve as the first port of the input matching module 101; the other end of capacitor C1 is connected via inductor L1 to serve as the second port of the input matching module 101; the other end of inductor L2 is connected via capacitor C2 to serve as the fourth port of the input matching module 101; and the other end of inductor L2 is connected via capacitor C2 to serve as the third port of the input matching module 101. The input matching module 101 is used to receive RF signals and cancel the input parasitic capacitance in the RF signals under the silicon-on-insulator process to realize the matched power transmission of the RF signals to the low noise amplifier module 201.

[0030] In an optional embodiment of the present invention, the second port of the low-noise amplification module 201 is connected to the first port of the common-source switch module 402, the third port of the low-noise amplification module 201 is connected to the first port of the output matching module 301, and the fourth port of the low-noise amplification module 201 is connected to the first port of the negative feedback virtual ground module 501. The low-noise amplification module 201 includes a MOS RF transistor M1 and a MOS RF transistor M2; the gate of the MOS RF transistor M1 serves as the first port of the low-noise amplification module 201, the source of the MOS RF transistor M1 serves as the second port of the low-noise amplification module 201, the drain of the MOS RF transistor M1 is connected to the source of the MOS RF transistor M2, the drain of the MOS RF transistor M2 serves as the third port of the low-noise amplification module 201, and the gate of the MOS RF transistor M2 serves as the fourth port of the low-noise amplification module 201; the low-noise amplification module 201 is used to amplify the RF signal according to the common-source common-gate structure to generate an amplified RF signal.

[0031] In an optional embodiment of the present invention, the second port of the output matching module 301 is connected to the second port of the negative feedback virtual ground module 501; the third port of the output matching module 301 is connected in parallel with the second port of the bypass module 401 after a switch, and its parallel port is connected to the RF signal output terminal RF_OUT after passing through capacitor C7 and the fifth bonding wire parasitic inductance bonding5 in sequence. The output matching module 301 includes an inductor L3, a capacitor C5, and a capacitor C6; one end of the inductor L3 and one end of the capacitor C5 are connected in parallel to serve as the first port of the output matching module 301, the other end of the inductor L3 serves as the second port of the output matching module 301, the other end of the capacitor C5 and one end of the capacitor C6 are connected in parallel to serve as the third port of the output matching module 301, and the other end of the capacitor C6 is grounded; the output matching module 301 is used to form an impedance matching network, which works with the negative feedback virtual ground module 501 to optimize the output impedance to the maximum saturation power point and transmit the amplified RF signal to the load.

[0032] In an optional embodiment of the present invention, the bypass module 401 includes a capacitor C3, a switch SW1, a switch SW2, a switch SW3, and a switch SW4; one end of the capacitor C3 serves as the first port of the bypass module 401, and the other end of the capacitor C3 serves as the second port of the bypass module 401 after passing through the switches SW1, SW2, SW3, and SW4 in sequence; the bypass module 401 is used to control the RF signal flow according to the switches so as to directly pass the RF signal in the bypass mode.

[0033] In an optional embodiment of the present invention, the second port of the common-source switch module 402 is grounded to GND_LNA via the parasitic inductance of the second bonding line, bonding2. The common-source switch module 402 includes a MOS switch controlled by an enable signal. The common-source switch module 402 is used to cut off the leakage path according to the coordinated control of the enable signal and the MOS switch to improve the linearity of the bypass mode. The common-source switch module 402 includes an enable signal ctrl1, an enable signal ctrl2, a resistor R2, a MOS switch M3, and a MOS switch M4. The drain of the MOS switch M3 serves as the first port of the common-source switch module 402. The gate of the MOS switch M3 is connected to one end of the resistor R2 and the drain of the MOS switch M4. The other end of the resistor R2 is connected to the enable signal ctrl1. The gate of the MOS switch M4 is connected to the enable signal ctrl2. The source of the MOS switch M4 is grounded. The source of the MOS switch M3 serves as the second port of the common-source switch module 402.

[0034] like Figure 2As shown, when operating in bypass mode, the VG1 bias level is low, and the MOS RF transistor M1 is off. The signal flows from the RF signal input terminal RF_IN through capacitors C2 and C3 to the bypass path, and finally the signal is output from the RF signal output terminal RF_OUT. However, during operation, leakage still occurs in the path of MOS RF transistor M1, MOS RF transistor M2, MOS switch M3, and the parasitic inductance bonding3 of the third bonding line. The RF signal leaks through the parasitic capacitance of MOS RF transistor M1, forming a signal path from the RF signal input terminal RF_IN through inductor L2, capacitor C2, and MOS RF transistor M1 to ground, resulting in signal leakage and deterioration of the bypass linearity. This invention uses a designed common-source switch module 402 to avoid this signal leakage.

[0035] In the common-source switch module 402 of this invention, the leakage path is cut off according to the coordinated control of the enable signal and the MOS switch to improve the linearity of the bypass mode. Specifically: in amplifier mode, the bias level of VG1 is high, the enable signal ctrl1 is high, and the enable signal Ctrl2 is low. When the size of the MOS switch M3 is greater than 500um and less than 2000um, it does not affect the performance of various indicators in amplifier mode. In bypass mode, the bias level of VG1 is low, the enable signal ctrl1 is low, the enable signal ctrl2 is high, the MOS switch M4 is turned on, and the enable signal ctrl1 is grounded through the MOS switch M4, ensuring that the enable signal ctrl1 to the gate of the MOS switch M3 is low, thus turning off the MOS switch M3 and improving the linearity of the bypass mode.

[0036] In an optional embodiment of the present invention, the negative feedback virtual ground module 501 is used to generate series resonance, form low impedance, and provide an equivalent AC ground so that the amplifier has an amplification function. It also forms a negative feedback loop network with the output matching module 301 to solve the stability problem under high gain. The negative feedback virtual ground module 501 includes capacitor C4, capacitor C8, a third bond wire parasitic inductance, and a fourth bond wire parasitic inductance. One end of capacitor C4 serves as the first port of the negative feedback virtual ground module 501. The other end of capacitor C4, one end of capacitor C8, and one end of the fourth bond wire parasitic inductance (bonding4) are all connected to the second port of the negative feedback virtual ground module 501. The other end of capacitor C8 is connected to one end of the third bond wire parasitic inductance, which is grounded to GND_RF. The other end of the fourth bond wire parasitic inductance is connected to voltage VDD. In this invention, a series resonance is generated in the negative feedback virtual ground module 501 to form a low impedance and provide an equivalent AC ground, thereby enabling the amplifier to have an amplification function. Furthermore, a negative feedback loop network is generated with the output matching module 301 to solve the stability problem under high gain. Specifically, capacitor C4 in the negative feedback virtual ground module 501 and inductor L3 in the output matching module 301 form a negative feedback loop network, from which high-frequency signals are fed back to solve the stability problem under high gain. Additionally, capacitor C8 and the parasitic inductance bonding3 of the third bonding line generate a series resonance, forming a low impedance and providing an equivalent AC ground for inductor L3 and capacitor C4, thereby enabling the amplifier to have an amplification function.

[0037] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0038] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0039] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0040] Specific embodiments have been used to illustrate the principles and implementation methods of this invention. The descriptions of the embodiments above are only for the purpose of helping to understand the method and core ideas of this invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this invention. Therefore, the content of this specification should not be construed as a limitation of this invention.

[0041] Those skilled in the art will recognize that the embodiments described herein are intended to help the reader understand the principles of the invention, and should be understood that the scope of protection of the invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific modifications and combinations based on the technical teachings disclosed in this invention without departing from the spirit of the invention, and these modifications and combinations are still within the scope of protection of this invention.

Claims

1. A low-noise amplifier circuit that improves stability and bypass linearity, characterized in that, It includes an input matching module (101), a low-noise amplification module (201), an output matching module (301), a bypass module (401), a common-source switch module (402), and a negative feedback virtual ground module (501). The first port of the input matching module (101) is connected to the radio frequency signal input terminal after passing through the parasitic inductance of the first bonding wire. The second port of the input matching module (101) is grounded. The third port of the input matching module (101) is connected to the first port of the low noise amplifier module (201). The fourth port of the input matching module (101) is connected to the first port of the bypass module (401). The second port of the low noise amplifier module (201) is connected to the first port of the common source switch module (402), the third port of the low noise amplifier module (201) is connected to the first port of the output matching module (301), and the fourth port of the low noise amplifier module (201) is connected to the first port of the negative feedback virtual ground module (501). The second port of the output matching module (301) is connected to the second port of the negative feedback virtual ground module (501); the third port of the output matching module (301) is connected in parallel with the second port of the bypass module (401) after passing through a switch, and its parallel port is connected to the RF signal output terminal after passing through capacitor C7 and the parasitic inductance of the fifth bonding wire in sequence. The second port of the common source switch module (402) is grounded after passing through the parasitic inductance of the second bonding line; the common source switch module (402) includes a MOS switch controlled by an enable signal; The common-source switch module (402) is used to cut off the leakage path according to the coordinated control of the enable signal and the MOS switch to improve the linearity of the bypass mode; The negative feedback virtual ground module (501) is used to generate series resonance, form low impedance, provide an equivalent AC ground so that the amplifier has amplification function, and generate a negative feedback loop network with the output matching module (301) to solve the stability problem under high gain.

2. The low-noise amplifier circuit for improving stability and bypass linearity according to claim 1, characterized in that, The input matching module (101) includes capacitor C1, inductor L1, capacitor C2 and inductor L2; one end of capacitor C1 and one end of inductor L2 are connected in parallel to serve as the first port of the input matching module (101), the other end of capacitor C1 is connected through inductor L1 to serve as the second port of the input matching module (101), the other end of inductor L2 is connected through capacitor C2 to serve as the fourth port of the input matching module (101), and the other end of inductor L2 is connected through capacitor C2 to serve as the third port of the input matching module (101); the input matching module (101) is used to receive radio frequency signals and cancel the input parasitic capacitance in the radio frequency signals under silicon-on-insulator process, so as to realize the matching power transmission of radio frequency signals to the low noise amplifier module (201).

3. The low-noise amplifier circuit for improving stability and bypass linearity according to claim 1, characterized in that, The low-noise amplifier module (201) includes a MOS RF transistor M1 and a MOS RF transistor M2; The gate of MOS RF transistor M1 serves as the first port of the low-noise amplifier module (201), the source of MOS RF transistor M1 serves as the second port of the low-noise amplifier module (201), the drain of MOS RF transistor M1 is connected to the source of MOS RF transistor M2, the drain of MOS RF transistor M2 serves as the third port of the low-noise amplifier module (201) of MOS RF transistor M2, and the gate of MOS RF transistor M2 serves as the fourth port of the low-noise amplifier module (201); the low-noise amplifier module (201) is used to amplify the RF signal according to the common source and common gate structure to generate an amplified RF signal.

4. The low-noise amplifier circuit for improving stability and bypass linearity according to claim 1, characterized in that, The output matching module (301) includes an inductor L3, a capacitor C5, and a capacitor C6. One end of the inductor L3 and one end of the capacitor C5 are connected in parallel to serve as the first port of the output matching module (301), the other end of the inductor L3 serves as the second port of the output matching module (301), the other end of the capacitor C5 and one end of the capacitor C6 are connected in parallel to serve as the third port of the output matching module (301), and the other end of the capacitor C6 is grounded. The output matching module (301) is used to form an impedance matching network, which works in conjunction with the negative feedback virtual ground module (501) to optimize the output impedance to the maximum saturation power point and transmit the amplified RF signal to the load.

5. The low-noise amplifier circuit for improving stability and bypass linearity according to claim 1, characterized in that, The bypass module (401) includes a capacitor C3, a switch SW1, a switch SW2, a switch SW3 and a switch SW4; one end of the capacitor C3 serves as the first port of the bypass module (401), and the other end of the capacitor C3 serves as the second port of the bypass module (401) after passing through the switches SW1, SW2, SW3 and SW4 in sequence; the bypass module (401) is used to control the RF signal flow according to the switches so as to pass the RF signal directly in the bypass mode.

6. The low-noise amplifier circuit for improving stability and bypass linearity according to claim 1, characterized in that, The common-source switch module (402) includes an enable signal ctrl1, an enable signal ctrl2, a resistor R2, a MOS switch M3, and a MOS switch M4. The drain of the MOS switch M3 serves as the first port of the common-source switch module (402). The gate of the MOS switch M3 is connected to one end of the resistor R2 and the drain of the MOS switch M4. The other end of the resistor R2 is connected to the enable signal ctrl1. The gate of the MOS switch M4 is connected to the enable signal ctrl2. The source of the MOS switch M4 is grounded. The source of the MOS switch M3 serves as the second port of the common-source switch module (402).

7. The low-noise amplifier circuit for improving stability and bypass linearity according to claim 6, characterized in that, In the common-source switch module (402), the leakage path is cut off according to the coordinated control of the enable signal and the MOS switch to improve the linearity of the bypass mode. Specifically, in amplifier mode, the bias level of VG1 is high, the enable signal ctrl1 is high, and the enable signal Ctrl2 is low. When the size of the MOS switch M3 is greater than 500um and less than 2000um, it does not affect the performance of the various indicators of the amplifier mode. In bypass mode, the bias level of VG1 is low, the enable signal ctrl1 is low, the enable signal ctrl2 is high, the MOS switch M4 is turned on, and the enable signal ctrl1 is grounded through the MOS switch M4, ensuring that the enable signal ctrl1 is low at the gate of the MOS switch M3, so that the MOS switch M3 is turned off, thereby improving the linearity of the bypass mode.

8. The low-noise amplifier circuit for improving stability and bypass linearity according to claim 1, characterized in that, The negative feedback virtual ground module (501) includes capacitor C4, capacitor C8, third bond wire parasitic inductance, and fourth bond wire parasitic inductance. One end of capacitor C4 serves as the first port of the negative feedback virtual ground module (501). The other end of capacitor C4, one end of capacitor C8, and one end of the fourth bond wire parasitic inductance are all connected to the second port of the negative feedback virtual ground module (501). The other end of capacitor C8 is connected to one end of the third bond wire parasitic inductance. The other end of the third bond wire parasitic inductance is grounded, and the other end of the fourth bond wire parasitic inductance is connected to voltage VDD.

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