Communication method and communication device

By using differences in the time length and number of elements of a specific sequence in backscatter communication devices, the implementation problem of frequency division multiple access was solved, improving the utilization rate and capacity of transmission resources.

CN120934945APending Publication Date: 2025-11-11HUAWEI TECH CO LTD
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Patent Information

Application Number
CN202410579879.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-05-10
Publication Date
2025-11-11

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Abstract

Disclosed are a communication method and a communication device, the method relating to the technical field of communications, the method comprising: a terminal device determines a first sequence, and then the terminal device sends a second sequence; wherein the second sequence is determined according to the first bit and the first sequence, the first sequence is one of a plurality of sequences, any two sequences of the plurality of sequences respectively occupy the same time length, and any two sequences of the plurality of sequences respectively occupy different time lengths by one element; any two sequences in the plurality of sequences respectively comprise different element numbers. Based on the method, the equipment adopting backscattering can realize frequency division multiple access, and the utilization rate of resources can be improved.
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Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to communication methods and communication devices. Background Technology

[0002] The rapid development of the Internet of Things (IoT) technology is making the interconnection of everything a reality. However, the battery life issue of IoT terminal devices greatly increases the difficulty and cost of maintenance, becoming a major bottleneck restricting the development of IoT. Therefore, battery-free IoT terminal devices are an important evolutionary trend for the next generation of IoT. Ambient IoT (A-IoT), also known as passive IoT (P-IoT), is a cellular IoT communication technology that supports battery-free terminals.

[0003] An A-IoT communication system typically includes A-IoT devices and a base station. A-IoT devices communicate using backscattering, which leverages the reflective properties of objects to transmit information via reflected signals. Specifically, the base station sends a signal to the A-IoT device. Upon receiving the signal, the A-IoT device reflects it using its antenna, creating a new signal. The base station then receives this reflected signal and interprets the changes in the reflected signal to extract information.

[0004] However, with the development of technology, the resources available for transmission are becoming increasingly scarce. Frequency Division Multiple Access (FDMA) is a multiple access technology that uses different frequencies to divide the network into different channels. Different users can use different channels to communicate, thereby improving the utilization rate of transmission resources. However, devices using backscatter communication cannot control the frequency of the transmitted signal. Therefore, how to implement FDMA in devices using backscatter communication to improve the utilization rate of transmission resources is a technical problem that urgently needs to be solved. Summary of the Invention

[0005] This application provides a communication method and a communication device that enables devices using backscattering to achieve frequency division multiple access, which is beneficial to improving resource utilization.

[0006] Firstly, this application provides a communication method that can be executed by a terminal device. The terminal device can refer to the terminal device itself, or a processor, module, chip, or chip system within the terminal device that implements the method. The method includes: determining a first sequence, and then sending a second sequence; wherein the second sequence is determined based on a first bit and the first sequence, the first sequence is one of multiple sequences, any two sequences occupy the same time length, any two elements in any two sequences occupy different time lengths, and any two sequences include different numbers of elements.

[0007] Based on the method described in the first aspect, the first bit can be understood as an information bit, and the second sequence carries the first bit. It can be understood that the terminal device uses the first sequence to process the first bit to obtain the second sequence, thereby realizing the movement of the frequency position of the terminal device's transmission bandwidth. Since the first sequence belongs to multiple sequences, the movement of the frequency position corresponding to any two sequences in these multiple sequences is different. Therefore, the effect of FDMA can be achieved based on these multiple sequences, which is beneficial to improving the utilization rate of transmission resources.

[0008] In one possible implementation, determining the first sequence can be achieved by receiving first configuration information, which is used to determine the first sequence. It is understood that the terminal device can determine the first sequence based on the first configuration information. The first configuration information can configure a set of parameters, including the number of elements in the first sequence and the time duration occupied by each element in the first sequence. Alternatively, the first configuration information can configure a sequence of the first sequence and the time duration occupied by each element in the first sequence.

[0009] In this invention, the duration of a sequence can be understood as the duration of the sequence in the time domain; the duration of an element in the sequence can be understood as the chip, time unit, or unit time unit required to transmit that element. The duration of an element in the sequence can also be described as: time unit length, chip length, chip repetition count, or unit chip repetition count. Alternatively, the duration of an element can be implicitly described by the rate, for example, the reciprocal of the rate being the duration of an element, which can be described as: chip rate, switching rate, or square wave switching rate. The number of elements in the sequence can also be described as: half the number of time units, half the number of chips, half the number of levels, the number of high-level chips + low-level chips, the number of square wave repetitions, or the number of square wave cycles.

[0010] In one possible implementation, the multiple sequences also include a third sequence, where the time length occupied by an element in the first sequence is T1, the number of elements in the first sequence is N1, the time length occupied by an element in the third sequence is T2, the number of elements in the third sequence is N2, and the time length occupied by the first sequence is T = T1 × N1, T = T2 × N2.

[0011] Optionally, the method further includes: sending a sixth sequence; wherein the sixth sequence is determined based on the fourth bit and the third sequence, since the third sequence is a sequence different from the first sequence among multiple sequences. Because the third sequence and the first sequence are different, their frequency shift ranges are different. Therefore, based on this implementation, the terminal device can send different signals to the network device at different frequency positions, improving the utilization of transmission resources and transmission capacity.

[0012] The sixth sequence may be sent simultaneously with the second sequence, or it may not be sent simultaneously. For the case where the sixth sequence and the second sequence are not sent simultaneously, for example, assuming the second sequence is sent before the sixth sequence, after sending the second sequence, the network device can send a configuration instruction to the terminal device to send the signal using the third sequence. After receiving and determining the configuration instruction, the terminal device determines the sixth sequence based on the fourth bit and the third sequence, and then sends the sixth sequence.

[0013] In one possible implementation, each of the multiple sequences is a square wave sequence, which is a sequence in which high and low levels alternate.

[0014] In one possible implementation, the second sequence and the first bit are repeated N1 times, and then XORed with the first sequence to obtain the same sequence; alternatively, the second sequence and the first bit are multiplied with the first sequence to obtain the same sequence; where N1 is the number of elements in the first sequence. Based on this implementation, the second sequence can be obtained directly from the first bit and the first sequence without the need for a line code encoding module. The frequency shifting effect is achieved through the first sequence, which is simple to implement and helps reduce the complexity and power consumption of the device implementation.

[0015] In one possible implementation, the method further includes: encoding the first bit with a line code to obtain a second bit and a third bit, with the second bit preceding the third bit; wherein the second sequence includes a fourth sequence and a fifth sequence, with the fourth sequence preceding the fifth sequence; the sequence obtained by XORing the fourth sequence and the second bit, repeated N1 times, with the first sequence is the same, and the sequence obtained by XORing the fifth sequence and the third bit, repeated N1 times, with the first sequence is the same, where N1 is the number of elements included in the first sequence; or, the sequence obtained by multiplying the fourth sequence and the second bit with the first sequence is the same, and the sequence obtained by multiplying the fifth sequence and the third bit with the first sequence is the same. Further optionally, the line code encoding is one of Manchester encoding, FM0 encoding, or Miller encoding. Based on this implementation, the first bit is processed by line code encoding and then combined with the first sequence to obtain the second sequence. The first sequence achieves the frequency shifting effect. The terminal device can use any line code encoding, such as Manchester encoding, FM0 encoding, or Miller encoding, to achieve the FDMA effect, improving the flexibility of the scheme.

[0016] In one possible implementation, the transmission bandwidth corresponding to sending the second sequence is associated with the duration occupied by the second sequence. Further optionally, the transmission bandwidth corresponding to sending the second sequence is twice the reciprocal of the duration occupied by the second sequence.

[0017] Secondly, this application provides a communication method that can be executed by a network device. This network device can refer to the network device itself, or a processor, module, chip, or chip system within the network device that implements the method. The method includes: receiving a second sequence; obtaining a first bit based on a first sequence and the second sequence, wherein the first sequence is one of a plurality of sequences, any two sequences in the plurality of sequences occupy the same time length, any two elements in any two sequences in the plurality of sequences occupy different time lengths, and any two sequences in the plurality of sequences include different numbers of elements.

[0018] The beneficial effects of the second aspect can be found in the description corresponding to the first aspect above, and will not be repeated here.

[0019] In one possible implementation, before receiving the second sequence, the method further includes: sending first configuration information, the first configuration information being used to determine the first sequence. The first configuration information may configure a set of parameters, wherein the set of parameters includes the number of elements in the first sequence and the time duration occupied by the elements of the first sequence. Alternatively, the first configuration information may configure a sequence of the first sequence and the time duration occupied by the elements of the first sequence.

[0020] In this invention, the duration of a sequence can be understood as the duration of the sequence in the time domain; the duration of an element in the sequence can be understood as the chip, time unit, or unit time unit required to transmit that element. The duration of an element in the sequence can also be described as: time unit length, chip length, chip repetition count, or unit chip repetition count. Alternatively, the duration of an element can be implicitly described by the rate, for example, the reciprocal of the rate being the duration of an element, which can be described as: chip rate, switching rate, or square wave switching rate. The number of elements in the sequence can also be described as: half the number of time units, half the number of chips, half the number of levels, the number of high-level chips + low-level chips, the number of square wave repetitions, or the number of square wave cycles.

[0021] In one possible implementation, the multiple sequences also include a third sequence, where the time length occupied by an element in the first sequence is T1, the number of elements in the first sequence is N1, the time length occupied by an element in the third sequence is T2, the number of elements in the third sequence is N2, and the time length occupied by the first sequence is T = T1 × N1, T = T2 × N2.

[0022] In one possible implementation, the method further includes: receiving a sixth sequence, and then determining a fourth bit based on the sixth sequence and a third sequence. The third sequence is a sequence different from the first sequence among multiple sequences. The sixth sequence and the second sequence may be received simultaneously or not simultaneously, and may come from the same terminal device or different terminal devices. Since the third sequence and the first sequence are different, the frequency shift ranges of the corresponding third sequence and the first sequence are different. Therefore, the frequency positions at which the network device receives the sixth sequence and the second sequence can be different, improving the utilization of transmission resources and transmission capacity.

[0023] In one possible implementation, each of the multiple sequences is a square wave sequence, which is a sequence in which high and low levels alternate.

[0024] In one possible implementation, the sequence obtained by XORing the second sequence and the first bit with the first sequence after repeating them N1 times is the same, or the sequence obtained by multiplying the second sequence and the first bit with the first sequence is the same; where N1 is the number of elements included in the first sequence.

[0025] In one possible implementation, the first bit is obtained based on the first and second sequences. Specifically, the second and third bits are decoded using the line code to obtain the first bit, with the second bit preceding the third bit. The second sequence includes a fourth and a fifth sequence, with the fourth sequence preceding the fifth sequence. The sequence obtained by XORing the fourth and second bits (repeated N1 times) with the first sequence is identical; similarly, the sequence obtained by XORing the fifth and third bits (repeated N1 times) with the first sequence is identical, where N1 is the number of elements in the first sequence. Alternatively, the sequence obtained by multiplying the fourth and second bits with the first sequence is identical, as is the sequence obtained by multiplying the fifth and third bits with the first sequence. Further optionally, the line code encoding is one of Manchester encoding, FM0 encoding (double-phase space code), or Miller encoding.

[0026] In one possible implementation, the transmission bandwidth corresponding to receiving the second sequence is associated with the duration occupied by the second sequence. Further optionally, the transmission bandwidth corresponding to sending the second sequence is twice the reciprocal of the duration occupied by the second sequence.

[0027] Thirdly, this application provides a communication method that can be executed by a terminal device. The terminal device can refer to the terminal device itself, or a processor, module, chip, or chip system within the terminal device that implements the method. The method includes: determining a first sequence, wherein any two sequences in the multiple sequences occupy the same time length, any one element of any two sequences in the multiple sequences occupies a different time length, each sequence in the multiple sequences is obtained by repeating a base sequence multiple times, and any two sequences in the multiple sequences are repeated a different number of times based on the base sequence; and transmitting the first sequence, wherein the first sequence carries a first bit.

[0028] Based on the method described in the third aspect, since the time length occupied by each element of any two sequences in the plurality of sequences is different, and the number of repetitions of each of any two sequences based on the base sequence is different, the time length occupied by each of any two sequences in the plurality of sequences is the same, and thus it can be determined that the number of elements included in any two sequences in the plurality of sequences is different, thereby enabling any two sequences in the plurality of sequences to be carried at different frequency positions when the plurality of sequences are transmitted, which is beneficial to improving the utilization rate of transmission resources.

[0029] In one possible implementation, the base sequence is a codeword sequence obtained by encoding the first bit using a line code. Further optionally, the base sequences corresponding to the first bit being "1" and the first bit being "0" are different.

[0030] In one possible implementation, first configuration information is received, the parameters of which include the duration of an element's occupation and the number of repetitions of the base sequence. The product of the duration of an element's occupation and the number of repetitions of the base sequence is the same for any two sequences. Alternatively, the parameters configured in the first configuration information include the duration of an element's occupation in a square wave sequence and the sequence following the repetition of the base sequence. The number of repetitions of the base sequence can also be described as the number of repetitions of the line codeword.

[0031] The duration of a sequence can be understood as the time domain of that sequence. The duration of an element in the sequence can be understood as the chip, time unit, or unit of time required to transmit that element. The duration of an element in the sequence can also be described as: time unit length, chip length, chip repetition count, or unit chip repetition count. Alternatively, the duration of an element can be implicitly described by the rate; for example, the reciprocal of the rate is the duration of an element, which can be described as: chip rate, switching rate, or square wave switching rate.

[0032] In one possible implementation, the multiple sequences also include a second sequence, where the time length occupied by an element in the first sequence is T1, the number of elements in the first sequence is N1, the time length occupied by an element in the second sequence is T2, the number of elements in the second sequence is N2, and the time length of the first sequence is T = T1 × N1, T = T2 × N2.

[0033] Optionally, the method further includes: sending a second sequence, which is one of a plurality of sequences different from the first sequence, the second sequence carrying a second bit. Since the frequency shifting effects corresponding to the first and second sequences are different, the terminal device can send different signals to the network device at different frequency positions, improving the utilization of transmission resources and transmission capacity.

[0034] In one possible implementation, the transmission bandwidth corresponding to sending the first sequence is associated with the duration occupied by the first sequence. Further optionally, the transmission bandwidth corresponding to sending the first sequence is twice the reciprocal of the duration occupied by the first sequence.

[0035] Fourthly, this application provides a communication method that can be executed by a network device. This network device can refer to the network device itself, or a processor, module, chip, or chip system within the network device that implements the method. The method includes: receiving a first sequence, the first sequence carrying a first bit, the first sequence being one of a plurality of sequences, any two sequences occupying the same time length, any two sequences occupying different time lengths for each element, each sequence being obtained by repeating a base sequence multiple times, and any two sequences being repeated a different number of times based on the base sequence.

[0036] The beneficial effects corresponding to the fourth aspect can be found in the description of the third aspect above, and will not be repeated here.

[0037] In one possible implementation, the first bit is obtained by decoding the base sequence using line code. Further, alternatively, the base sequence corresponding to the first bit being "1" is different from the base sequence corresponding to the first bit being "0".

[0038] In one possible implementation, first configuration information is sent, which configures parameters including the duration of an element's occupation and the number of repetitions of the base sequence. The product of the duration of an element's occupation and the number of repetitions of the base sequence is the same for any two sequences. Alternatively, the first configuration information configures parameters including the duration of an element's occupation in a square wave sequence and the sequence following the repetition of the base sequence. The number of repetitions of the base sequence can also be described as the number of repetitions of the line codeword.

[0039] The duration of a sequence can be understood as the time domain of that sequence. The duration of an element in the sequence can be understood as the chip, time unit, or unit of time required to transmit that element. The duration of an element in the sequence can also be described as: time unit length, chip length, chip repetition count, or unit chip repetition count. Alternatively, the duration of an element can be implicitly described by the rate; for example, the reciprocal of the rate is the duration of an element, which can be described as: chip rate, switching rate, or square wave switching rate.

[0040] In one possible implementation, the multiple sequences also include a second sequence, where the time length occupied by an element in the first sequence is T1, the number of elements in the first sequence is N1, the time length occupied by an element in the second sequence is T2, the number of elements in the second sequence is N2, and the time length of the first sequence is T = T1 × N1, T = T2 × N2.

[0041] Optionally, the method further includes: receiving a second sequence, which is one of a plurality of sequences different from the first sequence; and transmitting the second sequence, the second sequence carrying a second bit. The second sequence and the first sequence may be received simultaneously or not simultaneously, and may originate from the same terminal device or different terminal devices. Since the frequency shifting effects corresponding to the first and second sequences are different, the network device can receive the second sequence at different frequency positions than the first sequence, thereby improving the utilization of transmission resources and transmission capacity.

[0042] In one possible implementation, the transmission bandwidth corresponding to receiving the first sequence is associated with the duration of the first sequence. Further optionally, the transmission bandwidth corresponding to receiving the first sequence is twice the reciprocal of the duration of the first sequence.

[0043] Fifthly, this application provides a communication device, which may also be a chip system. The communication device can execute the first or third aspect and their possible implementations. The functions of the communication device can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more units or modules corresponding to the above functions. The unit or module can be software and / or hardware. The operations performed by the communication device and its beneficial effects can be found in the descriptions of the first or third aspect above, and will not be repeated here.

[0044] Sixthly, this application provides a communication device, which may also be a chip system. The communication device can execute the second or fourth aspect and their possible implementations. The functions of the communication device can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more units or modules corresponding to the above functions. The unit or module can be software and / or hardware. The operations performed by the communication device and its beneficial effects can be found in the descriptions of the second or fourth aspect above, and will not be repeated here.

[0045] In a seventh aspect, this application provides a communication device, the communication device including a processor, which, when the processor calls a computer program in memory, executes the method described in any one of the first to fourth aspects and its possible implementations.

[0046] In one possible implementation, the communication device further includes a memory coupled to the processor. Optionally, the memory is integrated with the processor.

[0047] In one possible implementation, the communication device further includes a transceiver for sending and receiving data and / or signaling.

[0048] Eighthly, this application provides a communication device, which includes a processor and an interface circuit. The interface circuit is used to receive signals from other communication devices outside the communication device and transmit them to the processor, or to send signals from the processor to other communication devices outside the communication device. The processor is used to implement the method described in any one of the first to fourth aspects and its possible implementations through logic circuits or execution code instructions.

[0049] Ninthly, this application provides a chip including a processor and a communication interface, wherein the processor is configured to cause the chip to perform the method described in any one of the first to fourth aspects above, and the possible implementation thereof.

[0050] In a tenth aspect, this application provides a computer-readable storage medium storing a computer program or instructions that, when executed by a communication device, implement the method described in any one of the first to fourth aspects and its possible implementations.

[0051] In one aspect, embodiments of this application provide a computer program or computer program product, including code or instructions, which, when executed on a computer, cause the computer to perform the method described in any one of the first to fourth aspects and its possible implementations.

[0052] In a twelfth aspect, embodiments of this application provide a communication system comprising the communication apparatus described above for performing the method of the first aspect and the communication apparatus described above for performing the method of the second aspect; or, the communication system comprising the communication apparatus described above for performing the method of the third aspect and the communication apparatus described above for performing the method of the fourth aspect. Attached Figure Description

[0053] Figure 1 A schematic diagram of a communication system provided in an embodiment of this application;

[0054] Figure 2A A schematic diagram of a system architecture for a communication system provided in an embodiment of this application;

[0055] Figure 2B A schematic diagram of the system architecture of another communication system provided in the embodiments of this application;

[0056] Figure 3A A schematic diagram of the chip architecture of device 1 provided in the embodiments of this application;

[0057] Figure 3B A schematic diagram of the chip architecture of device 2b provided in the embodiments of this application;

[0058] Figure 4A flowchart illustrating a communication method provided in an embodiment of this application;

[0059] Figure 5A A schematic diagram of the sequence provided in the embodiments of this application;

[0060] Figure 5B A schematic diagram illustrating the frequency shifting effect of the sequence provided in the embodiments of this application;

[0061] Figure 6 A schematic diagram illustrating the FM0 codeword transition states provided in an embodiment of this application;

[0062] Figure 7 A schematic diagram illustrating the Miller codeword transition states provided in an embodiment of this application;

[0063] Figure 8 A flowchart illustrating yet another communication method provided in an embodiment of this application;

[0064] Figure 9 A schematic diagram of the sequence provided in the embodiments of this application;

[0065] Figure 10 This is a schematic diagram of the structure of a communication device provided in an embodiment of this application;

[0066] Figure 11 This is a schematic diagram of the structure of another communication device provided in the embodiments of this application;

[0067] Figure 12 This is a schematic diagram of the structure of a chip provided in an embodiment of this application. Detailed Implementation

[0068] The specific embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0069] The terms "first" and "second," etc., used in the specification, claims, and drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such processes, methods, products, or apparatus.

[0070] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0071] In this application, "at least one (item)" refers to one or more, "more than one" refers to two or more, "at least two (items)" refers to two or three or more, and "and / or" is used to describe the correspondence between related objects, indicating that there can be three relationships. For example, "A and / or B" can mean: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the related objects before and after are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0072] Figure 1 This is an example of a communication system applicable to embodiments of this application. The communication system includes at least one network device and at least one terminal device. Figure 1 The example uses a network device and multiple terminal devices. These terminal devices can be cellular phones, smartphones, laptops, handheld communication devices, handheld computing devices, satellite radio devices, GPS devices, personal digital assistants (PDAs), and / or any other suitable devices for communication over a wireless communication system, all of which can connect to the network device. These terminal devices can all communicate with the network device; in addition, they can also communicate with each other. Figure 1 The number of terminal devices and network devices mentioned is just an example; there could be fewer or more. It is understood that the communication system may also include other devices, such as core network equipment, relay equipment, and wireless backhaul equipment. This application does not limit the types of other devices that may be included in the communication system.

[0073] The terminal device involved in the embodiments of this application, which can also be simply referred to as a terminal, is an entity on the user side used to receive or transmit signals. A terminal device can be a device that provides voice and / or data connectivity to a user, such as a handheld device with wireless connectivity, an in-vehicle device, etc. A terminal device can also be other processing devices connected to a wireless modem. The terminal device can communicate with a radio access network (RAN). A terminal device can also be referred to as a wireless terminal, subscriber unit, subscriber station, mobile station, mobile station, remote station, access point, remote terminal, access terminal, user terminal, user agent, user device, or User Equipment (UE), etc. A terminal device can be a mobile terminal, such as a mobile phone (or "cellular" phone) and a computer with a mobile terminal, for example, a portable, pocket-sized, handheld, computer-embedded, or in-vehicle mobile device that exchanges voice and / or data with the radio access network. For example, the terminal device can also be a personal communication service (PCS) telephone, a cordless phone, a session initiation protocol (SIP) phone, a wireless local loop (WLL) station, a personal digital assistant (PDA), or other similar devices. Common terminal devices include mobile phones, tablets, laptops, PDAs, mobile internet devices (MIDs), and wearable devices such as smartwatches, smart bracelets, and pedometers, but the embodiments in this application are not limited to these.

[0074] The embodiments of this application do not limit the device form of the terminal device. The device used to implement the function of the terminal device can be the terminal device itself; it can also be a device that supports the terminal device in implementing the function, such as a chip system. The device can be installed in the terminal device or used in conjunction with the terminal device. In the embodiments of this application, the chip system can be composed of chips or can include chips and other discrete components.

[0075] The network device involved in this application embodiment is a node on the network side used for transmitting signals, or receiving signals, or both transmitting and receiving signals. The network device can be a device deployed in the RAN to provide wireless communication functions for terminals. The network device can be connected to core network equipment, that is, it can communicate with the core network equipment.

[0076] In one possible scenario, network equipment can be devices with base station functions, such as evolved NodeBs (eNodeBs), transmitting and receiving points (TRPs), transmitting points (TPs), next-generation NodeBs (gNBs), next-generation base stations in 6G mobile communication systems, integrated access and backhaul (IAB) nodes, and non-terrestrial network equipment in non-terrestrial networks (NTNs), which can be deployed on high-altitude platforms or satellites. Network equipment can be transmitting and receiving points (TRPs), base stations, and various forms of control nodes, such as network controllers and radio controllers. Specifically, network equipment can be various forms of macro base stations, micro base stations (also known as small cells) in heterogeneous network (HetNet) scenarios, relay stations, access points (APs), radio network controllers (RNCs), node Bs (NBs), base station controllers (BSCs), base transceiver stations (BTSs), home base stations (e.g., home evolved node Bs, or home node Bs (HNBs)), baseband units (BBUs) and remote radio units (RRUs) in distributed base station scenarios, transmitting and receiving points (TRPs), transmitting points (TPs), mobile switching centers, Zigbee base stations, Bluetooth master, Bluetooth Low Energy (BLE) master, LoRa base stations, etc., or even base station antenna panels. Control nodes can connect to multiple base stations and configure resources for multiple terminals covered by multiple base stations. In systems employing different wireless access technologies, the names of devices with base station functions may vary.For example, it could be a gNB in ​​5G, network-side equipment in networks after 5G, or network equipment in future evolved public land mobile networks (PLMNs), or equipment that performs base station functions in device-to-device (D2D) communication, machine-to-machine (M2M) communication, or vehicle-to-everything (V2X) communication. This application does not limit the specific name of the network equipment. Network equipment can also be a baseband pool (BBU pool) and RRU under an open RAN (O-RAN or ORAN), cloud radio access network (CRAN), etc.

[0077] In another possible scenario, multiple network devices collaborate to assist terminals in achieving wireless access, with each network device performing a portion of the base station's functions. For example, network devices may include a central unit (CU), a distributed unit (DU), a CU-control plane (CP), a CU-user plane (UP), or a radio unit (RU). CUs and DUs can be separate entities or included in the same network element, such as a baseband unit (BBU). RUs may be included in radio equipment or radio units, such as remote radio units (RRUs), active antenna units (AAUs), or remote radio heads (RRHs). It is understood that network devices can be CU nodes, DU nodes, or devices comprising both CU and DU nodes. Furthermore, CUs can be classified as network devices in the access network (RAN) or in the core network (CN), without limitation.

[0078] Network devices can support one or more types of fronthaul interfaces, each corresponding to a DU and RU with different functions. If the fronthaul interface between the DU and RU is a common public radio interface (CPRI), the DU is configured to implement one or more baseband functions, and the RU is configured to implement one or more radio frequency functions. If the fronthaul interface between the DU and RU is another type of interface, relative to the CPRI, some downlink and / or uplink baseband functions, such as, for downlink, one or more of precoding, beamforming (BF), or inverse fast Fourier transform (IFFT) / adding a cyclic prefix (CP), are moved from the DU to the RU; and for uplink, one or more of beamforming (BF), or fast Fourier transform (FFT) / removing CP, are moved from the DU to the RU. In one possible implementation, the interface can be an enhanced common public radio interface (eCPRI). Under the eCPRI architecture, the segmentation between DU and RU differs, corresponding to different categories (Cat) of eCPRI, such as eCPRI Cat A, B, C, D, E, and F.

[0079] Taking eCPRI Cat A as an example, for downlink transmission, layer mapping is used as the dividing line. The DU is configured to implement one or more functions preceding layer mapping (i.e., coding, rate matching, scrambling, modulation, and layer mapping itself), while other functions following layer mapping (e.g., resource element (RE) mapping, digital BF, or IFFT / CP addition) are implemented in the RU. For uplink transmission, de-RE mapping is used as the dividing line. The DU is configured to implement one or more functions preceding de-mapping (i.e., decoding, rate matching de-matching, descrambling, demodulation, inverse discrete Fourier transform (IDFT), channel equalization, and de-RE mapping itself), while other functions following de-mapping (e.g., digital BF or FFT / CP removal) are implemented in the RU. It is understood that descriptions of the functions of the DU and RU corresponding to various types of eCPRI can be found in the eCPRI protocol and will not be elaborated upon here.

[0080] In one possible design, the processing unit in the BBU used to implement baseband functions is called the baseband high (BBH) unit, and the processing unit in the RRU / AAU / RRH used to implement baseband functions is called the baseband low (BBL) unit.

[0081] In different systems, CU (or CU-CP and CU-UP), DU, or RU may have different names, but those skilled in the art will understand their meaning. For example, in an ORAN system, CU can also be called an Open Network Architecture Distributed Unit (O-RAN Central Unit, O-CU), DU can also be called an Open Network Architecture Distributed Unit (O-RAN Distributed Unit, O-DU), CU-CP can also be called an Open Network Architecture Central Unit Control Plane (O-RAN Central Unit Control Plane, O-CU-CP), CU-UP can also be called an Open Network Architecture Central Unit User Plane (O-RAN Central Unit User Plane, O-CU-UP), and RU can also be called an Open Network Architecture (O-RAN RadioUnit, O-RU). Any of the units among CU (or CU-CP, CU-UP), DU, and RU in this application can be implemented through software modules, hardware modules, or a combination of software modules and hardware modules. The network device in this application can be a virtualized device, for example, implemented through general-purpose hardware and instantiated virtualization functions, or dedicated hardware and instantiated virtualization functions. Among them, general-purpose hardware can be a server, such as a cloud server.

[0082] In this embodiment, the apparatus for implementing the functions of a network device can be a network device itself; it can also be an apparatus capable of supporting the network device in implementing those functions, such as a chip system, hardware circuit, software module, or a hardware circuit plus a software module. This apparatus can be installed in the network device or used in conjunction with the network device. In this embodiment, the example of a network device being used to implement the functions of a network device is provided only and does not constitute a limitation on the solutions described in this embodiment.

[0083] The technical solutions of this application can be applied to various wireless communication systems, such as: wireless local area network (WLAN) communication systems, wireless fidelity (Wi-Fi) systems, long term evolution (LTE) systems, LTE frequency division duplex (FDD) systems, LTE time division duplex (TDD) systems, 5th generation (5G) systems or new radio (NR) systems, as well as other future communication systems, such as 6th generation (6G) systems. It also supports communication systems that integrate multiple wireless technologies. For example, it can also be applied to systems that integrate non-terrestrial networks (NTN) with terrestrial mobile communication networks, such as drones, satellite communication systems, and high altitude platform station (HAPS) communication. The technical solutions provided in this application can also be applied to device-to-device (D2D) communication, vehicle-to-everything (V2X) communication, machine-to-machine (M2M) communication, machine-type communication (MTC), and Internet of Things (IoT) communication systems or other communication systems. It is understood that the system architecture described in the embodiments of this application is for the purpose of more clearly illustrating the technical solutions of the embodiments of this application and does not constitute a limitation on the technical solutions provided in the embodiments of this application.

[0084] In one possible implementation, the business scenarios involved in this application may include ambient IoT (A-IoT) communication in NR communication systems (or next-generation NR communication systems), or may also be referred to as backscatter communication or passive IoT (P-IoT) business scenarios. A-IoT is a cellular IoT communication technology that supports battery-free terminals. The network architecture of this communication system includes base stations and A-IoT devices. A base station can be understood as one of the network devices described above, and an A-IoT device can be understood as one of the terminal devices described above. A base station can refer to an NR base station, pole station, small station, micro station, or reader. An A-IoT device can refer to a passive terminal device, a passive IoT terminal device, a semi-passive terminal device, a terminal device with backscatter capability, or a tag.

[0085] For example, such as Figure 2A As shown, Figure 2A The communication system architecture shown includes a base station and A-IoT devices, which communicate directly. Communication between the base station and A-IoT devices includes A-IoT data and / or signaling. Figure 2A The number of base stations and IoT devices included are merely examples, and this application does not limit the number of base stations and IoT devices. For example, the architecture may also include two base stations, with the base station sending signals to the A-IoT devices and the base station receiving signals from the A-IoT devices being different base stations.

[0086] In this system, the base station functions as a reader, enabling communication with A-IoT devices. The communication link between the base station and the A-IoT device is called a reader-to-device (R2D) link or communication, or simply R2D communication. The communication link between the A-IoT device and the base station is called a device-to-reader (D2R) link or communication, or simply D2R communication.

[0087] For example, such as Figure 2B As shown, Figure 2BThe communication system architecture shown includes a base station, intermediate nodes, and A-IoT devices. A-IoT devices communicate directly with intermediate nodes; alternatively, A-IoT devices and the base station communicate through intermediate nodes. The base station can control the communication between the intermediate nodes and A-IoT devices. Essentially, the intermediate node forwards information received from the A-IoT device to the base station, or vice versa. Intermediate nodes can be relays, IAB nodes, UEs, repeaters, or other nodes that enable A-IoT communication.

[0088] in, Figure 2B The number of base stations, A-IoT devices, and intermediate nodes included are merely examples, and this application does not limit the number of base stations, A-IoT devices, and intermediate nodes. Intermediate nodes function as readers and can communicate with devices. In this case, the communication link between the intermediate node and the A-IoT device is called R2D communication, and the communication link between the A-IoT device and the intermediate node is called D2R communication.

[0089] A-IoT devices can be devices with peak power consumption of less than 1μW, or devices with peak power consumption of less than 1000μW (or several hundredμW). Specifically, a device with peak power consumption of less than 1μW can be referred to as device 1, a device with peak power consumption of less than 1000μW (or several hundredμW) that uses an externally provided carrier for backscattering can be referred to as device 2a, and a device with peak power consumption of less than 1000μW (or several hundredμW) that uses an internally generated carrier for transmission is referred to as device 2b.

[0090] For example, a schematic diagram of the chip architecture of device 1 is shown below. Figure 3A As shown. The chip architecture includes one or more of the following modules: antenna, matching network, RF energy harvester, energy management unit, energy storage, RF bandpass filter, clock generator, RF envelope detector, baseband low-pass filter, comparator, digital baseband logic (encoder, decoder, controller), memory, and backscatter modulator.

[0091] The antenna is used for energy reception and can be shared or separated by the receiver / transmitter. A matching network matches the impedance between the antenna and other components (including modules related to the RF energy harvester and receiver). The RF energy harvester includes a rectifier that converts the RF signal (AC) to DC. Energy storage (e.g., capacitors) stores the harvested energy from the RF energy receiver. An energy management unit manages the energy stored from the energy harvester and provides energy to active modules that require energy supply. Digital baseband logic includes functional modules such as encoders, decoders, and controllers. Memory includes two types: (1) non-volatile memory such as electrically erasable programmable read-only memory (EEPROM), which can permanently store device identifiers (IDs); and (2) registers that temporarily store information, which can only be stored when there is sufficient energy in the energy storage. A clock generator provides the clock signal. The receiving-related modules include: (1) an RF bandpass filter for improving frequency selectivity; (2) an RF envelope detector for converting RF signals to baseband; (3) a baseband low-pass filter for filtering out harmonics and high-frequency components to improve the signal quality input to the comparator; and (4) a comparator for determining the high / low (level) of the input signal. The transmitting-related modules include a backscatter modulator for switching the impedance to modulate the backscatter signal using the transmit signal from the baseband logic.

[0092] As another example, a schematic diagram of the chip architecture of device 2b (using an intermediate frequency envelope detector receiver) is shown below. Figure 3B As shown, the chip architecture includes one or more of the following modules: antenna, matching network, RF energy harvester, energy harvester (non-RF), energy management unit, energy storage, RF bandpass filter, low noise amplifier, IF amplifier and IF filter, IF envelope detector, baseband amplifier, baseband low-pass filter, comparator or N-bit analog-to-digital converter, transmit modulation, local oscillator, digital-to-analog converter, low-pass filter, power amplifier, mixer, digital baseband logic (encoder, decoder, controller), and memory.

[0093] The local oscillator is used to generate the carrier frequency at the transmitting end, or to generate the carrier frequency offset for IF reception. The receiving-related modules include: (1) an RF bandpass filter to improve frequency selectivity; (2) a mixer to convert the RF signal to an IF signal; (3) an IF amplifier to amplify the IF signal; (4) an IF filter to filter out unwanted RF signals and local oscillator signals; (5) an IF envelope detector to detect the envelope from the IF signal; (6) a baseband amplifier, which may or may not be present depending on the implementation; (7) a baseband low-pass filter to filter out harmonics and high-frequency components, improving the signal quality input to the comparator or analog-to-digital converter; and (8) a comparator or an N-bit analog-to-digital converter. The transmission-related modules include: (1) transmission modulation, which modulates baseband bits according to the modulation method. This part can be part of the baseband logic module; (2) digital-to-analog converter, which converts digital signals into analog signals; (3) low-pass filter, which filters out unwanted signals; (4) mixer, which upconverts baseband signals to the RF frequency range; and (5) power amplifier, which amplifies the transmitted signal if present.

[0094] The functions of the antenna, matching network, radio frequency energy harvester, energy management unit, energy storage, radio frequency bandpass filter, digital baseband logic, and memory are the same as those described above, and will not be repeated here.

[0095] To enable devices employing backscatter communication to achieve frequency division multiple access (FDMA) and improve the utilization of transmission resources, this application proposes a communication method, such as... Figure 4 As shown, the communication method includes steps 401 to 403. Figure 4 The method shown corresponds to the execution entities of a terminal device and a network device, or the chip of the terminal device and the chip of the network device. Here, the terminal device may refer to the aforementioned... Figure 1 The terminal equipment in the communication system shown can also be Figure 2A or Figure 2B The A-IoT device shown may refer to the aforementioned network device. Figure 1 The network devices in the communication system shown can also be Figure 2A or Figure 2B The base station is shown. This application embodiment uses a terminal device and a network device as examples for illustration. This application embodiment does not limit the executing entity of the communication method. Wherein:

[0096] 401. The terminal device determines a first sequence, which is one of a plurality of sequences, wherein any two sequences occupy the same time length, any one element of any two sequences occupies a different time length, and any two sequences include a different number of elements.

[0097] In this embodiment, the multiple sequences are candidate sequences pre-configured by the network device. Optionally, the multiple sequences can be configured as a sequence set for a terminal device, and the terminal device can select one sequence from them according to the instructions of the network device when it needs to send information, such as selecting the first sequence. Alternatively, the multiple sequences can also be configured separately by the network device for multiple terminal devices, for example, one terminal device may be configured with one or more sequences.

[0098] In one possible implementation, the terminal device can determine the first sequence according to the instructions of the network device. For example, the network device sends first configuration information to the terminal device, and the terminal device receives the first configuration information from the network device, which is used to determine the first sequence. Optionally, the first configuration information may include parameters related to the first sequence, such as elements in the first sequence, the number of elements in the first sequence, the time duration occupied by an element in the first sequence, or the identifier or index of the first sequence, etc., one or more of these parameters. The terminal device can determine the first sequence based on the parameters included in the first configuration information. Optionally, the configuration information may directly configure one or more parameters such as the first sequence, the identifier or index of the first sequence, or the time duration occupied by an element in the first sequence.

[0099] The function of these multiple sequences is explained below. These sequences are used for frequency shifting of the signal. Frequency shifting can be understood as moving the baseband signal from one frequency position to another. Since the time length occupied by each element in any two sequences is different, and the number of elements in any two sequences is different, the frequency positions of the signal shifted by any two sequences are different. Specifically, the more elements a sequence contains, the larger the shift range of the signal; the fewer elements, the smaller the shift range. Therefore, when the transmission sequences corresponding to any two sequences are transmitted, they are affected by the frequency shift effect of the two sequences, resulting in different frequency positions. Simultaneously, since the time length occupied by any two sequences is the same, the transmission bandwidth corresponding to these sequences is the same. This means that when the terminal device uses any two sequences to transmit a signal, the transmission bandwidth is the same. Therefore, based on the method described in this application, when the terminal device uses any two sequences from the plurality of sequences to send signals, the signals corresponding to the two sequences are located at different frequency positions, thereby achieving the effect of multi-user FDMA and improving the utilization rate of transmission resources and transmission capacity.

[0100] The duration of a sequence can be understood as the time domain of that sequence. The duration of an element in the sequence can be understood as the chip, time unit, or unit of time required to transmit that element. The duration of an element in the sequence can also be described as: time unit length, chip length, chip repetition count, or unit chip repetition count. Alternatively, the duration of an element can be implicitly described by the rate; for example, the reciprocal of the rate is the duration of an element, which can be described as: chip rate, switching rate, or square wave switching rate. The number of elements in the sequence can also be described as: half the number of time units, half the number of chips, half the number of levels, the number of high-level chips + low-level chips, the number of square wave repetitions, or the number of square wave cycles.

[0101] Optionally, each of the plurality of sequences is a square wave sequence, which refers to a sequence in which high and low levels alternate, or it can also be understood as a sequence in which low and high levels alternate. Here, high and low levels refer to the state of an element in the sequence, or it can also be understood as the state of a chip. A high level can be described as ON, and a low level can be described as OFF; or a high level can be described as {1}, and a low level can be described as {0}; or a high level can be described as {1}, and a low level can be described as {-1}. For example, the plurality of sequences includes sequence 1 and sequence 2. Sequence 1 can be represented as {1010}, and sequence 2 can be represented as {10101010}, or sequence 1 can be represented as {1,-1,1,-1}, and sequence 2 can be represented as {1,-1,1,-1,1,-1,1,-1}.

[0102] As described above, any two sequences in the plurality of sequences occupy the same time length. This can be understood as the product of the time length occupied by an element in any two sequences and the number of elements in those sequences being equal. For example, the plurality of sequences also includes a third sequence, wherein the time length occupied by an element in the first sequence is T1, the number of elements in the first sequence is N1, the time length occupied by an element in the third sequence is T2, the number of elements in the third sequence is N2, and the time length occupied by the first sequence and the third sequence is both T, where T = T1 × N1 and T = T2 × N2.

[0103] In one example, sequence 1 can be represented as {10}, sequence 2 as {1010}, sequence 3 as {101010}, and sequence 4 as {10101010}. The time length occupied by one element in sequence 1 is t1, that of one element in sequence 2 is t2, that of one element in sequence 3 is t3, and that of one element in sequence 4 is t4, satisfying t1 = 2 × t2 = 3 × t3 = 4 × t4. The number of elements in sequence 1 is n1, that of sequence 2 is n2, that of sequence 3 is n3, and that of sequence 4 is n4, where n1 = 2, n2 = 4, n3 = 6, and n4 = 8. Therefore, the time length occupied by any one of sequences 1, 2, 3, and 4 is T = t1 × n1 = t2 × n2 = t3 × n3 = t4 × n4.

[0104] For example, such as Figure 5A As shown, Figure 5AThree sequences are shown: Sequence 1 can be represented as {10}, Sequence 2 as {1010}, and Sequence 3 as {10101010}. The time duration for one element in Sequence 1 is t1, for one element in Sequence 2 is t2, and for one element in Sequence 3 is t3, satisfying t1 = 2 × t2 = 4 × t3. The number of elements in Sequence 1 is n1, in Sequence 2 is n2, and in Sequence 3 is n3, where n1 = 2, n2 = 4, and n3 = 8. Therefore, the time duration for any one of Sequences 1, 2, and 3 is T = t1 × n1 = t2 × n2 = t3 × n3.

[0105] Furthermore, the network device can assign sequence 1, sequence 2, and sequence 3 to different terminal devices, for example, sequence 1 to terminal device 1, sequence 2 to terminal device 2, and sequence 3 to terminal device 3. Figure 5B The document also includes the frequency shifting effect of signals transmitted after using sequences 1, 2, and 3 compared to the initial signal without using the sequences. It can be seen that the frequency interval between the peak amplitude of the signal after using sequence 1 on terminal device 1 and the peak amplitude of the initial signal without using the sequences is f1; the frequency interval between the peak amplitude of the signal after using sequence 2 on terminal device 2 and the initial signal without using the sequences is f2; and the frequency interval between the peak amplitude of the signal after using sequence 3 on terminal device 3 and the initial signal without using the sequences is f3. Where f1 is less than f2, and f2 is less than f3, it can be seen that by shifting the signal frequency in this way, different signals can be located at different frequency positions, thereby enabling network devices to communicate simultaneously with multiple terminal devices, achieving the effect of FDMA, and improving the utilization of transmission resources.

[0106] Optionally, the method further includes: the terminal device sending a sixth sequence; wherein the sixth sequence is determined based on the fourth bit and the third sequence, since the third sequence is a sequence different from the first sequence among multiple sequences. Because the third sequence and the first sequence are different, the frequency shift ranges of the corresponding third sequence and the first sequence are different. Therefore, based on this implementation, the terminal device can send different signals to the network device at different frequency positions, improving the utilization of transmission resources and the transmission capacity.

[0107] The sixth sequence may be sent simultaneously with the second sequence, or it may not be sent simultaneously. For the case where the sixth sequence and the second sequence are not sent simultaneously, for example, assuming the second sequence is sent before the sixth sequence, after sending the second sequence, the network device can send a configuration instruction to the terminal device to send the signal using the third sequence. After receiving and determining the configuration instruction, the terminal device determines the sixth sequence based on the fourth bit and the third sequence, and then sends the sixth sequence.

[0108] 402. The terminal device sends a second sequence to the network device, and the network device receives the second sequence from the terminal device, which is determined based on the first bit and the first sequence.

[0109] In this embodiment, the first bit can be understood as an information bit, and the second sequence carries the first bit. It can be understood that the terminal device uses the first sequence to process the first bit to obtain the second sequence, thereby realizing the movement of the frequency position of the terminal device's transmission bandwidth. Since the first sequence belongs to multiple sequences, the movement of the frequency position corresponding to any two sequences in these multiple sequences is different. Therefore, the effect of FDMA can be achieved based on these multiple sequences, which is beneficial to improving the utilization rate of transmission resources.

[0110] The following describes the specific implementation method of processing the first bit of the first sequence to obtain the second sequence:

[0111] Implementation Method 1: The first bit is directly used to perform an operation with the first sequence to obtain the second sequence. Implementation Method 1 can include the following optional methods 1.1 and 1.2. The first sequence is a square wave sequence, which is a sequence in which elements {1} and {0} alternate, and the starting element can be either element {1} or element {0}.

[0112] Based on the above description of the first configuration information, optionally, the parameters configured in the first configuration information include the time length occupied by the elements of the square wave sequence and the number of elements in the square wave sequence. Alternatively, the parameters configured in the first configuration information include the time length occupied by the elements of the square wave sequence and the square wave sequence itself. Or, the parameters configured in the first configuration information include the time length occupied by the elements of the square wave sequence and the square wave sequence defined by the time length occupied by the minimum element.

[0113] The duration of a square wave sequence can be understood as the time domain duration of that sequence. The duration of a single element within the square wave sequence can be understood as the chip, time unit, or unit of time required to transmit that element. The duration of a single element can also be described as: time unit length, chip length, chip repetition count, or unit chip repetition count. Alternatively, the duration of an element can be implicitly described by the rate; for example, the reciprocal of the rate represents the duration of an element, which can be described as: chip rate, switching rate, or square wave switching rate. The number of elements in the square wave sequence can also be described as: half the number of time units, half the number of chips, half the number of levels, the number of high-level chips + low-level chips, the number of square wave repetitions, or the number of square wave cycles.

[0114] Option 1.1: The second sequence is obtained by XORing the first bit with the first sequence. Alternatively, the second sequence is obtained by repeating the first bit N1 times and then XORing it with the first sequence, where N1 is the number of elements in the first sequence. Another possible description is that the second sequence and the sequence obtained by XORing the first bit with the first sequence are the same. Here, N1 repetitions can also be described as the number of spread frequencies or a multiple of N1. The XOR operation can also be described as a modulo-2 addition and inversion operation.

[0115] Example 1.1.1: When the first bit is "1" and the first sequence is {10}, the first sequence includes 2 elements. Therefore, the first bit can be repeated twice to obtain the sequence {11}. Then, the sequence {11} is XORed with the first sequence {10} to obtain the second sequence {10}.

[0116] Example 1.1.2: When the first bit is "0" and the first sequence is {10}, the first sequence includes 2 elements. Therefore, the first bit can be repeated twice to obtain the sequence {00}. Then, the sequence {00} is XORed with the first sequence {10} to obtain the second sequence {01}.

[0117] Example 1.1.3: When the first bit is "1" and the first sequence is {1010}, the first sequence includes 4 elements. Therefore, the first bit can be repeated 4 times to obtain the sequence {1111}. Then, the sequence {1111} is XORed with the first sequence {1010} to obtain the second sequence {1010}.

[0118] Example 1.1.4: When the first bit is "0" and the first sequence is {1010}, the first sequence includes 2 elements. Therefore, the first bit can be repeated 4 times to obtain the sequence {0000}. Then, the sequence {0000} is XORed with the first sequence {1010} to obtain the second sequence {0101}.

[0119] Option 1.2: Multiply the first bit with the first sequence to obtain the second sequence. Multiplying a bit with a sequence means converting the bit to either {+1} or {-1} based on its value before multiplying it with the sequence. One conversion method is: when the bit is "0", convert the bit "0" to {-1}; when the bit is "1", convert the bit "1" to {1}. Another conversion method is: when the bit is "0", convert the bit "0" to {1}; when the bit is "1", convert the bit "1" to {-1}.

[0120] This can be understood as follows: The first bit is converted to {+1} or {-1} and then multiplied with the first sequence to obtain the second sequence. Alternatively, the first bit is converted to {+1} or {-1} and then multiplied with the first sequence N1 times to obtain the second sequence. Another possible description is that the second sequence is the same as the sequence obtained by converting the first bit to {+1} or {-1} and then multiplying it with the first sequence N1 times. Or, yet another possible description is that the second sequence is the same as the sequence obtained by converting the first bit to {+1} or {-1} and then multiplying it with the first sequence.

[0121] Example 1.2.1: When the first bit is "1", it is converted to {+1}. When the first sequence is {1,-1}, the first bit is multiplied by the first sequence {1,-1} to obtain the second sequence {1,-1}.

[0122] Example 1.2.2: When the first bit is "0", it is converted to {-1}. When the first sequence is {1,-1}, the first bit is multiplied by the first sequence {1,-1} to obtain the second sequence {-1,1}.

[0123] Example 1.2.3: When the first bit is "1", it is converted to {+1}. When the first sequence is {1,-1,1,-1}, the first bit is multiplied by the first sequence {1,-1,1,-1} to obtain the second sequence {1,-1,1,-1}.

[0124] Example 1.2.4: When the first bit is "0", it is converted to {-1}. When the first sequence is {1,-1,1,-1}, the first bit is multiplied by the first sequence {1,-1,1,-1} to obtain the second sequence {-1,1,-1,1}.

[0125] Based on the method described in implementation method 1, the second sequence can be obtained directly from the first bit and the first sequence without the need for a line code encoding module. The frequency shifting effect can be achieved through the first sequence, which is simple to implement and helps to reduce the complexity and power consumption of the device implementation.

[0126] Implementation Method 2: The first bit is encoded using a line code and then processed with the first sequence to obtain the second sequence. Implementation Method 2 can include the following optional methods 2.1 and 2.2. The first sequence is a square wave sequence, which is a sequence in which elements {1} and {0} alternate, and the starting element can be either element {1} or element {0}.

[0127] Based on the above description of the first configuration information, optionally, the parameters configured in the first configuration information include the time length occupied by the elements of the square wave sequence and the number of elements in the square wave sequence. Alternatively, the parameters configured in the first configuration information include the time length occupied by the elements of the square wave sequence and the square wave sequence itself. Alternatively, the parameters configured in the first configuration information include the time length occupied by the elements of the square wave sequence and the square wave sequence itself. Alternatively, the parameters configured in the first configuration information include the time length occupied by the elements of the square wave sequence and the square wave sequence defined by the time length occupied by the minimum element.

[0128] The duration of a square wave sequence can be understood as the time domain duration of that sequence. The duration of a single element within the square wave sequence can be understood as the chip, time unit, or unit of time required to transmit that element. The duration of a single element can also be described as: time unit length, chip length, chip repetition count, or unit chip repetition count. Alternatively, the duration of an element can be implicitly described by the rate; for example, the reciprocal of the rate represents the duration of an element, which can be described as: chip rate, switching rate, or square wave switching rate. The number of elements in the square wave sequence can also be described as: half the number of time units, half the number of chips, half the number of levels, the number of high-level chips + low-level chips, the number of square wave repetitions, or the number of square wave cycles.

[0129] Option 2.1:

[0130] Step 1: Encode the first bit using line code to obtain the second bit and the third bit. The second bit comes before the third bit. The second bit and the third bit can also be described as the second element and the third element.

[0131] Step 2: Then, XOR the second bit with the first sequence to obtain the fourth sequence, and XOR the third bit with the first sequence to obtain the fifth sequence. Alternatively, it can be described as repeating the second bit N1 times and XORing it with the first sequence to obtain the fourth sequence, and repeating the third bit N1 times and XORing it with the first sequence to obtain the fifth sequence. Another possible description is that the fourth sequence and the sequence obtained by XORing the second bit with the first sequence are the same, and the sequences obtained by XORing the fifth sequence and the third bit with the first sequence are the same. Alternatively, it can be described as repeating the fourth sequence and the second bit N1 times and XORing them with the first sequence to obtain the same sequence, and the sequences obtained by XORing the fifth sequence and the third bit N1 times with the first sequence. Here, N1 repetitions can also be described as the number of spread spectrum operations or a multiple of N1. The XOR operation can also be described as a modulo-2 addition and inversion operation.

[0132] Step 3: Finally, combine the fourth sequence and the fifth sequence to obtain the second sequence, with the fourth sequence preceding the fifth sequence. Alternatively, the fourth and fifth sequences can be concatenated to obtain the second sequence. Here, N1 represents the number of elements included in the first sequence. Further, optionally, the line code encoding can be one or more of Manchester encoding, dual-phase space code (FMO) encoding, or Miller encoding. Other line code encodings are also possible; this embodiment does not limit the line code encoding.

[0133] One encoding rule for Manchester encoding is: bit "1" is encoded as codeword {10} and bit "0" is encoded as codeword {01}. Alternatively, another Manchester encoding rule is: bit "0" is encoded as codeword {10} and bit "1" is encoded as codeword {01}. Manchester encoding is a memoryless encoding method, meaning that the codeword encoded by the current bit is unrelated to the codeword encoded by the previous bit. Each bit's codeword is independent. In Manchester encoding, there must be a transition edge in the middle of a codeword, but not necessarily at the beginning of the codeword.

[0134] The encoding rules for FM0 are as follows: bit "1" is encoded into codeword {11} or codeword {00}, and bit "0" is encoded into codeword {01} or codeword {10}. FM0 encoding is a memory-based encoding method, meaning that the codeword encoded by the current bit is related to the codeword encoded by the previous bit. In FM0 encoding, there must be a transition edge at the beginning of a codeword, no transition edge in the middle of a bit "1" codeword, and a transition edge in the middle of a bit "0" codeword. The FM0 codeword transition states are as follows: Figure 6As shown, the codeword transition states of FM0 encoding include: {11}->{00}, {11}->{01}, {10}->{10}, {10}->{11}, {00}->{11}, {00}->{10}, {01}->{01}, and {01}->{00}.

[0135] Miller encoding follows these rules: a bit "1" is encoded as codeword {10} or codeword {01}, and a bit "0" is encoded as codeword {00} or codeword {11}. Miller encoding is a memory-based encoding method, meaning that the codeword encoded by the current bit is related to the codeword encoded by the previous bit. In Miller encoding, a bit "1" always has a transition edge in the middle, but no transition edge at the beginning of the codeword; a bit "0" does not have a transition edge in the middle, no transition edge at the beginning of a single bit "0", but a transition edge at the beginning of consecutive bits "0". The Miller codeword transition states are as follows: Figure 7 As shown, the codeword transition states of Miller encoding include: {11}->{00}, {11}->{10}, {10}->{01}, {10}->{00}, {00}->{11}, {00}->{01}, {01}->{10}, and {01}->{11}.

[0136] Example 2.1.1: When the first bit is "1" and the first sequence is {10}, using Manchester encoding, the first bit is encoded to obtain codeword {10}. The codeword bits included in codeword {10} are divided into a second bit and a third bit. The second bit is codeword bit {1}, and the third bit is codeword bit {0}. The first sequence contains 2 elements. The second bit {1} is repeated twice to obtain sequence {11}. Then, sequence {11} is XORed with the first sequence {10} to obtain the fourth sequence {10}. The third bit {0} is repeated twice to obtain sequence {00}. Then, sequence {00} is XORed with the first sequence {10} to obtain the fifth sequence {01}. The fourth and fifth sequences are combined to obtain the second sequence, where the fourth sequence comes before the fifth sequence. Therefore, the second sequence can be represented as {1001}.

[0137] Example 2.1.2: When the first bit is "0" and the first sequence is {10}, using Manchester encoding, the first bit is encoded to obtain the codeword {01}. The codeword bits included in codeword {01} are divided into a second bit and a third bit. The second bit is codeword bit {0}, and the third bit is codeword bit {1}. The first sequence contains 2 elements. The second bit {0} is repeated twice to obtain the sequence {00}. Then, the sequence {00} is XORed with the first sequence {10} to obtain the fourth sequence {01}. The third bit {1} is repeated twice to obtain the sequence {11}. Then, the sequence {11} is XORed with the first sequence {10} to obtain the fifth sequence {10}. The fourth and fifth sequences are combined to obtain the second sequence, where the fourth sequence comes before the fifth sequence. Therefore, the second sequence can be represented as {0110}.

[0138] It should be noted that when the first sequence is {01}, the second sequence corresponding to the first bit being "1" and the first bit being "0" is interchanged. That is, the second sequence corresponding to the first bit being "1" is {1001} or {0110}, or the second sequence corresponding to the first bit being "0" is {1010} or {0101}.

[0139] Example 2.1.3: When the first bit is "1" and the first sequence is {10}, when using FM0 encoding, the first bit is encoded by FM0 to obtain the codeword {11} or {00}.

[0140] When the codeword is {11}, the codeword bits included in the codeword {11} are divided into a second bit and a third bit, where the second bit is codeword bit {1} and the third bit is codeword bit {1}. The first sequence contains 2 elements. The second bit {1} is repeated twice to obtain the sequence {11}. Then, the sequence {11} is XORed with the first sequence {10} to obtain the fourth sequence {10}. The third bit {1} is repeated twice to obtain the sequence {11}. Then, the sequence {11} is XORed with the first sequence {10} to obtain the fifth sequence {10}. The fourth and fifth sequences are combined to obtain the second sequence, where the fourth sequence precedes the fifth sequence. Therefore, the second sequence can be represented as {1010}.

[0141] When the codeword is {00}, the codeword bits included in the codeword {00} are divided into a second bit and a third bit, where the second bit is codeword bit {0} and the third bit is codeword bit {0}. The first sequence contains 2 elements. The second bit {0} is repeated twice to obtain the sequence {00}. Then, the sequence {00} is XORed with the first sequence {10} to obtain the fourth sequence {01}. The third bit {0} is repeated twice to obtain the sequence {00}. Then, the sequence {00} is XORed with the first sequence {10} to obtain the fifth sequence {01}. The fourth and fifth sequences are combined to obtain the second sequence, where the fourth sequence comes before the fifth sequence. Therefore, the second sequence can be represented as {0101}.

[0142] Therefore, the second sequence corresponding to the first bit being "1" is either {1010} or {0101}.

[0143] Example 2.1.4: When the first bit is "0" and the first sequence is {10}, when using FM0 encoding, the first bit is encoded by FM0 to obtain the codeword {10} or {01}.

[0144] When the codeword is {10}, the codeword bits included in the codeword {10} are divided into a second bit and a third bit. The second bit is codeword bit {1}, and the third bit is codeword bit {0}. The first sequence includes 2 elements. The second bit {1} is repeated twice to obtain the sequence {11}. Then, the sequence {11} is XORed with the first sequence {10} to obtain the fourth sequence {10}. The third bit {0} is repeated twice to obtain the sequence {00}. Then, the sequence {00} is XORed with the first sequence {10} to obtain the fifth sequence {01}. The fourth and fifth sequences are combined to obtain the second sequence, where the fourth sequence comes before the fifth sequence. Therefore, the second sequence can be represented as {1001}.

[0145] When the codeword is {01}, the codeword bits included in the codeword {01} are divided into a second bit and a third bit. The second bit is codeword bit {0}, and the third bit is codeword bit {1}. The first sequence contains 2 elements. The second bit {0} is repeated twice to obtain the sequence {00}. Then, the sequence {00} is XORed with the first sequence {10} to obtain the fourth sequence {01}. The third bit {1} is repeated twice to obtain the sequence {11}. Then, the sequence {11} is XORed with the first sequence {10} to obtain the fifth sequence {10}. The fourth and fifth sequences are combined to obtain the second sequence, where the fourth sequence comes before the fifth sequence. Therefore, the second sequence can be represented as {0110}.

[0146] Therefore, the second sequence corresponding to the first bit being "0" is either {1001} or {0110}.

[0147] It should be noted that when the first sequence is {01}, the second sequence corresponding to the first bit being "1" and the first bit being "0" is interchanged. That is, the second sequence corresponding to the first bit being "1" is {1001} or {0110}, or the second sequence corresponding to the first bit being "0" is {1010} or {0101}.

[0148] Option 2.2:

[0149] Step 1: Encode the first bit using line code to obtain the second bit and the third bit. The second bit comes before the third bit. The second bit and the third bit can also be described as the second element and the third element.

[0150] Step 2: Then, multiply the second bit with the first sequence to obtain the fourth sequence, and multiply the third bit with the first sequence to obtain the fifth sequence. The description of bit-sequence multiplication can be found in optional method 2.1 above, and will not be repeated here.

[0151] This can be understood as follows: the second bit is converted to {+1} or {-1} and multiplied by the first sequence to obtain the fourth sequence; the third bit is converted to {+1} or {-1} and multiplied by the first sequence to obtain the fifth sequence. Alternatively, the second bit is converted to {+1} or {-1} and multiplied N1 times with the first sequence to obtain the fourth sequence; the third bit is converted to {+1} or {-1} and multiplied N1 times with the first sequence to obtain the fifth sequence. Another possible scenario is that the fourth sequence and the sequence obtained by multiplying the second bit (converted to {+1} or {-1}) with the first sequence are the same, and the fifth sequence and the sequence obtained by multiplying the third bit (converted to {+1} or {-1}) with the first sequence are the same. Or, another possible scenario is that the fourth sequence and the sequence obtained by multiplying the second bit (converted to {+1} or {-1}) with the first sequence N1 times are the same, and the fifth sequence and the sequence obtained by multiplying the third bit (converted to {+1} or {-1}) N1 times with the first sequence are the same.

[0152] Step 3: Finally, combine the fourth and fifth sequences to obtain the second sequence, with the fourth sequence preceding the fifth. Alternatively, the fourth and fifth sequences are concatenated to obtain the second sequence. Here, N1 represents the number of elements included in the first sequence.

[0153] Alternatively, the line code encoding can be one of Manchester encoding, FM0 encoding, or Miller encoding. The encoding rules for Manchester encoding, FM0 encoding, or Miller encoding can be found in the above description and will not be repeated here. Other line code encodings are also possible; this application does not limit the line code encoding used.

[0154] Example 2.2.1: When the first bit is "1", converted to {+1}, and the first sequence is {1,-1}, using Manchester encoding, the first bit is encoded to obtain the codeword {1,-1}. The codeword bits included in the codeword {1,-1} are divided into a second bit and a third bit. The second bit is the codeword bit {1}, and the third bit is the codeword bit {-1}. The first sequence contains 2 elements. Multiplying the second bit {1} with the first sequence {1,-1} yields the fourth sequence {1,-1}. Multiplying the third bit {-1} with the first sequence {1,-1} yields the fifth sequence {-1,1}. Combining the fourth and fifth sequences gives the second sequence, where the fourth sequence precedes the fifth sequence. Therefore, the second sequence can be represented as {1,-1,-1,1}.

[0155] Example 2.2.2: When the first bit is "0", it is converted to {-1}. The first sequence is {1,-1}. Using Manchester encoding, the first bit is encoded to obtain the codeword {-1,1}. The codeword bits in {1,-1} are divided into a second bit and a third bit. The second bit is the codeword bit {-1}, and the third bit is the codeword bit {1}. The first sequence contains 2 elements. Multiplying the second bit {-1} with the first sequence {1,-1} yields the fourth sequence {-1,1}. Multiplying the third bit {1} with the first sequence {1,-1} yields the fifth sequence {1,-1}. Combining the fourth and fifth sequences gives the second sequence, where the fourth sequence precedes the fifth sequence. Therefore, the second sequence can be represented as {-1,1,1,-1}.

[0156] It should be noted that when the first sequence is {-1,1}, the second sequences corresponding to the first bit being "1" and the first bit being "0" are interchanged. That is, the second sequence corresponding to the first bit being "1" is {1,-1,-1,} or {-1,1,1,-1}, or the second sequence corresponding to the first bit being "0" is {1,-1,1,-1} or {-1,1,-1,1}.

[0157] Example 2.2.3: When the first bit is "1", it is converted to {+1}. When the first sequence is {1,-1}, the first bit is encoded by FM0 to obtain the codeword {1,1} or {-1,-1}.

[0158] When the codeword is {1,1}, the codeword bits included in the codeword {1,1} are divided into a second bit and a third bit, where the second bit is codeword bit {1} and the third bit is codeword bit {1}. The first sequence contains 2 elements. Multiplying the second bit {1} with the first sequence {1,-1} yields the fourth sequence {1,-1}, and multiplying the third bit {1} with the first sequence {1,-1} yields the fifth sequence {1,-1}. Combining the fourth and fifth sequences yields the second sequence, where the fourth sequence precedes the fifth sequence. Therefore, the second sequence can be represented as {1,-1,1,-1}.

[0159] When the codeword is {-1,-1}, the codeword bits included in the codeword {-1,-1} are divided into a second bit and a third bit, where the second bit is the codeword bit {-1} and the third bit is the codeword bit {-1}. The first sequence contains 2 elements. Multiplying the second bit {-1} with the first sequence {1,-1} yields the fourth sequence {-1,1}, and multiplying the third bit {-1} with the first sequence {1,-1} yields the fifth sequence {-1,1}. Combining the fourth and fifth sequences together yields the second sequence, where the fourth sequence precedes the fifth sequence. Therefore, the second sequence can be represented as {-1,1,-1,1}.

[0160] Therefore, the second sequence corresponding to the first bit being "1" is {1,-1,1,-1} or {-1,1,-1,1}.

[0161] Example 2.2.4: When the first bit is "0", it is converted to {-1}. When the first sequence is {1,-1}, the first bit is encoded by FM0 to obtain the codeword {1,-1} or {-1,1}.

[0162] When the codeword is {1, -1}, the codeword bits in {1, -1} are divided into a second bit and a third bit, where the second bit is codeword bit {1} and the third bit is codeword bit {-1}. The first sequence contains 2 elements. Multiplying the second bit {1} with the first sequence {1, -1} yields the fourth sequence {1, -1}, and multiplying the third bit {-1} with the first sequence {1, -1} yields the fifth sequence {-1, 1}. Combining the fourth and fifth sequences gives the second sequence, where the fourth sequence precedes the fifth sequence. Therefore, the second sequence can be represented as {1, -1, -1, 1}.

[0163] When the codeword is {-1, 1}, the codeword bits included in the codeword {-1, 1} are divided into a second bit and a third bit. The second bit is the codeword bit {-1}, and the third bit is the codeword bit {1}. The first sequence contains 2 elements. Multiplying the second bit {-1} with the first sequence {1, -1} yields the fourth sequence {-1, 1}. Multiplying the third bit {1} with the first sequence {1, -1} yields the fifth sequence {1, -1}. Combining the fourth and fifth sequences yields the second sequence, where the fourth sequence precedes the fifth sequence. Therefore, the second sequence can be represented as {-1, 1, 1, -1}.

[0164] Therefore, the second sequence corresponding to the first bit being "1" is either {1,-1,-1,1} or {-1,1,1,-1}.

[0165] It should be noted that when the first sequence is {-1,1}, the second sequences corresponding to the first bit being "1" and the first bit being "0" are interchanged. That is, the second sequence corresponding to the first bit being "1" is either {1,-1,-1,1} or {-1,1,1,-1}, or the second sequence corresponding to the first bit being "0" is either {1,-1,1,-1} or {-1,1,-1,1}.

[0166] Based on the method described in implementation 2, the first bit is processed by line code encoding and then combined with the first sequence to obtain the second sequence. The frequency shifting effect is achieved through the first sequence. The terminal device can use any line code encoding, such as Manchester encoding, FM0 encoding or Miller encoding, to achieve the FDMA effect, thus improving the flexibility of the scheme.

[0167] In one possible implementation, the transmission bandwidth corresponding to sending the second sequence is related to the duration of the second sequence. Optionally, the transmission bandwidth corresponding to sending the second sequence is twice the reciprocal of the duration of the second sequence. The transmission bandwidth corresponding to sending the second sequence by the terminal device can also be referred to as the device-to-reader transmission bandwidth (B). tx,D2R It is understandable that the transmission bandwidth is not related to the reciprocal of the chip length, but to the total length occupied by the sequence. Clearly defining the D2R transmission bandwidth is beneficial to the flexibility of the system in scheduling D2R transmissions.

[0168] For example, if one element in the first sequence occupies a duration of 133.33 microseconds, and the first sequence includes two elements, the total duration of the first sequence is 266.66 microseconds. Correspondingly, the duration of the second sequence is equal to that of the first sequence, i.e., 266.66 microseconds. The transmission bandwidth corresponding to sending the second sequence is twice the reciprocal of the duration of the second sequence, i.e., the transmission bandwidth corresponding to sending the second sequence is 15kHz.

[0169] In one possible implementation, the terminal devices used in the method described in the embodiments of this application can be device 1 and device 2a. Alternatively, for device 2b, FDMA can be implemented using direct frequency configuration, or for device 2b, D2R transmission can only scramble the physical device reader channel (PDRCH) bits (including information bits or payload bits and Cyclic Redundancy Check (CRC) bits) without line code encoding. Or, when the device's transmission bandwidth is the maximum bandwidth within the channel bandwidth, only scrambling is performed without line code encoding. The relevant definitions of device 1, device 2a, and device 2b can be found in the above description and will not be repeated here.

[0170] In one possible implementation, within the same channel bandwidth or system bandwidth, the number of configurable candidate parameters in the first information is associated with the transmission bandwidth, or with the duration of the second sequence. The smaller the transmission bandwidth or the longer the duration of the second sequence, the more configurable candidate parameters the first information can have.

[0171] In one possible implementation, when the transmission bandwidth or the time length occupied by the second sequence is the same, the number of configurable candidate parameters in the first information is associated with the channel bandwidth or system bandwidth. When the channel bandwidth or system bandwidth is larger, the number of configurable candidate parameters in the first information is greater.

[0172] 403. The network device obtains the first bit based on the first sequence and the second sequence.

[0173] In this embodiment, the network device can receive the second sequence based on the frequency domain position corresponding to the first sequence. The network device can decode the second sequence based on the first sequence to obtain the first bit.

[0174] When the terminal device determines the second sequence using the optional method 1.1 described above, the corresponding implementation method of the network device to obtain the first bit based on the first sequence and the second sequence is as follows: after performing an XOR operation between the second sequence and the first sequence, the first bit is obtained by repeating (merging operation) N1 times, where N1 is the number of elements included in the first sequence.

[0175] For example, when the second sequence is {10} and the first sequence is {10}, the second sequence is XORed with the first sequence to obtain the sequence {11}. The first sequence includes 2 elements. The sequence {11} is obtained by repeating the first bit twice (merging operation). Therefore, the first bit can be determined to be "1" based on the two repetitions (merging operation).

[0176] When the terminal device determines the second sequence using the optional method 1.2 described above, the network device obtains the first bit based on the first and second sequences by performing a division operation between the second sequence and the first sequence, and converting the result into bits. For example, the result {+1} is converted into bit "1", and {-1} is converted into bit "0", thus obtaining the first bit.

[0177] For example, when the second sequence is {1,-1} and the first sequence is {1,-1}, the second sequence is divided by the first sequence, and the result {+1} is converted into a bit to determine the first bit as "1".

[0178] When the terminal device determines the second sequence using the optional method 2.1 described above, the network device splits the second sequence to obtain a fourth sequence and a fifth sequence, with the fourth sequence preceding the fifth sequence. The fourth sequence is XORed with the first sequence, and then repeated N1 times (merging operation) to obtain the second bit. The fifth sequence is XORed with the first sequence, and then repeated N1 times (merging operation) to obtain the third bit, where N1 is the number of elements in the first sequence. The second and third bits are then decoded using line code to obtain the first bit, with the second bit preceding the third bit.

[0179] For example, the terminal device uses Manchester encoding. When the second sequence is {1001} and the first sequence is {10}, the second sequence is split into a fourth sequence {10} and a fifth sequence {01}. The fourth sequence {10} is XORed with the first sequence {10} to obtain the sequence {11}. The first sequence contains two elements. Sequence {11} is obtained by repeating the second bit twice, therefore the second bit can be determined to be the codeword bit {1}. The fifth sequence {01} is XORed with the first sequence {10} to obtain the sequence {00}. Sequence {00} is obtained by repeating the third bit twice, therefore the third bit can be determined to be the codeword bit {0}. The second and third bits are combined to obtain the codeword {10}. Manchester encoding of codeword {10} reveals that the first bit is "1".

[0180] When the terminal device determines the second sequence using optional method 2.2 as described above, the network device correspondingly splits the second sequence to obtain a fourth sequence and a fifth sequence, with the fourth sequence preceding the fifth sequence. The fourth sequence is then divided by the first sequence, and the result is converted into bits to obtain the second bit. The fourth sequence is then divided by the first sequence again, and the result is converted into bits to obtain the third bit. For example, the result {+1} is converted into bit "1", and {-1} is converted into bit "0" to obtain the first bit. The second and third bits are then decoded using line code to obtain the first bit, with the second bit preceding the third bit.

[0181] For example, the terminal device uses Manchester encoding. When the second sequence is {1,-1,-1,1} and the first sequence is {1,-1}, the second sequence is split into a fourth sequence {1,-1} and a fifth sequence {-1,1}. A division operation is performed between the fourth sequence {1,-1} and the first sequence {1,-1} to obtain the result {1}. Converting this result to bits, the second bit is the codeword bit {1}. A division operation is then performed between the fifth sequence {-1,1} and the first sequence {1,-1}, and the result is converted to bits to obtain the third bit, the codeword bit {-1}. Combining the second and third bits yields the codeword {1,-1}. Manchester encoding then decodes the codeword {1,-1} to obtain the first bit as "1".

[0182] To enable devices employing backscatter communication to implement FDMA and improve the utilization of transmission resources, embodiments of this application propose a communication method, such as... Figure 8 As shown, the communication method includes steps 801 to 803. Figure 8The method shown corresponds to the execution entities of a terminal device and a network device, or the chip of the terminal device and the chip of the network device. Here, the terminal device may refer to the aforementioned... Figure 1 The terminal equipment in the communication system shown can also be Figure 2A or Figure 2B The A-IoT device shown may refer to the aforementioned network device. Figure 1 The network devices in the communication system shown can also be Figure 2A or Figure 2B The base station is shown. This application embodiment uses a terminal device and a network device as examples for illustration. This application embodiment does not limit the executing entity of the communication method. Wherein:

[0183] 801. The terminal device determines a first sequence, which is one of a plurality of sequences. Any two sequences in the plurality of sequences occupy the same time length, and the time length of one element in any two sequences in the plurality of sequences is different. Each sequence in the plurality of sequences is obtained by repeating a base sequence multiple times, and the number of times any two sequences in the plurality of sequences are repeated based on the base sequence is different.

[0184] The number of repetitions of the base sequence can also be described as the number of repetitions of the line codewords. In one possible implementation, the network device sends first configuration information to the terminal device, and the terminal device receives the first configuration information from the network device. The parameters configured in the first configuration information include the duration of an element's occupation and the number of repetitions of the base sequence. The product of the duration of an element's occupation and the number of repetitions of the base sequence for any two sequences is the same. Alternatively, the parameters configured in the first configuration information include the duration of an element's occupation in a square wave sequence and the sequence following the repetition of the base sequence.

[0185] The duration of a sequence can be understood as the time domain of that sequence. The duration of an element in the sequence can be understood as the chip, time unit, or unit of time required to transmit that element. The duration of an element in the sequence can also be described as: time unit length, chip length, chip repetition count, or unit chip repetition count. Alternatively, the duration of an element can be implicitly described by the rate; for example, the reciprocal of the rate is the duration of an element, which can be described as: chip rate, switching rate, or square wave switching rate.

[0186] 802. The terminal device sends a first sequence, and the corresponding network device receives the first sequence, which carries the first bit.

[0187] In this embodiment, the multiple sequences can be understood as sequences sent by the terminal device, or sequences to be sent by the terminal device in advance. For example, the multiple sequences can be determined and sent by one terminal device, or they can be sent by multiple terminal devices respectively. For example, among the multiple terminal devices, one terminal device sends one or more sequences.

[0188] The base sequence is a codeword sequence obtained by encoding the first bit using a line code. Optionally, the line code encoding can be one of Manchester encoding, FM0 encoding, or Miller encoding. The encoding rules for Manchester encoding, FM0 encoding, or Miller encoding can be found in the above description and will not be repeated here. Alternatively, other line code encodings may be used; this application does not limit the type of line code encoding.

[0189] The base sequence corresponding to the first bit being "1" is different from the base sequence corresponding to the first bit being "1". Further optionally, the state of the elements in the base sequence corresponding to the first bit being "0" is the opposite of the state of the elements in the base sequence corresponding to the first bit being "0". The state of the elements in the sequence can be described as high or low level, ON or OFF, {1} or {0}. For example, the base sequence corresponding to the first bit being "1" is {10}, and conversely, the base sequence corresponding to the first bit being "0" can be {01}.

[0190] As described above, any two sequences in the plurality of sequences occupy the same time length. This can be understood as the product of the time length occupied by an element in any two sequences and the number of elements in those sequences being equal. For example, the plurality of sequences also includes a second sequence, wherein the time length occupied by an element in the first sequence is T1, the number of elements in the first sequence is N1, the time length occupied by an element in the second sequence is T2, the number of elements in the second sequence is N2, and the time length occupied by the first sequence and the time length occupied by the second sequence are both T, where T = T1 × N1 and T = T2 × N2.

[0191] For example, suppose the base sequence corresponding to the first bit being "1" is {10}. This set of base sequences includes three sequences: Sequence 1, Sequence 2, and Sequence 3. Sequences 1, 2, and 3 are all obtained by repeating the first bit being "1" multiple times. Sequence 1 is obtained by repeating the base sequence twice, and is represented as {1010}. Sequence 2 is obtained by repeating the base sequence four times, and is represented as {10101010}. Sequence 3 is obtained by repeating the base sequence six times, and is represented as {101010101010}. Sequences 1, 2, and 3 can be represented as follows: Figure 9As shown, the time length occupied by an element in sequence 1 is t1, the time length occupied by an element in sequence 2 is t2, and the time length occupied by an element in sequence 3 is t3, satisfying t1 = 2 × t2 = 3 × t3. The number of elements included in sequence 1 is n1, the number of elements included in sequence 2 is n2, and the number of elements included in sequence 3 is n3. It can be understood that n1 = 4, n2 = 8, and n3 = 12. Therefore, the time length occupied by any one of sequences 1, 2, and 3 is T = t1 × n1 = t2 × n2 = t3 × n3.

[0192] Optionally, the terminal device sends a second sequence, which is one of a plurality of sequences different from the first sequence, and the second sequence carries a second bit. Since the frequency shifting effects corresponding to the first and second sequences are different, the terminal device can send different signals to the network device at different frequency positions, thereby improving the utilization of transmission resources and transmission capacity.

[0193] The duration of a sequence can be understood as the time domain of that sequence. The duration of an element in the sequence can be understood as the chip, time unit, or unit of time required to transmit that element. The duration of an element in the sequence can also be described as: time unit length, chip length, chip repetition count, or unit chip repetition count. Alternatively, the duration of an element can be implicitly described by the rate; for example, the reciprocal of the rate is the duration of an element, which can be described as: chip rate, switching rate, or square wave switching rate. The number of elements in the sequence can also be described as: half the number of time units, half the number of chips, half the number of levels, the number of high-level chips + low-level chips, the number of square wave repetitions, or the number of square wave cycles.

[0194] Since the duration of each element in any two sequences differs, and the number of repetitions of each sequence based on the base sequence differs, while the duration of each sequence is the same, it can be determined that the number of elements in any two sequences is different. These sequences are used for frequency shifting of a signal; frequency shifting can be understood as moving the baseband signal from one frequency position to another. The frequency positions corresponding to the signal shifts between any two sequences are different. The more elements a sequence contains, the larger the shift range; the fewer elements, the smaller the shift range. Because the signal is affected by the frequency shift effect of any two sequences, the signal's frequency position is also different. Furthermore, since the duration of each sequence is the same, the transmission bandwidth corresponding to these sequences is the same. This means that when a terminal device uses any two sequences to transmit a signal, the transmission bandwidth is the same. Therefore, based on the method described in this application, when the terminal device uses any two sequences from the plurality of sequences to send signals, the signals corresponding to the two sequences are located at different frequency positions, thereby achieving the effect of multi-user FDMA and improving the utilization rate of transmission resources and transmission capacity.

[0195] In one possible implementation, the transmission bandwidth corresponding to sending the first sequence is associated with the duration of the second sequence. Optionally, the transmission bandwidth corresponding to sending the first sequence is twice the reciprocal of the duration of the first sequence. The transmission bandwidth corresponding to sending the first sequence by the terminal device can also be referred to as the device-to-reader transmission bandwidth (B). tx,D2R It is understandable that the transmission bandwidth is not related to the reciprocal of the chip length, but to the total length occupied by the sequence. Clearly defining the D2R transmission bandwidth is beneficial to the flexibility of the system in scheduling D2R transmissions.

[0196] For example, if one element in the first sequence occupies a duration of 133.33 microseconds, and the first sequence includes two elements, the total duration of the first sequence is 266.66 microseconds. Correspondingly, the duration of the second sequence is equal to that of the first sequence, i.e., 266.66 microseconds. The transmission bandwidth corresponding to sending the second sequence is twice the reciprocal of the duration of the second sequence, i.e., the transmission bandwidth corresponding to sending the second sequence is 15kHz.

[0197] In one possible implementation, the terminal devices used in the method described in the embodiments of this application can be device 1 and device 2a. Alternatively, for device 2b, FDMA can be implemented using direct frequency configuration, or for device 2b, D2R transmission only scrambles the PDRCH bits (including information bits or payload bits and CRC bits) without line code encoding. Or, when the device's transmission bandwidth is the maximum transmission bandwidth within the channel bandwidth, only scrambling is performed without line code encoding. The relevant definitions of device 1, device 2a, and device 2b can be found in the above description and will not be repeated here.

[0198] In one possible implementation, within the same channel bandwidth or system bandwidth, the number of configurable candidate parameters in the first information is associated with the transmission bandwidth, or with the duration of the second sequence. The smaller the transmission bandwidth or the longer the duration of the second sequence, the more configurable candidate parameters the first information can have.

[0199] In one possible implementation, when the transmission bandwidth or the time length occupied by the second sequence is the same, the number of configurable candidate parameters in the first information is associated with the channel bandwidth or system bandwidth. When the channel bandwidth or system bandwidth is larger, the number of configurable candidate parameters in the first information is greater.

[0200] 803. The network device obtains the first bit based on the first sequence and the base sequence.

[0201] In this embodiment of the application, the network device can determine the number of times the first sequence is repeated based on the base sequence according to the frequency position of the received first sequence, and then decode the first sequence to obtain the first bit based on the number of repetitions and the base sequence. For example, assuming the first sequence is {1010}, the base sequence corresponding to bit "1" is {10}, and the base sequence corresponding to bit "0" is {01}, and the number of repetitions of the base sequence corresponding to the frequency position of the first sequence is 2, the first bit can be obtained as "1".

[0202] To achieve the functions of the methods provided in the embodiments of this application, both the terminal device and the network device may include hardware structures and / or software modules, implementing the above functions in the form of hardware structures, software modules, or a combination of hardware structures and software modules. Whether a particular function is executed in the form of hardware structures, software modules, or a combination of hardware structures and software modules depends on the specific application and design constraints of the technical solution.

[0203] Please see Figure 10 , Figure 10A schematic diagram of a communication device according to an embodiment of this application is shown. The communication device may be a terminal device or a network device, or a device compatible with a terminal device or a network device. In one possible implementation, the communication device may include the device that performs the above-described... Figure 4 and Figure 8 The modules or units corresponding to the methods / operations / steps / actions performed by the terminal devices and network devices in the illustrated method embodiments can be hardware circuits, software, or a combination of hardware circuits and software.

[0204] Figure 10 The communication device shown may include a processing unit 1001 and a communication unit 1002. The processing unit 1001 is used for data processing. The communication unit 1002 integrates a receiving unit and a transmitting unit. The communication unit 1002 may also be referred to as a transceiver unit. Alternatively, the communication unit 1002 may be split into a receiving unit and a transmitting unit.

[0205] Figure 10 The communication device shown can be a terminal device or a device compatible with a terminal device. The communication device can also be a chip system.

[0206] The communication device is used to perform the above. Figure 4 When the terminal device performs some or all of its functions in the described method embodiment, the processing unit 1001 is used to determine a first sequence, which is one of a plurality of sequences, where any two sequences occupy the same time length, the time length occupied by one element of any two sequences is different, and the number of elements included in any two sequences is different; the communication unit 1002 is used to send a second sequence, which is determined based on the first bit and the first sequence.

[0207] In one possible implementation, when the processing unit 1001 is used to determine the first sequence, it is specifically used to: schedule the communication unit 1002 to receive first configuration information, the first configuration information being used to determine the first sequence.

[0208] In one possible implementation, the multiple sequences also include a third sequence, where the time length occupied by an element in the first sequence is T1, the number of elements in the first sequence is N1, the time length occupied by an element in the third sequence is T2, the number of elements in the third sequence is N2, and the time length occupied by the first sequence is T = T1 × N1, T = T2 × N2.

[0209] In one possible implementation, each of the multiple sequences is a square wave sequence, which is a sequence in which high and low levels alternate.

[0210] In one possible implementation, the sequence obtained by XORing the second sequence and the first bit with the first sequence after repeating them N1 times is the same, or the sequence obtained by multiplying the second sequence and the first bit with the first sequence is the same; where N1 is the number of elements included in the first sequence.

[0211] In one possible implementation, the processing unit 1001 is further configured to encode the first bit using a line code to obtain a second bit and a third bit, with the second bit preceding the third bit; wherein the second sequence includes a fourth sequence and a fifth sequence, with the fourth sequence preceding the fifth sequence; the sequence obtained by XORing the fourth sequence and the second bit, repeated N1 times, with the first sequence is identical; the sequence obtained by XORing the fifth sequence and the third bit, repeated N1 times, with the first sequence is identical; N1 is the number of elements included in the first sequence; or, the sequence obtained by multiplying the fourth sequence and the second bit with the first sequence is identical; the sequence obtained by multiplying the fifth sequence and the third bit with the first sequence is identical. Further optionally, the line code encoding is one of Manchester encoding, FM0 encoding (double-phase space code), or Miller encoding.

[0212] In one possible implementation, the transmission bandwidth corresponding to sending the second sequence is associated with the duration occupied by the second sequence. Further optionally, the transmission bandwidth corresponding to sending the second sequence is twice the reciprocal of the duration occupied by the second sequence.

[0213] The communication device is used to perform the above. Figure 4 When the network device performs some or all of its functions in the described method embodiment, the communication unit 1002 receives a second sequence; the processing unit 1001 is used to obtain a first bit based on the first sequence and the second sequence, wherein the first sequence is one of a plurality of sequences, any two sequences in the plurality of sequences occupy the same time length, any two elements in the plurality of sequences occupy different time lengths, and any two sequences in the plurality of sequences include different numbers of elements.

[0214] In one possible implementation, before the communication unit 1002 receives the second sequence, the communication unit 1002 is further configured to send first configuration information, which is used to determine the first sequence.

[0215] In one possible implementation, the multiple sequences also include a third sequence, where the time length occupied by an element in the first sequence is T1, the number of elements in the first sequence is N1, the time length occupied by an element in the third sequence is T2, the number of elements in the third sequence is N2, and the time length occupied by the first sequence is T = T1 × N1, T = T2 × N2.

[0216] In one possible implementation, each of the multiple sequences is a square wave sequence, which is a sequence in which high and low levels alternate.

[0217] In one possible implementation, the sequence obtained by XORing the second sequence and the first bit with the first sequence after repeating them N1 times is the same, or the sequence obtained by multiplying the second sequence and the first bit with the first sequence is the same; where N1 is the number of elements included in the first sequence.

[0218] In one possible implementation, when the processing unit 1001 obtains the first bit based on the first sequence and the second sequence, it specifically performs the following: the second bit and the third bit are decoded using a line code to obtain the first bit, with the second bit preceding the third bit; wherein the second sequence includes a fourth sequence and a fifth sequence, with the fourth sequence preceding the fifth sequence; the sequence obtained by XORing the fourth sequence and the second bit after repeating N1 times with the first sequence is the same, and the sequence obtained by XORing the fifth sequence and the third bit after repeating N1 times with the first sequence is the same, where N1 is the number of elements included in the first sequence; or, the sequence obtained by multiplying the fourth sequence and the second bit with the first sequence is the same, and the sequence obtained by multiplying the fifth sequence and the third bit with the first sequence is the same. Further optionally, the line code encoding is one of Manchester encoding, FM0 encoding (double phase space code), or Miller encoding.

[0219] In one possible implementation, the transmission bandwidth corresponding to receiving the second sequence is associated with the duration occupied by the second sequence. Further optionally, the transmission bandwidth corresponding to sending the second sequence is twice the reciprocal of the duration occupied by the second sequence.

[0220] The communication device is used to perform the above. Figure 8 When the terminal device performs some or all of its functions in the described method embodiment, the processing unit 1001 is used to determine a first sequence, which is one of a plurality of sequences, where any two sequences occupy the same time length, and any one element of any two sequences occupies a different time length, each of the plurality of sequences is obtained by repeating a base sequence multiple times, and any two sequences are repeated a different number of times based on the base sequence; the communication unit 1002 is used to send the first sequence, which carries a first bit.

[0221] In one possible implementation, the base sequence is a codeword sequence obtained by encoding the first bit using a line code. Further optionally, the base sequences corresponding to the first bit being "1" and the first bit being "0" are different.

[0222] In one possible implementation, the multiple sequences also include a second sequence, where the time length occupied by an element in the first sequence is T1, the number of elements in the first sequence is N1, the time length occupied by an element in the second sequence is T2, the number of elements in the second sequence is N2, and the time length of the first sequence is T = T1 × N1, T = T2 × N2.

[0223] In one possible implementation, the transmission bandwidth corresponding to sending the first sequence is associated with the duration occupied by the first sequence. Further optionally, the transmission bandwidth corresponding to sending the first sequence is twice the reciprocal of the duration occupied by the first sequence.

[0224] The communication device is used to perform the above. Figure 8 When the network device performs some or all of its functions in the described method embodiment, the communication unit 1002 is used to receive a first sequence, the first sequence carrying a first bit, the first sequence being one of a plurality of sequences, any two sequences of the plurality of sequences occupying the same time length, any two sequences of the plurality of sequences occupying a different time length for each element, each of the plurality of sequences being obtained by repeating a base sequence multiple times, and any two sequences of the plurality of sequences being repeated a different number of times based on the base sequence.

[0225] In one possible implementation, the first bit is obtained by decoding the base sequence using line code. Further, alternatively, the base sequence corresponding to the first bit being "1" is different from the base sequence corresponding to the first bit being "0".

[0226] In one possible implementation, the multiple sequences also include a second sequence, where the time length occupied by an element in the first sequence is T1, the number of elements in the first sequence is N1, the time length occupied by an element in the second sequence is T2, the number of elements in the second sequence is N2, and the time length of the first sequence is T = T1 × N1, T = T2 × N2.

[0227] In one possible implementation, the transmission bandwidth corresponding to receiving the first sequence is associated with the duration of the first sequence. Further optionally, the transmission bandwidth corresponding to receiving the first sequence is twice the reciprocal of the duration of the first sequence.

[0228] Figure 11 A schematic diagram of another communication device is provided. The communication device 1100 can be the terminal device in the above method embodiments, or it can be a chip, chip system, or processor that supports the terminal device in implementing the above methods. This communication device can be used to implement the methods described in the above method embodiments; for details, please refer to the descriptions in the above method embodiments.

[0229] Alternatively, the communication device 1100 may be a network device in the above method embodiments, or it may be a chip, chip system, or processor that supports the network device in implementing the above methods. This communication device can be used to implement the methods described in the above method embodiments; for details, please refer to the descriptions in the above method embodiments.

[0230] The communication device 1100 may include one or more processors 1101. The processor 1101 may be a general-purpose processor or a dedicated processor, for example, a baseband processor or a central processing unit. The baseband processor may be used to process communication protocols and communication data, while the central processing unit may be used to control the communication device (e.g., base station, baseband chip, terminal, terminal chip, DU or CU, etc.), execute software programs, and process data from the software programs.

[0231] Optionally, the communication device 1100 may include one or more memories 1102, which may store instructions 1104. These instructions can be executed on the processor 1101, causing the communication device 1100 to perform the methods described in the above method embodiments. Optionally, the memories 1102 may also store data. The processor 1101 and the memories 1102 may be provided separately or integrated together.

[0232] Optionally, the communication device 1100 may further include a transceiver 1105 and an antenna 1106. The transceiver 1105 may be referred to as a transceiver unit, transceiver, or transceiver circuit, etc., and is used to implement the transmission and reception functions. The transceiver 1105 may include a receiver and a transmitter. The receiver may be referred to as a receiver or receiving circuit, etc., and is used to implement the receiving function; the transmitter may be referred to as a transmitter or transmitting circuit, etc., and is used to implement the transmitting function.

[0233] The communication device 1100 is a terminal device: the processor 1101 is used to execute the data processing operations of the terminal device in the above method embodiment. The transceiver 1105 is used to execute the data sending and receiving operations of the terminal device in the above method embodiment.

[0234] Alternatively, the communication device 1100 may be a network device: the processor 1101 is used to execute the data processing operations of the network device in the above method embodiments. The transceiver 1105 is used to execute the data sending and receiving operations of the network device in the above method embodiments.

[0235] In another possible design, the processor 1101 may include a transceiver for implementing receive and transmit functions. For example, the transceiver may be a transceiver circuit, an interface, or an interface circuit. The transceiver circuit, interface, or interface circuit for implementing receive and transmit functions may be separate or integrated. The aforementioned transceiver circuit, interface, or interface circuit may be used for reading and writing code / data, or it may be used for transmitting or relaying signals.

[0236] In another possible design, the processor 1101 may optionally store instructions 1103, which, when executed on the processor 1101, cause the communication device 1100 to perform the methods described in the above method embodiments. Instructions 1103 may be embedded in the processor 1101; in this case, the processor 1101 may be implemented in hardware.

[0237] In another possible design, the communication device 1100 may include circuitry that can perform the functions of sending, receiving, or communicating as described in the foregoing method embodiments. The processors and transceivers described in this application can be implemented on integrated circuits (ICs), analog ICs, radio frequency integrated circuits (RFICs), mixed-signal ICs, application-specific integrated circuits (ASICs), printed circuit boards (PCBs), electronic devices, etc.

[0238] The communication device described in the above embodiments can be a terminal device or a network device, but the scope of the communication device described in the embodiments of this application is not limited to this, and the structure of the communication device can be unrestricted. Figure 11 The communication device may be a standalone device or part of a larger device. For example, the communication device may be:

[0239] (1) Independent integrated circuit IC, or chip, or chip system or subsystem;

[0240] (2) A collection of one or more ICs, optionally including a storage component for storing data and instructions;

[0241] (3) ASIC, such as modem (mobile station modem, MSM);

[0242] (4) Modules that can be embedded in other devices;

[0243] (5) Receivers, terminals, smart terminals, cellular phones, wireless devices, handheld devices, mobile units, vehicle-mounted devices, cloud devices, artificial intelligence devices, etc.

[0244] (6) Others, etc.

[0245] For cases where the communication device can be a chip or a chip system, please refer to [link / reference]. Figure 12 The diagram shows the structure of the chip. Figure 12 The chip shown includes a processor 1201 and an interface 1202. Optionally, it may also include a memory 1203. The number of processors 1201 can be one or more, and the number of interfaces 1202 can be multiple.

[0246] In one design, the chip is used to implement the functions of the terminal device in the embodiments of this application:

[0247] The interface 1202 is used for inputting or outputting signals;

[0248] The processor 1201 is used to perform data processing operations of the terminal device in the above method embodiments.

[0249] In another design, regarding the case where the chip is used to implement the functions of the network device in the embodiments of this application:

[0250] The interface 1202 is used for inputting or outputting signals;

[0251] The processor 1201 is used to perform data processing operations of the network device in the above method embodiment.

[0252] It is understood that some optional features in the embodiments of this application can be implemented independently in certain scenarios without relying on other features, such as the current solution on which they are based, to solve the corresponding technical problems and achieve the corresponding effects. Alternatively, they can be combined with other features as needed in certain scenarios. Correspondingly, the communication device given in the embodiments of this application can also implement these features or functions, which will not be elaborated here.

[0253] It should be understood that the processor in the embodiments of this application can be an integrated circuit chip with signal processing capabilities. In implementation, the steps of the above method embodiments can be completed by integrated logic circuits in the processor's hardware or by instructions in software form. The processor described above can be a general-purpose processor, a digital signal processor (DSP), an ASIC, a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.

[0254] It is understood that the memory in the embodiments of this application can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM). It should be noted that the memory used in the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0255] This application also provides a computer-readable medium for storing computer software instructions that, when executed by a communication device, implement the functions of any of the above method embodiments.

[0256] This application also provides a computer program product for storing computer software instructions, which, when executed by a communication device, implement the functions of any of the above method embodiments.

[0257] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented, in whole or in part, as a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device such as a server or data center that integrates one or more available media. The available media may be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., high-density digital video discs (DVDs)), or semiconductor media (e.g., solid-state drives (SSDs)).

[0258] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

Claims

1. A communication method, characterized in that, The method includes: A first sequence is determined, which is one of a plurality of sequences, wherein any two sequences in the plurality of sequences occupy the same time length, any one element in any two sequences in the plurality of sequences occupies a different time length, and any two sequences in the plurality of sequences include a different number of elements. A second sequence is sent, which is determined based on the first bit and the first sequence.

2. The method according to claim 1, characterized in that, Determining the first sequence includes: Receive first configuration information, which is used to determine the first sequence.

3. The method according to claim 1 or 2, characterized in that, The plurality of sequences also includes a third sequence, wherein the time length occupied by an element in the first sequence is T1, the number of elements included in the first sequence is N1, the time length occupied by an element in the third sequence is T2, the number of elements included in the third sequence is N2, and the time length occupied by the first sequence is T = T1 × N1, T = T2 × N2.

4. The method according to any one of claims 1 to 3, characterized in that, Each of the plurality of sequences is a square wave sequence, wherein the square wave sequence is a sequence in which high level and low level alternate.

5. The method according to any one of claims 1 to 4, characterized in that, The sequence obtained by XORing the second sequence and the first bit with the first sequence after repeating them N1 times is the same; or, the sequence obtained by multiplying the second sequence and the first bit with the first sequence is the same. Wherein, N1 is the number of elements included in the first sequence.

6. The method according to any one of claims 1 to 4, characterized in that, The method further includes: The first bit is encoded using a line code to obtain the second bit and the third bit, with the second bit preceding the third bit; The second sequence includes a fourth sequence and a fifth sequence, wherein the fourth sequence precedes the fifth sequence; The sequence obtained by XORing the fourth sequence and the second bit, repeated N1 times, with the first sequence is the same; the sequence obtained by XORing the fifth sequence and the third bit, repeated N1 times, with the first sequence is the same, where N1 is the number of elements in the first sequence; or, The sequence obtained by multiplying the fourth sequence and the second bit with the first sequence is the same, and the sequence obtained by multiplying the fifth sequence and the third bit with the first sequence is the same.

7. The method according to claim 6, characterized in that, The line code is encoded as one of Manchester encoding, FM0 encoding (double-phase space code), or Miller encoding.

8. The method according to any one of claims 1 to 7, characterized in that, The transmission bandwidth corresponding to sending the second sequence is related to the time length occupied by the second sequence.

9. The method according to claim 8, characterized in that, The transmission bandwidth corresponding to sending the second sequence is twice the reciprocal of the time length occupied by the second sequence.

10. A communication method, characterized in that, The method includes: Receive the second sequence; The first bit is obtained based on the first sequence and the second sequence. The first sequence is one of a plurality of sequences. Any two sequences in the plurality of sequences occupy the same time length, the time length occupied by one element in any two sequences in the plurality of sequences is different, and the number of elements included in any two sequences in the plurality of sequences is different.

11. The method according to claim 10, characterized in that, Prior to receiving the second sequence, the method further includes: Send first configuration information, which is used to determine the first sequence.

12. The method according to claim 10 or 11, characterized in that, The plurality of sequences also includes a third sequence, wherein the time length occupied by an element in the first sequence is T1, the number of elements included in the first sequence is N1, the time length occupied by an element in the third sequence is T2, the number of elements included in the third sequence is N2, and the time length occupied by the first sequence is T = T1 × N1, T = T2 × N2.

13. The method according to any one of claims 10 to 12, characterized in that, Each of the plurality of sequences is a square wave sequence, wherein the square wave sequence is a sequence in which high level and low level alternate.

14. The method according to any one of claims 10 to 13, characterized in that, The sequence obtained by XORing the second sequence and the first bit with the first sequence after repeating them N1 times is the same; or, the sequence obtained by multiplying the second sequence and the first bit with the first sequence is the same. Wherein, N1 is the number of elements included in the first sequence.

15. The method according to any one of claims 10 to 13, characterized in that... ; The step of obtaining the first bit based on the first sequence and the second sequence includes: The second bit and the third bit are decoded using line code to obtain the first bit, with the second bit preceding the third bit; The second sequence includes a fourth sequence and a fifth sequence, wherein the fourth sequence precedes the fifth sequence; The sequence obtained by XORing the fourth sequence and the second bit after repeating them N1 times with the first sequence is the same; the sequence obtained by XORing the fifth sequence and the third bit after repeating them N1 times with the first sequence is the same, where N1 is the number of elements included in the first sequence; or, The sequence obtained by multiplying the fourth sequence and the second bit with the first sequence is the same, and the sequence obtained by multiplying the fifth sequence and the third bit with the first sequence is the same.

16. The method according to claim 15, characterized in that, The line code is encoded as one of Manchester encoding, FM0 encoding (double-phase space code), or Miller encoding.

17. The method according to any one of claims 10 to 16, characterized in that, The transmission bandwidth corresponding to receiving the second sequence is related to the time length occupied by the second sequence.

18. The method according to claim 17, characterized in that, The transmission bandwidth corresponding to sending the second sequence is twice the reciprocal of the time length occupied by the second sequence.

19. A communication method, characterized in that, The method includes: A first sequence is determined, which is one of a plurality of sequences. Any two sequences in the plurality of sequences occupy the same time length, and each element in any two sequences in the plurality of sequences occupies a different time length. Each sequence in the plurality of sequences is obtained by repeating a base sequence multiple times, and the number of times any two sequences in the plurality of sequences are repeated based on the base sequence is different. Send a first sequence, which carries a first bit.

20. The method according to claim 19, characterized in that, The base sequence is a codeword sequence obtained by encoding the first bit using a line code.

21. The method according to claim 20, characterized in that, The base sequence corresponding to the first bit being "1" is different from the base sequence corresponding to the first bit being "0".

22. The method according to any one of claims 19 to 21, characterized in that, The plurality of sequences also includes a second sequence, wherein the time length occupied by one element in the first sequence is T1, the number of elements included in the first sequence is N1, the time length occupied by one element in the second sequence is T2, the number of elements included in the second sequence is N2, and the time length of the first sequence is T = T1 × N1, T = T2 × N2.

23. The method according to any one of claims 19 to 22, characterized in that, The transmission bandwidth corresponding to the first sequence is related to the duration occupied by the first sequence.

24. The method according to claim 23, characterized in that, The transmission bandwidth corresponding to sending the first sequence is twice the reciprocal of the time length occupied by the first sequence.

25. A communication method, characterized in that, The method includes: Receive a first sequence, the first sequence carrying a first bit, the first sequence being one of a plurality of sequences, any two sequences of the plurality of sequences occupying the same time length, any one element of any two sequences of the plurality of sequences occupying a different time length, each of the plurality of sequences being obtained by repeating the base sequence multiple times, and any two sequences of the plurality of sequences being repeated the base sequence a different number of times.

26. The method according to claim 25, characterized in that, The first bit is obtained by decoding the base sequence using line code.

27. The method according to claim 25 or 26, characterized in that, The base sequence corresponding to the first bit being "1" is different from the base sequence corresponding to the first bit being "0".

28. The method according to any one of claims 25 to 27, characterized in that, The plurality of sequences also includes a second sequence, wherein the time length occupied by one element in the first sequence is T1, the number of elements included in the first sequence is N1, the time length occupied by one element in the second sequence is T2, the number of elements included in the second sequence is N2, and the time length of the first sequence is T = T1 × N1, T = T2 × N2.

29. The method according to any one of claims 25 to 28, characterized in that, The transmission bandwidth corresponding to the first sequence is related to the duration occupied by the first sequence.

30. The method according to claim 29, characterized in that, The transmission bandwidth corresponding to the first sequence is twice the reciprocal of the time length occupied by the first sequence.

31. A communication device, characterized in that, The communication device includes a module or unit for performing the method of any one of claims 1 to 9, or the communication device includes a module or unit for performing the method of any one of claims 10 to 18, the communication device includes a module or unit for performing the method of any one of claims 19 to 24, or the communication device includes a module or unit for performing the method of any one of claims 25 to 30.

32. A communication device, characterized in that, The method includes a processor coupled to a memory, the processor being configured to execute a computer program or instructions stored in the memory to implement the method as described in any one of claims 1 to 9, or to implement the method as described in any one of claims 10 to 18, or to implement the method as described in any one of claims 19 to 24, or to implement the method as described in any one of claims 25 to 30.

33. The apparatus according to claim 32, characterized in that, The device further includes the memory and / or a transceiver for sending and receiving data and / or signaling.

34. A communication device, characterized in that, The device includes a processor and an interface circuit. The interface circuit is used to receive signals from other communication devices besides the communication device and transmit them to the processor, or to send signals from the processor to other communication devices besides the communication device. The processor executes the method as described in any one of claims 1 to 9 through logic circuits or execution instructions; or, the processor executes the method as described in any one of claims 10 to 18 through logic circuits or execution instructions; or, the processor executes the method as described in any one of claims 19 to 24 through logic circuits or execution instructions; or, the processor executes the method as described in any one of claims 25 to 30 through logic circuits or execution instructions.

35. A computer-readable storage medium, characterized in that, The storage medium stores a computer program or instructions, which, when executed by a communication device, result in the following: the method as described in any one of claims 1 to 9 is executed; or the method as described in any one of claims 10 to 18 is executed; or the method as described in any one of claims 19 to 24 is executed; or the method as described in any one of claims 25 to 30 is executed.