A visualization method and system for discovering network topology faults and false alarm self-healing based on data center application inference large models
By combining grid partitioning and visualization image processing with computational power analysis and microfluidic chip management, the problems of insufficient collaborative innovation and insufficient computing resources of VRAM chips in network topology intelligent agents are solved, realizing efficient network topology fault detection and false alarm self-healing, and improving the application capabilities of VRAM chips in data centers.
Patent Information
- Application Number
- CN202511422321.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-30
- Publication Date
- 2026-01-27
- Estimated Expiration
- 2045-09-30
AI Technical Summary
In existing technologies, when VRAM chips are combined with DeepSeek and applied to network topology intelligent agents, there is a lack of collaborative innovation in the fields of devices, methods, architecture and integration. The reasoning ability of AI algorithms needs to be improved, and the demand for computing resources is huge while the supply is insufficient. As a result, there is a lack of effective means for network topology fault detection and false alarm self-healing visualization methods.
A grid partitioning algorithm is used to partition the network and form a DeepSeek inference network topology. Visual image processing and resource annotation are performed. Through computational power analysis of the transmission protocol, combined with microfluidic chip management, CPU, GPU and LPU chip operations are performed to realize the replanning and self-healing of network topology resources.
It improves the accuracy of network topology fault detection, reduces false alarms, enhances the scalability and flexibility of the network management platform and data acquisition platform, and meets the business needs of multiple protocols and multiple devices in complex topology business scenarios.
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Figure CN120934985B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of data processing, and more specifically, to a visualization method and system for discovering network topology faults and self-healing of false alarms based on a large data center application inference model. Background Technology
[0002] With the continuous development of computer graphics processing and multimedia applications, VRAM technology is also constantly evolving. In the future, with advancements in manufacturing processes and optimizations in architecture design, VRAM's performance indicators such as bandwidth, capacity, and latency will be further improved. Simultaneously, with the popularization and increasing application demands of emerging technologies such as ray tracing and virtual reality, the requirements for VRAM performance will become increasingly stringent. As a crucial component of graphics cards, VRAM chips play a key role in graphics processing and multimedia applications. With the continuous maturation of DeepSeek technology and the expansion of its application scenarios, it is expected to play a greater role in various industries. At the same time, DeepSeek also needs to continuously optimize user experience and improve service stability to consolidate its market position. Furthermore, the rise of DeepSeek will also drive the further development of China's AI industry, accelerating the popularization and application of AI technology. Currently, with the large-scale application of DeepSeek and VRAM chips, data center network topology inference discovery technology has made it possible to apply this technology to new data centers. The development of data center network topology inference discovery technology, with the large-scale application of DeepSeek and VRAM chips, requires policy support (such as "Eastern Data, Western Computing"), industry-academia-research cooperation, and breakthroughs in process technology limitations. It also necessitates strengthening HBM3 / GDDR7 R&D to enhance competitiveness in the high-end market. Currently, the application of VRAM chips combined with DeepSeek in network topology intelligent agent applications faces the following challenges: 1) The development of VRAM chips combined with DeepSeek in network topology intelligent agent applications requires collaborative innovation across various fields such as devices, methods, architecture, and integration. However, the current upstream and downstream industry chains are not closely linked, affecting the overall development level of the industry. The inference capability of AI algorithms in intelligent agent application scenarios needs improvement. 2) AI model training and inference require huge computing resources, and the current supply is still insufficient. Optimizing computing power utilization, developing dedicated hardware, strengthening power infrastructure, and algorithm innovation can alleviate resource shortages and promote the efficient development of AI technology. Although DeepSeek is open-source and network topology application scenario technology is relatively mature, the limitations of implicit VRAM chips and power costs still need to be addressed. AI servers consume 6-8 times more power than traditional servers, and their reliance on fossil fuels exacerbates carbon emissions. Despite the rapid development of wind, solar, and nuclear power, their stability and grid connection capabilities still face challenges. AI model training and inference processes demand enormous computing resources, especially during the training phase, while the current supply of computing resources remains insufficient.
[0003] Therefore, how to provide a visualization method for discovering network topology faults and self-healing false alarms based on a large data center application inference model has become an urgent problem for those skilled in the art. Summary of the Invention
[0004] To address the aforementioned issues, this application proposes a visualization method for discovering network topology faults and self-healing false alarms based on a large-scale inference model for data center applications. The method includes the following steps: First, a grid partitioning algorithm is used to partition the network into a DeepSeek inference network topology and label chip resources. Second, visualization image processing is performed on the DeepSeek inference network topology to complete network topology resource replanning and visualization data annotation, outputting the inference conclusions of the large-scale DeepSeek inference model. Third, after the DeepSeek inference model inference conclusions are output, the application's transmission protocol is obtained from the network topology gateway configuration file as input parameters for DeepSeek inference model inference analysis, and computational power is quantified. Fourth, after computational power quantification, the DeepSeek inference network topology nodes are associated, and alarms are triggered in the transmission protocol based on fluctuations in computational power.
[0005] The visualization method for discovering network topology faults and self-healing false alarms based on a large data center application inference model, as described above, includes the following sub-steps: First, network resources such as network devices or servers are connected to the network to form communication network resources. Second, the causal relationships of log service data resources within the network resource group are analyzed, and grid division is performed. Third, the grid size of each grid is adjusted according to the grid usage density. Fourth, a specified memory region is allocated after grid division, and a network topology is formed, generating chip resource tags.
[0006] The visualization method for discovering network topology faults and self-healing false alarms based on a large data center application inference model, as described above, is represented by the following mesh partitioning:
[0007] ;
[0008] It is the grid density. It is the density of business groups. It is a weight used for the number of business groups. It refers to the number of services within the same weight within the grid. It is a weight used to determine the number of business weights. It refers to the number of related business equipment resources. It is a weight used to associate the number of business equipment resources.
[0009] The visualization method for discovering network topology faults and self-healing false alarms based on a large data center application inference model, as described above, involves adjusting the grid size of each grid by dividing high-density areas into larger grids and low-density areas into smaller grids, specifically as follows:
[0010] ;
[0011] in, This is the adjusted grid size. This is the initial grid size. It is the network usage density for each grid. It is the average network usage density of the entire grid.
[0012] The visualization method for discovering network topology faults and self-healing false alarms based on the large-scale inference model for data center applications, as described above, involves visual image processing of the DeepSeek inference network topology, replanning network topology resources, and visual data annotation. The output of the DeepSeek inference model's inference conclusions includes the following sub-steps: Locating the grid where the current resource is located based on the sub-grid ID in the chip resource tag; performing quadrant and global quadrant positioning for each resource within the sub-grid to complete the visual topology resource binding; After visual topology resource binding, when the large-scale inference model performs calculations on CPU, GPU, and LPU chips, matching is performed on the chip memory ID, chip region ID, microfluidic chip region ID, quadrant, and global quadrant.
[0013] A visualization system for discovering network topology faults and self-healing false alarms based on a large-scale inference model for data center applications includes a network topology forming unit, a visualization image processing unit, a model inference analysis unit, and a network topology node association unit. The network topology forming unit uses a grid partitioning algorithm to partition the network and form a DeepSeek inference network topology and chip resource markers. The visualization image processing unit performs visualization image processing on the DeepSeek inference network topology, completes network topology resource replanning and visualization data annotation, and outputs the inference conclusions of the large-scale DeepSeek inference model. The model inference analysis unit obtains the application's transmission protocol from the network topology gateway configuration file as input parameters for DeepSeek inference model inference analysis and performs computational power optimization. The network topology node association unit associates DeepSeek inference network topology nodes and issues alarms based on fluctuations in computational power at the transmission protocol level.
[0014] The visualization system for discovering network topology faults and self-healing false alarms based on a large-scale inference model for data center applications, as described above, includes the following sub-steps in which the network topology forming unit uses a grid partitioning algorithm to partition the network and form the DeepSeek inference network topology and chip resource tags: connecting network resources such as network devices or servers to the network to form communication network resources; analyzing the causal relationships of log service data resources within the network resource group and performing grid partitioning; adjusting the grid size of each grid according to the grid usage density; allocating a specified memory area after grid partitioning, forming the network topology, and generating chip resource tags.
[0015] The visualization system described above, which discovers network topology faults and self-heals false alarms based on a large data center application inference model, uses a grid-based representation within the network topology forming unit:
[0016] ;
[0017] It is the grid density. It is the density of business groups. It is a weight used for the number of business groups. It refers to the number of services within the same weight within the grid. It is a weight used to determine the number of business weights. It refers to the number of related business equipment resources. It is a weight used to associate the number of business equipment resources.
[0018] The visualization system for discovering network topology faults and self-healing false alarms based on a large data center application inference model, as described above, involves adjusting the grid size of each grid within the network topology forming unit. This includes dividing high-density areas into larger grids and low-density areas into smaller grids, specifically as follows:
[0019] ;
[0020] in, This is the adjusted grid size. This is the initial grid size. It is the network usage density for each grid. It is the average network usage density of the entire grid.
[0021] The visualization system for discovering network topology faults and self-healing false alarms based on a large-scale inference model for data center applications, as described above, includes a visualization image processing unit that performs visualization image processing on the DeepSeek inference network topology, replans network topology resources, and annotates visualization data. The output of the DeepSeek inference model's inference conclusions includes the following sub-steps: locating the grid where the current resource is located based on the sub-grid ID in the chip resource tag; performing quadrant and global quadrant positioning for each resource within the sub-grid to complete the visualization topology resource binding; after visualization topology resource binding, when the inference model performs calculations on CPU, GPU, and LPU chips, matching is performed on the chip memory ID, chip region ID, microfluidic chip region ID, quadrant, and global quadrant.
[0022] This application has the following beneficial effects:
[0023] (1) In this application, the input parameters are first divided into several regions according to the grid and chip resource tags are generated. These are then used as input parameters for database retrieval. During the retrieval process, the associated data is obtained according to the chip resource tags as conditions. The query speed is fast, which makes up for the possibility that the network devices may be hidden and not discovered.
[0024] (2) This application deploys Deepseek inference model and outputs inference conclusions, refining the granularity of network topology information to the computing power level of the transmission protocol. The inference model is analyzed based on the transmission protocol of the application from the network topology gateway configuration file. During the inference process, the computing power is quantified based on two parameters: chip memory region ID and network resource ID, so as to track the computing power application of the resource in the network topology throughout the process. The operation and transmission status of the resource in the network topology are enriched from the perspective of computing power indicators. The fluctuation of computing power level is used to alarm the transmission protocol, which helps to reduce the operation and maintenance losses caused by false alarms.
[0025] (3) In the network topology visualization image processing process, this application uses microfluidic chips to manage the CPU, GPU and LPU chips used for the computation of the large inference model, and uses chip resource tags as inference parameters to input into the large inference model. During the computation process, the quadrant location is matched with the AI algorithm embedded in the large inference model to discover the network topology, thereby improving the accuracy of the large model's inference conclusions and visualization.
[0026] (4) This application optimizes the data preprocessing stage. After network resources such as network devices or servers are connected to the network, a series of discoverable communication network resources are formed. Each resource has a unique resource description for communication network services to call. All network resources are divided into grids according to business relevance and weight indicators using a grid partitioning algorithm to form a network topology and generate chip resource tags. This enables the service needs of multiple protocols and multiple devices in complex topology business scenarios to be met, and enhances the scalability and flexibility of the network management platform or data acquisition platform gateway scheduling. Attached Figure Description
[0027] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this application. For those skilled in the art, other drawings can be obtained based on these drawings.
[0028] Figure 1 This is a flowchart illustrating a visualization method for discovering network topology faults and self-healing false alarms based on a large data center application inference model, according to an embodiment of this application.
[0029] Figure 2 This is a schematic diagram of the internal structure of a visualization system for discovering network topology faults and self-healing false alarms based on a large data center application inference model, according to an embodiment of this application. Detailed Implementation
[0030] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.
[0031] The visualization method and system for discovering network topology faults and self-healing false alarms based on a large-scale inference model for data center applications proposed in this application, taking advantage of the continuous improvement of image processing capabilities and DeepSeek's large-scale application support for programmable chips, makes it possible to apply the large-scale inference model to network topology. After the DeepSeek inference model outputs its inference conclusions, in order to refine the granularity of network topology information to the computing power level of the transmission protocol, inference analysis of the large-scale inference model is performed from the network topology gateway configuration file according to the applied transmission protocol. During the inference process, the computing power is quantified based on two parameters: chip memory region ID and network resource ID, thereby tracking the computing power application of the resource in the network topology throughout the process. This enriches the view of the resource's operation and transmission status in the network topology from the perspective of computing power indicators. By monitoring the fluctuations at the computing power level during the transmission protocol alarm process, it helps to reduce the operation and maintenance losses caused by false alarms. Example 1
[0032] like Figure 1 As shown, this embodiment provides a visualization method for discovering network topology faults and self-healing of false alarms based on a large data center application inference model, specifically including the following steps:
[0033] Step S1: Use a grid partitioning algorithm to partition the grid and form the DeepSeek inference network topology and chip resource tags.
[0034] After network devices or servers and other network resources are connected to the network, a series of discoverable communication network resources are formed. Each resource has a unique resource description for communication network services to call. All network resources are divided into grids according to business relevance and weight indicators using a grid partitioning algorithm to form a network topology and generate chip resource tags.
[0035] Step S1 includes the following sub-steps:
[0036] Step S11: Connect network devices or servers and other network resources to the network to form communication network resources.
[0037] After network devices or servers and other network resources are connected to the network, they form a series of discoverable communication network resources. Each resource has a unique resource description, which can be called by communication network services.
[0038] Understandably, the name and IP address of the network device or server being accessed are used as input parameters in the DeepSeek inference model.
[0039] Step S12: Analyze the causal relationships of log service data resources within the network and perform network partitioning.
[0040] The intelligent grid segmentation method is used for grid division, and the calculation formula is as follows:
[0041] ;
[0042] in, It refers to the mesh density; the more causal relationships there are, the denser the mesh. This refers to the density of service groups; the more instances of the same service within a grid, the denser the grid. It refers to the number of services with the same weight within a grid; the more services there are, the denser the grid. It refers to the number of associated business equipment resources; the larger the number of resources, the denser the grid. , and These are weights used for the number of business groups, the number of business weights, and the number of associated business device resources, respectively. These weights can be set according to the actual situation.
[0043] Step S13: Adjust the grid size of each grid according to the grid usage density.
[0044] High-density areas are divided into larger grids, and low-density areas are divided into smaller grids. This allows for finer grid division, ensuring that the data within each grid is more accurate and meaningful for analysis. The specific calculation formula is as follows:
[0045] ;
[0046] in, This is the adjusted grid size. This is the initial grid size. It is the network usage density for each grid. It is the average network usage density of the entire grid.
[0047] Step S14: After meshing, allocate a specified memory region to form a network topology and generate chip resource tags.
[0048] The designated memory region allocated in the grid includes the memory regions of CPU, GPU, and LPU. The designated memory region is defined as a subgrid, and the depth of the subgrid is divided into the specific GPU of the specific board in the specific device. This enables the rapid location of the fault information and provides a more intuitive understanding of the network operation from a visualization perspective.
[0049] The chip resource tagging format is: CPU, GPU, and LPU chip memory region ID#grid ID#subgrid ID#network resource ID#grid resource density. The resource tagging allows for a direct understanding of the network operation within the network.
[0050] Step S2: Perform visualization image processing on the DeepSeek inference network topology, re-plan network topology resources and visualize data annotation, and output the inference conclusion of the DeepSeek inference large model.
[0051] In the network topology visualization image processing, a microfluidic chip manages the CPU, GPU, and LPU chips used for computation in the large inference model. Chip resource tags are input as inference parameters into the large inference model. Quadrant positioning is used to match the network topology with the embedded AI algorithm within the large inference model, improving the accuracy of the model's inference conclusions. By analyzing chip resource tags, quadrant positioning of resources within the network topology is performed and associated with chip memory regions, completing image localization and processing.
[0052] First, data management between the microfluidic chip and the CPU, GPU, and LPU chips is achieved via the Socket API. Chip resource tags are then updated, with the following format: Microfluidic chip region ID#CPU, GPU, and LPU chip memory region ID#Grid ID#Subgrid ID#Network resource ID#Grid resource density. Second, quadrants in image localization are configured using chip resource tags. By analyzing the chip resource tags, resources are quadrant-located within the network topology and associated with chip memory regions, thus completing image localization and processing.
[0053] Based on the above, step S2 includes the following sub-steps:
[0054] Step S21: Locate the grid where the current resource is located based on the subgrid ID in the chip resource tag, and perform quadrant positioning and global quadrant positioning for each resource within the subgrid to complete the visual topology resource binding.
[0055] The subgrid is mapped to an image, and each piece of information has five quadrants on the image. Taking the device connected to the network in the input parameters as the center point, the associated device information and information such as boards, chips, and memory are arranged in quadrants on the image around the center point.
[0056] The first quadrant within the subgrid: the region enclosed by the positive half-axis of the X-axis and the positive half-axis of the Y-axis, with coordinates (positive, positive), the upper right region.
[0057] The second quadrant within the subgrid: the region enclosed by the negative half-axis of the X-axis and the positive half-axis of the Y-axis, with coordinate signs of (negative, positive), the upper left region.
[0058] The third quadrant within the subgrid: the region enclosed by the negative half-axis of the X-axis and the negative half-axis of the Y-axis, with coordinates of (negative, negative), the lower left region.
[0059] The fourth quadrant within the subgrid: the region enclosed by the positive half-axis of the X-axis and the negative half-axis of the Y-axis, with coordinate signs of (positive, negative), the lower right region.
[0060] Global Quadrant: In addition to the four main quadrants, there is a special region—the points on the coordinate axes that do not belong to any grid quadrant. These include the origin (0, 0) and all points on the X or Y axis.
[0061] For example, the chip is located in the first quadrant of the central device, the board is located in the second quadrant of the central device, and the associated device is located 0.1 next to the global quadrant (0,0) of the central device.
[0062] Update chip resource tags, with the following format: Global Quadrant#Quadrant#Microfluidic Chip Region ID#CPU, GPU, and LPU Chip Memory Region ID#Grid ID#Subgrid ID#Network Resource ID#Grid Resource Density;
[0063] Step S22: After visualizing the topology resource binding, when the large inference model performs calculations using CPU, GPU and LPU chips, it matches based on chip memory ID, chip region ID, microfluidic chip region ID, quadrant and global quadrant.
[0064] The matching result represents the inference conclusion of the DeepSeek network topology inference model. If the chip memory ID, chip region ID, or microfluidic chip region ID does not match, it means that the network topology does not contain that node. If the chip memory ID, chip region ID, or microfluidic chip region ID matches, but the quadrant and global quadrant do not match the chip region ID, it means that the network topology node has changed. In this case, the microfluidic chip region ID needs to be updated with the memory region ID, grid ID, subgrid ID, corresponding quadrant, and global quadrant. This allows for the replanning of network topology resources and the visualization of data annotation during the DeepSeek network topology inference process.
[0065] Step S3: After the DeepSeek inference model outputs its inference conclusions, the application's transmission protocol is obtained from the network topology gateway configuration file as input parameters for DeepSeek inference model inference analysis, and computational power is quantified.
[0066] After the Deepseek inference model outputs its inference conclusions, to refine the granularity of network topology information to the computing power level of the transmission protocol, inference analysis is performed based on the application's transmission protocol from the network topology gateway configuration file. During the inference process, computing power is quantified based on two parameters: chip memory region ID and network resource ID, thereby tracking the computing power application of the resource in the network topology throughout the entire process. This enriches the understanding of the resource's operation and transmission status in the network topology from the perspective of computing power indicators. By monitoring fluctuations at the computing power level, it helps reduce operational losses caused by false alarms during transmission protocol alarms.
[0067] The application's transport protocols, such as SNMP, UDP, HTTP, HTTPS, and TCP / IP, are obtained from the network topology gateway configuration file and used as input parameters for large-scale inference model analysis. During the inference process, computational power is quantified based on two parameters: chip memory region ID and network resource ID.
[0068] A method for computational power quantization of network topology data transmission protocols, characterized in that the computational power quantization model is specifically as follows:
[0069] ;
[0070] In the formula, The computing power requirement is represented by n, where n is the number of logic operation chips. This represents the mapping ratio coefficient of the i-th logic operation chip. Indicates the i-th logic operation chip The mapping function for the provided logical operation capabilities, q1(TOPS) represents the redundant computing power of logical operations, and m is the number of parallel computing chips. This represents the mapping scaling factor for the j-th parallel computing chip. Represents the j-th parallel computing chip The mapping function for the provided parallel computing capabilities, q²(FLOPS) represents the redundant computing power of parallel computing, and p is the number of neural network acceleration chips. This represents the mapping scaling factor for the k-th neural network acceleration chip. This represents the k-th neural network acceleration chip. The provided mapping function for neural network acceleration capabilities, q3(FLOPS), represents the redundant computing power for neural network acceleration.
[0071] Step S4: Associate the DeepSeek inference network topology nodes and issue alarms in the transmission protocol based on fluctuations in computing power.
[0072] The NETCONF (Network Configuration Protocol) network management protocol controls the network device protocol to be sent to the corresponding network device configuration file, and automatically generates lines in the visualization module to associate topology nodes.
[0073] The report enriches the understanding of resource operation and transmission status in the network topology from the perspective of computing power indicators. It also helps to reduce operational losses caused by false alarms during transmission protocol alarms by analyzing fluctuations in computing power.
[0074] Alerting based on fluctuations in computing power at the transmission protocol level includes determining whether to issue an alert based on the generalization capability of data transmission between multiple transmission protocols in the network topology. This involves using a DeepSeek inference model to analyze the generalization capability of data transmission between multiple transmission protocols in the network topology. The specific process is as follows:
[0075] ;
[0076] ;
[0077] in, The loss function applied to the transmission protocol instructions. Let i be the number of training samples for this transmission protocol, and i be a natural number. The regularization coefficient is . This is a parameter regularization term (to prevent the model from overfitting). As a prompt word, This is the target answer.
[0078] Through the loss function It can detect potential communication failures of the transmission protocol and issue an alarm when the probability of communication failure exceeds a specified threshold.
[0079] The loss function for context learning in the configuration file on the gateway of the network topology. The number of example prompts for the transport protocol name, compatible device model, and service type in the context, where j is a natural number. As a prompt word, This is the target answer.
[0080] Through these optimization techniques, this invention significantly improves the Deepseek inference model in network applications by replacing manual code development with inference computation, enabling it to meet the business needs of multiple protocols and devices in complex topology business scenarios, and enhancing the scalability and flexibility of gateway scheduling in network management platforms or data acquisition platforms.
[0081] Example 2
[0082] like Figure 2 As shown in the embodiment of this application, a visualization system for discovering network topology faults and self-healing false alarms based on a large data center application inference model is provided. Specifically, it includes: a network topology forming unit 210, a visualization image processing unit 220, a model inference analysis unit 230, and a network topology node association unit 240.
[0083] The network topology forming unit 210 is used to perform grid partitioning using a grid partitioning algorithm and form the DeepSeek inference network topology and chip resource tags.
[0084] After network devices or servers and other network resources are connected to the network, a series of discoverable communication network resources are formed. Each resource has a unique resource description for communication network services to call. All network resources are divided into grids according to business relevance and weight indicators using a grid partitioning algorithm to form a network topology and generate chip resource tags.
[0085] Network topology forming unit 210 specifically performs the following sub-steps:
[0086] Step T1: Connect network devices or servers and other network resources to the network to form communication network resources.
[0087] After network devices or servers and other network resources are connected to the network, they form a series of discoverable communication network resources. Each resource has a unique resource description, which can be called by communication network services.
[0088] Step T2: Analyze the causal relationships of log service data resources within the network and perform network partitioning.
[0089] The intelligent grid segmentation method is used for grid division, and the calculation formula is as follows:
[0090] ;
[0091] in, It refers to the mesh density; the more causal relationships there are, the denser the mesh. This refers to the density of service groups; the more instances of the same service within a grid, the denser the grid. It refers to the number of services with the same weight within a grid; the more services there are, the denser the grid. It refers to the number of associated business equipment resources; the larger the number of resources, the denser the grid. , and These are weights used for the number of business groups, the number of business weights, and the number of associated business device resources, respectively. These weights can be set according to the actual situation.
[0092] Step T3: Adjust the grid size of each grid according to the grid usage density.
[0093] High-density areas are divided into larger grids, and low-density areas are divided into smaller grids. This allows for finer grid division, ensuring that the data within each grid is more accurate and meaningful for analysis. The specific calculation formula is as follows:
[0094] ;
[0095] in, This is the adjusted grid size. This is the initial grid size. It is the network usage density for each grid. It is the average network usage density of the entire grid.
[0096] Step T4: After meshing, allocate a specified memory region, form a network topology, and generate chip resource tags.
[0097] The specified memory region is the memory region that includes the CPU, GPU, and LPU.
[0098] The chip resource tagging format is: CPU, GPU, and LPU chip memory region ID#grid ID#subgrid ID#network resource ID#grid resource density. The resource tagging allows for a direct understanding of the network operation within the network.
[0099] The visualization image processing unit 220 is used to perform visualization image processing on the DeepSeek inference network topology, replan network topology resources and visualize data annotation, and output the inference conclusions of the DeepSeek inference large model.
[0100] In the network topology visualization image processing, a microfluidic chip manages the CPU, GPU, and LPU chips used for computation in the large inference model. Chip resource tags are input as inference parameters into the large inference model. Quadrant positioning is used to match the network topology with the embedded AI algorithm within the large inference model, improving the accuracy of the model's inference conclusions. By analyzing chip resource tags, quadrant positioning of resources within the network topology is performed and associated with chip memory regions, completing image localization and processing.
[0101] First, data management between the microfluidic chip and the CPU, GPU, and LPU chips is achieved via the Socket API. Chip resource tags are then updated, with the following format: Microfluidic chip region ID#CPU, GPU, and LPU chip memory region ID#Grid ID#Subgrid ID#Network resource ID#Grid resource density. Second, quadrants in image localization are configured using chip resource tags. By analyzing the chip resource tags, resources are quadrant-located within the network topology and associated with chip memory regions, thus completing image localization and processing.
[0102] The visualization image processing unit 220 specifically performs the following sub-steps:
[0103] Step W1: Locate the grid where the current resource is located based on the subgrid ID in the chip resource tag, and perform quadrant positioning and global quadrant positioning for each resource within the subgrid to complete the visual topology resource binding.
[0104] The first quadrant within the subgrid: the region enclosed by the positive half-axis of the X-axis and the positive half-axis of the Y-axis, with coordinates (positive, positive), the upper right region.
[0105] The second quadrant within the subgrid: the region enclosed by the negative half-axis of the X-axis and the positive half-axis of the Y-axis, with coordinate signs of (negative, positive), the upper left region.
[0106] The third quadrant within the subgrid: the region enclosed by the negative half-axis of the X-axis and the negative half-axis of the Y-axis, with coordinates of (negative, negative), the lower left region.
[0107] The fourth quadrant within the subgrid: the region enclosed by the positive half-axis of the X-axis and the negative half-axis of the Y-axis, with coordinate signs of (positive, negative), the lower right region.
[0108] Global Quadrant: In addition to the four main quadrants, there is a special region—the points on the coordinate axes that do not belong to any grid quadrant. These include the origin (0, 0) and all points on the X or Y axis.
[0109] Update chip resource tags, with the following format: Global Quadrant#Quadrant#Microfluidic Chip Region ID#CPU, GPU, and LPU Chip Memory Region ID#Grid ID#Subgrid ID#Network Resource ID#Grid Resource Density;
[0110] Step W2: After visualizing the topology resource binding, when the large inference model performs calculations on CPU, GPU and LPU chips, it matches based on chip memory ID, chip region ID, microfluidic chip region ID, quadrant and global quadrant.
[0111] The matching result represents the inference conclusion of the DeepSeek network topology inference model. If a resource does not match, it means the network topology does not contain that node. If a resource matches but the quadrant and global quadrant do not match the chip region ID, it means the network topology node has changed. In this case, the microfluidic chip region ID needs to be updated with the memory region ID, grid ID, sub-grid ID, corresponding quadrant, and global quadrant. This allows for the replanning of network topology resources and the visualization of data annotation during the DeepSeek network topology inference process.
[0112] The model inference analysis unit 230 is used to perform DeepSeek inference large model inference analysis and computational power quantification after the DeepSeek inference large model inference conclusion is output. It obtains the application's transmission protocol from the network topology gateway configuration file as input parameters.
[0113] After the Deepseek inference model outputs its inference conclusions, to refine the granularity of network topology information to the computing power level of the transmission protocol, inference analysis is performed based on the application's transmission protocol from the network topology gateway configuration file. During the inference process, computing power is quantified based on two parameters: chip memory region ID and network resource ID, thereby tracking the computing power application of the resource in the network topology throughout the entire process. This enriches the understanding of the resource's operation and transmission status in the network topology from the perspective of computing power indicators. By monitoring fluctuations at the computing power level, it helps reduce operational losses caused by false alarms during transmission protocol alarms.
[0114] The application's transport protocols, such as SNMP, UDP, HTTP, HTTPS, and TCP / IP, are obtained from the network topology gateway configuration file and used as input parameters for large-scale inference model analysis. During the inference process, computational power is quantified based on two parameters: chip memory region ID and network resource ID.
[0115] A method for computational power quantization of network topology data transmission protocols, characterized in that the computational power quantization model is specifically as follows:
[0116] ;
[0117] In the formula, The computing power requirement is represented by n, where n is the number of logic operation chips. This represents the mapping ratio coefficient of the i-th logic operation chip. Indicates the i-th logic operation chip The mapping function for the provided logical operation capabilities, q1(TOPS) represents the redundant computing power of logical operations, and m is the number of parallel computing chips. This represents the mapping scaling factor for the j-th parallel computing chip. Represents the j-th parallel computing chip The mapping function for the provided parallel computing capabilities, q²(FLOPS) represents the redundant computing power of parallel computing, and p is the number of neural network acceleration chips. This represents the mapping scaling factor for the k-th neural network acceleration chip. This represents the k-th neural network acceleration chip. The provided mapping function for neural network acceleration capabilities, q3(FLOPS), represents the redundant computing power for neural network acceleration.
[0118] The network topology node association unit 240 is used to associate DeepSeek inference network topology nodes and to issue alarms in the transmission protocol based on fluctuations in computing power.
[0119] The NETCONF (Network Configuration Protocol) network management protocol controls the network device protocol to be sent to the corresponding network device configuration file, and automatically generates lines in the visualization module to associate topology nodes.
[0120] The report enriches the understanding of resource operation and transmission status in the network topology from the perspective of computing power indicators. It also helps to reduce operational losses caused by false alarms during transmission protocol alarms by analyzing fluctuations in computing power.
[0121] Alerting based on fluctuations in computing power at the transmission protocol level includes determining whether to issue an alert based on the generalization capability of data transmission between multiple transmission protocols in the network topology. This involves using a DeepSeek inference model to analyze the generalization capability of data transmission between multiple transmission protocols in the network topology. The specific process is as follows:
[0122] ;
[0123] ;
[0124] in, The loss function applied to the transmission protocol instructions. Let i be the number of training samples for this transmission protocol, and i be a natural number. The regularization coefficient is . This is a parameter regularization term (to prevent the model from overfitting). As a prompt word, This is the target answer.
[0125] Through the loss function It can detect potential communication failures of the transmission protocol and issue an alarm when the probability of communication failure exceeds a specified threshold.
[0126] The loss function for context learning in the configuration file on the gateway of the network topology. The number of example prompts for the transport protocol name, compatible device model, and service type in the context, where j is a natural number. As a prompt word, This is the target answer.
[0127] Through these optimization techniques, this invention significantly improves the Deepseek inference model in network applications by replacing manual code development with inference computation, enabling it to meet the business needs of multiple protocols and devices in complex topology business scenarios, and enhancing the scalability and flexibility of gateway scheduling in network management platforms or data acquisition platforms.
[0128] This application also provides a computer storage medium storing computer instructions, which, when invoked, are used to execute the visualization method for discovering network topology faults and self-healing false alarms based on a large data center application inference model.
[0129] The embodiments disclosed in this invention provide a computer-readable storage medium storing computer program instructions. When the computer program instructions are executed on a computer, the computer executes the above-described visualization method for discovering network topology faults and self-healing false alarms based on a large data center application inference model.
[0130] This invention provides a processor for processing the above-described visualization method for discovering network topology faults and self-healing false alarms based on a large data center application inference model.
[0131] In this embodiment of the invention, the processor can be an integrated circuit chip with signal processing capabilities. The processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.
[0132] The various methods, steps, and logic diagrams disclosed in the embodiments of this invention can be implemented or executed. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this invention can be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. The processor reads information from the storage medium and, in conjunction with its hardware, completes the steps of the above methods.
[0133] The storage medium can be memory, such as volatile memory or non-volatile memory, or may include both volatile and non-volatile memory.
[0134] Non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced Synchronous DRAM (ESDRAM), Synchlink DRAM (SLDRAM), and Direct Rambus RAM (DRRAM).
[0135] This application has the following beneficial effects:
[0136] (1) In this application, the input parameters are first divided into several regions according to the grid and chip resource tags are generated. These are then used as input parameters for database retrieval. During the retrieval process, the associated data is obtained according to the chip resource tags as conditions. The query speed is fast, which makes up for the possibility that the network devices may be hidden and not discovered.
[0137] (2) This application deploys Deepseek inference model and outputs inference conclusions, refining the granularity of network topology information to the computing power level of the transmission protocol. The inference model is analyzed based on the transmission protocol of the application from the network topology gateway configuration file. During the inference process, the computing power is quantified based on two parameters: chip memory region ID and network resource ID, so as to track the computing power application of the resource in the network topology throughout the process. The operation and transmission status of the resource in the network topology are enriched from the perspective of computing power indicators. The fluctuation of computing power level is used to alarm the transmission protocol, which helps to reduce the operation and maintenance losses caused by false alarms.
[0138] (3) In the network topology visualization image processing process, this application uses microfluidic chips to manage the CPU, GPU and LPU chips used for the computation of the large inference model, and uses chip resource tags as inference parameters to input into the large inference model. During the computation process, the quadrant location is matched with the AI algorithm embedded in the large inference model to discover the network topology, thereby improving the accuracy of the large model's inference conclusions and visualization.
[0139] (4) This application optimizes the data preprocessing stage. After network resources such as network devices or servers are connected to the network, a series of discoverable communication network resources are formed. Each resource has a unique resource description for communication network services to call. All network resources are divided into grids according to business relevance and weight indicators using a grid partitioning algorithm to form a network topology and generate chip resource tags. This enables the service needs of multiple protocols and multiple devices in complex topology business scenarios to be met, and enhances the scalability and flexibility of the network management platform or data acquisition platform gateway scheduling.
[0140] Although the examples referenced in this application are described for illustrative purposes only and not for limiting the scope of this application, changes, additions and / or deletions to the implementation may be made without departing from the scope of this application.
[0141] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A visualization method for discovering network topology faults and self-healing of false alarms based on a large data center application inference model, characterized in that, Includes the following steps: A grid partitioning algorithm is used to partition the network and form the DeepSeek inference network topology and chip resource markers; Visual image processing is performed on the DeepSeek inference network topology to complete the replanning of network topology resources and visualization data annotation, and output the inference conclusions of the DeepSeek inference large model. After the DeepSeek inference model outputs its inference conclusions, the application's transmission protocol is obtained from the network topology gateway configuration file as input parameters for DeepSeek inference model inference analysis, and computational power is optimized. After the computing power is quantified, the DeepSeek inference network topology nodes are associated, and alarms are triggered in the transmission protocol based on fluctuations in computing power.
2. The visualization method for discovering network topology faults and self-healing false alarms based on a large data center application inference model as described in claim 1, characterized in that, The process of creating a DeepSeek inference network topology and chip resource tags using a mesh partitioning algorithm includes the following sub-steps: Connecting network devices or server network resources to the network to form communication network resources; Analyze the causal relationships of log service data resources within the network resource group, and perform grid partitioning; Adjust the grid size of each grid according to the grid usage density; After meshing, a specified memory region is allocated, a network topology is formed, and chip resource tags are generated.
3. The visualization method for discovering network topology faults and self-healing false alarms based on a large data center application inference model as described in claim 2, characterized in that, Mesh partitioning is represented as: ; It is the grid density. It is the density of business groups. It is a weight used for the number of business groups. It refers to the number of services within the same weight within the grid. It is a weight used to determine the number of business weights. It refers to the number of related business equipment resources. It is a weight used to associate the number of business equipment resources.
4. The visualization method for discovering network topology faults and self-healing false alarms based on a large data center application inference model as described in claim 2, characterized in that, Adjusting the grid size of each grid involves dividing high-density areas into larger grids and low-density areas into smaller grids, specifically as follows: ; in, This is the adjusted grid size. This is the initial grid size. It is the network usage density for each grid. It is the average network usage density of the entire grid.
5. The visualization method for discovering network topology faults and self-healing false alarms based on a large data center application inference model as described in claim 4, characterized in that, Visualizing the DeepSeek inference network topology involves image processing, replanning network topology resources, and visualizing and labeling data. The output of the DeepSeek inference model's inference conclusions includes the following sub-steps: Locate the grid where the current resource is located based on the subgrid ID in the chip resource tag, and perform quadrant and global quadrant settings for each resource within the subgrid to complete the visual topology resource binding; After the topology resources are bound to the visualization, when the large inference model performs calculations on CPU, GPU and LPU chips, chip memory ID, chip region ID, microfluidic chip region ID, quadrant and global quadrant matching are performed.
6. A visualization system for discovering network topology faults and self-healing false alarms based on a large data center application inference model, characterized in that, This includes a network topology forming unit, a visualization image processing unit, a model reasoning and analysis unit, and a network topology node association unit; Network topology forming unit, used to perform grid partitioning using a grid partitioning algorithm and form DeepSeek inference network topology and chip resource markers; The visualization image processing unit is used to perform visualization image processing on the DeepSeek inference network topology, complete the replanning of network topology resources and visualization data annotation, and output the inference conclusions of the DeepSeek inference large model. The model inference analysis unit is used to obtain the application's transmission protocol from the network topology gateway configuration file as input parameters to perform Deepseek inference large model inference analysis and to optimize computational power. The network topology node association unit is used to associate DeepSeek inference network topology nodes and to issue alarms in the transmission protocol based on fluctuations in computing power.
7. The visualization system for discovering network topology faults and self-healing false alarms based on a large data center application inference model as described in claim 6, characterized in that, The network topology forming unit uses a mesh partitioning algorithm to partition the network and form the DeepSeek inference network topology and chip resource tags, including the following sub-steps: Connecting network devices or server network resources to the network to form communication network resources; Analyze the causal relationships of log service data resources within the network resource group, and perform grid partitioning; Adjust the grid size of each grid according to the grid usage density; After meshing, a specified memory region is allocated, a network topology is formed, and chip resource tags are generated.
8. The visualization system for discovering network topology faults and self-healing false alarms based on a large data center application inference model as described in claim 7, characterized in that, Mesh partitioning in network topology forming units is represented as follows: ; It is the grid density. It is the density of business groups. It is a weight used for the number of business groups. It refers to the number of services within the same weight within the grid. It is a weight used to determine the number of business weights. It refers to the number of related business equipment resources. It is a weight used to associate the number of business equipment resources.
9. The visualization system for discovering network topology faults and self-healing false alarms based on a large data center application inference model as described in claim 7, characterized in that, Adjusting the grid size of each grid in the network topology forming unit includes dividing high-density regions into larger grids and low-density regions into smaller grids, specifically as follows: ; in, This is the adjusted grid size. This is the initial grid size. It is the network usage density for each grid. It is the average network usage density of the entire grid.
10. The visualization system for discovering network topology faults and self-healing false alarms based on a large data center application inference model as described in claim 9, characterized in that, The visualization image processing unit performs visualization image processing on the DeepSeek inference network topology, re-plans network topology resources and performs visualization data annotation, and outputs the inference conclusions of the DeepSeek inference large model, including the following sub-steps: Locate the grid where the current resource is located based on the subgrid ID in the chip resource tag, and perform quadrant and global quadrant settings for each resource within the subgrid to complete the visual topology resource binding; After the topology resources are bound to the visualization, when the large inference model performs calculations on CPU, GPU and LPU chips, chip memory ID, chip region ID, microfluidic chip region ID, quadrant and global quadrant matching are performed.
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