Display panel and display device

By thinning the insulating layer in the liquid crystal display panel, the sliding range of the support pillars is limited, thus solving the problem of PI alignment film damage caused by support pillar sliding and improving the display effect of the display panel.

CN120949477APending Publication Date: 2025-11-14XIAMEN TIANMA OPTOELECTRONICS CO LTD
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Patent Information

Application Number
CN202511415004.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-09-29
Publication Date
2025-11-14

AI Technical Summary

Technical Problem

When existing LCD panels are subjected to external impacts, the support pillars are prone to sliding, which can damage the PI alignment film, generate debris, and affect the display effect.

Method used

By thinning the insulating layer, the thickness of some areas of the insulating layer is made smaller than that of other areas. The second end of the support pillar is located in the area with smaller thickness, and the pixel electrode is partially or entirely located in the area with smaller thickness. This limits the sliding range of the support pillar and prevents the support pillar from scratching the PI alignment film.

Benefits of technology

This effectively reduces the sliding distance of the support columns, lowers the probability of the support columns scratching the PI alignment film, reduces debris generation, and ensures the display effect of the display panel.

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Abstract

The invention discloses a display panel and a display device. The display panel comprises a first substrate, a second substrate and a plurality of supporting columns, the first substrate and the second substrate are oppositely arranged, the supporting columns are located between the first substrate and the second substrate, the first ends of the supporting columns are fixed to the side, close to the second substrate, of the first substrate, and the second ends of the supporting columns make contact with the second substrate or have a preset interval with the second substrate; the second substrate comprises a substrate, an insulating layer and an electrode layer, the insulating layer and the electrode layer are stacked on one side, the insulating layer comprises a first area and a second area, and the thickness of the first area is smaller than that of the second area; the electrode layer comprises a plurality of pixel electrodes, the projection of at least partial area of the pixel electrodes on the substrate is located in the projection of the first area on the substrate, partial area of the second area is a supporting column corresponding area, and the projection of the second end of the supporting column on the substrate is located in the supporting column corresponding area. The partial area of the insulating layer is thinned, so that the sliding range of the supporting columns is reduced, the chipping generation probability is reduced, and the display effect of the display panel is guaranteed.
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Description

Technical Field

[0001] This invention relates to the field of display technology, and more particularly to a display panel and display device. Background Technology

[0002] Liquid crystal display (LCD) panels are currently the most widely used display products on the market. Their manufacturing technology is mature, resulting in high yield rates, relatively low production costs, and high market acceptance. Typically, an LCD panel consists of a color filter substrate, an array substrate, liquid crystal sandwiched between the color filter substrate and the array substrate, support pillars, and a sealing sealant. In existing technologies, when the display panel is subjected to external impact, the support pillars are prone to slippage, causing damage to the PI alignment film on the array substrate side. This generates debris that remains inside the display panel, resulting in display defects. Therefore, the structure of LCD panels needs further improvement. Summary of the Invention

[0003] This invention provides a display panel and display device. By thinning a portion of the insulating layer, the probability of the support pillars scratching the PI alignment film and generating debris is reduced, thus ensuring the display effect of the display panel.

[0004] In a first aspect, the present invention provides a display panel, including a first substrate, a second substrate, and a plurality of support pillars disposed opposite to each other, wherein a first end of the support pillar is fixed to the side of the first substrate near the second substrate, and a second end of the support pillar is in contact with the second substrate or has a predetermined interval therebetween.

[0005] The second substrate includes a substrate and an insulating layer and an electrode layer stacked on one side of the substrate. The insulating layer includes a first region and a second region, the thickness of the first region being less than the thickness of the second region. The electrode layer includes a plurality of pixel electrodes, at least a portion of the pixel electrodes is projected onto the substrate within the projection of the first region onto the substrate, a portion of the second region is a support pillar corresponding region, and the projection of the second end of the support pillar onto the substrate is within the support pillar corresponding region.

[0006] In a second aspect, the present invention provides a display device comprising any of the display panels described in the first aspect.

[0007] The technical solution of this invention provides a display panel including a first substrate, a second substrate, and a plurality of support pillars disposed opposite to each other. The first end of each support pillar is fixed to the side of the first substrate near the second substrate, and the second end of each support pillar is in contact with or has a predetermined distance from the second substrate. The second substrate includes a substrate and an insulating layer and an electrode layer stacked on one side of the substrate. The insulating layer includes a first region and a second region. The second region is thinned so that the thickness of the first region is less than the thickness of the second region, effectively improving transmittance. The electrode layer includes a plurality of pixel electrodes. At least a portion of the pixel electrode's projection onto the substrate lies within the projection of the first region onto the substrate. A portion of the second region corresponds to a support pillar, and the second end of each support pillar's projection onto the substrate lies within the corresponding support pillar region. This arrangement ensures that the pixel electrode is partially or entirely located in the first region, and the support pillar is located in the second region. This reduces the sliding distance of the support pillars when the display panel is subjected to external impact, preventing the support pillars from scratching the PI alignment film and generating debris, thus reducing the probability of film debris generation and ensuring the display effect of the display panel.

[0008] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0009] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0010] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention;

[0011] Figure 2 for Figure 1 A schematic diagram of the cross-section along section line A1-A2;

[0012] Figure 3 for Figure 1 A schematic diagram of the cross-section along section line B1-B2;

[0013] Figure 4 for Figure 1 A schematic diagram of the cross-section along section line C1-C2;

[0014] Figure 5 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0015] Figure 6 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0016] Figure 7 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0017] Figure 8 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0018] Figure 9 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0019] Figure 10 for Figure 9 A schematic diagram of the cross-section along section line D1-D2;

[0020] Figure 11 for Figure 9 A schematic diagram of the cross-section along section line E1-E2;

[0021] Figure 12 for Figure 9 A schematic diagram of the cross-section along section lines F1-F2;

[0022] Figure 13 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0023] Figure 14 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention;

[0024] Figure 15 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0025] Figure 16 for Figure 15 A schematic diagram of the cross-section along section line G1-G2;

[0026] Figure 17 for Figure 15 A schematic diagram of the cross-section along section line H1-H2;

[0027] Figure 18 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0028] Figure 19 for Figure 18 A schematic diagram of the cross-section along section lines I1-I2;

[0029] Figure 20 for Figure 18 A schematic diagram of the cross-section along section lines J1-J2;

[0030] Figure 21 for Figure 18 A schematic diagram of the cross-section along the central section line K1-K2;

[0031] Figure 22 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0032] Figure 23 for Figure 22 A schematic diagram of the cross-section along section line L1-L2;

[0033] Figure 24 for Figure 22 A schematic diagram of the cross-section along section line M1-M2;

[0034] Figure 25 for Figure 22 A schematic diagram of the cross-section along section line N1-N2;

[0035] Figure 26 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0036] Figure 27 for Figure 26 A schematic diagram of the cross-section along section line O1-O2;

[0037] Figure 28 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0038] Figure 29 for Figure 28 A schematic diagram of the cross-section along the section line P1-P2;

[0039] Figure 30 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0040] Figure 31 for Figure 30 A schematic diagram of the cross-section along section line Q1-Q2;

[0041] Figure 32 for Figure 30 A schematic diagram of the cross-section along section line R1-R2;

[0042] Figure 33 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0043] Figure 34 for Figure 33 A schematic diagram of the cross-section along section line S1-S2;

[0044] Figure 35 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0045] Figure 36 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention. Detailed Implementation

[0046] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0047] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0048] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention. Figure 2 for Figure 1 A schematic diagram of the cross-section along section line A1-A2. Figure 3 for Figure 1 A schematic diagram of the cross-section along section line B1-B2. Figure 4 for Figure 1 A schematic diagram of the cross-section along section line C1-C2, as shown below. Figure 1 , Figure 2 , Figure 3 and Figure 4As shown, the display panel includes a first substrate 10, a second substrate 20 disposed opposite to each other, and a plurality of support pillars 11 located between the first substrate 10 and the second substrate 20. The first end of the support pillar 11 is fixed to the side of the first substrate 10 near the second substrate 20, and the second end of the support pillar 11 is in contact with the second substrate 20 or has a predetermined distance from it. The second substrate 20 includes a substrate 21 and an insulating layer 22 and an electrode layer 23 stacked on one side of the substrate 21. The insulating layer 22 includes a first region 221 and a second region 222. The thickness d1 of the first region 221 is less than the thickness d2 of the second region 222. The electrode layer 23 includes a plurality of pixel electrodes 231. At least a portion of the pixel electrode 231 is projected onto the substrate 21 within the projection of the first region 221 onto the substrate 21. A portion of the second region 222 is a support pillar corresponding region 224. The projection of the second end of the support pillar 11 onto the substrate 21 is located within the support pillar corresponding region 224.

[0049] The first substrate 10 can be a color filter substrate, and the first substrate 10 is provided with color filter structures 101 arranged at intervals. The color filter structure 101 can include multiple color resist blocks of different colors, such as red color resist blocks, green color resist blocks and blue color resist blocks, so as to realize the color display of the display panel. A light-shielding unit 102 is also provided between adjacent color filter structures 102. The light-shielding unit 102 can avoid light crosstalk and ensure the display effect of the display panel.

[0050] The second substrate 20 can be an array substrate. The second substrate 20 may also include multiple scan lines 201, multiple data lines 202, and pixel circuitry. The pixel circuitry provides display signals to the pixel electrodes 231 to ensure the display panel can display normally. The pixel circuitry may include a thin-film transistor 25, which includes an active layer 251, a gate 252, and a source electrode (…). Figure 2 (Not shown in the diagram) and drain 253, scan line 201 and gate 252 are electrically connected (scan line 201 and gate 252 are on the same layer, and a portion of scan line 201 forms the gate 252 of transistor 25). It should be noted that... Figure 2 The example shows the pixel electrode 231 and drain 253 connected, and the data line 202 and source electrically connected. In other embodiments, the pixel electrode 231 and source can also be connected, and the data line 202 and drain can be electrically connected. The specific implementation can be designed according to the actual situation. In this embodiment, the source and drain 253 are disposed on the same layer as the data line 202. The pixel electrode 231 of the electrode layer 23 in the second substrate 20 can first be electrically connected to the drain 253 on the same layer as the data line 202 by drilling a hole in the insulating layer 22, and then electrically connected to the active layer 251 through the drain 253. When the thin film transistor 25 is turned on, the normal transmission of the display control signal is realized. A liquid crystal layer is also included between the first substrate 10 and the second substrate 20. Figure 2 and Figure 3 (Not shown in the image), the liquid crystal layer contains multiple liquid crystal molecules, which can be deflected under the action of an electric field, backlight module ( Figure 2 and Figure 3 Light emitted from the substrate 10 (not shown) is emitted from the first substrate 10 under the action of liquid crystal molecules, and the display panel realizes the display function. A plurality of support pillars 11 are also included between the first substrate 10 and the second substrate 20. The projection shape of the support pillars 11 on the substrate 21 can be rectangular, circular, elliptical, etc., and the cross-sectional shape of the support pillars can be rectangular, trapezoidal, semi-circular, etc. The shape of the support pillars 11 can be selected according to actual design requirements, and this embodiment of the invention does not impose specific limitations. This embodiment of the invention uses a rectangular projection shape and cross-sectional shape of the support pillars as an example for illustration. The first end of the support column 11 is fixed to the side of the first substrate 10 near the second substrate 20. The second end of a portion of the support column 11 is in contact with the second substrate 20. This portion of the support column 11 can provide thickness support for the liquid crystal cell where the liquid crystal layer is located, ensuring uniformity of liquid crystal cell thickness and display uniformity. The second end of another portion of the support column 11 has a preset distance from the second substrate 20, that is, it is not in contact with the second substrate 20. This portion of the support column 11 can distribute the external force when the display panel is subjected to external impact, playing a certain buffering role, and can restore the display panel to its original state after the external force disappears, ensuring the display effect of the display panel.

[0051] The second substrate 20 includes a substrate 21 and an insulating layer 22 and an electrode layer 23 stacked on one side of the substrate 21. The insulating layer 22 is a continuous layer and can be a planarization layer. Through-holes are also provided on the insulating layer 22 so that the pixel electrode 221 can be electrically connected to the drain 253 in the thin-film transistor 25 through the through-holes. That is, the insulating layer 22 is disposed on the side of the thin-film transistor 25 closer to the first substrate 10 to resolve the step difference caused by the thin-film transistor 25. A portion of the insulating layer 22 is thinned. The insulating layer 22 includes a first region 221 and a second region 222. The thickness d1 of the first region 221 is less than the thickness d2 of the second region 222. The first region 221 is recessed compared to the second region 222, and its smaller thickness improves the transmittance of light from the backlight substrate side. A portion of the second region 222 corresponds to the support pillar region 224. The projection of the second end of the support pillar 11 onto the substrate 21 lies within the support pillar region 224. At least a portion of the pixel electrode 231 in the electrode layer 23 is projected onto the substrate 21 within the projection of the first region 221 onto the substrate 21. Figures 1-4As shown, some pixel electrodes 231 can be located in the first region 221, and others in the second region 222. In this case, the pixel electrodes 231 located in the second region 222 can limit the movement of the support post 11, reducing its sliding range and preventing it from scratching the PI alignment film on the pixel electrode 231 surface and generating debris. This reduces the probability of dynamic crushing bright spots and ensures the display effect of the display panel. Alternatively, all pixel electrodes 231 can be located in the first region 221 to prevent the support post 11 from scratching the PI alignment film and generating debris, reducing the probability of dynamic crushing bright spots and ensuring the display effect of the display panel.

[0052] Based on the above embodiments, the relative positions of the data line 202, scan line 201, pixel electrode 231, and support post 11 can be arranged in different ways. Several feasible arrangement methods are shown below. For example, the data line 202 includes a first data line 2021 and a second data line 2022, the scan line 201 includes a first scan line 2011 and a second scan line 2012, and the pixel electrode 231 includes a first pixel electrode 31, a second pixel electrode 32, a third pixel electrode 33, and a fourth pixel electrode 34. The first pixel electrode 31 and the second pixel electrode 32 are arranged along a first direction X1, the third pixel electrode 33 and the fourth pixel electrode 34 are arranged along the first direction X1, the first pixel electrode 31 and the third pixel electrode 33 are arranged along a second direction X2, and the second pixel electrode 32 and the fourth pixel electrode 34 are arranged along the second direction X2.

[0053] As one possible implementation method, such as Figure 1As shown, along the first direction X1, the first data line 2021, the first pixel electrode 31, the second data line 2022, and the second pixel electrode 32 are arranged in sequence, and the first data line 2021, the third pixel electrode 33, the second data line 2022, and the fourth pixel electrode 34 are arranged in sequence; along the second direction X2, the first pixel electrode 31, the first scan line 2011, the third pixel electrode 33, and the second scan line 2012 are arranged in sequence, and the second pixel electrode 32, the first scan line 2011, the fourth pixel electrode 34, and the second scan line 2012 are arranged in sequence, and the first data line 2021, the third pixel electrode 33, and the fourth pixel electrode 34 are arranged in sequence, and the first data line 2021, the third pixel electrode 33, and the fourth pixel electrode 34 are arranged in sequence, and the fourth pixel electrode 34 is arranged in sequence, and the second data line 2021, the third pixel electrode 33, and the fourth pixel electrode 34 are arranged in sequence, and the fourth pixel electrode 34 is arranged in sequence, and the second data line 2021, the third pixel electrode 33, and the fourth pixel electrode 34 are arranged in sequence, and the second pixel electrode 32, the third pixel electrode 33, and the fourth pixel electrode 34 are arranged in sequence, and the second pixel electrode 32 is ... 2021 is electrically connected to the first pixel electrode 31 and the third pixel electrode 33, respectively. The second data line 2022 is electrically connected to the second pixel electrode 32 and the fourth pixel electrode 34, respectively. The first scan line 2011 is electrically connected to the first pixel electrode 31 and the second pixel electrode 32, respectively. The second scan line 2012 is electrically connected to the third pixel electrode 33 and the fourth pixel electrode 34, respectively. The projection of the support pillar 11 on the substrate 21 does not overlap with the projection of the pixel electrode 231 on the substrate 21, but overlaps with the projections of the first scan line 2011 and the second data line 2022 on the substrate 21. With this arrangement, the extension length of the support pillar 11 along the first direction X1 can be increased, ensuring the supporting force of the support pillar 11.

[0054] As another possible implementation method Figure 5 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention, such as... Figure 5 As shown, along the first direction X1, the first data line 2021, the first pixel electrode 31, the second pixel electrode 32, and the second data line 2022 are arranged in sequence; the first data line 2021, the third pixel electrode 33, the fourth pixel electrode 34, and the second data line 2022 are arranged in sequence. Along the second direction X2, the first pixel electrode 31, the first scan line 2011, the third pixel electrode 33, and the second scan line 2012 are arranged in sequence; the second pixel electrode 32, the first scan line 2011, the fourth pixel electrode 34, and the second scan line 2012 are arranged in sequence. The first data line 2021 is electrically connected to the first pixel electrode 31 and the third pixel electrode 33, respectively. The second data line 2022 is electrically connected to the second pixel electrode 32 and the fourth pixel electrode 34, respectively. The first scan line 2011 is electrically connected to the first pixel electrode 31 and the second pixel electrode 32, respectively. The second scan line 2012 is electrically connected to the third pixel electrode 33 and the fourth pixel electrode 34, respectively. The projection of the support pillar 11 on the substrate 21 does not overlap with the projection of the pixel electrode 231 on the substrate 21, but overlaps with the projection of the first scan line 2011 on the substrate 21. In the above arrangement, the active layer of the thin-film transistor 25 corresponding to different pixel electrodes 231 has the same shape and size, which reduces the fabrication difficulty and ensures the performance consistency of each thin-film transistor, thus ensuring the display uniformity of the display panel.

[0055] As another possible implementation method Figure 6 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention, such as... Figure 6 As shown, along the first direction X1, the first data line 2021, the first pixel electrode 31, the second data line 2022, and the second pixel electrode 32 are arranged in sequence, and the first data line 2021, the third pixel electrode 33, the second data line 2022, and the fourth pixel electrode 34 are arranged in sequence; along the second direction X2, the first pixel electrode 31, the first scan line 2011, the second scan line 2012, and the third pixel electrode 33 are arranged in sequence, and the second pixel electrode 32, the first scan line 2011, the second scan line 2012, and the fourth pixel electrode 34 are arranged in sequence. The first data line 2022 is electrically connected to the first pixel electrode 32 and the fourth pixel electrode 34, respectively. The first scan line 2011 is electrically connected to the first pixel electrode 31 and the second pixel electrode 32, respectively. The second scan line 2012 is electrically connected to the third pixel electrode 33 and the fourth pixel electrode 34, respectively. The projection of the support pillar 11 on the substrate 21 does not overlap with the projection of the pixel electrode 231 on the substrate 21, but overlaps with the projections of the first scan line 2011, the second scan line 2012, and the second data line 2022 on the substrate 21. With the above arrangement, the extension length of the support pillar 11 along the second direction X2 and the extension length of the support pillar 11 along the first direction X1 can be increased to ensure the supporting force of the support pillar 11.

[0056] As another possible implementation method Figure 7 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention, such as... Figure 7As shown, along the first direction X1, the first data line 2021, the first pixel electrode 31, the second pixel electrode 32, and the second data line 2022 are arranged in sequence; the first data line 2021, the third pixel electrode 33, the fourth pixel electrode 34, and the second data line 2022 are arranged in sequence. Along the second direction X2, the first pixel electrode 31, the first scan line 2011, the second scan line 2012, and the third pixel electrode 33 are arranged in sequence; the second pixel electrode 32, the first scan line 2011, the second scan line 2012, and the fourth pixel electrode 34 are arranged in sequence. 2021 is electrically connected to the first pixel electrode 31 and the third pixel electrode 33, respectively. The second data line 2022 is electrically connected to the second pixel electrode 32 and the fourth pixel electrode 34, respectively. The first scan line 2011 is electrically connected to the first pixel electrode 31 and the second pixel electrode 32, respectively. The second scan line 2012 is electrically connected to the third pixel electrode 33 and the fourth pixel electrode 34, respectively. The projection of the support pillar 11 on the substrate 21 does not overlap with the projection of the pixel electrode 231 on the substrate 21, but overlaps with the projections of the first scan line 2011 and the second scan line 2012 on the substrate 21. With this arrangement, the extension length of the support pillar 11 along the second direction X2 can be increased, ensuring the supporting force of the support pillar 11.

[0057] As another possible implementation method Figure 8 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention, such as... Figure 8 As shown, along the first direction X1, the first pixel electrode 31, the first data line 2021, the second data line 2022, and the second pixel electrode 32 are arranged in sequence, and the third pixel electrode 33, the first data line 2021, the second data line 2022, and the fourth pixel electrode 34 are arranged in sequence; along the second direction X2, the first pixel electrode 31, the first scan line 2011, the second scan line 2012, and the third pixel electrode 33 are arranged in sequence, and the second pixel electrode 32, the first scan line 2011, the second scan line 2012, and the fourth pixel electrode 34 are arranged in sequence, and the first data line 2021, the first data line 2022, and the second pixel electrode 32 are arranged in sequence, and the third pixel electrode 33, the first data line 2021, the second scan line 2022, and the fourth pixel electrode 34 are arranged in sequence, and the first data line 2021, the first data line 2022, and the second pixel electrode 32 are arranged in sequence, and the third pixel electrode 33, the first data line 2021, the second data ... second pixel electrode 32 are arranged in sequence, and the third pixel electrode 33, the first data line 2021, the second data line 2022, and the second pixel electrode 32 are arranged in sequence, and the third pixel electrode 33, the first data line 2021, the second data line 2022, and the second pixel electrode 32 are arranged in sequence, and the third pixel electrode 33, the first data line 20 2021 is electrically connected to the first pixel electrode 31 and the third pixel electrode 33, respectively. The second data line 2022 is electrically connected to the second pixel electrode 32 and the fourth pixel electrode 34, respectively. The first scan line 2011 is electrically connected to the first pixel electrode 31 and the second pixel electrode 32, respectively. The second scan line 2012 is electrically connected to the third pixel electrode 33 and the fourth pixel electrode 34, respectively. The projection of the support pillar 11 on the substrate 21 does not overlap with the projection of the pixel electrode 231 on the substrate 21, but overlaps with the projections of the first scan line 2011 and the second scan line 2012 on the substrate 21. With this arrangement, the extension length of the support pillar 11 in the second direction X2 and the extension length along the first direction X1 can be increased, thereby increasing the projected area of ​​the support pillar 11 on the substrate 21 and ensuring the supporting force of the support pillar 11.

[0058] All of the above methods can ensure that the support post 11 is surrounded by four pixel electrodes 231, which can reduce the sliding range of the support post 11, prevent the support post 11 from being scratched, and reduce the probability of dynamic crushing bright spots.

[0059] In this embodiment of the invention, a first region and a second region with different thicknesses are provided in the insulating layer. The pixel electrode portion is located in the first region or the entire pixel electrode is located in the first region, and the support column is located in the second region. This reduces the sliding distance of the support column when the display panel is subjected to external impact, avoids the support column from scratching the PI alignment film and generating debris, reduces the probability of film debris generation, and ensures the display effect of the display panel.

[0060] Further reference Figures 1-4 At least a portion of the pixel electrode 231 includes a first electrode 2311 and a second electrode 2312. The first electrode 2311 and the second electrode 2312 are electrically connected. The second electrode 2312 is located on the side of the first electrode 2311 near the support post 11. The projection of the first electrode 2311 on the substrate 21 is located within the projection of the first region 221 on the substrate 21. The projection of the second electrode 2312 on the substrate 21 is located within the projection of the second region 222 on the substrate 21.

[0061] The pixel electrode 231 may be partially located in the first region 221 and partially located in the second region 222. Specifically, the pixel electrode 231 includes a first electrode 2311 and a second electrode 2312 that are electrically connected. The first electrode 2311 is located in the first region 221 and the second electrode 2312 is located in the second region 222. The second electrode 2312 at least partially surrounds the support post 11, so that the second electrode 2312 forms a limiting groove, which can reduce the sliding range of the support post 11, avoid the support post 11 from scratching the PI alignment film and generating debris, and reduce the probability of dynamic crushing bright spots.

[0062] Furthermore, the first electrode 2311 and the second electrode 2312 extend in different directions. The extension directions of the first electrode 2311 and the second electrode 2312 can be selected correspondingly to the extension direction of the support post 11. For example, as shown... Figures 1-4 As shown, when the support column 11 extends along the first direction X1, to ensure the limiting effect of the second electrode 2312, the first electrode 2311 can be set to extend along the second direction X2, and the second electrode 2312 can extend along the first direction X1; or, Figure 9 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention. Figure 10 for Figure 9 A schematic diagram of the cross-section along section line D1-D2. Figure 11 for Figure 9 A schematic diagram of the cross-section along section line E1-E2. Figure 12 for Figure 9A schematic diagram of the cross-section along section lines F1-F2, as shown below. Figures 9-12 As shown, when the support column 11 extends along the second direction X2, the first electrode 2311 can extend along the first direction X1, and the second electrode 2312 can extend along the second direction X2, so that the extension direction of the second electrode 2312 is the same as that of the support column 11. This allows the second electrode 2312 to effectively limit the sliding range of the support column 11, preventing it from sliding to the first region 221 and causing the support column 11 to scratch the PI alignment film and generate debris, thereby reducing the probability of dynamic crushing bright spots and ensuring the display effect of the display panel.

[0063] also, Figure 13 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention, such as... Figure 13 As shown, the first electrode 2311 can be a strip electrode 41, which includes multiple strip branches 411 and connecting portions 412. The multiple strip branches 411 are connected via the connecting portions 412, and are used to form an electric field with the common electrode to control the rotation direction of the liquid crystal molecules. There are hollow portions between adjacent strip branches 411 to form a multi-directional electric field, increasing the ability to control the alignment of the liquid crystal and improving the aperture ratio and resolution. Figure 1 , Figures 5-9 As shown, the pixel electrode 231 has a single-domain structure and a large light-transmitting area, which is beneficial for ensuring high resolution. Or as... Figure 13 As shown, the pixel electrode 231 has a multi-domain structure, and the liquid crystal molecules in the same pixel rotate in two directions to form complementary orientation, which effectively reduces color shift and ensures display effect.

[0064] Further reference Figures 1-4 In the first region 221, the thickness of the insulating layer 22 ranges from 2.0 μm to 3.0 μm, and in the second region 222, the thickness of the insulating layer 22 ranges from 2.5 μm to 3.2 μm.

[0065] Specifically, the insulating layer 22 in the first region 221 is thinned to form a sunken area in the first region 221, making the thickness of the insulating layer 22 in the first region 221 less than the thickness of the insulating layer 22 in the second region 222. The size of the support column 11 does not need to be adjusted. By reasonably setting the thickness of the insulating layer 22 in the first region 221 and the thickness of the insulating layer 22 in the second region 222, and by setting the support column 11 in conjunction with the second region 222, the sliding of the support column 11 is prevented from scratching the PI alignment film and generating debris, reducing the probability of dynamic crushing bright spots and ensuring the display effect of the display panel.

[0066] Continue to refer to Figure 3The insulating layer 22 also includes a step region 223 located between the first region 221 and the second region 222. The pixel electrode 231 includes a connection portion 412 that electrically connects the first electrode 2311 and the second electrode 2312. Along the direction of the insulating layer 22 toward the substrate 21, the connection portion 412 covers at least part of the step region 223.

[0067] Among them, a step region 223 is provided between the first region 221 and the second region 222. Due to the limitations of the manufacturing process, the first region 221 gradually transitions to the second region 222, so that the extension direction of the surface of the step region 223 intersects with the plane where the first region 221 is located and the plane where the second region 222 is located, that is, forming a slope shape. In order to ensure the signal transmission of the pixel electrode 231, the first electrode 2311 located in the first region 221 and the second electrode 2312 located in the second region 222 are connected by a connecting part 412. Along the direction of the insulating layer 22 pointing to the substrate 21, the connecting part 412 covers at least part of the step region 223, thereby ensuring the display effect of the display panel.

[0068] As another possible implementation method Figure 14 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention, such as... Figure 1 and Figure 14 As shown, the electrode layer 23 also includes a third electrode 26, which is located on the side of the pixel electrode 231 near the support pillar 11. The projection of the pixel electrode 231 on the substrate 21 is located in the projection of the first region 221 on the substrate 21, and the projection of the third electrode 26 on the substrate 21 is located in the projection of the second region 222 on the substrate 21. The third electrode 26 is connected to a preset potential.

[0069] The electrode layer 23 may further include a third electrode 26, which is located between the support pillar 11 and the pixel electrode 231. In this case, the pixel electrode 231 can be entirely located within the first region 221, and the third electrode 26 within the second region 222, thus blocking the support pillar 11 and reducing its sliding range. To prevent the third electrode 26 from being in a floating state and causing coupling capacitance between it and the data line 202, which could affect the display effect of the display panel, specifically... Figure 1 As shown, the third electrode 26 can be electrically connected to the pixel electrode 231. In this case, the third electrode 26 can serve as part of the pixel electrode 231, ensuring both display quality and blocking the support post 11. Alternatively, as... Figure 14 As shown, the third electrode 26 can be electrically connected to the data line 202, transmitting the same signal as the data line 202, thus avoiding coupling. It should be noted that... Figure 14 Only a portion of the structure is shown as an example, omitting some membrane layers. Alternatively, Figure 15This is a schematic diagram of another display panel structure provided in an embodiment of the present invention. Figure 16 Figure 15 A schematic diagram of the cross-section along section line G1-G2. Figure 17 for Figure 15 A schematic diagram of the cross-section along section line H1-H2, as shown below. Figures 15-17 As shown, the second substrate 20 also includes a common electrode 12 located on the side of the pixel electrode 231 near the substrate 21. The third electrode 26 is on the same layer as the pixel electrode 231. The film layer containing the common electrode 12 is located between the film layer containing the pixel electrode 231 and the film layer containing the data line 202. The common electrode 12 and the pixel electrode 231 are isolated by an insulating film layer. The third electrode 26 is electrically connected to the common electrode 12 by drilling a hole downwards in the insulating film layer, so that the third electrode 26 is connected to a fixed potential, preventing it from being in a floating state and causing coupling. It should be noted that in this embodiment, the common electrode 12 is located on the lower layer of the pixel electrode 231. Figure 1 The common electrode is not shown in the top view. In other embodiments, the pixel electrode 231 may be located between the film layer where the common electrode 12 is located and the film layer where the data line 202 is located, that is, the common electrode 12 is located on top of the pixel electrode 231. When the common electrode 12 is located on top, the common electrode 12 can perform similar functions. Figure 1 The hollow design of the pixel electrode 231 ensures that the electric field between the pixel electrode 231 and the common electrode 12 controls the liquid crystal in the liquid crystal layer.

[0070] As another possible implementation method Figure 18 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention. Figure 19 for Figure 18 A schematic diagram of the cross-section along section lines I1-I2. Figure 20 for Figure 19 A schematic diagram of the cross-section along section line J1-J2. Figure 21 for Figure 18 A schematic diagram of the cross-section along section line K1-K2, as shown below. Figures 18-21 As shown, the projections of the pixel electrodes 231 onto the substrate 21 are all located within the projection of the first region 221 onto the substrate 21. The pixel electrodes 231 can be entirely located within the first region 221. Since the first region 221 is recessed relative to the second region 222, the support pillar 11 is located in the second region 222. The second region 222 suspends the support pillar 11, allowing it to slide only within the second region 222, thus preventing the support pillar 11 from scratching the PI alignment film and reducing the probability of dynamic crushing bright spots. As another possible implementation, refer to... Figures 1-4The electrode layer 23 includes multiple pixel electrode groups 241, each pixel electrode group 241 including four pixel electrodes 231 arranged in a 2×2 array; the four pixel electrodes 231 are arranged around the support post 11. The four pixel electrodes 231 arranged in an array are arranged around the support post 11, and each pixel electrode 231 is correspondingly provided with a second electrode 2312, so that the support post 11 is confined within the area formed by the four second electrodes 2312, limiting the sliding range of the second electrodes 2312, preventing the support post 11 from being scratched and preventing the generation of dynamic crushing bright spots.

[0071] Further reference Figures 1-4 The projections of the four pixel electrodes 231 onto the substrate 21 do not overlap with the projection of the second end of the support pillar 11 onto the substrate 21. This ensures that each of the four pixel electrodes 231 is spaced apart from the second end of the support pillar 11, forming a confined area around them. This prevents the support pillar 11 from sliding within the confined area when it does slide, thus avoiding scratches on the PI alignment film and reducing the probability of dynamic crushing bright spots.

[0072] Further reference Figures 1-4 The second substrate 20 also includes multiple scan lines 201 extending along the first direction X1 and arranged along the second direction X2, and multiple data lines 202 extending along the second direction X2 and arranged along the first direction X1; four thin-film transistors 25 are disposed corresponding to the pixel electrode group 241, and the thin-film transistors 25 are disposed one-to-one with the pixel electrodes 231. The control terminal of the thin-film transistor 25 is connected to the scan line 201, the first end of the thin-film transistor 25 is connected to the data line 202, and the second end of the thin-film transistor 25 is connected to the pixel electrode 231. The projection of the thin-film transistor 25 on the substrate 21 does not overlap with the projection of the second end of the support pillar 11 on the substrate 21.

[0073] Multiple data lines 202 and multiple scan lines 201 are arranged in an intersecting pattern to form multiple pixels in an array. Each pixel includes a pixel electrode 231 and a thin-film transistor (TFT) 25. The TFT 25 and pixel electrode 231 are configured in a one-to-one correspondence. The control terminal of the TFT 25 is connected to the scan line 201, the first terminal of the TFT 25 is connected to the data line 202, and the second terminal of the TFT 25 is connected to the pixel electrode 231. The TFT 25 acts as a switching element for the pixel. The TFT 25 can be turned on or off under the control of the scan signal transmitted by the scan line 201, thereby transmitting the data voltage provided by the data line 202 to the pixel electrode 231 when the TFT 25 is on. The projection of the TFT 25 onto the substrate 21 does not overlap with the projection of the second end of the support post 11 onto the substrate 21. That is, the support post 11 must be positioned to avoid the area where the TFT 25 is located, ensuring the flatness of the area where the support post 11 is located, avoiding increasing the probability of slippage of the support post 11, and reducing the probability of dynamic crushing bright spots.

[0074] Based on the above embodiments, the support column 11 can be configured in different ways. Two feasible configuration methods are shown below.

[0075] Continue to refer to Figures 1-4 As shown, the projection of the support post 11 onto the substrate 21 is rectangular. The rectangle includes a first side 51 and a third side 53 extending along a third direction X3, and a second side 52 and a fourth side 54 extending along a fourth direction X4. The length w1 of the first side 51 is greater than the length w2 of the second side 52, and the extension direction of the second electrode 2312 is parallel to the extension direction of the first side 51.

[0076] The support post 11 can be a cuboid or a frustum. The projection of the support post 11 onto the substrate 21 is a rectangle, which includes a first side 51 and a third side 53 extending along the third direction X3, and a second side 52 and a fourth side 54 extending along the fourth direction X4. The length w1 of the first side 51 is greater than the length w2 of the second side 52, and the extension length of the support post 11 along the third direction X3 is greater than the extension length of the support post 11 along the fourth direction X4. In order to ensure that the second electrode 2312 in the pixel electrode 231 limits the support post 11, the extension direction of the second electrode 2312 can be parallel to the extension direction of the first side 51. This reduces the sliding range of the support post 11, prevents the support post 11 from scratching the PI alignment film and generating debris, and reduces the probability of dynamic crushing bright spots.

[0077] or, Figure 22 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention. Figure 23 for Figure 22 A schematic diagram of the cross-section along section line L1-L2. Figure 24 for Figure 22 A schematic diagram of the cross-section along section line M1-M2. Figure 25 for Figure 22 A schematic diagram of the cross-section along section line N1-N2, as shown below. Figures 22-25 As shown, the projection of the support post 11 onto the substrate 21 is rectangular. The rectangle includes a first side 51 and a third side 53 extending along the third direction X3, and a second side 52 and a fourth side 54 extending along the fourth direction X4. The length w2 of the second side 52 is greater than the length w1 of the first side 51. The extension length of the support post 11 along the fourth direction X4 is greater than the extension length of the support post 11 along the third direction X3. In order to ensure that the second electrode 2312 in the pixel electrode 231 limits the support post 11, the extension direction of the second electrode 2312 can be parallel to the extension direction of the second side 52. This allows the setting of the second electrode 2312 to reduce the sliding range of the support post 11, avoid the support post 11 scratching the PI alignment film and generating debris, and reduce the probability of dynamic crushing bright spots.

[0078] As another possible implementation method Figure 26 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention. Figure 27 for Figure 26 A schematic diagram of the cross-section along section line O1-O2. Figure 28 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention. Figure 29 for Figure 28 A schematic diagram of the cross-section along section line P1-P2, as shown below. Figures 26-29 As shown, the electrode layer 23 includes multiple pixel electrode groups 241. Each pixel electrode group 241 includes four pixel electrodes 231 arranged in a 2×2 array. The four pixel electrodes 231 are arranged around the support pillar 11. Each pixel of the pixel electrode group 241 has a support pillar avoidance area 61. Each pixel electrode 231 in the pixel electrode group 241 has a fourth electrode 611 located in the support pillar avoidance area 61, so that the projection of the second end of the support pillar 11 on the substrate 21 does not overlap with the projection of the pixel electrode 231 on the substrate 21.

[0079] The pixel electrode 231 is arranged in an array of four pixels 231, which surround the support post 11. Each of the four pixels corresponding to the pixel electrode group 241 has a support post avoidance area 61. The extension length of the pixel electrode 231 along the first direction X1 is different from its extension length along the second direction X2. The extension length of the pixel electrode 231 adjacent to the support post corresponding area 224 and located in the first area 221 is adjusted to shorten it. For example, [example missing]. Figure 26 and Figure 28As shown, different extension length adjustment methods can be used to electrically connect the fourth electrode 611 located in the second region to the support pillar avoidance area 61. This ensures that the fourth electrode 611 in the second region is located in the support pillar avoidance area 61. The projection of the second end of the support pillar 11 onto the substrate 21 overlaps with the projection of the support pillar avoidance area 61 onto the substrate 21, but does not overlap with the projection of the pixel electrode 231 onto the substrate 21. This support pillar avoidance area 61 design helps increase the support area of ​​the support pillar 11 and improves its support performance. The pixel electrode 231 includes the fourth electrode 611 located in the support pillar avoidance area 61. The fourth electrode 611 is reused as the second electrode 2312. The fourth electrode 611 can limit the movement of the support pillar 11, reducing its sliding range and preventing it from scratching the PI alignment film and generating debris, thus reducing the probability of dynamic crushing bright spots.

[0080] Further reference Figure 26 and Figure 27 The fourth electrode 611 is disposed on the edge of the pixel electrode 231 near the support post avoidance area 61. For example, the fourth electrode 611 can be disposed on each of the four pixel electrodes 231, with the fourth electrode 611 disposed on the edge of the pixel electrode 231 near the support post avoidance area 61. This allows the fourth electrode 611 of the four pixel electrodes 231 to limit the support post 11, confining the support post 11 within the space formed by the four fourth electrodes 611. This effectively reduces the sliding range of the support post 11, prevents the support post 11 from scratching the PI alignment film and generating debris, and reduces the probability of dynamic crushing bright spots.

[0081] Further reference Figure 26 and Figure 27 The projection of the fourth electrode 611 onto the substrate 21 at least partially surrounds the two sides of the second end of the support pillar 11. For example, each of the four pixel electrodes 231 is correspondingly provided with a fourth electrode 611 located in the support pillar avoidance area 61. The fourth electrode 611 is located on the edge of the pixel electrode 231 near the support pillar avoidance area 61. The projection of the fourth electrode 611 onto the substrate 21 at least partially surrounds the two sides of the second end of the support pillar 11, such that the fourth electrode 611 of each pixel electrode 231 limits one corner of each support pillar 11, thereby limiting the support pillar 11 and preventing it from sliding, scratching the PI alignment film, generating debris, and causing dynamic crushing of bright spots.

[0082] Based on the above embodiments, the fourth electrode 611 can be configured in different ways. Two feasible configuration methods are shown below.

[0083] like Figure 28 and Figure 29As shown, the fourth electrode 611 includes a first sub-electrode 6111 and a second sub-electrode 6112 connected together. The fourth electrode 611 corresponds to one side of the second end of the support column 11, and the second sub-electrode 6112 corresponds to the other side of the second end of the support column 11. The angle between the first sub-electrode 6111 and the second sub-electrode 6112 is 90°.

[0084] like Figure 27 and Figure 28 As shown, the fourth electrode 611 includes a first sub-electrode 6111 and a second sub-electrode 6112 connected together. The first sub-electrode 6111 corresponds to one side of the second end of the support post 11, and the second sub-electrode 6112 corresponds to the other side of the second end of the support post 11. The angle between the first sub-electrode 6111 and the second sub-electrode 6112 is greater than 90°. Both of these methods ensure that the fourth electrode 611 can restrict the four corners of the support post 11, prevent the support post 11 from sliding, reduce the probability of the support post 11 scratching the PI alignment film, and ensure the display effect of the display panel.

[0085] Optional, continue to refer to Figures 1-4 The width of the second electrode 2312 ranges from 2μm to 4μm. If the width of the second electrode 2312 is less than 2μm, it is difficult for the second electrode 2312 to effectively limit the position of the support post 11. If the width of the second electrode 2312 is greater than 4μm, the area occupied by the second electrode 2312 will be too large. Therefore, the width of the second electrode 2312 is reasonably set within the range of 2μm to 4μm to ensure the limiting effect of the second electrode 2312 on the support post 11, avoid the support post 11 scratching the PI alignment film and generating debris, and ensure the display effect of the display panel.

[0086] As another embodiment Figure 30 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention. Figure 31 for Figure 30 A schematic diagram of the cross-section along section line Q1-Q2. Figure 32 for Figure 30 A schematic diagram of the cross-section along section line R1-R2, as shown below. Figures 30-32 As shown, the projection shape of the support column 11 on the plane where the second substrate 20 is located is a cross shape. The second electrode 2312 includes a third sub-electrode 71 and a fourth sub-branch electrode 72. The extension directions of the third sub-electrode 71 and the fourth sub-electrode 72 are parallel to the horizontal and vertical sides of the cross shape, respectively.

[0087] The support post 11 can be configured in a cross shape, with its projection onto the plane of the second substrate 20 forming a cross shape. This effectively increases the contact area between the support post 11 and the first substrate 10, thereby enhancing the supporting force of the support post 11. The second electrode 2312 of the pixel electrode 231 includes a third sub-electrode 71 and a fourth sub-electrode 72. For example, the support post 11 is surrounded by four pixel electrodes 231. The extension directions of the third sub-electrode 71 and the fourth sub-electrode 72 of each pixel electrode 231 are parallel to the horizontal and vertical sides of the cross shape, respectively. This allows the movement range of the support post 11 to be limited by the third sub-electrode 71 and the fourth sub-electrode 72 of the four pixel electrodes 231, preventing the support post 11 from scratching the PI alignment film and generating debris, reducing the probability of dynamic crushing bright spots, and ensuring the display effect of the display panel.

[0088] It needs to be explained, it needs to be explained. Figure 18-32 Only a portion of the structure is shown as an example, omitting some membrane layers. Figure 22 , Figure 26 , Figure 28 and Figure 30 The pixel electrode 231 and support post 11 are shown only as examples. The structures of data lines, scan lines and thin-film transistors can be similar to those in the aforementioned embodiments, and will not be described in detail again.

[0089] As another possible implementation method Figure 33 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention. Figure 34 for Figure 33 A schematic diagram of the cross-section along section lines S1-S2, as shown below. Figure 33 and Figure 34 As shown, the support column 11 includes a first support column 111 and a second support column 112. The second end of the first support column 111 is in contact with the second substrate 20, and the second support column 112 has a preset distance from the second substrate 20.

[0090] The display panel includes a first support column 111 and a second support column 112. The first support column 111 is the main support component. Its first end contacts the first substrate 10, and its second end contacts the second substrate 20. The first support column 111 maintains the thickness of the liquid crystal cell, bears the pressure inside the display panel, ensures the uniformity of the liquid crystal cell thickness, avoids uneven display, and ensures the overall display effect of the display panel. The first end of the second support column 112 contacts the first substrate 10, and its second end has a preset distance from the second substrate 20, meaning that the height of the second support column 112 is less than the thickness of the liquid crystal cell. The second support column 112 acts as a buffer when the display panel is subjected to external force and deforms, distributing part of the external force, preventing the first support column 111 from deforming or breaking, and allowing the display panel to return to its original shape after the external force disappears.

[0091] Further reference Figure 33 and Figure 34 The height of the first support pillar 111 ranges from 1.8μm to 3.0μm, and the height of the second support pillar 112 ranges from 1.3μm to 2.6μm. The heights of the first support pillar 111 and the second support pillar 112 are appropriately set. Typically, the height H1 of the first support pillar 111 is greater than the height H2 of the second support pillar 112. The height of the first support pillar 111 is consistent with the thickness of the liquid crystal cell, so that the first support pillar 111 supports the thickness of the liquid crystal cell and ensures the display effect of the display panel. A reasonable height difference exists between the second support pillar 112 and the first support pillar 111. This avoids the second support pillar 112 being too large, which would cause the second support pillar 112 to contact the second substrate 20 too early when the display panel is subjected to external impact, resulting in uneven liquid crystal cell thickness and display unevenness; and also avoids the second support pillar 112 being too small, which would cause the second support pillar 112 to not contact the second substrate 20 for too long when the display panel is subjected to external impact, failing to provide a buffering effect and causing display panel deformation and display unevenness.

[0092] As another possible implementation method Figure 35 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention, such as... Figure 35 As shown, the number of first support pillars 111 is less than the number of second support pillars 112. Since both ends of the first support pillars 111 are in contact with the first substrate 10 and the second substrate 20, ensuring the thickness of the liquid crystal cell, the number of first support pillars 111 is further reduced to less than the number of second support pillars 112 to avoid an excessive number of first support pillars 111 restricting the flow of liquid crystal and affecting the display effect. Furthermore, a reasonable setting of the number of second support pillars 112 ensures their stress-sharing effect and guarantees the pressure resistance of the display panel. It should be noted that... Figure 35The first support column 111 and the second support column 112 are shown only as examples, and part of the membrane layer is ignored.

[0093] As another possible implementation method, please refer to Figure 35 The distribution density of the first support pillar 111 is less than that of the second support pillar 112. Typically, multiple second support pillars 112 are placed between two adjacent support pillars 11. The first support pillars 111 ensure the accuracy of the liquid crystal thickness, preventing excessive density of the first support pillars 111 from affecting the liquid crystal's flowability and causing uneven display. Setting the distribution density of the first support pillars 111 to be less than that of the second support pillars 112 allows the second support pillars 112 to disperse concentrated stress when the display panel is subjected to external impact, preventing deformation or breakage of the first support pillars 111, and ensuring that the display panel returns to its original shape when the external force disappears.

[0094] Figure 36 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention, such as... Figure 36 As shown, the display device 200 includes the display panel 100 described in the above embodiments.

[0095] It should be noted that since the display device provided in this embodiment has the same or corresponding beneficial effects as the display panel in the above embodiments, it will not be described in detail here. The display device 200 provided in this embodiment of the invention can be... Figure 36 The mobile phone shown can also be any electronic product with display function, including but not limited to the following categories: television, laptop, desktop monitor, tablet computer, digital camera, smart bracelet, smart glasses, in-vehicle display, medical equipment, industrial control equipment, touch interactive terminal, etc. The embodiments of the present invention do not make any special limitations on this.

[0096] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A display panel, characterized in that, It includes a first substrate and a second substrate arranged opposite to each other, and a plurality of support pillars located between the first substrate and the second substrate. The first end of the support pillar is fixed to the side of the first substrate near the second substrate, and the second end of the support pillar is in contact with the second substrate or has a preset distance. The second substrate includes a substrate and an insulating layer and an electrode layer stacked on one side of the substrate. The insulating layer includes a first region and a second region, the thickness of the first region being less than the thickness of the second region. The electrode layer includes a plurality of pixel electrodes, at least a portion of the pixel electrodes is projected onto the substrate within the projection of the first region onto the substrate, a portion of the second region is a support pillar corresponding region, and the projection of the second end of the support pillar onto the substrate is within the support pillar corresponding region.

2. The display panel according to claim 1, characterized in that, At least a portion of the pixel electrode includes a first electrode and a second electrode, the first electrode and the second electrode are electrically connected, the second electrode is located on the side of the first electrode near the support post, the projection of the first electrode on the substrate is located within the projection of the first region on the substrate, and the projection of the second electrode on the substrate is located within the projection of the second region on the substrate.

3. The display panel according to claim 2, characterized in that, The first electrode and the second electrode extend in different directions.

4. The display panel according to claim 1, characterized in that, The electrode layer further includes a third electrode, which is located on the side of the pixel electrode near the support pillar. The projection of the pixel electrode on the substrate is located within the projection of the first region on the substrate, and the projection of the third electrode on the substrate is located within the projection of the second region on the substrate. The third electrode is connected to a preset potential.

5. The display panel according to claim 1, characterized in that, The projections of the pixel electrodes onto the substrate are all located within the projection of the first region onto the substrate.

6. The display panel according to claim 1, characterized in that, The electrode layer includes multiple pixel electrode groups, and each pixel electrode group includes four pixel electrodes arranged in a 2×2 array. The four pixel electrodes are arranged around the support post.

7. The display panel according to claim 6, characterized in that, The projections of the four pixel electrodes onto the substrate do not overlap with the projection of the second end of the support pillar onto the substrate.

8. The display panel according to claim 6, characterized in that, The second substrate also includes multiple scan lines extending along a first direction and arranged along a second direction, and multiple data lines extending along the second direction and arranged along the first direction; Four thin-film transistors are disposed corresponding to the pixel electrode group. The thin-film transistors are disposed one-to-one with the pixel electrodes. The control terminal of the thin-film transistor is connected to the scan line. The first terminal of the thin-film transistor is connected to the data line. The second terminal of the thin-film transistor is connected to the pixel electrode. The projection of the thin-film transistor on the substrate does not overlap with the projection of the second terminal of the support pillar on the substrate.

9. The display panel according to claim 1, characterized in that, In the first region, the thickness of the insulating layer ranges from 2.0 μm to 3.0 μm, and in the second region, the thickness of the insulating layer ranges from 2.5 μm to 3.2 μm.

10. The display panel according to claim 2, characterized in that, The insulating layer further includes a step region located between the first region and the second region, and the pixel electrode includes a connection portion electrically connecting the first electrode and the second electrode. In the direction from the insulating layer toward the substrate, the connection portion covers at least a portion of the step region.

11. The display panel according to claim 2, characterized in that, The projection of the support post onto the substrate is rectangular, and the rectangle includes a first side and a third side extending along a third direction, and a second side and a fourth side extending along a fourth direction. The length of the first side is greater than the length of the second side, and the extension direction of the second electrode is parallel to the extension direction of the first side; or the length of the second side is greater than the length of the first side, and the extension direction of the second electrode is parallel to the extension direction of the second side.

12. The display panel according to claim 2, characterized in that, The electrode layer includes multiple pixel electrode groups, and each pixel electrode group includes four pixel electrodes arranged in a 2×2 array, with the four pixel electrodes arranged around the support pillar; The four pixels corresponding to the pixel electrode group are provided with support pillar avoidance areas, and the pixel electrode in the pixel electrode group is provided with a fourth electrode located in the support pillar avoidance area, so that the projection of the second end of the support pillar on the substrate does not overlap with the projection of the pixel electrode on the substrate.

13. The display panel according to claim 12, characterized in that, The fourth electrode is disposed on the edge of the pixel electrode near the support post area.

14. The display panel according to claim 13, characterized in that, The fourth electrode includes a first sub-electrode and a second sub-electrode connected together, and the projection of the fourth electrode onto the substrate at least partially surrounds two sides of the second end of the support post.

15. The display panel according to claim 2, characterized in that, The width of the second electrode ranges from 2μm to 4μm.

16. The display panel according to claim 2, characterized in that, The projection shape of the support column on the plane of the second substrate is a cross shape. The second electrode includes a third sub-electrode and a fourth sub-electrode. The extension directions of the third sub-electrode and the fourth sub-electrode are parallel to the horizontal and vertical sides of the cross shape, respectively.

17. The display panel according to claim 1, characterized in that, The support column includes a first support column and a second support column. The second end of the first support column is in contact with the second substrate, and the second support column and the second substrate have a preset distance.

18. The display panel according to claim 17, characterized in that, The height of the first support column ranges from 1.8μm to 3.0μm, and the height of the second support column ranges from 1.3μm to 2.6μm.

19. The display panel according to claim 17, characterized in that, The number of the first support columns is less than the number of the second support columns.

20. The display panel according to claim 17, characterized in that, The distribution density of the first support column is less than that of the second support column.

21. A display device, characterized in that, Includes the display panel described in any one of claims 1 to 20.

Citation Information

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  • Display panel and display device

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