Power controller for enhancing stability of control loop and method thereof

Abstract

According to the teachings herein, a switched-mode power supply controller includes circuitry for reducing a gain variation in a switching frequency as a function of a control current. The controller may reduce gain variation of the frequency by limiting the frequency according to the on-time and off-time control relationship. In one analog embodiment, the frequency is limited according to the switching period of the oscillator. In each cycle, an analog Off Time Modulator (OTM) may determine an oscillator Off Time; and the comparator and the sensing element can at least partially determine the on-time of the oscillator. The switch-off time and the switch-on time of the oscillator can jointly set the switching period.

Description

[0001] Cross Reference to Related Applications

[0002] This application claims the benefit of U.S. Provisional Application No. 63 / 648,398, filed May 16, 2024, the entire contents of which are incorporated herein by reference.

[0003] BACKGROUND TECHNICAL FIELD

[0004] The present invention relates to power controllers, and more specifically to control of switches in a switch mode power converter. BACKGROUND

[0005] Switch mode power converters, also referred to as power converters or switch mode power supplies (SMPS), are widely used due to their high efficiency, small size, and light weight. A flyback converter is a SMPS topology that isolates between a primary winding and a secondary winding of an energy transfer element (e.g., a magnetic component or coupled inductor). Components and circuitry connected to and referenced to the primary winding are often referred to as primary side components / circuitry. Similarly, components and circuitry connected to and referenced to the secondary winding are often referred to as secondary side components / circuitry. In this way, a flyback converter is configured to have a primary side and a secondary side.

[0006] A switch mode power supply / converter controller can be part of a closed loop system for regulating output power according to one or more system signals (e.g., output voltage). A switch mode power converter controller, or simply “controller,” can control switching. For example, a controller can control switching of a primary switch in a flyback converter.

[0007] During operation, a switch (e.g., a primary switch) is gated according to a switching cycle based on a system or controller configuration (e.g., a flyback configuration). A duty cycle (typically a ratio of on-time of a switch to a total switching period), a switching frequency, or a number of pulses per unit time of a switch can be changed based on a sensed feedback signal, thereby regulating an output (e.g., output power).

[0008] System performance, including system stability, dynamic range, and system bandwidth, can depend at least in part on the way a controller drives a switch to turn on and off. Typically, system bandwidth can be reduced at the cost of improving system stability. SUMMARY

[0009] The present disclosure presents a control method for improving system stability without degrading the system bandwidth of a power converter. The controller improves stability by reducing the variation of the switching frequency associated with one or more control or feedback signals. For example, the control signal can be a control current or a switching current; and the controller can control the switching period according to a turn-on time and turn-off time control relationship (e.g., a control equation).

[0010] The controller can include circuitry for monitoring and controlling the turn-on time and turn-off time of the oscillator switching cycle according to the turn-on time and turn-off time control relationship. For example, during a selected cycle, an off-time modulator (OTM) can at least partially determine the oscillator turn-off time; while a comparator and a sense element can at least partially determine the oscillator turn-on time. BRIEF DESCRIPTION OF DRAWINGS

[0011] Non-limiting and non-exhaustive embodiments of a power converter for enhanced control loop stability are described with reference to the following drawings, wherein like reference numerals refer to like parts throughout the various views.

[0012] FIG. 1A A flyback converter according to the teachings herein is illustrated.

[0013] FIG. 1B A schematic diagram of a controller and primary switch according to an embodiment of the present disclosure is illustrated.

[0014] FIG. 2A A flyback control model according to an embodiment of the present disclosure is illustrated.

[0015] FIG. 2B A flyback control model according to another embodiment of the present disclosure is illustrated.

[0016] FIG. 2C A current control loop according to an embodiment of the present disclosure is illustrated.

[0017] FIG. 2D A voltage control loop according to an embodiment of the present disclosure is illustrated.

[0018] FIG. 2E A feedforward path according to an embodiment of the present disclosure is illustrated.

[0019] FIG. 3A Waveforms of a modulator signal, an oscillator signal, and a drive signal according to an embodiment of the present disclosure are illustrated.

[0020] FIG. 3B Waveforms of a modulator signal, an oscillator signal, and a drive signal according to an embodiment of the present disclosure are illustrated.

[0021] FIG. 3C Waveforms of modulator signal, oscillator signal and drive signal are illustrated according to an embodiment of the disclosure.

[0022] FIG. 3D Waveforms of modulator signal, oscillator signal and drive signal are illustrated according to an embodiment of the disclosure.

[0023] FIG. 4 Circuit implementation of an oscillator is illustrated according to an embodiment of the disclosure.

[0024] FIG. 5 Circuit implementation of a turn-off time modulator is illustrated according to an embodiment of the disclosure.

[0025] FIG. 6 Circuit implementation of control logic is illustrated according to an embodiment of the disclosure.

[0026] FIG. 7 Circuit implementation of line interface circuit is illustrated according to an embodiment of the disclosure.

[0027] FIG. 8 Gate level circuit implementation of a switched current reference generator is illustrated according to an embodiment of the disclosure.

[0028] FIG. 9A Waveforms are illustrated according to an embodiment of the disclosure.

[0029] FIG. 9B Waveforms are illustrated according to an embodiment of the disclosure.

[0030] FIG. 9C Waveforms are illustrated according to an embodiment of the disclosure.

[0031] FIG. 9D Waveforms are illustrated according to an embodiment of the disclosure.

[0032] FIG. 10A Flowchart for driving primary switch and for determining oscillator on-time according to the teachings herein is illustrated.

[0033] FIG. 10B Flowchart for determining oscillator off-time according to the teachings herein is illustrated.

[0034] FIG. 10C Conceptual flowchart according to the teachings herein is illustrated.

[0035] FIG. 11A Plot of frequency versus control current of a controller is illustrated with large gain variation.

[0036] FIG. 11B A plot of frequency versus control current is illustrated in accordance with the teachings herein.

[0037] FIG. 12A A plot of oscillator off-time versus input voltage is illustrated, showing different selections of scaling factors for compensating for minimum off-time.

[0038] FIG. 12B A plot of output power versus input voltage is compared.

[0039] In all of the several views of the drawings, corresponding reference characters indicate corresponding parts throughout the several views. Skilled artisans will appreciate that the elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures can be exaggerated relative to other elements to help improve the understanding of various embodiments of the teachings herein.

[0040] In addition, common but well-understood elements that are useful or necessary in a commercially feasible embodiment are not explicitly depicted in order to facilitate a less obstructed view of these various embodiments utilized for power converters for enhanced control loop stability. DETAILED DESCRIPTION

[0041] In the following description, numerous specific details are set forth to provide a thorough understanding of the teachings herein. However, it will be apparent to one skilled in the art that the teachings herein can be practiced without the specific details. In other instances, well-known materials or methods have not been described in detail in order to avoid obscuring the teachings herein.

[0042] As discussed above, a flyback converter is a type of switched mode power supply topology. A flyback converter is an SMPS topology that includes isolation between a primary winding and a secondary winding of an energy transfer element (e.g., a magnetic component or coupled inductor). Components and circuitry connected to and referenced from the primary winding are often referred to as primary side components / circuitry. Similarly, components and circuitry connected to and referenced from the secondary winding are often referred to as secondary side components / circuitry. In this way, a flyback converter is configured to have a primary side and a secondary side.

[0043] Further, as discussed above, the switches can be gated or controlled according to a switching cycle that is based on a system or controller configuration. During operation, a switched mode power supply often uses one or more controllers to regulate and deliver power based on signal information such as output voltage and / or current.

[0044] In a flyback configuration, the controller can include a primary-side controller and / or a secondary-side controller; and can need to communicate signal information from the secondary-side to the primary-side. For example, to regulate output power on the secondary-side, the primary-side controller can need to receive a value of an output voltage at the secondary-side.

[0045] One way to communicate the signal information is by means of an opto-coupler. For example, the opto-coupler can generate a control current (e.g., a phototransistor current) that is proportional to the output voltage.

[0046] The control current (e.g., the phototransistor current) can be provided to the primary-side controller, in response, the primary-side controller can change switching of the primary-side switch to adjust / regulate power (e.g., output power) and / or output voltage.

[0047] One aspect of control is ac response and control loop stability. Control loop stability can be determined, at least in part, by a gain relationship of frequency as a function of control current. Unfortunately, the gain relationship can exhibit large variations as a function of control current, thereby complicating control loop stability and / or reducing a usable range of control current.

[0048] Accordingly, there is a need to develop control circuitry for reducing gain variations as a function of control current.

[0049] According to the teachings herein, a switch mode power supply controller includes circuitry for reducing gain variations of a switching frequency as a function of a control current. The controller can reduce gain variations of the frequency by controlling an equation that limits the frequency according to a turn-on time and a turn-off time. In one analog implementation, the frequency is limited according to a switching period of an oscillator. In each cycle, an analog turn-off time modulator (OTM) can determine an oscillator turn-off time; while a comparator and a sense element can determine, at least in part, an oscillator turn-on time. The oscillator turn-off time and the turn-on time can collectively set the switching period.

[0050] FIG. 1A A flyback converter 100 according to the teachings herein is illustrated. The flyback converter 100 includes an energy transfer element 114. As discussed above, the energy transfer element 114 (e.g., a transformer and / or a coupled inductor / inductance) can provide isolation (i.e., galvanic isolation) between a primary side 115 and a secondary side 117. The primary side 115 is referenced to a primary ground GND, and the secondary side 117 is referenced to a secondary ground RTN.

[0051] The flyback converter 100 also includes feedback circuitry 103 and a switching circuit 105. The switching circuit 105 can be an integrated switching circuit 105 that includes a primary switch SI and a controller 108. The switching circuit 105 can receive a supply voltage at pin BP and be connected to ground GND via a source pin S. In addition, a control current Ic can be received at a control pin C and a switching current Is can be received at a drain of the switch SI (also referred to as a drain pin D). SW .

[0052] In addition, the switching circuit can receive a current Iv at pin V. The current Iv can be proportional to the input voltage VIN and, without departing from the scope of the present disclosure, can be referred to as a feedforward signal I V .

[0053] In accordance with the teachings herein, the controller 108 includes a turn-off time modulator that can at least partially determine a switching frequency of the switch SI.

[0054] The feedback circuitry 103 includes an optocoupler 102. The optocoupler 102 can communicate information related to the output voltage VOUT from the secondary side 117 to the switching circuit 105 on the primary side 115 by generating a current Ic (i.e., a phototransistor current Ic). The current Ic is a feedback signal indicative of the output voltage VOUT and, without departing from the scope of the present disclosure, can also be referred to as a control current Ic.

[0055] FIG. 1B A schematic diagram of the controller 108 and the primary switch SI according to an embodiment of the present disclosure is illustrated. The controller 108 includes a line interface circuit 116, a switching current reference generator 118, an oscillator 120, a turn-off time modulator 122, and control logic 124. The line interface circuit 116 can provide a current I VS to the oscillator 120 and, without departing from the scope of the present disclosure, can also be referred to as a feedforward signal I VS .

[0056] The primary switch SI can receive a drive signal DR and, in response, provide a switching current Is SW . The drive signal DR can be a pulse modulated signal characterized by a square wave.

[0057] The current sensing element 188 can provide a signal ISENS that is proportional to the switching current Is SW . The signal ISENS can be a current; and, without departing from the scope of the present disclosure, can also be referred to as a current ISENS.

[0058] The switch current reference generator 118 can provide a reference UCR. The reference UCR can be variable. For example, the reference UCR can vary according to the waveform of the drive signal DR.

[0059] The oscillator 120 can generate an oscillator signal OSC, which can also be a pulse modulated signal characterized by a square waveform.

[0060] According to the teachings herein, the control logic 124 can provide the drive signal DR to the primary switch S1 such that the switching period of the drive signal DR is equal to the switching period of the oscillator signal.

[0061] FIG. 2A A flyback control model 200 is illustrated according to an embodiment of the flyback converter 100. The control model 200 represents a higher level of abstraction of the functionality of an embodiment of the flyback converter 100. The flyback control model 200 includes a primary switch S1, an energy transfer element 114, a behavioral feedback circuitry 212, a behavioral off-time modulator 214, a behavioral oscillator 216, a comparator 218, an edge-triggered set-reset (SR) latch 222, a behavioral current sense element 288, and a load 210.

[0062] The output power is delivered to the load 210 at a regulated output voltage VOUT and a load current IOUT. The load current IOUT can also be referred to as an output current IOUT without departing from the scope of the present disclosure.

[0063] The behavioral feedback circuitry 212 can be a behavioral representation of the feedback circuitry 103. The behavioral representation is intended to provide a simplified description of the functionality or behavior of an element to aid in the understanding of the present disclosure. The behavioral feedback circuitry 212 provides a feedback signal (i.e., a control current Ic) indicative of the output voltage VOUT. Although the feedback signal (i.e., the control current Ic) is shown as a current, other types of feedback signals (e.g., voltage) are also possible. The behavioral feedback circuitry 212 provides the control current Ic to the behavioral off-time modulator 214.

[0064] Behavioral off-time modulator 214 can be a behavioral representation of off-time modulator 122. Behavioral off-time modulator 214 can generate a modulator signal MOD having a modulation width TMOD in units of time. Although modulation width TMOD is shown as being generated by modulator signal MOD, i.e., a pulsed signal, other configurations are possible. For example, modulation width TMOD can be generated with other types of modulator signals (e.g., a sawtooth wave). Alternatively, modulation width TMOD can be generated by a negative-going pulse. Further, modulation width TMOD can be generated using digital and / or software methods. Modulation width TMOD is used to determine an off-time of an oscillator according to a particular relationship to be discussed in more detail below. Behavioral off-time modulator 214 provides modulation width TMOD to behavioral oscillator 216.

[0065] Behavioral oscillator 216 can be a behavioral representation of oscillator 120. Behavioral oscillator 216 receives modulation width TMOD and a drive-on time TON DR. Behavioral oscillator 216 provides an oscillator signal OSC to a set input of edge-triggered SR latch 222. Drive-on time TON DR is at least partially determined by switch current I SW for a determined time duration.

[0066] Behavioral current sense element 288 can be a behavioral representation of current sense element 188. Behavioral current sense element 288 can sense switch current I SW and provide a sense voltage VSENS indicative of switch current I SW . Behavioral current sense element 288 can provide sense voltage VSENS to a non-inverting input of comparator 218.

[0067] Comparator 218 compares a reference UCR at its inverting input to sense voltage VSENS and, in response, provides a reset signal RST to edge-triggered SR latch 222. Reference UCR can be a fixed reference UCR or a variable reference UCR. Reference UCR can include a slope compensation for stability and / or for ramp-time modulation (RTM). Ramp-time modulation (RTM) - related to the form of the current limit threshold - is discussed in U.S. Patent No. 9,246,392, the entirety of which is incorporated herein by reference.

[0068] The comparison of reference UCR to sense voltage VSENS can be equivalent to comparing switch current I SW to a reference value ITH. For example, the comparison of reference UCR to sense voltage VSENS can be equivalent to comparing switch current I SW to a reference value ITH and / or limiting switch current I SW to a reference value ITH.

[0069] Edge-triggered SR latch 222 can provide a latch signal QDR in response to positive edges at the set input and the reset input; further, drive signal DR follows latch signal QDR. When oscillator signal OSC transitions high, latch signal QDR transitions high. Correspondingly, drive signal DR also transitions high, thereby turning on primary switch SI. When comparator 218 changes state causing reset signal RST to transition high, latch signal QDR transitions low. Correspondingly, drive signal DR also transitions low, thereby turning off primary switch SI.

[0070] Primary switch SI is electrically coupled to primary winding 232 and can provide a switch current I SW , having a periodic ramp waveform in response to drive signal DR. Primary switch SI can also be referred to as switch SI, and switch current I SW , can also be referred to as primary switch current I SW .

[0071] According to the teachings herein, oscillator signal OSC has an oscillator on-time TON OSc and an oscillator off-time TOFF OSc. Oscillator period TOSC can be given by the sum of oscillator on-time TON OSc and oscillator off-time TOFF OSc.

[0072] Drive signal DR has a drive on-time TON DR and a drive off-time TOFF DR. Drive period TDR can be given by the sum of drive on-time TON DR and drive off-time TOFF DR.

[0073] As discussed above, comparator 218 can provide reset signal RST in response to sensed voltage VSENS exceeding reference UCR; and sensed voltage VSENS and reference UCR can be related and / or equivalent to primary current I SW and reference value ITH. Accordingly, comparator 218 can provide reset signal RST (and drive signal DR) in response to switch current I SW exceeding threshold value ITH.

[0074] As discussed herein, drive on-time TON DR is related to comparison of switch current I SW to threshold value ITH, and can be determined by comparison of switch current I SW to threshold value ITH. Similar to reference UCR, threshold value ITH can be fixed and / or variable. For example, threshold value ITH can vary such that switch current I SW .

[0075] Alternatively, and additionally, the threshold value ITH can be varied to stabilize the switching behavior of the drive signal DR. For example, the threshold value ITH can be varied to provide slope compensation. Accordingly, the drive on-time TON DR is related to the switching current I SW and the switching current I SW The drive on-time TON DR can be determined (i.e., by EQ. 1).

[0076] TON DR = TON DR(I SW ) EQ. 1

[0077] The oscillator on-time TON OSC is controlled to be the greater of a fixed on-time TON FIX (e.g., 4.4 microseconds) and the drive on-time TON DR. Thus, during one switching cycle (e.g., one oscillator switching cycle), the oscillator on-time TON OSC can be determined by the following EQ. 2.

[0078]

[0079] The off-time modulator 122 and the behavioral off-time modulator 214 can generate a signal having a modulation width TMOD. The modulation width TMOD can be a function of the output voltage VOUT. Alternatively, and additionally, the modulation width TMOD can be a function of a feedback signal (e.g., control current Ic) indicative of the output voltage VOUT. Accordingly, the modulation width TMOD can be determined by the control signal Ic (i.e., EQ. 3).

[0080] TMOD = TMOD(I C ) EQ. 3

[0081] The oscillator off-time TOFF OSC is controlled to be the greater of a fixed off-time TOFF FIX (e.g., 2.2 microseconds) and the modulation width TMOD. Thus, during one switching cycle (e.g., one oscillator switching cycle), the oscillator off-time TOFF OSC can be determined by EQ. 4.

[0082]

[0083] According to the teachings herein, when the flyback converter 100 operates according to the flyback control model 200 and according to EQ. 2 and EQ. 4 (i.e., control EQ. 2 and EQ. 4), then the frequency gain G for the control current Ic can be improved for control loop stability and range (i.e., range of the control current Ic).

[0084] As shown in equation EQ. 5, the gain G can be represented as the derivative of the frequency f with respect to the control current Ic. As presented herein, when the frequency f is controlled according to equation EQ. 2 and equation EQ. 4, then the variation of the gain G as given by equation EQ. 5 can be advantageously reduced.

[0085]

[0086] Additionally, as shown in equation EQ. 6, the frequency f (i.e., the switching frequency f) can be conveniently represented as the inverse of the oscillator period TOSC; since, as mentioned above, the drive period TDR can be equal to the oscillator period TOSC.

[0087]

[0088] FIG. 2B A flyback control model 201 according to another embodiment of the flyback converter 100 is illustrated. Unlike the flyback control model 200, the flyback control model 201 includes a feedforward element 250. The feedforward element 250 can be a behavioral representation of the line interface circuit 116. The feedforward element 250 provides a current Iv to the behavioral oscillator 216. The current Iv can be proportional to the input voltage VIN. The behavioral oscillator can vary the fixed off-time TOFF FIX as a function of the current Iv to reduce the variation of the output current IOUT as a function of the input voltage VIN. Accordingly, the fixed off-time TOFF FIX can be varied in response to variations of the input voltage VIN, and equation EQ. 4 can be restated by equation EQ. 7.

[0089]

[0090] FIG. 2C A current control loop 255 of the flyback control model 201 is illustrated. The current control loop 255 includes a behavioral current sense element 288 and the comparator 218. The current control loop 255 can control the switching current Is according to a reference UCR. For example, the switching current Is can be controlled according to peak current control, average current control, current limit, ramp time modulation, etc. SW SW

[0091] The switching current Is SW may be a function of system parameters and operating conditions. For example, the primary winding 232 can generate a magnetizing inductance and / or a parasitic inductance. Moreover, the switching current Is SW may depend on the input voltage VIN. Accordingly, the drive on-time TON DR depends at least in part on the switching current Is SW , which in turn depends on system parameters and operating conditions. SW , which in turn depends on system parameters and operating conditions.​​

[0092] FIG. 2D A voltage control loop 260 of the flyback control model 201 is illustrated. The voltage control loop 260 includes the behavioral feedback circuitry 212, the behavioral off-time modulator 214, and the behavioral oscillator 216. The voltage control loop 260 regulates the output voltage VOUT via negative feedback via the control current Ic. The control current Ic is a feedback signal indicative of the output voltage VOUT.

[0093] According to the teachings herein and EQ. 4, the output voltage VOUT can be regulated by the relationship of the modulation width TMOD as a function of the control current Ic. Although the teachings herein are discussed with respect to regulating the output voltage VOUT, other configurations are possible. For example, the teachings can also be applied to regulating the load current IOUT and / or both the load current IOUT and the output voltage VOUT.

[0094] The behavioral oscillator 216 provides an oscillator signal OSC to the set input of the edge-triggered SR latch 222. Accordingly, the oscillator period TOSC can be equal to the drive period TDR. Correspondingly, the drive switching cycle (i.e., the drive period TDR) can start simultaneously with the oscillator switching cycle (i.e., the oscillator period TOSC). As can be appreciated by those skilled in the art, system delays can create a phase shift between the drive switching cycle and the oscillator switching cycle; however, the switching cycles can still run and / or start simultaneously.

[0095] FIG. 2E A feedforward path 265 of the flyback control model 201 is illustrated. The feedforward path 265 includes the feedforward element 250 and the behavioral oscillator 216. The feedforward path 265 allows the fixed oscillator off-time TOFF FIX to be dependent on the input voltage VIN (i.e., the on current Iv). The feedforward can advantageously reduce variations in output power as a function of the input voltage VIN (i.e., improve load regulation).

[0096] FIG. 3A Waveforms 301-303 of the modulator signal MOD, the oscillator signal OSC, and the drive signal DR, respectively, are illustrated. FIG. 3A The embodiment of FIG. 3 corresponds to an example maximum frequency condition. The modulation width TMOD is one microsecond (1 us). The drive on-time TON DR is three microseconds (3 us). The fixed on-time TON FIX is four point four microseconds (4.4 us). The fixed off-time TOFF FIX is two point two microseconds (2.2 us).

[0097] Waveforms 301-303 are plotted over time for several switching cycles of the oscillator. At times 310, 313, and 317, the drive switching cycle begins simultaneously with the oscillator switching cycle. At time 311, the modulator signal MOD initiates a pulse with a modulation width TMOD. In accordance with the teachings herein, the off-time modulator 122 and the behavioral off-time modulator 214 can modulate the signal (e.g., the modulator signal MOD) during the oscillator off-time TOFF_OSC. Accordingly, the modulator signal MOD pulses between times 311-312 and between times 315-316. The drive signal DR is applied between times 313-314.

[0098] Based on the teachings of this paper and equations EQ.2, EQ.4, and EQ.7 (i.e., control equations EQ.2, EQ.4, and EQ.7), the oscillator has a switching cycle and frequency determined by a fixed on-time TON_FIX and a fixed off-time TOFF_FIX. The oscillator on-time TON_OSC is equal to 4.4 microseconds (4.4µs). The oscillator off-time TOFF_OSC is equal to 2.2 microseconds (2.2µs). The oscillator period TOSC is 6.6 microseconds (6.6µs). The drive on-time TON_DR is 3 microseconds (3µs). The drive period TDR is 6.6 microseconds (6.6µs).

[0099] FIG. 3B Waveforms 331-333 of the modulator signal MOD, oscillator signal OSC, and drive signal DR are shown respectively. FIG. 3B The implementation corresponds to the example extended (i.e., modulated) oscillator off-time condition. The modulation width TMOD is 2.5 microseconds (2.5us). The drive on-time TON_DR is 3 microseconds (3us). The fixed on-time TON_FIX is 4.4 microseconds (4.4us). The fixed off-time TOFF_FIX is 2.2 microseconds (2.2us).

[0100] Waveforms 331-333 are plotted over time over several switching cycles of the oscillator. At times 334, 336, and 337, the drive switching cycle begins simultaneously with the oscillator switching cycle. At time 335, the modulator signal MOD initiates a pulse with a modulation width TMOD. As taught herein, the disconnect time modulator 122 and the behavioral disconnect time modulator 214 can modulate the signal (e.g., the modulator signal MOD) during the oscillator disconnect time TOFF_OSC. For example, the modulator signal MOD exhibits a pulse between times 335 and 336.

[0101] Based on the teachings of this paper and equations EQ.2, EQ.4, and EQ.7, the oscillator has a switching cycle and frequency determined by a fixed on-time TON_FIX and a modulation width TMOD. The oscillator on-time TON_OSC is equal to 4.4 microseconds (4.4µs). The oscillator off-time TOFF_OSC is equal to 2.5 microseconds (2.5µs). The oscillator period TOSC is equal to 6.9 microseconds (6.9µs). The drive on-time TON_DR is equal to 3 microseconds (3µs). The drive period TDR is equal to 6.9 microseconds (6.9µs).

[0102] FIG. 3C Waveforms of the modulator signal MOD, oscillator signal OSC, and drive signal DR are shown in 341-343. FIG. 3C The implementation scheme corresponds to the example extended oscillator on-time condition. The modulation width TMOD is one microsecond (1µs). The drive on-time TON_DR is five microseconds (5µs). The fixed on-time TON_FIX is four point four microseconds (4.4µs). The fixed off-time TOFF_FIX is two point two microseconds (2.2µs).

[0103] Waveforms 341-343 are plotted over time over several switching cycles of the oscillator. At time 346, the drive switching cycle begins simultaneously with the oscillator switching cycle. At times 344 and 347, the modulator signal MOD initiates a pulse with a modulation width TMOD. As taught herein, the disconnect time modulator 122 and the behavior disconnect time modulator 214 can modulate the signal (e.g., the modulator signal MOD) during the oscillator disconnect time TOFF_OSC. For example, the modulator signal MOD exhibits a pulse between times 344-345.

[0104] Based on the teachings of this paper and equations EQ.2, EQ.4, and EQ.7, the oscillator has a switching cycle and frequency determined by the drive on-time TON_DR and the fixed off-time TOFF_FIX. The oscillator on-time TON_OSC is equal to five microseconds (5µs). The oscillator off-time TOFF_OSC is equal to 2.2 microseconds (2.2µs). The oscillator period TOFF_FIX is 7.2 microseconds (7.2µs). The drive on-time TON_DR is five microseconds (5µs). The drive period TDR is 7.2 microseconds (7.2µs).

[0105] FIG. 3D Waveforms 351-353 of the modulator signal MOD, oscillator signal OSC, and drive signal DR are shown respectively. FIG. 3DThe implementation scheme corresponds to an example increase in fixed off-time TOFF_FIX due to an increase in input voltage VIN (i.e., due to feedforward). For example, an increase in fixed off-time TOFF_FIX could correspond to an increase in input voltage VIN from 100V to 400V. Modulation width TMOD is 1 microsecond (1µs). Drive on-time TON_DR is 3 microseconds (3µs). Fixed on-time TON_FIX is 4.4 microseconds (4.4µs). Fixed off-time TOFF_FIX is 3.8 microseconds (3.8µs).

[0106] Waveforms 351-353 are plotted over time over several switching cycles of the oscillator. Based on the teachings of this paper and equations EQ.2, EQ.4, and EQ.7, the oscillator has a switching cycle and frequency determined by a fixed on-time TON_FIX and a fixed off-time TOFF_FIX. The oscillator on-time TON_OSC is equal to 4.4 microseconds (4.4µs). The oscillator off-time TOFF_OSC is equal to 3.8 microseconds (3.8µs). The oscillator period TOSC is equal to 8.2 microseconds (8.2µs). The drive on-time TON_DR is 3 microseconds (3µs). The drive period TDR is 8.2 microseconds (8.2µs).

[0107] FIG. 4 A circuit implementation of an oscillator 120 according to one embodiment of the present disclosure is illustrated. The oscillator 120 includes a capacitor C2, a current-guiding stage 420, a waveform circuit system 430, and a current-controlled current source (CCCS) 440. The oscillator 120 receives a power supply between ground GND and a supply voltage VCC. The oscillator 120 receives a drive signal DR and a current I... VS (feedforward signal I) VS It also provides the oscillator signal OSC. Capacitor C2 is electrically connected (electrically coupled) between capacitor node NTRI and ground GND.

[0108] A current ITRI flows into (i.e., is supplied to) capacitor node NTRI and flows out of (i.e., is removed from) it to generate a current-controlled triangular wave. The voltage VTRI at capacitor node NTRI may exhibit a waveform with rising and falling segments (e.g., triangular waveform 450). Accordingly, without departing from the scope of this disclosure, oscillator 120 may also be referred to as a current-controlled triangular wave generator 120.

[0109] The current-guiding stage 420 includes a differential pair 412, a p-channel field-effect transistor (PFET) Q12, an n-channel field-effect transistor (NFET) Q13, and a current mirror 415. The differential pair 412 includes PFETs Q10 and Q11 and receives a current IT1. Current IT1 is the tail current of the differential pair 412 and is therefore also referred to as the tail current IT1. The current mirror 415 includes NFETs Q14 and Q15 and is electrically coupled to the differential pair 412 to guide the current ITRI at node NTRI. The current IT1, the capacitance value of capacitor C2, and the relative scaling of the current mirror 415 can be adjusted so that the voltage VTRI exhibits a triangular waveform with a rising and falling segment. The rising segment can have a duration equal to a fixed on-time TON_FIX, and the falling segment can have a duration equal to a fixed off-time TOFF_FIX.

[0110] Based on the teachings of this paper, the oscillator on-time TON_OSC and oscillator off-time TOFF_OSC can be determined at least in part by the rising and falling segments. As discussed herein, the oscillator on-time TON_OSC and oscillator off-time TOFF_OSC can also be extended beyond the duration of the rising and / or falling segments.

[0111] Control signals G10-G13 are provided to the gates of PFET Q10, PFET Q11, PFET Q12, and NFET Q13, respectively. Control signal G13 follows drive signal DR, except that its waveform can be inverted (i.e., equation EQ.8).

[0112]

[0113] Accordingly, a control signal G13 can be applied to extend the duration of the oscillator on-time TON_OSC, which is associated with the drive on-time TON_DR.

[0114] The waveform circuit system 430 may include a logic circuit system (e.g., combinational logic, sequential logic, gates, etc.). The waveform circuit system 430 may receive the signal OFF_END. During the oscillator off-time TOFF_OSC, the signal OFF_END may be applied high to indicate the completion of the modulator pulse. For example, referring to waveform 301, the signal OFF_END may be applied high after time 312 and after time 316.

[0115] In response, the waveform circuit system 430 provides control signals G10-G12 to the current guide stage 420, causing the voltage VTRI to become a controllable triangular wave with an extended rise time and / or an extended fall time. The waveform circuit system 430 also receives the voltage VTRI and, in response, provides an oscillator signal OSC having an oscillator on-time TON_OSC and an oscillator off-time TOFF_OSC.

[0116] The current-controlled current source (CCCS) 440 includes current mirrors 416-417 and an NFET Q20. The CCCS 440 receives current I. VS The current mirror 416-417 can compare the reference current IR1 with the current I. VS The comparison is performed, and in response, a current I16 is absorbed at node N16. The NFET Q20 can respond to the current I... VS Provide current I ADJ .

[0117] Regarding the feedforward, the CCCS 440 can sink current I16, causing the current-guided stage 420 to alter the slope of the falling segment of the triangular wave 450. For example, in response to current I... VS As the value increases, the downward slope of the triangular wave 450 (i.e., the time derivative of the voltage VTRI) can decrease; conversely, the fixed off-time TOFF_FIX can increase. In this way, the fixed off-time TOFF_FIX becomes a function of the input voltage VIN (i.e., equation EQ.9).

[0118] TOFF_FIX=TOFF_FIX(Ivs)=TOFF_FIX(Iv) EQ.9

[0119] although FIG. 4 An analog triangular wave method for generating an oscillator signal OSC is illustrated, but other configurations are possible. For example, the oscillator signal OSC can be implemented digitally. A microcontroller with digital counter and / or digital signal processing features can be used to generate the oscillator signal OSC, at least in part, based on the timing waveform of the drive signal DR.

[0120] FIG. 5 A circuit implementation of an off-time modulator 122 according to one embodiment of the present disclosure is illustrated. The off-time modulator 122 includes a capacitor C1, a pull-down circuit system 545, a CCCS 540, a comparator 530, and an SR latch 532. The off-time modulator 122 receives a power supply between ground GND and a supply voltage VCC. The off-time modulator 122 receives a drive signal DR, an oscillator signal OSC, a control current Ic, and provides a signal OFF_END.

[0121] Capacitor C1 is electrically connected (electrically coupled) between capacitor node NOTM and ground GND. Current IOTM flows into capacitor C1 (at capacitor node NOTM) to generate a sawtooth wave ramp. For example, when current IOTM has a constant current value, voltage VOTM can follow a sawtooth waveform. Accordingly, without departing from the scope of this disclosure, the disconnect time modulator 122 can be referred to as sawtooth wave generator 122.

[0122] The pull-down circuit system 545 includes an OR gate 536 and an NFET Q7, and pulls the capacitor node NOTM to ground GND when any one of the drive signal DR, the oscillator signal OSC, or the signal OFF_END is high. The OR gate 536 applies a control signal G7 to the gate of the NFET Q7 based on a logical OR of the three input signals: the drive signal DR, the oscillator signal OSC, and the signal OFF_END.

[0123] For reference FIG. 2A-FIG. 2D The modulator signal MOD discussed can be identified as the logical inversion of the control signal G7 (i.e., equation EQ.10).

[0124]

[0125] During the oscillator off-time TOFF_OSC, both the oscillator signal OSC and the drive signal DR can be applied low. Accordingly, the voltage VOTM can be ramped (i.e., with a positive slope) according to a sawtooth wave (e.g., sawtooth waveform 550) during the oscillator off-time TOFF_OSC.

[0126] If the SR latch 532 is reset to dominant, the signal OFF_END can optionally be shifted out as an input to the OR gate 536. Under this optional condition, the voltage VOTM can be ramped over the entire duration of the oscillator off-time TOFF_OSC.

[0127] The CCCS 540 includes current mirrors 526-528. Current mirror 526 includes NFETs Q1-Q2. NFET Q1 is diode-connected (i.e., its gate is connected to its drain) and receives a control current Ic. NFET Q2 mirrors the control current Ic to match a reference current Ic. REF Compare them.

[0128] Control current Ic and reference current I REF The difference is provided to the current mirror 527. The current mirror 527 includes NFETs Q3-Q4. NFET Q3 is diode-connected (i.e., its gate is connected to its drain) and can receive the control current Ic and the reference current Ic. REFThe difference (comparison result). Current mirror 528 includes PFETs Q5-Q6 and is coupled to current mirror 527, such that PFET Q6 provides current IOTM. Current IOTM can be the difference between control current Ic and reference current I. REF The difference (comparison result) is proportional to the mirror current.

[0129] Therefore, the CCCS 540 can respond to the control current Ic, and more specifically, to the control current Ic and the reference current Ic. REF The difference in voltage VOTM is proportional to the current IOTM. Accordingly, during the oscillator off-time TOFF_OSC, the voltage VOTM can follow a sawtooth waveform with a slope that is at least partially dependent on the control current Ic. Optionally, current I can be drawn at the drain of NFET Q2. ADJ To reduce and / or modulate the reference current I REF The range.

[0130] Comparator 530 compares the voltage VOTM at the non-inverting input with the modulation reference TH_OFF at the inverting input and provides the signal SET to the set input of SR latch 532. FIG. 5 In one implementation, the modulation width TMOD is the time interval during which the voltage VOTM is less than the modulation reference TH_OFF. The modulation reference TH_OFF can be a temperature-stable reference TH_OFF (e.g., a bandgap reference). Therefore, in addition to depending on the control current Ic and the capacitance of capacitor C1, the modulation width TMOD can also be determined at least in part by the modulation reference TH_OFF.

[0131] In addition, the capacitance of capacitor C1 and the reference current I REF The scaling factor of the current mirrors 526-528 and the modulation reference TH_OFF determine the modulation width TMOD as a function of the control current Ic. In response to the voltage VOTM reaching and / or exceeding the modulation reference TH_OFF, the comparator 530 applies the signal SET high.

[0132] SR latch 532 receives the signal SET and the drive signal DR at the set input and reset input, respectively. In response, SR latch 532 provides the signal OFF_END. The drive signal DR resets latch 532 during the oscillator on-time TON_OSC. After a time interval determined by the modulation width TMOD, the signal SET is applied high during the oscillator off-time TOFF_OSC. Therefore, after the duration of the modulation width TMOD, SR latch 532 applies the signal OFF_END high.

[0133] FIG. 6A circuit implementation of control logic 124 according to one embodiment of this disclosure is illustrated. Control logic 124 receives signals ISENS and OSC, and provides a drive signal DR. Control logic 124 includes a monostable multivibrator (circuit) 610, a current-to-voltage converter 621, a comparator 610, an SR latch 632, and a buffer 633. Buffer 633 can provide the drive signal DR as a buffered copy of signal Q1.

[0134] Monostable circuit 610 receives the oscillator signal OSC and, in response to the rising edge of OSC, provides a pulse signal SET1 to the set input of SR latch 632. Accordingly, when the oscillator signal OSC goes high, SR latch 632 applies signal Q1, and therefore the drive signal DR goes high. In this way, the switching cycle of the drive switching signal DR can start simultaneously with the oscillator switching cycle.

[0135] The current-to-voltage converter 621 may include a resistor R1 for providing the sensed voltage VSENS to the non-inverting input of comparator 610. Comparator 610 compares the sensed voltage VSENS with a reference UCR and provides a signal RES1 to the reset input of SR latch 632. As discussed above with respect to comparator 218, comparing the sensed voltage VSENS with the reference UCR can control the switching current I relative to a threshold ITH. SW Accordingly, when the switching current I... SW When the threshold ITH is reached and / or exceeded, the SR latch 632 applies signal Q1 and therefore drive signal DR low.

[0136] FIG. 7 An example of a circuit implementation of a line interface circuit 116 according to an embodiment of this disclosure is illustrated. The line interface circuit 116 receives power between ground GND and the supply voltage VCC. The line interface circuit 116 receives current I... V And provide current I V Proportional current I VS The line interface circuit 116 includes a PFET Q30 and current mirrors 715-716. The PFET Q30 receives the gate bias VBP and sinks the current I from the source to the drain. V Current mirror 716 includes NFETs Q23-Q24. Current mirror 715 includes PFETs Q25-Q26. PFET Q30, current mirror 716, and current mirror 715 are electrically coupled, such that the current I originating from the drain of PFET Q26... VS It is the current I V A scaled-down copy.

[0137] FIG. 8A gate-level circuit implementation of a switching current reference generator 118 according to one embodiment of the present disclosure is illustrated. The switching current reference generator 118 receives a power supply between ground GND and a supply voltage VCC. The switching current reference generator 118 receives a drive signal DR and provides a reference UCR at node NCR. The switching current reference generator 118 includes a logic circuit system 801, switching currents 802 and 803, and a capacitor 804. The capacitor 804 is connected between node NCR and ground GND.

[0138] The logic circuit system 801 can drive the switching currents 802 and 803 according to the switching cycle of the drive signal DR and according to voltage references VTMAX and VTMIN. In response, the switching currents 802 and 803 can absorb and / or supply current ICR at node NCR, causing a change in the reference UCR. The reference UCR can be changed according to ramp time modulation (RTM).

[0139] FIG. 9A Waveforms 901-902, 903a-b, and 904-907 are shown for voltage VTRI, oscillator signal OSC, voltage VOTM, modulator signal MOD, signal OFF_END, drive signal DR, reference UCR, and sensed voltage VSENS. FIG. 9A The implementation scheme corresponds to the example maximum frequency condition. The modulation width TMOD is one microsecond (1µs). The drive on time TON_DR is three microseconds (3µs). The fixed on time TON_FIX is four point four microseconds (4.4µs). The fixed off time TOFF_FIX is two point two microseconds (2.2µs).

[0140] Waveforms 901-902, 903a-b, and 904-907 are plotted over time over several switching cycles (i.e., switching cycles) of the oscillator. For example, time 920 to time 930 shows one oscillator switching cycle (cycle) with the oscillator period TOSC. Reference FIG. 4 Waveform 901 (voltage VTRI) shows a triangular wave with rising segments 940 and 942 and falling segments 941 and 943. Rising segment 940 is illustrated between time 910 and time 914. Rising segment 942 is illustrated between time 920 and time 924. Falling segment 941 is illustrated between time 914 and time 920. Falling segment 943 is illustrated between time 924 and time 930.

[0141] Waveform 902 (oscillator signal OSC) is a rectangular waveform. When the triangular wave exhibits rising segments 940 and 942, the oscillator signal OSC is high. When the triangular wave exhibits falling segments 941 and 943, the oscillator signal OSC is low.

[0142] refer to FIG. 5 Waveform 903a (voltage VOTM) exhibits a sawtooth waveform. For example, waveform 903a increases with the sawtooth band between times 914 and 916, and between times 924 and 926. The duration between times 914 (924) and 916 (926) is the modulation width TMOD. (See above regarding...) FIG. 5 As discussed above, waveform 903a is configured identically to OR gate 536.

[0143] refer to FIG. 5 and FIG. 2B Waveform 903b (modulator signal MOD) shows a pulse waveform and may have a different y-axis scale than waveform 903a. For example, waveform 903b shows pulses between times 914 and 916 and between times 924 and 926.

[0144] refer to FIG. 5 and FIG. 2B Waveform 904 (signal OFF_END) shows the pulse waveform indicating modulation completion. Here, "modulation completion" refers to the completion of the pulse between time 914 (924) and time 916 (926).

[0145] Waveform 904 exhibits pulses for the remainder of the oscillator off time TOSC_OFF. For example, waveform 904 (signal OFF_END) remains high from time 916 to time 920 and from time 926 to time 930.

[0146] According to the teachings of this article, FIG. 4 The oscillator 120 can receive the signal OFF_END to determine the state of the disconnect time modulator 122, and enable the oscillator signal OSC according to equations EQ.2, EQ.4 and EQ.7.

[0147] In this case, the modulation width TMOD (1us) is less than the fixed off time TOFF_FIX (2.2us); therefore, according to equations EQ.2, EQ.4 and EQ.7, the oscillator off time TOSC_OFF is controlled by waveform 901 to be a fixed off time TOFF_FIX (2.2us).

[0148] refer to FIG. 6 and FIG. 2BWaveform 905 (drive signal DR) is at least partially determined by waveform 906 (reference UCR) and waveform 907 (sensed voltage VSENS). At times 912 and 922, the sensed voltage VSENS reaches and / or exceeds the reference UCR. Therefore, comparator 218 and / or comparator 610 change states, and the drive signal DR transitions from high to low. The reference UCR can be changed according to RTM. For example, waveform 906 monotonically decreases during the switching cycle (e.g., during the drive switching cycle). Since the sensed voltage VSENS is related to the switching current I... SW Therefore, the drive conduction time TON_DR can be determined by the switching current I. SW Determined relative to the reference value ITH. The drive on-time TON_DR (3µs) is less than the fixed on-time TON_FIX (4.4µs).

[0149] The oscillator on-time TON_OSC is greater than or equal to the fixed on-time TON_FIX. Therefore, according to the teachings of this paper, waveform 902 (oscillator signal OSC) transitions low at time 914 and at time 924, such that the oscillator on-time TON_OSC is equal to the fixed on-time TON_FIX.

[0150] Accordingly, the oscillator has a switching cycle and frequency determined by a fixed on-time TON_FIX and a fixed off-time TOFF_FIX. The oscillator on-time TON_OSC is equal to 4.4 microseconds (4.4µs). The oscillator off-time TOFF_OSC is equal to 2.2 microseconds (2.2µs). The oscillator period TOSC is 6.6 microseconds (6.6µs). The drive on-time TON_DR is 3 microseconds (3µs). The drive period TDR is 6.6 microseconds (6.6µs).

[0151] FIG. 9B Waveforms of voltage VTRI, oscillator signal OSC, voltage VOTM, modulator signal MOD, signal OFF_END, drive signal DR, reference UCR, and sensed voltage VSENS are illustrated in 961-962, 963a-b, and 964-967. FIG. 9B The implementation scheme corresponds to the extended (i.e., modulated) oscillator off-time condition. The modulation width TMOD is four microseconds (4µs). The drive on-time TON_DR is three microseconds (3µs). The fixed on-time TON_FIX is four point four microseconds (4.4µs). The fixed off-time TOFF_FIX is two point two microseconds (2.2µs).

[0152] Waveforms 961-962, 963a-b, and 964-967 are plotted over time over several switching cycles (i.e., switching cycles) of the oscillator. For example, one oscillator switching cycle (cycle) from time 971 to time 974 is shown. (Reference) FIG. 4 Waveform 961 (voltage VTRI) exhibits a triangular wave with a rising segment (e.g., rising segment 945) and a falling segment (e.g., falling segment 946). The rising segment 945 is illustrated between time 971 and time 972.

[0153] As taught in this document, the falling segment 946 is extended in duration as the off-time TOFF_EXT is extended. The falling segment 946 begins at time 972, and the voltage VTRI falls until time 973, a duration equal to the fixed off-time TOFF_FIX. The voltage VTRI is then held low (extended) until the start of the subsequent switching cycle at time 974. In response to the signal OFF_END, the oscillator 120 extends the falling segment from time 973 to time 974.

[0154] Accordingly, the oscillator off-time TOFF_OSC is determined by the off-time extension TOFF_EXT, which is equal to the modulation width TMOD. In this way, the oscillator off-time TOFF_OSC is determined at least in part by the duration of the falling segment 946 and the duration of the transition to the subsequent cyclic rising segment (off-time extension TOFF_EXT).

[0155] Waveform 962 (oscillator signal OSC) is a rectangular waveform. The oscillator signal OSC is high when the triangular wave exhibits a rising segment (e.g., rising segment 945). The oscillator signal OSC is low when the triangular wave exhibits a falling segment (e.g., falling segment 946), and during the extended off-time TOFF_EXT.

[0156] refer to FIG. 5 Waveform 963a (voltage VOTM) exhibits a sawtooth waveform. For example, waveform 963a increases in sawtooth bands between times 972 and 974. The duration between times 972 and 974 is the modulation width TMOD. (See above regarding...) FIG. 5 As discussed above, waveform 963a is configured identically to OR gate 536.

[0157] refer to FIG. 5 and FIG. 2B Waveform 963b (modulator signal MOD) displays a pulse waveform and may have a different y-axis scale than waveform 963a. For example, waveform 963b displays a pulse between time 972 and time 974.

[0158] refer toFIG. 5 and FIG. 2B Waveform 964 (signal OFF_END) shows the pulse waveform indicating modulation completion. Here, "modulation completion" means the pulse completes during the oscillator off-time TOFF_OSC. For example, waveform 963b completes modulation at time 974.

[0159] Because the modulation width TMOD (4µs) is greater than the fixed off-time (2.2µs), waveform 964 exhibits a narrow pulse with a short duration (e.g., 10 nanoseconds). In this case, the modulation width TMOD (4µs) is greater than the fixed off-time TOFF_FIX (2.2µs). Therefore, according to equations EQ.2, EQ.4, and EQ.7, the oscillator off-time TOSC_OFF is determined by waveforms 963a-b and is extended to be equal to the modulation width TMOD.

[0160] refer to FIG. 6 and FIG. 2B Waveform 965 (drive signal DR) is determined by waveform 966 (reference UCR) and waveform 967 (sensor voltage VSENS). The drive on-time TON_DR (3µs) is less than the fixed on-time TON_FIX (4.4µs). As illustrated, waveform 965 can transition low at time 975; and the behavior of waveforms 965-967 is similar to that of waveforms 905-907.

[0161] Based on the teachings of this paper and equations EQ.2, EQ.4, and EQ.7, the oscillator has a switching cycle and frequency determined by a fixed on-time TON_FIX (4.4 µs) and a modulation width TMOD (4 µs). The oscillator on-time TON_OSC is equal to 4.4 microseconds (4.4 µs). The oscillator off-time TOFF_OSC is equal to four microseconds (4 µs). The oscillator period TOSC is eight point four microseconds (8.4 µs). The drive on-time TON_DR is three microseconds (3 µs). The drive period TDR is eight point four microseconds (8.4 µs).

[0162] FIG. 9C Waveforms of voltage VTRI, oscillator signal OSC, voltage VOTM, modulator signal MOD, signal OFF_END, drive signal DR, reference UCR, and sensed voltage VSENS are shown in 981-982, 983a-b, and 984-987. FIG. 9C The implementation scheme corresponds to the example extended oscillator on-time condition. The modulation width TMOD is one microsecond (1µs). The drive on-time TON_DR is five point one microsecond (5.1µs). The fixed on-time TON_FIX is four point four microseconds (4.4µs). The fixed off-time TOFF_FIX is two point two microseconds (2.2µs).

[0163] Waveforms 981-982, 983a-b, and 984-987 are plotted over time over several switching cycles (i.e., switching cycles) of the oscillator. For example, one oscillator switching cycle (cycle) from time 988 to time 991 is shown. (Reference) FIG. 4 Waveform 981 (voltage VTRI) shows a triangular wave with a rising segment (e.g., rising segment 948) and a falling segment (e.g., falling segment 949).

[0164] As taught in this document, the rising segment 948 is extended. The rising segment 948 begins at time 988, causing waveform 981 (voltage VTRI) to rise until time 989, a duration equal to the fixed on-time TON_FIX. In response to waveform 985 (drive signal DR) remaining high, oscillator 120 holds waveform 981 high from time 989 to time 990. The duration from time 989 to time 990 is the on-time extension TON_EXT, which extends the oscillator on-time TON_OSC to be equal to the drive on-time TON_DR.

[0165] Accordingly, the oscillator on-time TON_OSC can be determined by the duration of the rising segment 948 and the duration of the transition time to the falling segment 949. Waveform 982 (oscillator signal OSC) is a rectangular waveform. The oscillator signal OSC is high during the rising segment (e.g., rising segment 948) of the triangular wave and during the on-time extension TON_EXT. The rising segment 948 from time 988 to time 989 can have a duration equal to the fixed on-time TON_FIX. The on-time extension TON_EXT extends the oscillator on-time TON_OSC to be equal to the drive on-time TON_DR. As mentioned above regarding FIG. 9A and FIG. 9B The oscillator signal OSC is low when the triangular wave exhibits a falling segment (e.g., falling segment 949).

[0166] The discussion of waveforms 983a, 983b, and 984-987 is similar to the discussion of waveforms 903a, 903b, and 904-907.

[0167] Based on the teachings of this paper and equations EQ.2, EQ.4, and EQ.7, the oscillator has a switching cycle and frequency determined by the drive on-time TON_DR (5.1 µs) and the fixed off-time TOFF_FIX (2.2 µs). The oscillator on-time TON_OSC is equal to 5.1 microseconds (5.1 µs). The oscillator off-time TOFF_OSC is equal to 2.2 microseconds (2.2 µs). The oscillator period TOSC is 7.3 microseconds (7.3 µs). The drive on-time TON_DR is 5.1 microseconds (5.1 µs). The drive period TDR is 7.3 microseconds (7.3 µs).

[0168] FIG. 9D The waveforms of voltage VTRI, oscillator signal OSC, voltage VOTM, modulator signal MOD, signal OFF_END, drive signal DR, reference UCR, and sensed voltage VSENS are illustrated in 993-994, 995a-b, and 996-999. FIG. 9D The implementation scheme corresponds to an example of an increased fixed off-time TOFF_FIX due to an increase in the input voltage VIN (i.e., due to feedforward). The modulation width TMOD is one microsecond (1µs). The drive on-time TON_DR is three microseconds (3µs). The fixed on-time TON_FIX is four point four microseconds (4.4µs). The fixed off-time TOFF_FIX is three point eight seconds (3.8µs). The increase in the fixed off-time can correspond to an increase in the input voltage VIN from one hundred volts (100V) to four hundred volts (400V).

[0169] The discussion of waveforms 993-994, 995a-b, and 996-999 is similar to the discussion of waveforms 901-902, 903a-b, and 904-907, except that the fixed off-time TOFF_FIX increases due to its dependence on the current Iv.

[0170] and FIG. 9A Similarly, the oscillator on-time TON_OSC from time 931 to time 932 is determined by a fixed on-time TON_FIX, which is the duration of the rising segment 938. Likewise, with... FIG. 9A Similarly, the oscillator off-time TOFF_OSC from time 932 to time 933 is determined by a fixed off-time TOFF_FIX, which is the duration of the falling segment 939. However, with FIG. 9A The difference is that the slope (i.e., the time derivative of voltage VTRI) decreases, so the duration of the falling segment 939 (i.e., the fixed off time TOFF_FIX) increases in response to the current Iv.

[0171] Based on the teachings of this paper and equations EQ.2, EQ.4, and EQ.7, the oscillator has a switching cycle and frequency determined by a fixed on-time TON_FIX and a fixed off-time TOFF_FIX. The oscillator on-time TON_OSC is equal to 4.4 microseconds (4.4µs). The oscillator off-time TOFF_OSC is equal to 3.8 microseconds (3.8µs). The oscillator period TOSC is 8.2 microseconds (8.2µs). The drive on-time TON_DR is 3 microseconds (3µs). The drive period TDR is 8.2 microseconds (8.2µs).

[0172] FIG. 10A Flowchart 1000a illustrates the methods for driving the primary switch S1 and determining the oscillator turn-on time TON_OSC according to the teachings of this paper. Flowchart 1000a can provide a time-based algorithm for implementation. FIG. 2A-FIG. 2E The flyback control models 200 and 201.

[0173] Although flowchart 1000a is described in relation to determining the oscillator on-time TON_OSC, it can also provide an algorithm for software and / or digital implementations that does not require an oscillator signal. As those skilled in the art will understand, analog-to-digital (A / D) converters can be used to provide quantities such as output voltage VOUT, control current Ic, and input voltage VIN to digital signal processors (DSPs) and / or microcontrollers.

[0174] Flowchart 1000a may follow a control relationship (i.e., equation EQ.2). Step 1001 may correspond to the start of a switching cycle using a timer (e.g., a clock) and / or a counter. Step 1001 may correspond to the start of a switching cycle (e.g., an oscillator switching cycle). The counter TIME is reset and then begins to increment. Step 1003 may correspond to turning on a switch (e.g., primary switch S1).

[0175] Decision step 1004 can correspond to various aspects of the current control loop 255. Variables such as the threshold ITH and / or the fixed on-time TON_FIX can be programmed into the processor and / or determined during operation. When the switching current I... SW If the time is less than the threshold ITH and the counter TIME is less than the fixed on-time TON_FIX, remain at decision step 1004. Otherwise, proceed to decision step 1005.

[0176] Decision step 1005 also involves the current control loop 255. If the switching current I... SWIf the value is greater than (or equal to) the threshold ITH and the counter TIME is less than the fixed on-time TON_FIX, proceed to step 1007. At step 1007, turn off the primary switch S1 and continue to decision step 1009.

[0177] At decision step 1009, if the counter TIME is less than (or equal to) the fixed on-time TON_FIX, remain at step 1009. Otherwise, proceed to step 1010, where the counter TIME is determined by the fixed on-time TON_FIX.

[0178] Decision step 1006 also involves the current control loop 255, and the case where the drive on-time TON_DR may exceed (be greater than) the fixed on-time TON_FIX. When the switching current I... SW If the value is less than the threshold ITH and the counter TIME is greater than (or equal to) the fixed on-time TON_FIX, remain at decision step 1006. Otherwise, proceed to step 1008.

[0179] The switch is turned off at step 1008, and the process proceeds to step 1010, where the counter TIME is determined by the drive on-time TON_DR. Step 1010 is a continuation step and can correspond to the case where the counter TIME has reached a duration equal to the oscillator on-time TON_OSC of equations EQ.2, EQ.4, and EQ.7.

[0180] FIG. 10B A flowchart 1000b is illustrated for determining the oscillator off-time TOFF_OSC according to the teachings of this document. Flowchart 1000b also follows control relationships (i.e., equations EQ.4 and EQ.7) and can also be applied to systems that do not require an oscillator (e.g., software, digital, etc.). Step 1010 continues from flowchart 1000a. Step 1012 corresponds to resetting the counter TIME.

[0181] Decision step 1014 can correspond to comparing the modulation width TMOD(Ic) with the fixed off-time TOFF_FIX. The modulation width TMOD can be a function of the output voltage VOUT. The fixed off-time TOFF_FIX can be a function of the input voltage VIN. Time variables such as the modulation width TMOD(VOUT) and the fixed off-time as a function of the input voltage TOFF_FIX(VIN) can be determined using digital methods and / or lookup tables. If the counter TIME is less than the modulation width TMOD and the fixed off-time TOFF_FIX, remain at decision step 1014. Otherwise, proceed to decision step 1015.

[0182] Decision step 1015 can also correspond to comparing the modulation width TMOD(Ic) with the fixed off time TOFF_FIX. If the counter TIME is greater than (or equal to) the modulation width TMOD and less than the fixed off time TOFF_FIX, then proceed to step 1019.

[0183] At decision step 1019, if the counter TIME is less than (or equal to) the fixed disconnect time TOFF_OSC, remain at step 1019. Otherwise, proceed to step 1020, where the counter TIME is determined by the fixed disconnect time TOFF_FIX(VIN).

[0184] Decision step 1016 can correspond to the modulation width TMOD exceeding the fixed off-time TOFF_FIX. If the counter TIME is less than the modulation width TMOD and greater than (or equal to) the fixed off-time TOFF_FIX, the process remains at decision step 1016. Otherwise, proceed to step 1020, where the counter TIME is determined by the modulation width TMOD.

[0185] Returning to step 1020 can correspond to ending the switching cycle (e.g., drive cycle TDR and / or oscillator cycle TOSC).

[0186] As discussed above in the discussion of flowcharts 1000a-1000b, the oscillator on-time TON_OSC and off-time TOFF_OSC can be implemented digitally without requiring an oscillator signal OSC or a dedicated oscillator 120. Instead, the oscillator on-time TON_OSC and off-time TOFF_OSC can be control / calculated values ​​implemented digitally (e.g., using a microcontroller, DSP, and / or A / D converter) (i.e., control on-time TON_OSC and control off-time TOFF_OSC). The control on-time TON_OSC and control off-time TOFF_OSC can then determine the drive period TDR.

[0187] FIG. 10C A conceptual flowchart 1000c is illustrated based on the teachings of this article. Reference FIG. 2A Step 1032 can be associated with providing a switching current I at the beginning of the variable switching cycle. SW Correspondingly, step 1033 can be associated with providing an indication of the switching current I during the drive conduction time TON_DR. SW This corresponds to the switching current feedback signal (e.g., the sensed voltage VSENS). For example, the sensed voltage VSENS can be provided to comparator 218.

[0188] Step 1034 can correspond to turning off the switch (e.g., primary switch S1) at the end of the drive-on time TON_DR. For example, comparator 218 can turn off primary switch S1 in response to the sensed voltage VSENS reaching a threshold (e.g., a threshold of the reference UCR). Accordingly,

[0189] Step 1034 can also correspond to determining the drive on-time TON_DR during the variable switch cycle.

[0190] Step 1035 can correspond to determining the control on-time TON_OSC (e.g., oscillator on-time TON_OSC) according to control equation EQ.2. According to control equation EQ.2, the control on-time TON_OSC can be determined by comparing the drive on-time TON_DR, as determined during step 1034, with the fixed on-time TON_FIX (e.g., 4.4 microseconds).

[0191] Step 1036 may correspond to providing an output feedback signal (e.g., a control current Ic) indicating the output voltage VOUT. Step 1037 may correspond to determining the modulation width TMOD associated with the output feedback signal (e.g., the control current Ic).

[0192] Step 1038 may correspond to determining the control off-time TOFF_OSC (e.g., oscillator on-time TOFF_OSC) according to control equation EQ.4 and / or control equation EQ.7. According to control equations EQ.4 and EQ.7, the control off-time TOFF_OSC can be determined by comparing the modulation width TMOD, as determined in step 1037, with the fixed off-time TOFF_FIX.

[0193] FIG. 11A The curves 1102-1105 illustrate the relationship between the controller frequency and control current, using a large gain G variation as an example. Curves 1102-1105 correspond to drive switching cycles with drive on-times TON_DR of 0.4 microseconds (0.4µs), 2 microseconds (2.0µs), 3 microseconds (3.0µs), and 4.4 microseconds (4.4µs), respectively.

[0194] The curve 1105 can correspond to a reduced control range. For example, the control range is limited to a control current Ic value from 225 microamps (225uA) to 350 microamps (350uA).

[0195] The variation of the gain G, determined by the slope (i.e., the derivative of the frequency f with respect to the control current Ic), may be too large to achieve stable control within the range of the drive on-time TON_DR and the control current Ic.

[0196] FIG. 11B Figures 1112-1115 illustrate the frequency versus control current curves according to the teachings of this document. Figures 1112-1115 can be compared with… FIG. 2A-FIG. 2E The flyback control models 200 and 201 correspond to equations EQ.2, EQ.4 and EQ.7.

[0197] Graph 1115 shows the control current Ic from zero to 350µA and the controllable gain G (i.e., the derivative of frequency f with respect to control current Ic) from 0.4µs ​​to 4.4µs with the drive on-time TON_DR. (This is achieved by comparing with...) FIG. 11A In comparison, graph 1115 shows a better relationship between frequency f and control current Ic.

[0198] FIG. 12A An example is shown: a graph of oscillator off-time TOFF_OSC versus input voltage VIN, illustrating different choices of the scaling factor (TOFF COMP) used to compensate for the minimum off-time in response to the input voltage.

[0199] FIG. 12B A graph comparing output power POUT with input voltage VIN illustrates example performance based on the selection of TOFFCOMP.

[0200] The above description of the illustrative embodiments of this disclosure, including those described in the abstract, is not intended to be exhaustive or to limit the precise forms disclosed. While specific embodiments and examples of power converters for enhancing control loop stability have been described herein for illustrative purposes, various equivalent modifications are possible without departing from the broader spirit and scope of this disclosure. Indeed, it should be understood that specific example values ​​for voltage, current, frequency, power range, time, etc., are provided for illustrative purposes, and other values ​​may be employed in other embodiments and examples in accordance with the teachings herein.

[0201] The foregoing description may refer to elements or features as “connected” or “coupled” together. As used herein, unless explicitly stated otherwise, “connected” or “electrically connected” means that one element / feature is directly or indirectly connected to another element / feature, and not necessarily mechanically connected. Similarly, unless explicitly stated otherwise, “coupled” or “electrically coupled” means that one element / feature is directly or indirectly coupled to another element / feature, and not necessarily mechanically coupled. Therefore, although the various schematic diagrams shown in the accompanying drawings depict exemplary arrangements of elements and components, additional intermediate elements, devices, features, or components may be present in actual implementations (assuming that the function of the depicted circuit will not be adversely affected). Furthermore, certain components may be excluded for the purpose of providing unobstructed illustration of the teachings herein.

[0202] In the context of this application, when a transistor is in an "off" state, it blocks current and / or substantially does not conduct current. Conversely, when a transistor is in an "on" state, it conducts current significantly. By way of example, in one embodiment, the high-voltage transistor includes an N-channel metal-oxide-semiconductor (NMOS) field-effect transistor (FET), wherein a high voltage is carried between a first terminal, i.e., the drain, and a second terminal, i.e., the source. Additionally, for the purposes of this disclosure, "ground" or "ground potential" refers to a reference voltage or potential relative to which all other voltages or potentials of an electronic circuit or integrated circuit (IC) are defined or measured.

[0203] Furthermore, unless otherwise expressly stated or understood in the context in which they are used, conditional language used herein, such as “can,” “may,” “perhaps,” “may,” “for example,” “like,” “e.g.,” “such as,” etc., is generally intended to convey that certain embodiments include certain features, elements, and / or states, while other embodiments do not. Therefore, such conditional language is generally not intended to imply that features, elements, and / or states are required in any way for one or more embodiments, or that one or more embodiments necessarily include logic for determining whether such features, elements, and / or states are included or whether they are performed in any particular embodiment.

[0204] While certain embodiments have been described, these embodiments are presented by way of example only and are not intended to limit the scope of this disclosure. In fact, the novel devices, methods, and systems described herein can be embodied in a variety of other forms; furthermore, various omissions, substitutions, and changes can be made to the form of the methods and systems described herein without departing from the spirit of this disclosure. For example, while the disclosed embodiments are presented with a given arrangement, alternative embodiments may perform similar functions with different components and / or circuit topologies, and some elements may be deleted, moved, added, subdivided, combined, and / or modified. Each of these elements can be implemented in a variety of different ways. Any suitable combination of elements and actions of the various embodiments described above can be combined to provide other embodiments. Therefore, the scope of the invention is defined only by reference to the appended claims.

[0205] Although the claims presented herein are in a single dependent format for filing with the U.S. Patent and Trademark Office, it should be understood that any claim may be dependent on any prior claim of the same type, unless it is clearly not technically feasible.

[0206] EMBODIMENTS

[0207] Although the invention is defined in the appended claims, it should be understood that the invention may also be (and alternatively) defined according to the following embodiments:

[0208] 1. A switch-mode power converter configured to convert input power into output power and regulate output voltage, the switch-mode power converter comprising:

[0209] A feedback circuit system configured to provide a feedback signal indicating the output voltage;

[0210] Disconnect the time modulator, which is configured to generate a modulator signal having a modulation width at least in part determined by the amplitude of the feedback signal;

[0211] An oscillator configured to provide an oscillator signal according to an oscillator switching cycle, the oscillator switching cycle including an oscillator on-time and an oscillator off-time, wherein the oscillator on-time is greater than or equal to a fixed on-time, and the oscillator off-time is determined at least in part by the modulation width; and

[0212] A switch configured to provide a switching current according to a drive signal switching cycle, wherein the switch conducts the switching current during a drive on-time, and wherein the drive signal switching cycle is determined by the oscillator switching cycle.

[0213] 2. The switch-mode power converter according to embodiment 1, wherein the switch-mode power converter is a flyback power converter.

[0214] 3. The switch-mode power converter according to embodiment 1, wherein when the drive on-time is less than the fixed on-time, the oscillator on-time is limited to the fixed on-time.

[0215] 4. The switch-mode power converter according to embodiment 3, wherein the fixed on-time is between three microseconds (3µs) and five microseconds (5µs).

[0216] 5. The switch-mode power converter according to embodiment 3, wherein when the drive conduction time is greater than the fixed conduction time, the oscillator conduction time is equivalent to the drive conduction time.

[0217] 6. The switch-mode power converter according to embodiment 1, wherein when the modulation width is less than the fixed disconnect time, the oscillator disconnect time is limited to the fixed disconnect time.

[0218] 7. The switch-mode power converter according to embodiment 6, wherein the fixed disconnection time is between one microsecond (1µs) and three microseconds (3µs).

[0219] 8. The switch-mode power converter according to embodiment 6, wherein when the modulation width is greater than the fixed off time, the oscillator off time is equivalent to the modulation width.

[0220] 9. The switch-mode power converter according to embodiment 1, wherein the oscillator is configured to generate a triangular wave having a rising segment and a falling segment.

[0221] 10. The switch-mode power converter according to embodiment 9, wherein the oscillator on-time is determined at least in part by the duration of the rising segment.

[0222] 11. The switch-mode power converter according to embodiment 10, wherein the duration of the rising phase is between three microseconds (3µs) and five microseconds (5µs).

[0223] 12. The switch-mode power converter according to embodiment 10, wherein when the drive on-time is greater than the duration of the rising segment, the transition time to the falling segment is delayed.

[0224] 13. The switch-mode power converter according to embodiment 12, wherein the oscillator on-time is determined by the duration of the rising segment and the duration of the transition time to the falling segment.

[0225] 14. The switch-mode power converter according to embodiment 9, wherein the oscillator off-time is determined at least in part by the duration of the falling segment.

[0226] 15. The switch-mode power converter according to embodiment 14, wherein the duration of the falling segment is between one microsecond (1µs) and three microseconds (3µs).

[0227] 16. The switch-mode power converter according to embodiment 14, wherein when the modulation width is greater than the duration of the falling segment, the transition to the subsequent cyclic rising segment is delayed.

[0228] 17. The switch-mode power converter according to embodiment 16, wherein the oscillator off-time is determined at least in part by the duration of the falling segment and the duration of the transition to the subsequent cyclic rising segment.

[0229] 18. The switch-mode power converter according to embodiment 17, wherein the disconnection time modulator is configured to generate a sawtooth wave during the falling segment.

[0230] 19. The switch-mode power converter according to embodiment 18, wherein the modulation width is determined by comparing the sawtooth wave with a modulation threshold.

[0231] 20. The switch-mode power converter according to embodiment 17, wherein the output power is based at least in part on the load current and wherein the input power is based at least in part on the input voltage.

[0232] 21. The switch-mode power converter according to embodiment 20, wherein the duration of the falling segment is increased in response to an increase in the input voltage.

[0233] 22. The switch-mode power converter according to embodiment 20, wherein the oscillator off-time is altered to reduce the variation of the drive signal switching cycle as a function of the load current.

[0234] 23. The switch-mode power converter according to embodiment 22, wherein the feedback signal is a control current, and wherein the oscillator off-time is altered to reduce the variation of the drive signal switching cycle as a function of the control current.

[0235] 24. The switch-mode power converter according to embodiment 23, wherein the duration of the falling segment is increased to reduce the variation in output power as a function of the input voltage.

[0236] 25. A switch-mode power converter configured to receive an input voltage and provide an output voltage to a load, the switch-mode power converter comprising:

[0237] A switch configured to provide switching current cyclically according to a drive signal including a drive on-time;

[0238] A current control loop configured to control the drive on-time in response to the switching current;

[0239] A voltage control loop configured to control a drive disconnect time in response to a feedback signal indicating the output voltage, and the voltage control loop includes:

[0240] Disconnect a time modulator, the time modulator being configured to generate a modulator signal having a modulation width at least partially based on the amplitude of the feedback signal; and

[0241] An oscillator configured to provide an oscillator signal according to an oscillator switching cycle, the oscillator switching cycle including an oscillator on-time greater than or equal to a fixed on-time and an oscillator off-time at least partially determined by the modulation width, wherein the drive signal switching cycle is determined by the oscillator switching cycle.

[0242] 26. The switch-mode power converter according to embodiment 25, wherein the switching current supplies energy to the energy transfer element such that the switching current increases during the drive-on time.

[0243] 27. The switch-mode power converter according to embodiment 26, wherein the current control loop is configured to control the drive turn-on time in response to the peak value of the switch current exceeding a threshold.

[0244] 28. The switch-mode power converter according to embodiment 27, wherein the current control loop includes a comparator configured to compare the switching current with the threshold.

[0245] 29. The switch-mode power converter according to embodiment 27, wherein the threshold is a constant.

[0246] 30. The switch-mode power converter according to embodiment 27, wherein the threshold varies as a function of time.

[0247] 31. The switch-mode power converter according to embodiment 27, wherein the threshold is based at least in part on the output load current.

[0248] 32. The switch-mode power converter according to embodiment 25 further includes a feedforward path configured to provide a feedforward signal to the oscillator, the feedforward signal indicating the input voltage.

[0249] 33. The switch-mode power converter according to embodiment 32, wherein the feedforward path is configured to provide a feedforward signal to the oscillator to reduce variations in the output load current.

[0250] 34. The switch-mode power converter according to embodiment 33, wherein the oscillator off-time increases as a function of the input voltage.

[0251] 35. The switch-mode power converter according to embodiment 34, wherein the oscillator is configured to increase the oscillator off-time to reduce the variation in output power to the load.

[0252] 36. A method for regulating an output voltage according to a variable pulse width modulation (PWM) switch cycle, the variable pulse width modulation (PWM) switch cycle having PWM on-time and PWM off-time, the method comprising:

[0253] Switching current is provided by turning on the switch at the beginning of the variable PWM switching cycle;

[0254] A switching current feedback signal indicating the switching current is provided during the drive conduction time;

[0255] In response to the switch current feedback signal reaching a threshold, the switch is turned off at the end of the drive conduction time;

[0256] The PWM on-time is determined by comparing the drive on-time with a fixed on-time.

[0257] Provide an output feedback signal indicating the output voltage;

[0258] Determine the modulation width associated with the output feedback signal; and

[0259] The PWM disconnect time is determined by comparing the modulation width with a fixed disconnect time.

[0260] 37. The method according to embodiment 36 further includes:

[0261] The variable PWM switching cycle is generated using a current-controlled triangular wave generator.

[0262] 38. The method according to embodiment 37, wherein generating the variable PWM switching cycle using the current-controlled triangular wave generator comprises:

[0263] The capacitor is charged using an electric current, which includes the difference between a fixed current and a current proportional to the output feedback signal.

[0264] 39. The method according to embodiment 36 further includes:

[0265] Provides a feedforward signal indicating the input supply voltage; and

[0266] Change the fixed disconnect time associated with the feedforward signal.

[0267] 40. The method according to embodiment 36, wherein the switching current feedback signal is a voltage.

[0268] 41. The method according to embodiment 36, wherein the threshold is constant.

[0269] 42. The method according to embodiment 36, wherein the threshold is variable.

[0270] 43. The method according to embodiment 42, wherein the threshold varies over time.

[0271] 44. The method according to embodiment 36, wherein turning off the switch at the end of the drive-on time in response to the switch current feedback signal reaching the threshold comprises:

[0272] Slope compensation is provided for the threshold.

[0273] 45. The method according to embodiment 36, wherein turning off the switch at the end of the drive-on time in response to the switch current feedback signal reaching the threshold comprises:

[0274] The threshold is changed to modulate the ramp time of the switching current.

[0275] 46. ​​The method according to embodiment 36, wherein determining the PWM on-time by comparing the drive on-time with the fixed on-time comprises:

[0276] When the fixed on-time is greater than the drive on-time, the PWM on-time is limited to the fixed on-time.

[0277] 47. The method according to embodiment 36, wherein determining the PWM on-time by comparing the drive on-time with the fixed on-time comprises:

[0278] When the fixed conduction time is less than the drive conduction time, the PWM conduction time is limited to the drive conduction time.

[0279] 48. The method according to embodiment 36, wherein providing the output feedback signal indicating the output voltage comprises:

[0280] Use an optocoupler to provide current to the photodiode.

[0281] 49. The method according to embodiment 36, wherein determining the PWM disconnect time by comparing the modulation width with the fixed disconnect time includes:

[0282] When the modulation width is greater than the fixed disconnect time, the PWM disconnect time is limited to the modulation width.

[0283] 50. The method according to embodiment 36, wherein determining the PWM disconnect time by comparing the modulation width with the fixed disconnect time includes:

[0284] When the modulation width is less than the fixed disconnect time, the PWM disconnect time is limited to the fixed disconnect time.

[0285] 51. A switch-mode power converter configured to convert input power into output power and regulate load current, the switch-mode power converter comprising:

[0286] A feedback circuit system configured to provide a feedback signal indicating the load current;

[0287] Disconnect the time modulator, which is configured to generate a modulator signal having a modulation width at least in part determined by the amplitude of the feedback signal;

[0288] An oscillator configured to provide an oscillator signal according to an oscillator switching cycle, the oscillator switching cycle including an oscillator on-time and an oscillator off-time, wherein the oscillator on-time is greater than or equal to a fixed on-time, and the oscillator off-time is determined at least in part by the modulation width; and

[0289] A switch configured to provide a switching current according to a drive signal switching cycle, wherein the switch conducts the switching current during a drive on-time, and wherein the drive signal switching cycle is determined by the oscillator switching cycle.

[0290] 52. The switch-mode power converter according to embodiment 51, wherein the switch-mode power converter is a flyback power converter.

[0291] 53. The switch-mode power converter according to embodiment 51, wherein when the drive on-time is less than the fixed on-time, the oscillator on-time is substantially equal to the fixed on-time.

[0292] 54. The switch-mode power converter according to embodiment 53, wherein the fixed on-time is between three microseconds (3µs) and five microseconds (5µs).

[0293] 55. The switch-mode power converter according to embodiment 53, wherein when the drive on-time is greater than the fixed on-time, the oscillator on-time is equivalent to the drive on-time.

[0294] 56. The switch-mode power converter according to embodiment 51, wherein when the modulation width is less than the fixed off time, the oscillator off time is limited to the fixed off time.

[0295] 57. The switch-mode power converter according to embodiment 56, wherein the fixed disconnection time is between one microsecond (1µs) and three microseconds (3µs).

[0296] 58. The switch-mode power converter according to embodiment 56, wherein when the modulation width is greater than the fixed off time, the oscillator off time is equivalent to the modulation width.

[0297] 59. The switch-mode power converter according to embodiment 51, wherein the oscillator is configured to generate a triangular wave having a rising segment and a falling segment.

[0298] 60. The switch-mode power converter according to embodiment 59, wherein the oscillator on-time is determined at least in part by the duration of the rising segment.

[0299] 61. The switch-mode power converter according to embodiment 60, wherein the duration of the rising segment is between three microseconds (3µs) and five microseconds (5µs).

[0300] 62. The switch-mode power converter according to embodiment 60, wherein when the drive-on time is greater than the duration of the rising segment, the transition time to the falling segment is delayed.

[0301] 63. The switch-mode power converter according to embodiment 62, wherein the oscillator on-time is determined by the duration of the rising segment and the duration of the transition time to the falling segment.

[0302] 64. The switch-mode power converter according to embodiment 59, wherein the oscillator off-time is determined at least in part by the duration of the falling segment.

[0303] 65. The switch-mode power converter according to embodiment 64, wherein the duration of the falling segment is between one microsecond (1µs) and three microseconds (3µs).

[0304] 66. The switch-mode power converter according to embodiment 64, wherein when the modulation width is greater than the duration of the falling segment, the transition to the subsequent cyclic rising segment is delayed.

[0305] 67. The switch-mode power converter according to embodiment 66, wherein the oscillator off-time is determined at least in part by the duration of the falling segment and the duration of the transition to the subsequent cyclic rising segment.

[0306] 68. The switch-mode power converter according to embodiment 67, wherein the disconnection time modulator is configured to generate a sawtooth wave during the falling segment.

[0307] 69. The switch-mode power converter according to embodiment 68, wherein the modulation width is determined by comparing the sawtooth wave with a modulation threshold.

[0308] 70. The switch-mode power converter according to embodiment 67, wherein the output power is based at least in part on the load current, and wherein the input power is based at least in part on the input voltage.

[0309] 71. The switch-mode power converter according to embodiment 70, wherein the duration of the falling segment is increased in response to an increase in the input voltage.

[0310] 72. The switch-mode power converter according to embodiment 70, wherein the oscillator off-time is altered to reduce the variation of the drive signal switching cycle.

[0311] 73. The switch-mode power converter according to embodiment 72, wherein the feedback signal is a control current, and wherein the oscillator off-time is changed as a function of the control current.

[0312] 74. The switch-mode power converter according to embodiment 73, wherein the duration of the falling segment is increased to reduce the variation in output power as a function of the input voltage.

[0313] 75. A method for regulating load current according to a variable pulse width modulation (PWM) switch cycle, the variable pulse width modulation (PWM) switch cycle having PWM on-time and PWM off-time, the method comprising:

[0314] Switching current is provided by turning on the switch at the beginning of the variable PWM switching cycle;

[0315] A switching current feedback signal indicating the switching current is provided during the drive conduction time;

[0316] In response to the switch current feedback signal reaching a threshold, the switch is turned off at the end of the drive conduction time;

[0317] The PWM on-time is determined by comparing the drive on-time with a fixed on-time.

[0318] Provide an output feedback signal indicating the load current;

[0319] Determine the modulation width associated with the output feedback signal; and

[0320] The PWM disconnect time is determined by comparing the modulation width with a fixed disconnect time.

[0321] 76. The method according to embodiment 75 further includes:

[0322] The variable PWM switching cycle is generated using a current-controlled triangular wave generator.

[0323] 77. The method according to embodiment 76, wherein generating the variable PWM switching cycle using the current-controlled triangular wave generator comprises:

[0324] The capacitor is charged using an electric current, which includes the difference between a fixed current and a current proportional to the output feedback signal.

[0325] 78. The method according to embodiment 75 further includes:

[0326] Provides a feedforward signal indicating the input supply voltage; and

[0327] Change the fixed disconnect time associated with the feedforward signal.

[0328] 79. The method according to embodiment 75, wherein the switching current feedback signal is a voltage.

[0329] 80. The method according to embodiment 75, wherein the threshold is constant.

[0330] 81. The method according to embodiment 75, wherein the threshold is variable.

[0331] 82. The method according to embodiment 75, wherein the threshold changes over time.

[0332] 83. The method according to embodiment 75, wherein turning off the switch at the end of the drive-on time in response to the switch current feedback signal reaching the threshold comprises:

[0333] Slope compensation is provided for the threshold.

[0334] 84. The method according to embodiment 75, wherein turning off the switch at the end of the drive-on time in response to the switch current feedback signal reaching the threshold comprises:

[0335] The threshold is changed to modulate the ramp time of the switching current.

[0336] 85. The method according to embodiment 75, wherein determining the PWM on-time by comparing the drive on-time with the fixed on-time comprises:

[0337] When the fixed conduction time is greater than the drive conduction time, the PWM conduction time is matched with the fixed conduction time.

[0338] 86. The method according to embodiment 75, wherein determining the PWM on-time by comparing the drive on-time with the fixed on-time comprises:

[0339] When the fixed conduction time is less than the drive conduction time, the PWM conduction time is matched with the drive conduction time.

[0340] 87. The method according to embodiment 75, wherein providing the output feedback signal indicating the load current comprises:

[0341] Use an optocoupler to provide current to the photodiode.

[0342] 88. The method according to embodiment 75, wherein determining the PWM disconnect time by comparing the modulation width with the fixed disconnect time includes:

[0343] When the modulation width is greater than the fixed disconnect time, the PWM disconnect time is matched with the modulation width.

[0344] 89. The method according to embodiment 75, wherein determining the PWM disconnect time by comparing the modulation width with the fixed disconnect time includes:

[0345] When the modulation width is less than the fixed disconnect time, the PWM disconnect time is matched with the fixed disconnect time.

Claims

1. A switch-mode power converter configured to convert input power into output power and regulate output voltage, the switch-mode power converter comprising: A feedback circuit system configured to provide a feedback signal indicating the output voltage; Disconnect the time modulator, which is configured to generate a modulator signal having a modulation width at least in part determined by the amplitude of the feedback signal; An oscillator configured to provide an oscillator signal according to an oscillator switching cycle, the oscillator switching cycle including an oscillator on-time and an oscillator off-time, wherein the oscillator on-time is greater than or equal to a fixed on-time, and the oscillator off-time is determined at least in part by the modulation width; as well as A switch configured to provide a switching current according to a drive signal switching cycle, wherein the switch conducts the switching current during a drive on-time, and wherein the drive signal switching cycle is determined by the oscillator switching cycle.

2. The switch-mode power converter according to claim 1, wherein the switch-mode power converter is a flyback power converter.

3. The switch-mode power converter according to claim 1, wherein when the drive conduction time is less than the fixed conduction time, the oscillator conduction time is limited to the fixed conduction time.

4. The switch-mode power converter according to claim 3, wherein the fixed on-time is between three microseconds (3µs) and five microseconds (5µs).

5. The switch-mode power converter according to claim 3, wherein when the drive conduction time is greater than the fixed conduction time, the oscillator conduction time is equivalent to the drive conduction time.

6. The switch-mode power converter of claim 1, wherein when the modulation width is less than the fixed disconnect time, the oscillator disconnect time is limited to the fixed disconnect time.

7. The switch-mode power converter according to claim 6, wherein the fixed disconnection time is between one microsecond (1µs) and three microseconds (3µs).

8. The switch-mode power converter of claim 6, wherein when the modulation width is greater than the fixed off time, the oscillator off time is equivalent to the modulation width.

9. The switch-mode power converter of claim 1, wherein the oscillator is configured to generate a triangular wave having a rising segment and a falling segment.

10. The switch-mode power converter of claim 9, wherein the oscillator on-time is determined at least in part by the duration of the rising segment.

11. The switch-mode power converter of claim 10, wherein the duration of the rising phase is between three microseconds (3µs) and five microseconds (5µs).

12. The switch-mode power converter of claim 10, wherein when the drive-on time is greater than the duration of the rising segment, the transition time to the falling segment is delayed.

13. The switch-mode power converter of claim 12, wherein the oscillator on-time is determined by the duration of the rising phase and the duration of the transition time to the falling phase.

14. The switch-mode power converter of claim 9, wherein the oscillator off-time is determined at least in part by the duration of the falling segment.

15. The switch-mode power converter of claim 14, wherein the duration of the falling segment is between one microsecond (1µs) and three microseconds (3µs).

16. The switch-mode power converter of claim 14, wherein when the modulation width is greater than the duration of the falling segment, the transition to the subsequent cyclic rising segment is delayed.

17. The switch-mode power converter of claim 16, wherein the oscillator off-time is determined at least in part by the duration of the falling segment and the duration of the transition to the subsequent cyclic rising segment.

18. The switch-mode power converter of claim 17, wherein the disconnection time modulator is configured to generate a sawtooth wave during the falling segment.

19. The switch-mode power converter of claim 18, wherein the modulation width is determined by comparing the sawtooth wave with a modulation reference.

20. The switch-mode power converter of claim 17, wherein the output power is based at least in part on the load current, and wherein the input power is based at least in part on the input voltage.

21. The switch-mode power converter of claim 20, wherein the duration of the falling segment is increased in response to an increase in the input voltage.

22. The switch-mode power converter of claim 20, wherein the oscillator off-time is altered to reduce the variation of the drive signal switching cycle as a function of the load current.

23. The switch-mode power converter of claim 22, wherein the feedback signal is a control current, and wherein the oscillator off-time is altered to reduce the variation of the drive signal switching cycle as a function of the control current.

24. The switch-mode power converter of claim 23, wherein the duration of the falling segment is increased to reduce the variation in output power as a function of the input voltage.

25. A method for regulating an output voltage according to a variable switch cycle, the variable switch cycle having controlled on-time and controlled off-time, the method comprising: Switching current is provided by turning on the switch at the beginning of the variable switching cycle; A switching current feedback signal indicating the switching current is provided during the drive conduction time; In response to the switch current feedback signal reaching a threshold, the switch is turned off at the end of the drive conduction time; The control on-time is determined by comparing the drive on-time with a fixed on-time. Provide an output feedback signal indicating the output voltage; Determine the modulation width associated with the output feedback signal; as well as The control disconnect time is determined by comparing the modulation width with a fixed disconnect time.

26. The method of claim 25, further comprising: The variable switching cycle is generated using a current-controlled triangular wave generator.

27. The method of claim 26, wherein generating the variable switching cycle using the current-controlled triangular wave generator comprises: The capacitor is charged using an electric current, which includes the difference between a fixed current and a current proportional to the output feedback signal.

28. The method of claim 25, further comprising: Provides a feedforward signal indicating the input supply voltage; as well as Change the fixed disconnect time associated with the feedforward signal.

29. The method of claim 25, wherein the switching current feedback signal is a voltage.

30. The method of claim 25, wherein the threshold is constant.

31. The method of claim 25, wherein turning off the switch at the end of the drive-on time in response to the switch current feedback signal reaching the threshold comprises: Slope compensation is provided for the threshold.

32. The method of claim 25, wherein turning off the switch at the end of the drive-on time in response to the switch current feedback signal reaching the threshold comprises: The threshold is changed to modulate the ramp time of the switching current.

33. The method of claim 25, wherein determining the control on-time by comparing the drive on-time with the fixed on-time comprises: When the fixed conduction time is greater than the drive conduction time, the control conduction time is limited to the fixed conduction time.

34. The method of claim 25, wherein determining the control on-time by comparing the drive on-time with the fixed on-time comprises: When the fixed conduction time is less than the drive conduction time, the control conduction time is limited to the drive conduction time.

35. The method of claim 25, wherein providing the output feedback signal indicating the output voltage comprises: Use an optocoupler to provide current to the photodiode.

36. The method of claim 25, wherein determining the control disconnect time by comparing the modulation width with the fixed disconnect time comprises: When the modulation width is greater than the fixed disconnect time, the control disconnect time is limited to the modulation width.

37. The method of claim 25, wherein determining the control disconnect time by comparing the modulation width with the fixed disconnect time comprises: When the modulation width is less than the fixed disconnect time, the control disconnect time is limited to the fixed disconnect time.

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