Communication conflict detection control method and device, equipment and storage medium

Abstract

The invention discloses a communication conflict detection control method and device, equipment and a storage medium. The method comprises the following steps: controlling a bus slave station module to send a request signal containing a unique feature identifier to a bus; the control bus master station module monitors the bus in real time; controlling the bus master station module to identify the bus slave station modules participating in the conflict; controlling the bus master station module to distribute different sending time slots for the identified conflicting bus slave station modules; the control bus master station module broadcasts a control frame comprising a conflict slave station module list and a corresponding sending time slot; controlling each conflict slave station module to perform local clock synchronization according to the distributed sending time slot after receiving the control frame; controlling each conflict slave station module to send data to the bus in the synchronized sending time slot; and the control bus master station module enters the next round of monitoring period after each conflict slave station module completes data transmission. According to the invention, accurate positioning and identification of bus communication conflicts can be realized, communication resource allocation is optimized, and communication efficiency is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of bus module, and particularly relates to a communication conflict detection control method, device, equipment and storage medium. BACKGROUND

[0002] In modern communication systems, especially in industrial control, intelligent transportation, Internet of Things devices and other application scenarios, bus communication technology is widely used due to its simple structure, low cost, easy expansion and other advantages. In a typical bus communication architecture, multiple slave modules communicate with a master module through a shared physical bus. Since the bus is a shared medium, when multiple slave modules simultaneously attempt to send data, data collision, i.e., bus conflict, is likely to occur, resulting in data transmission failure, communication efficiency decline, and even system malfunction.

[0003] To solve the above problems, carrier sense multiple access / collision detection or its variants are commonly used in the prior art. The basic principle of this method is that a node listens to the bus before sending to determine whether the bus is idle. If it is idle, it sends; if it is busy, it waits for a random time and retries. Although this method performs well under light load, in scenarios with increasing number of nodes and increasing communication load, the conflict probability increases dramatically, resulting in increased number of retries and significant decrease in network throughput.

[0004] In addition, the existing conflict resolution mechanism has limited ability to identify conflict sources. Most solutions can only detect the occurrence of conflicts, but cannot accurately identify which nodes have caused the conflicts. This causes the master station to only broadcast instructions to all nodes that may have participated in the conflict to back off and retry, which not only increases unnecessary communication delay, but also wastes bandwidth resources. Therefore, how to reliably and efficiently solve the problem of bus communication conflict detection has become a problem that needs to be solved by technical personnel in the field. SUMMARY

[0005] Embodiments of the present application provide a communication conflict detection control method, device, equipment and storage medium to solve the problems in the prior art.

[0006] To solve the above technical problems, the present application provides a communication conflict detection control method, which comprises: controlling a bus slave module to send a request signal containing a unique feature identifier to the bus; wherein the unique feature identifier is a combination of the physical address of the bus slave module and an adaptively generated pseudo-random code; controlling the bus master module to listen to the bus in real time, and if a composite signal with multiple feature identifiers superimposed is detected within a preset detection window, determining that there is a bus conflict; controlling the bus master module to identify the bus slave modules involved in the conflict by analyzing the multiple feature identifiers in the composite signal; controlling the bus master module to assign different transmission time slots to the identified bus slave modules involved in the conflict, the transmission time slots being determined according to the request sequence of each bus slave module involved in the conflict and the current load state of the bus; controlling the bus master module to broadcast a control frame containing a list of the bus slave modules involved in the conflict and corresponding transmission time slots; controlling each bus slave module involved in the conflict to perform local clock synchronization according to the assigned transmission time slot after receiving the control frame; controlling each bus slave module involved in the conflict to transmit data to the bus in the synchronized transmission time slot; controlling the bus master module to reset the bus listening state and enter the next listening cycle after each bus slave module involved in the conflict completes data transmission.

[0007] Preferably, the controlling the bus master module to assign different transmission time slots to the identified bus slave modules involved in the conflict, the transmission time slots being determined according to the request sequence of each bus slave module involved in the conflict and the current load state of the bus includes: generating a preliminary time slot allocation sequence according to the request sequence of each bus slave module involved in the conflict; obtaining the current load state of the bus, the current load state including the currently active bus slave modules and corresponding data transmission amounts; adaptively adjusting the time slot allocation sequence according to the current load state; determining the final transmission time slots of each bus slave module involved in the conflict according to the adjustment result, and generating a time slot allocation table.

[0008] Preferably, the controlling the bus slave module to transmit a request signal containing a unique feature identifier to the bus includes: detecting whether the bus is in an idle state before the bus slave module transmits the request signal; generating the unique feature identifier if the bus is idle; encapsulating the unique feature identifier as the request signal and transmitting it through the bus; if the bus is busy, performing a random backoff algorithm, delaying for a preset period of time, and then reattempting transmission.

[0009] Preferably, the controlling the bus master module to listen to the bus in real time and determining that the bus is in conflict if a composite signal with multiple feature identifiers superimposed is detected within a preset detection window includes: controlling the bus master module to continuously listen to the bus signal and collect signal waveforms in real time within the preset detection window; performing spectrum analysis on the received signal waveform; if the spectrum analysis result shows that there are multiple superimposed characteristic marks, it is determined that there is a bus conflict; record the timestamp and composite signal data of the conflict for subsequent analysis.

[0010] Preferably, the control of the bus master module identifies the bus slave modules participating in the conflict by analyzing multiple characteristic marks in the composite signal, including: performing digital filtering processing on the composite signal to extract the spectrum components of multiple characteristic marks; restoring the original data of multiple characteristic marks through signal demodulation algorithm; comparing the restored multiple characteristic marks with the preset mark library to identify the bus slave modules participating in the conflict; generating the list of conflict slave modules and recording the conflict time information of each bus slave module in conflict.

[0011] Preferably, the control of each conflict slave module to perform local clock synchronization according to the allocated transmission time slot after receiving the control frame includes: controlling each conflict slave module to analyze the control frame and extract the time reference information of the transmission time slot; comparing the local clock with the time reference information in the control frame to calculate the clock deviation; adjusting the local clock according to the clock deviation to achieve clock synchronization with the bus master module; after synchronization, sending a synchronization confirmation signal to the bus master module.

[0012] Preferably, after the control of each conflict slave module to send data to the bus in the transmission time slot after synchronization, it further includes: controlling the bus master module to receive the data sent by each conflict slave module and verifying the data integrity.

[0013] To solve the above technical problems, the embodiment of the present application provides a communication conflict detection control, which comprises: a request sending module for controlling a bus slave module to send a request signal containing a unique characteristic mark to a bus; wherein the unique characteristic mark is a combination of the physical address of the bus slave module and a pseudo-random code generated adaptively; a listening module for controlling a bus master module to listen to the bus in real time, and if a composite signal with multiple superimposed characteristic marks is detected within a preset detection window, it is determined that there is a bus conflict. The analysis identification module is used for controlling the bus master module to identify the bus slave modules participating in the conflict by analyzing the multiple characteristic marks in the composite signal. The distribution module is used for controlling the bus master module to distribute different sending time slots to the identified conflict bus slave modules, and the sending time slots are determined according to the request sequence of each conflict bus slave module and the current load state of the bus. The broadcast module is used for controlling the bus master module to broadcast a control frame containing a conflict slave module list and corresponding sending time slots. The synchronization control module is used for controlling each conflict slave module to perform local clock synchronization according to the distributed sending time slot after receiving the control frame. The synchronized sending module is used for controlling each conflict slave module to send data to the bus in the sending time slot after synchronization. The reset module is used for controlling the bus master module to reset the bus listening state and enter the next round of listening period after each conflict slave module completes data sending.

[0014] To solve the above technical problems, the embodiment of the present application provides a spliced screen automatic splicing control device, which comprises at least one processor, at least one memory and computer program instructions stored in the memory, and when the computer program instructions are executed by the processor, the method of the first aspect in the above embodiment is realized.

[0015] To solve the above technical problems, the embodiment of the present application provides a storage medium, which stores computer program instructions, and when the computer program instructions are executed by the processor, the method of the first aspect in the above embodiment is realized.

[0016] To sum up, the embodiment of the application provides a communication conflict detection control method, device, equipment and storage medium. The application controls a bus slave module to send a request signal containing a unique feature identifier to the bus; wherein the unique feature identifier is a combination of a physical address of the bus slave module and an adaptively generated pseudo-random code. In the present application, the physical address is inherent to hardware, ensuring the uniqueness of each slave station at the system level, and the pseudo-random code is adaptively generated, which can prevent malicious attacks and enhance system security; the bus master module controls the bus to be monitored in real time, and if a composite signal with multiple feature identifiers superimposed is detected within a preset detection window, it is determined that there is a bus conflict, so that the present application avoids misjudging normal signals as conflicts through real-time monitoring and judgment based on signal features, and improves the real-time performance of conflict detection; the bus master module controls the bus to analyze the multiple feature identifiers in the composite signal, and identifies the bus slave modules participating in the conflict, so that the present application can accurately identify the bus slave modules in conflict, and improve the efficiency and pertinence of conflict resolution; the bus master module controls the bus to allocate different transmission time slots to the identified conflict bus slave modules, and the transmission time slots are determined according to the request order of each conflict bus slave module and the current load state of the bus, so that the conflict nodes are ensured to have no collision in subsequent communication through time slot allocation. At the same time, the transmission time slot algorithm combining the request order and the load state makes the allocation of bus bandwidth no longer random, improving the communication efficiency; the bus master module controls the bus to broadcast a control frame containing a list of conflict slave stations and corresponding transmission time slots, so that the conflict resolution instructions are conveyed to the relevant parties at one time, avoiding the delay of point-to-point communication; the bus master module controls each conflict slave station to perform local clock synchronization according to the allocated transmission time slot after receiving the control frame, avoiding clock drift; the bus master module controls each conflict slave station to send data to the bus in the transmission time slot after synchronization, improving the synchronization and accuracy of data transmission; and the bus master module controls the bus to reset the listening state after each conflict slave station completes data transmission, and enters the next listening period. Therefore, the application can accurately locate and identify the bus communication conflict, optimize the allocation of communication resources, and improve the communication efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the application, the following will briefly introduce the drawings needed to be used in the embodiments of the application. For those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.

[0018] Figure 1 is a flow chart of a communication conflict detection control method according to an embodiment of the application.

[0019] Figure 2is a flowchart of a process in which a bus master module of an embodiment of the present application allocates different transmission time slots to the identified conflict bus slave modules, the transmission time slots being determined according to the request order of each conflict bus slave module and the current load state of the bus.

[0020] Figure 3 is a flowchart of a process in which a bus slave module of an embodiment of the present application sends a request signal containing a unique feature identifier to the bus.

[0021] Figure 4 is a flowchart of a process in which a bus master module of an embodiment of the present application listens to the bus in real time, and if a composite signal in which multiple feature identifiers are superimposed is detected within a preset detection window, determines that there is a bus conflict.

[0022] Figure 5 is a flowchart of a process in which a bus master module of an embodiment of the present application identifies the bus slave modules participating in the conflict by analyzing the multiple feature identifiers in the composite signal.

[0023] Figure 6 is a flowchart of a process in which each conflict bus slave module of an embodiment of the present application synchronizes the local clock according to the allocated transmission time slot after receiving the control frame.

[0024] Figure 7 is a structural diagram of a communication conflict detection control device of an embodiment of the present application.

[0025] Figure 8 is a structural diagram of a communication conflict detection control device of an embodiment of the present application. DETAILED DESCRIPTION

[0026] The features and exemplary embodiments of the various aspects of the present application will be described in detail below, in order to make the purposes, technical solutions, and advantages of the present application clearer, the present application will be further described in detail below in combination with the drawings and embodiments. It should be understood that the specific embodiments described herein are configured only to explain the present application, and are not configured to limit the present application. The present application can be implemented without some of these specific details by those skilled in the art. The following description of the embodiments is merely to provide a better understanding of the present application by showing examples of the present application.

[0027] It is to be noted that, in the present document, relational terms such as first and second and the like can be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises", "comprising", or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises... a" does not, without more constraints, exclude the presence of additional identical elements in the process, method, article, or apparatus that comprises the element.

[0028] Referring to Figure 1 , Figure 1 A communication conflict detection control method is provided in the present application, and the method comprises the following steps: S1, a bus slave module sends a request signal containing a unique feature identifier to the bus; wherein the unique feature identifier is a combination of the physical address of the bus slave module and a pseudo-random code generated adaptively; Specifically, in the present embodiment, the bus module comprises a bus master module and a plurality of bus slave modules. The bus master module acts as the control center in the network, responsible for managing network communication and operation, and exchanges data with each bus slave module. The bus slave module acts as an execution unit, responding to the instructions of the bus master module and completing the specified tasks. The bus master module and the bus slave modules form a one-to-many control relationship.

[0029] Specifically, in the present embodiment, the bus master module, each bus slave module and the host computer terminal communicate with each other through CAN protocol, Modbus protocol, CANopen protocol, Profinet protocol, EtherCAT protocol and other communication technologies. The communication mode between the bus master module, each bus slave module and the host computer terminal is not specifically limited herein.

[0030] Specifically, in the present embodiment, the physical address of the bus slave module is a MAC address, which is fixed in the non-volatile memory of the bus slave module. At the same time, in order to avoid the deadlock caused by the use of the same identifier by multiple bus slave modules in multiple conflicts, each bus slave module generates a pseudo-random code according to the internal state before sending the request each time.

[0031] Specifically, in the embodiment, the bus slave module encapsulates a unique feature identifier composed of a MAC address and a pseudo-random code into a request frame, and sends the request frame to the shared bus through the bus transceiver. For example, the physical address 0x01 and the pseudo-random code 0xA5 are combined into the unique feature identifier 0x01A5, which is not specifically limited here.

[0032] S2, control the bus master module to listen to the bus in real time, and if a composite signal in which multiple feature identifiers are superimposed is detected in a preset detection window, it is determined that there is a bus conflict; Specifically, in the embodiment, the bus interface unit of the bus master module always maintains a receiving state and samples the level signal on the bus in real time. The bus master module decodes the received analog signal into a digital signal stream and buffers it in a first-in-first-out circular buffer. The bus master module defines a detection window inside, and the length of the detection window is greater than the transmission time of a standard request signal. When the bus master module detects a signal that does not conform to the expected model of a single signal and can distinguish multiple feature identifiers from it, it is determined that there is a bus conflict.

[0033] S3, control the bus master module to identify the bus slave modules participating in the conflict by analyzing the multiple feature identifiers in the composite signal; Specifically, in the embodiment, since each feature identifier is in a known format, the bus master module matches the components in the composite signal by known patterns to analyze the bus slave modules participating in the conflict.

[0034] Specifically, for example, the bus master module analyzes the received composite signal and successfully separates and identifies three feature identifiers: 0x013C, 0x028D, and 0x03E7. Thus, the bus master module confirms that bus slave module 01, bus slave module 02, and bus slave module 03 have collided.

[0035] S4, control the bus master module to assign different transmission time slots to the identified conflicting bus slave modules, and the transmission time slots are determined according to the request order of each conflicting bus slave module and the current load state of the bus; Specifically, in the embodiment, the bus master module obtains the load state of the current bus from the bus load monitoring module, which includes the occupancy rate of the currently allocated time slots, data traffic, etc., which are not specifically limited here.

[0036] Specifically, in the embodiment, the bus master module assigns time slots according to a preset scheduling strategy, and calculates time slot parameters including time slot offset and time slot duration for each bus slave module in the conflict list. The bus master module associates the physical address of each conflicting slave with the corresponding time slot parameters to form a time slot allocation table.

[0037] In the present application, once the conflict bus slave module receives the time slot allocation, it can accurately know when the slave data will be sent, effectively improving the real-time performance of data transmission.

[0038] Therefore, the present application solves the conflict problem by allocating transmission for each conflict party, ensuring the success rate of data transmission. In addition, the bus master module can intelligently schedule according to the global load situation to avoid time slot waste, making full use of the bus bandwidth, and the overall communication efficiency is higher than that of the random competition mechanism.

[0039] S5, control the bus master module to broadcast a control frame containing a list of conflict slave modules and corresponding transmission time slots; Specifically, in the present embodiment, the bus master module encapsulates the generated time slot allocation table as a payload into a control frame, and sets a specific identifier in the frame type field of the control frame to distinguish it from ordinary data frames. The bus master module broadcasts the control frame to the entire bus by listening to the bus to confirm a time when the bus is idle. It can be understood that the payload refers to the payload, that is, in the data frame of the communication data, the core data part that is really transmitted and has meaning to the upper layer application.

[0040] S6, control each conflict slave module to perform local clock synchronization according to the allocated transmission time slot after receiving the control frame; Specifically, in the present embodiment, each bus slave module is listening to the bus. After each bus slave module receives the broadcasted control frame, it checks the frame type of the control frame. If it is a scheduling control frame, each bus slave module performs CRC check.

[0041] Specifically, after the check is successful, the bus slave module parses the conflict slave list and the time slot allocation table in the frame, and compares its own physical address with the addresses in the conflict slave list one by one. If the bus slave module finds that its own physical address is in the conflict slave list, it performs local clock synchronization. If it is not in the list, the bus slave module ignores the control frame and continues to work normally.

[0042] Specifically, the bus slave module scheduled needs to perform clock synchronization to ensure alignment in time with the bus master module and other bus slave modules.

[0043] S7, control each conflict slave module to send data to the bus in the transmission time slot after synchronization; Specifically, in the embodiment, the bus slave module enters a waiting state after completing clock synchronization and setting an internal timer. When the internal timer reaches a preset sending time, an internal timer interrupt is triggered, an interrupt service program is called, the bus slave module immediately stops listening, switches to a sending mode, and starts sending the data frame to be sent to the bus with the highest priority.

[0044] S8, the control bus master module resets the bus listening state after each conflicting slave module completes data sending, and enters the next listening period.

[0045] Specifically, in the embodiment, the bus slave module must complete data frame sending within the time slot duration allocated to itself. After data sending is completed, the bus slave module immediately releases the bus control right, switches back to the listening mode, and waits for the next communication opportunity. Therefore, the data sending process of the application is driven by an internal timer interrupt, ensuring the timeliness and accuracy of the sending action and effectively avoiding bus conflicts.

[0046] In summary, the application provides a communication conflict detection control method. In the scheme, a bus slave module sends a request signal containing a unique feature identifier to the bus through a control bus. The unique feature identifier is a combination of the physical address of the bus slave module and an adaptively generated pseudo-random code. In the application, the physical address is inherent to the hardware, ensuring the uniqueness of each slave station at the system level. The pseudo-random code is adaptively generated, which can prevent malicious attacks and enhance system security. The control bus master module monitors the bus in real time. If a composite signal with multiple feature identifiers is detected within a preset detection window, it is determined that there is a bus conflict. Therefore, by real-time monitoring and signal feature-based judgment, the application avoids misjudging normal signals as conflicts and improves the real-time performance of conflict detection. The control bus master module identifies the bus slave modules involved in the conflict by analyzing the multiple feature identifiers in the composite signal. Therefore, the application can accurately identify the conflicting bus slave modules, improving the efficiency and relevance of conflict resolution. The control bus master module allocates different transmission time slots to the identified conflict bus slave modules. The transmission time slots are determined based on the request order of each conflict bus slave module and the current load state of the bus. Through time slot allocation, it ensures that the conflict nodes do not collide in subsequent communication. At the same time, the transmission time slot algorithm combined with the request order and the load state makes the allocation of bus bandwidth no longer random, improving communication efficiency. The control bus master module broadcasts a control frame containing the conflict slave module list and the corresponding transmission time slots, thereby conveying the conflict resolution instructions to the relevant parties at once, avoiding the delay of point-to-point communication. The control bus master module controls each conflict slave module to synchronize the local clock according to the allocated transmission time slot after receiving the control frame, avoiding clock drift. The control bus master module controls each conflict slave module to send data to the bus within the synchronized transmission time slot, improving the synchronization and accuracy of data transmission. The control bus master module resets the bus monitoring state after each conflict slave module completes data transmission and enters the next monitoring cycle. Therefore, the application can accurately locate and identify bus communication conflicts, optimize communication resource allocation, and improve communication efficiency.

[0047] On the basis of the above embodiments: Please refer to Figure 2 , Figure 2 The control bus master module allocates different transmission time slots to the identified conflict bus slave modules, and the transmission time slots are determined based on the request order of each conflict bus slave module and the current load state of the bus.

[0048] As a preferred embodiment, the control bus master module allocates different transmission time slots to the identified conflict bus slave modules, and the transmission time slots are determined based on the request order of each conflict bus slave module and the current load state of the bus. S41, generating a preliminary time slot allocation sequence according to the request order of each conflict bus slave module; Specifically, in the embodiment, when the conflict is detected and the composite signal is resolved, the bus master module timestamps each conflict bus slave module, and the timestamp represents the precise time when the bus master module detects the conflict event.

[0049] Specifically, in the embodiment, there is a slight difference in the time when the start edges of different bus slave module signals arrive at the bus master module receiver, usually on the order of nanoseconds or microseconds. The bus master module captures these differences through a high-precision timer, sorts the identified bus slave modules in the order of arrival, for example, the order of the conflict bus slave modules is: slave 02 -> slave 01 -> slave 03, which is not specifically limited here.

[0050] Specifically, in the embodiment, the bus master module continuously allocates time slots to each conflict bus slave module in the sorted order to form an ordered list, which is the preliminary time slot allocation sequence.

[0051] S42, obtaining the current load state of the bus, the current load state including the current active slave and the corresponding data transmission amount; Specifically, in the embodiment, the bus master module dynamically maintains a network state table inside. The network state table is used to record the state information of all known bus slave modules on the bus. The bus master module records the frequency, packet size, and timestamp of each bus slave module successfully sending data in the past several communication periods.

[0052] Specifically, in the embodiment, the bus master module periodically sends a state query frame to all bus slave modules, including the length of the data queue to be sent and other information. The network interface chip of the bus master module counts the total traffic on the bus and the traffic classified by source address.

[0053] Specifically, in the embodiment, the bus master module calculates key load indicators according to the collected information. The key load indicators include the current active slave list, the data transmission amount of each slave, the bus utilization rate, the congestion area identification, and the like, which are not specifically limited here.

[0054] S43, adaptively adjusting the time slot allocation sequence according to the current load state; Specifically, in the embodiment, the bus master module adjusts the time slot allocation sequence according to a preset optimization target. The preset optimization target is to achieve load balancing, i.e., to evenly distribute communication tasks on the entire time axis to avoid the phenomenon of busy congestion and idle.

[0055] In particular, the bus master module takes the preliminary time slot allocation sequence and the current bus load status as inputs, and runs an adjustment algorithm. In the adjustment algorithm, the bus master module looks at the consecutive time slots of the preliminary time slot allocation sequence. If a time slot falls right in the peak period of the current bus, the bus master module tries to find a consecutive, long enough time slot block in the idle period, and shifts the whole conflict sequence. If it cannot be shifted as a whole, it tries to "insert" some of the nodes into the idle time slot gaps. After the adjustment algorithm, the preliminary time slot allocation sequence is modified to form an adjusted time slot allocation sequence.

[0056] S44, determining the final transmission time slot of each conflict bus slave module according to the adjustment result, and generating a time slot allocation table.

[0057] In particular, in the embodiment, the bus master module accurately calculates the time slot parameters of each bus slave module of the adjusted time slot allocation sequence. The bus master module creates a structured data table, i.e. a time slot allocation table, which lists the physical address of each conflict bus slave module and the corresponding time slot offset and duration.

[0058] Please refer to Figure 3 , Figure 3 A flowchart for controlling the bus slave module to send a request signal containing a unique feature identifier to the bus is provided for the application.

[0059] As a preferred embodiment, controlling the bus slave module to send a request signal containing a unique feature identifier to the bus comprises: S11, detecting whether the bus is in an idle state before the bus slave module sends the request signal; In particular, in the embodiment, before the bus slave module sends the request signal, the microcontroller of the bus slave module instructs the transceiver to enter a high-impedance listening mode. In order to avoid misjudging the short interval between two frames as completely idle, the bus slave module continues to listen for a minimum time unit, such as a few bits of time. Only when the bus remains idle for this length of time is the bus determined to be in a bus idle state.

[0060] S12, generating a unique feature identifier if the bus is idle; In particular, in the embodiment, if the bus is idle, the bus slave module reads the fixed MAC address of the device from the non-volatile memory, and calls the internal pseudo-random number generator to generate a pseudo-random code for this communication.

[0061] S13, encapsulating the unique feature identifier into a request signal and sending it through the bus; Specifically, in the embodiment, the system combines the physical address and the newly generated pseudo-random code into a unique feature identifier, and encapsulates the unique feature identifier into a request frame. The controller drives the bit stream of the request frame onto the bus bit by bit, completing data transmission.

[0062] S14, if the bus is busy, a random backoff algorithm is executed, and the sending is reattempted after a preset period of time.

[0063] Specifically, in the embodiment, if the bus is busy, the controller of the bus slave module calls an internal random backoff algorithm, starts an internal timer, and enters a low-power mode or processes other tasks. When the internal timer expires, the bus slave module backoff counter, and the process of listening and judging is restarted.

[0064] Specifically, the random backoff algorithm of the present application is set to a binary exponential backoff algorithm, which is not specifically limited here.

[0065] Please refer to Figure 4 , Figure 4 A process flow diagram for providing a bus master module to monitor the bus in real time, and if a plurality of feature identifiers are superimposed in a composite signal within a preset detection window, it is determined that there is a bus conflict.

[0066] As a preferred embodiment, the bus master module monitors the bus in real time, and if a plurality of feature identifiers are superimposed in a composite signal within a preset detection window, it is determined that there is a bus conflict, which includes: S21, the bus master module continuously monitors the bus signal, and acquires the signal waveform in real time within a preset detection window; Specifically, in the embodiment, the physical layer interface of the bus master module continuously samples the analog signal on the bus at a sampling rate higher than the baud rate of the bus signal, and the sampled data is stored in a circular buffer.

[0067] S22, the received signal waveform is subjected to spectral analysis; Specifically, in the embodiment, in order to reduce the spectral leakage effect caused by signal truncation during spectral analysis and make the analysis result more accurate, the system applies a window function to the extracted data block before performing spectral analysis. Further, the bus master module performs fast Fourier transform on the signal data block collected and windowed to perform spectral analysis.

[0068] S23, if the spectral analysis result shows that there are a plurality of feature identifiers superimposed, it is determined that there is a bus conflict; Specifically, in the embodiment, the bus master module analyzes the power spectrum density diagram of the current window, extracts key features, and compares the extracted key features with a pre-stored reference spectrum template. If the main lobe width of the current spectrum is significantly larger than the main lobe width of the reference template, it indicates that multiple center frequency offset signals are superimposed, or if a new and obvious spectrum peak appears at the position where there is no spectrum peak in the reference template, or a satellite peak appears beside the original spectrum peak, it is determined that there is a bus conflict.

[0069] S24, record the timestamp of the conflict occurrence and the composite signal data for subsequent analysis.

[0070] Specifically, in the embodiment, if it is determined that there is a bus conflict, the bus master module immediately reads the current time from the high-precision clock, generates a conflict timestamp accurate to microseconds, and saves the original data in the detection window that triggered the conflict determination, including the original waveform sampling points and / or the spectrum analysis results, in association with the conflict timestamp, to form a complete conflict event log.

[0071] Please refer to Figure 5 , Figure 5 A flowchart of a process for controlling the bus master module to identify the bus slave modules participating in the conflict by analyzing the multiple feature identifiers in the composite signal is provided for the application.

[0072] As a preferred embodiment, the process for controlling the bus master module to identify the bus slave modules participating in the conflict by analyzing the multiple feature identifiers in the composite signal includes: S31, perform digital filtering processing on the composite signal to extract the spectrum components of the multiple feature identifiers; Specifically, in the embodiment, the bus master module obtains the saved original sampling data of the composite signal from the recorded conflict event. The bus master module pre-designs a digital filter according to the modulation mode of the unique feature identifier and the bus protocol. The bus master module inputs the digital sampling data stream of the composite signal into the digital filter, so that the target spectrum component, i.e., the part carrying the feature identifier information, is retained and enhanced. The digital filter can be one of a band-pass filter or a matched filter, which is not specifically limited here.

[0073] S32, restore the original data of the multiple feature identifiers by a signal demodulation algorithm; Specifically, in the embodiment, the bus master module selects a corresponding demodulation algorithm according to the modulation mode used by the bus to perform demodulation on the filtered signal. The output of the demodulation algorithm is one or more candidate digital bit streams, which are the original data containing the multiple feature identifiers restored.

[0074] S33, compare the reduced plurality of feature identifiers with a preset identifier library, and identify the bus slave modules participating in the conflict; Specifically, in the embodiment, the preset identifier library contains physical addresses of all legal bus slave modules in the network, and algorithm rules for generating pseudo-random codes. The bus master module parses each bit stream that is restored, and extracts the physical address and the pseudo-random code from the bit stream bit by bit or byte by byte, and takes the extracted "physical address" part as a key to query in the preset identifier library.

[0075] Specifically, in the embodiment, if the query is successful, that is, a matching physical address is found in the preset identifier library, the bus master module successfully identifies a slave module participating in the conflict.

[0076] S34, generate a conflict slave module list, and record conflict time information of each bus slave module in conflict.

[0077] Specifically, the bus master module creates a data structure for storing detailed information of the current conflict event. For each identified conflict slave, the bus master module creates an entry in the list. When all the identified slave information is filled into the list, the conflict slave module list is completed. The bus master module delivers the conflict slave module list as an input of time slot allocation to the scheduling module. In the embodiment, the data structure can be set as an array or a linked list, which is not specifically limited here.

[0078] Please refer to Figure 6 , Figure 6 A flowchart for controlling each conflict slave module to perform local clock synchronization according to the allocated transmission time slot after receiving the control frame is provided for the application.

[0079] As a preferred embodiment, controlling each conflict slave module to perform local clock synchronization according to the allocated transmission time slot after receiving the control frame comprises: S61, control each conflict slave module to parse the control frame and extract time reference information of the transmission time slot; Specifically, in the embodiment, after the bus slave module receives the control frame broadcast by the bus master module, it performs CRC check to ensure that the data is correct. The bus slave module extracts the time reference information for synchronization from the payload of the control frame according to the pre-defined protocol format, and records the local receiving timestamp.

[0080] S62, compare the local clock with the time reference information in the control frame, and calculate the clock deviation; Specifically, in the embodiment, the bus slave module estimates the one-way propagation delay of the signal from the bus master module to itself. According to the time stamp of the bus master module and the estimated delay, the bus slave module calculates the theoretical receiving time stamp of the control frame if the local clock is completely synchronized with the bus master module. The bus slave module compares the theoretical receiving time stamp with the local receiving time stamp to obtain the clock deviation.

[0081] S63, adjusting the local clock according to the clock deviation to realize the clock synchronization with the bus master module; Specifically, in the embodiment, the bus slave module adjusts the local clock according to the calculated clock deviation value. After the synchronization adjustment, the bus slave module re-calculates the absolute time at which it should send data, and combines the time slot offset specified in the control frame with the local time reference after the synchronization to obtain an accurate future sending time point.

[0082] S64, after the synchronization is completed, sending a synchronization confirmation signal to the bus master module.

[0083] Specifically, in the embodiment, after the clock adjustment is completed, the bus slave module generates a synchronization confirmation frame and sends the synchronization confirmation frame to the bus master module. The bus master module listens to and receives the confirmation signals sent back by all the conflict slave modules.

[0084] As a preferred embodiment, after controlling the conflict slave modules to send data to the bus in the sending time slot after the synchronization, the method further comprises: controlling the bus master module to receive the data sent by the conflict slave modules and verifying the data integrity.

[0085] Please refer to Figure 7 The embodiment of the application provides a communication conflict detection control device, which comprises: a request sending module 1 configured to control the bus slave module to send a request signal containing a unique feature identifier to the bus; wherein the unique feature identifier is a combination of the physical address of the bus slave module and a pseudo-random code generated adaptively; a listening module 2 configured to control the bus master module to listen to the bus in real time, and if a composite signal in which multiple feature identifiers are superimposed is detected in a preset detection window, it is determined that there is a bus conflict; an analysis and identification module 3 configured to control the bus master module to identify the bus slave modules participating in the conflict by analyzing the multiple feature identifiers in the composite signal; an allocation module 4 configured to control the bus master module to allocate different sending time slots to the identified conflict bus slave modules, and the sending time slots are determined according to the request sequence of the conflict bus slave modules and the current load state of the bus; Broadcast module 5 is used to control the bus master module to broadcast a control frame containing a list of conflicting slave modules and their corresponding transmission time slots; Synchronization control module 6 is used to control each conflicting slave module to synchronize its local clock according to the allocated transmission time slot after receiving the control frame; Synchronization transmission module 7 is used to control each conflicting slave module to send data to the bus within the transmission time slot after synchronization; Reset module 8 is used to control the bus master module to reset the bus listening state after each conflicting slave module has completed data transmission and enter the next listening cycle.

[0086] In addition, combined Figure 1 The communication conflict detection and control method described in this embodiment of the invention can be implemented by a network communication conflict detection and control device. Figure 8 A schematic diagram of the hardware structure of the communication conflict detection and control device provided in an embodiment of the present invention is shown.

[0087] The communication conflict detection and control device may include a processor 401 and a memory 402 storing computer program instructions.

[0088] Specifically, the processor 401 may include a central processing unit (CPU), an application specific integrated circuit (ASIC), or one or more integrated circuits that can be configured to implement the embodiments of the present invention.

[0089] Memory 402 may include mass storage for data or instructions. For example, and not limitingly, memory 402 may include a hard disk drive (HDD), a floppy disk drive, flash memory, optical disk, magneto-optical disk, magnetic tape, or a Universal Serial Bus (USB) drive, or a combination of two or more of these. Where appropriate, memory 402 may include removable or non-removable (or fixed) media. Where appropriate, memory 402 may be internal or external to a data processing device. In a particular embodiment, memory 402 is a non-volatile solid-state memory. In a particular embodiment, memory 402 includes read-only memory (ROM). Where appropriate, the ROM may be a mask-programmed ROM, a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable PROM (EEPROM), an electrically rewritable ROM (EAROM), or flash memory, or a combination of two or more of these.

[0090] The processor 401 implements any one of the communication conflict detection control methods in the above-described embodiments by reading and executing computer program instructions stored in the memory 402.

[0091] In one example, the communication conflict detection control device can further include the communication interface 403 and the bus 410. As shown in the figure, Figure 8 the processor 401, the memory 402, and the communication interface 403 are connected through the bus 410 and complete communication with each other.

[0092] The communication interface 403 is mainly used to realize communication between various modules, devices, units and / or equipment in the embodiments of the application.

[0093] The bus 410 includes hardware, software or both to couple components of the communication conflict detection control device to each other. By way of example, and not limitation, the bus can include an accelerated graphics port (AGP) or other graphics bus, an enhanced industry standard architecture (EISA) bus, a front-side bus (FSB), a hypertransport (HT) interconnect, an industry standard architecture (ISA) bus, an infiniband interconnect, a low pin count (LPC) bus, a memory bus, a microchannel architecture (MCA) bus, a peripheral component interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a serial advanced technology attachment (SATA) bus, a video electronics standards association local (VLB) bus, or another suitable bus or combination of two or more of these. Where suitable, the bus 410 can include one or more buses. Although specific buses are described and shown in the embodiments of the application, the application contemplates any suitable bus or interconnect.

[0094] In addition, in combination with one of the communication conflict detection control methods in the above-described embodiments, the embodiments of the application can provide a computer readable storage medium to implement. The computer readable storage medium has computer program instructions stored thereon; the computer program instructions are executed by the processor to implement any one of the communication conflict detection control methods in the above-described embodiments.

[0095] It should be further noted that the exemplary embodiments mentioned in the application are based on a series of steps or devices to describe some methods or systems. However, the application is not limited to the order of the above steps, that is, the steps can be executed in the order mentioned in the embodiments, or different from the order in the embodiments, or several steps are executed simultaneously.

[0096] The above is only a specific implementation of the present application, and those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the system, module and unit described above can refer to the corresponding process in the foregoing method embodiments, which will not be described here. It should be understood that the protection scope of the present application is not limited to this, and any person skilled in the art can easily think of various equivalent modifications or replacements within the technical range disclosed by the present application, and these modifications or replacements should be covered within the protection scope of the present application.

Claims

1. A communication collision detection and control method, characterized in that, The communication collision detection and control method includes: The control bus slave module sends a request signal containing a unique identifier to the bus; wherein the unique identifier is a combination of the physical address of the bus slave module and an adaptively generated pseudo-random code; The control bus master module monitors the bus in real time. If a composite signal with multiple superimposed feature identifiers is detected within the preset detection window, it is determined to be a bus conflict. The bus master module controls the bus slave module to identify the bus slave module involved in the conflict by parsing multiple feature identifiers in the composite signal; The bus master module is controlled to allocate different transmission time slots to the identified conflicting bus slave modules. The transmission time slots are determined based on the request order of each conflicting bus slave module and the current load status of the bus. The bus master module is controlled to broadcast a control frame containing a list of conflicting slave modules and their corresponding transmission time slots. After receiving the control frame, each conflicting slave module performs local clock synchronization according to the allocated transmission time slot; Control each conflicting slave module to send data to the bus within the synchronized transmission time slot; After each conflicting slave module completes data transmission, the bus master module resets the bus listening state and enters the next listening cycle.

2. The communication conflict detection and control method according to claim 1, characterized in that, The bus master module allocates different transmission time slots to the identified conflicting bus slave modules. The transmission time slots are determined based on the request order of each conflicting bus slave module and the current bus load status, including: A preliminary time slot allocation sequence is generated based on the request order of each conflicting bus slave module; Obtain the current bus load status, which includes the currently active slave station and its corresponding data transmission volume; The time slot allocation sequence is adaptively adjusted based on the current load status; Based on the adjustment results, the final transmission time slots of each conflicting bus slave module are determined, and a time slot allocation table is generated.

3. The communication conflict detection and control method according to claim 1, characterized in that, The control bus slave module sends a request signal containing a unique identifier to the bus, including: Before the bus slave module sends the request signal, it checks whether the bus is in an idle state; If the bus is idle, the unique feature identifier is generated; The unique identifier is encapsulated into the request signal and sent via the bus; If the bus is busy, a random backoff algorithm is executed, and the transmission is retried after a preset delay.

4. The communication collision detection and control method according to claim 1, characterized in that, The control bus master module monitors the bus in real time. If it detects a composite signal with multiple superimposed feature identifiers within a preset detection window, it determines it to be a bus conflict, including: The bus master module is controlled to continuously monitor the bus signal and acquire the signal waveform in real time within the preset detection window; Perform spectrum analysis on the received signal waveform; If the spectrum analysis results show that multiple of the aforementioned feature identifiers are superimposed, it is determined to be a bus conflict; Record the timestamp of the collision and the composite signal data for subsequent analysis.

5. The communication conflict detection and control method according to claim 1, characterized in that, The bus master module identifies the bus slave modules involved in the conflict by parsing multiple feature identifiers in the composite signal, including: The composite signal is digitally filtered to extract the spectral components of multiple feature identifiers; The original data of the multiple feature identifiers are restored using a signal demodulation algorithm; The restored feature identifiers are compared with a preset identifier library to identify the bus slave modules involved in the conflict. Generate the list of conflicting slave modules and record the conflict time information of each conflicting bus slave module.

6. The communication conflict detection and control method according to claim 1, characterized in that, The process of controlling each conflicting slave module to perform local clock synchronization according to the allocated transmission time slot after receiving the control frame includes: The control module of each conflicting slave station parses the control frame and extracts the time reference information of the transmission time slot; The local clock is compared with the time reference information in the control frame to calculate the clock deviation; The local clock is adjusted according to the clock deviation to achieve clock synchronization with the bus master module; After synchronization is complete, a synchronization confirmation signal is sent to the bus master module.

7. The communication collision detection and control method according to claim 1, characterized in that... After controlling each of the conflicting slave modules to send data to the bus within the synchronized transmission time slot, the method further includes: The bus master module receives data sent by each conflicting slave module and verifies the data integrity.

8. A communication conflict detection and control device, characterized in that, The device includes: A request sending module is used to control the bus slave module to send a request signal containing a unique identifier to the bus; wherein, the unique identifier is a combination of the physical address of the bus slave module and an adaptively generated pseudo-random code; The monitoring module is used to control the bus master module to monitor the bus in real time. If a composite signal with multiple superimposed feature identifiers is detected within the preset detection window, it is determined to be a bus conflict. The parsing and identification module is used to control the bus master module to identify the bus slave module involved in the conflict by parsing multiple feature identifiers in the composite signal; The allocation module is used to control the bus master module to allocate different transmission time slots to the identified conflicting bus slave modules. The transmission time slots are determined according to the request order of each conflicting bus slave module and the current load status of the bus. The broadcast module is used to control the bus master module to broadcast a control frame containing a list of conflicting slave modules and the corresponding transmission time slots; The synchronization control module is used to control each conflicting slave module to perform local clock synchronization according to the allocated transmission time slot after receiving the control frame; The synchronous transmission module is used to control each of the conflicting slave modules to send data to the bus within the transmission time slot after synchronization; The reset module is used to control the bus master module to reset the bus listening state and enter the next listening cycle after each conflicting slave module has completed data transmission.

9. A communication conflict detection and control device, characterized in that, include: At least one processor, at least one memory, and computer program instructions stored in the memory, which, when executed by the processor, implement the method as described in any one of claims 1-7.

10. A storage medium storing computer program instructions thereon, characterized in that, The method as described in any one of claims 1-7 is implemented when the computer program instructions are executed by the processor.

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