Wireless instruction identification and frequency reduction control method for bathroom controller

Abstract

The invention relates to the technical field of wireless communication control, in particular to a wireless instruction identification and frequency reduction control method for a bathroom controller, the bathroom controller comprises a wireless communication module and a main control chip, and the method comprises the following steps: monitoring and receiving a wireless signal, extracting instruction content, signal strength and signal stability, and generating an original instruction data packet; performing multiple verification on the original instruction data packet based on the signal quality evaluation model to generate an instruction validity judgment result; if the interference signals are judged to be invalid interference signals, generating a frequency reduction trigger mark; and the main control chip counts the generation frequency of the underclocking trigger mark and generates a mode switching instruction under the condition that the frequency continuously exceeds a frequency threshold, so that the main control chip and the wireless communication module enter a low-power-consumption underclocking working mode. According to the method, the accuracy and the anti-interference capability of instruction identification can be effectively improved, dynamic judgment and energy-saving response to the interference situation are realized, and the overall stability and the energy efficiency level of the system are improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of wireless communication control, and in particular to a wireless instruction recognition and frequency reduction control method for a bathroom controller. BACKGROUND

[0002] With the rapid development of smart home technology, bathroom equipment is gradually upgrading towards wireless control, intelligent response and energy-saving operation. In practical applications, more and more bathroom products (such as intelligent toilets, constant-temperature shower heads, automatic bathtubs, etc.) integrate wireless communication modules, and users can send control instructions through wireless remote controllers, mobile terminals or voice modules to flexibly manage water temperature, water flow intensity, execution duration and other parameters. This type of wireless control method has obvious advantages in improving user experience and realizing touchless operation.

[0003] Existing bathroom wireless control systems mostly rely on the received instruction content itself for execution judgment, lack multi-dimensional evaluation of signal quality, and are prone to misjudging other radio frequency signals or invalid interference information in the environment as valid instructions, leading to misoperation or resource waste. At the same time, when the system is in a high-interference environment for a long time, the wireless communication module and the main control chip continuously maintain high-power operation, which cannot accurately identify the interference trend and lacks active energy-saving response strategies for the interference situation, easily causing problems such as chip overheating, power consumption increase, and system response delay. SUMMARY

[0004] The present application provides a wireless instruction recognition and frequency reduction control method for a bathroom controller, which has a multi-verification mechanism for signal quality and can dynamically adjust the power consumption mode based on interference strength, to improve the stability, reliability and energy efficiency of the bathroom wireless control system in complex environments.

[0005] A wireless instruction recognition and frequency reduction control method for a bathroom controller, the bathroom controller comprising a wireless communication module and a main control chip, comprising the following steps: S1: listening to a wireless channel and receiving a wireless signal through the wireless communication module, and analyzing the wireless signal by the main control chip to obtain an original instruction data packet including instruction content, signal strength and signal stability; S2: the main control chip performs multi-verification on the original instruction data packet based on a pre-set signal quality evaluation model to generate an instruction validity decision result; S3: the main control chip executes the instruction validity decision result, and if the decision result is an invalid interference signal, generates a frequency reduction trigger flag; S4: the main control chip controls the main control chip itself and the wireless communication module to switch to a low-power frequency reduction working mode based on the generation frequency of the frequency reduction trigger flag.

[0006] Optionally, the S1 comprises: S11: the wireless communication module listens to a wireless channel, receives when detecting a wireless signal conforming to a physical layer protocol, and transmits the received wireless signal to the master control chip; S12: the master control chip analyzes the wireless signal from the wireless communication module, converts it into a processable digital signal, and obtains the parsed data; S13: the master control chip extracts the instruction content from the parsed data, and synchronously collects the signal strength and signal stability of the wireless signal; S14: the master control chip combines and packages the extracted instruction content, signal strength and signal stability to generate the original instruction data packet.

[0007] Optionally, the wireless signal conforming to the physical layer protocol in S11 refers to a radio frequency signal conforming to Bluetooth, Wi-Fi or Zigbee communication standards.

[0008] Optionally, the analyzing of the wireless signal specifically comprises: demodulating, decoding and cyclic redundancy checking the wireless signal, and only taking the complete data frame passing the checking as the parsed data.

[0009] Optionally, the S2 comprises: S21: the master control chip calls a preset signal quality evaluation model, extracts the instruction content from the original instruction data packet and performs format compliance checking to generate a format checking result; S22: the master control chip calls the preset signal quality evaluation model, extracts the signal strength and signal stability from the original instruction data packet and performs joint logical judgment to generate a joint judgment result; S23: the master control chip performs comprehensive judgment based on the format checking result and the joint judgment result according to a preset judgment rule to generate a preliminary judgment conclusion; S24: the master control chip outputs the preliminary judgment conclusion as the instruction validity judgment result, and completes the multiple verifications.

[0010] Optionally, the format compliance checking comprises checking whether the frame header, frame tail, data length and checksum field of the instruction content conform to the pre-defined communication protocol format, and the joint logical judgment specifically comprises: judging whether the signal strength is greater than or equal to a preset strength threshold, and at the same time judging whether the signal stability is less than or equal to a preset fluctuation threshold; if both conditions are met, a passed joint judgment result is generated, otherwise a failed joint judgment result is generated.

[0011] Optionally, the S3 comprises: S31: The master chip reads and analyzes the instruction validity decision result, and identifies the decision conclusion contained therein; S32: If the decision conclusion is a valid user instruction, the master chip performs the bathroom equipment function control operation corresponding to the instruction content; if the decision conclusion is an invalid interference signal, the master chip discards the original instruction data packet associated with the instruction validity decision result; S33: When the decision conclusion is an invalid interference signal, the master chip generates a frequency reduction trigger flag containing timestamp information, and writes the frequency reduction trigger flag into a specified register or storage queue.

[0012] Optionally, the identification of the decision conclusion contained therein specifically comprises: analyzing the data structure of the instruction validity decision result, reading the value in the pre-defined decision conclusion field thereof, and the value is an enumeration type, used to explicitly represent that the decision conclusion is a valid user instruction or an invalid interference signal.

[0013] Optionally, the S4 comprises: S41: The master chip monitors and records the generation event of the frequency reduction trigger flag in real time, counts the cumulative number of the frequency reduction trigger flag within a preset time window, and obtains the generation frequency of the frequency reduction trigger flag; S42: The master chip compares the generation frequency with a pre-stored frequency threshold value, and if the generation frequency continuously exceeds the frequency threshold value for a predetermined duration, a mode switching instruction is generated; S43: The master chip responds to the mode switching instruction to control the working clock frequency of the master chip itself to be reduced, and simultaneously sends a control command to the wireless communication module, so that the wireless communication module switches to a low-power frequency reduction working mode.

[0014] Optionally, the preset time window is a sliding time window with a length of T seconds, wherein T is an integer between 60 and 300, and the master chip counts the cumulative number of the frequency reduction trigger flag by maintaining a first-in-first-out queue corresponding to the sliding time window.

[0015] The beneficial effects of the present application are: The present application effectively distinguishes between legal instructions and interference signals, reduces the misidentification rate and the risk of misexecution, by means of physical layer monitoring, demodulation, decoding and redundancy check processing of wireless signals, combined with joint collection mechanism of signal strength and signal stability, and introduction of multi-verification strategy of format check and double-parameter joint judgment. Especially, the signal stability adopts the sliding variance analysis method, which has good anti-interference performance in the bathroom environment with frequent physical layer data disturbance, and ensures the control instruction recognition accuracy and response consistency.

[0016] The application, the master control chip discards the original instruction data packet corresponding to the invalid interference signal in time based on the instruction validity judgment result, avoids the waste of redundant resources. Meanwhile, a frequency reduction trigger flag data structure containing a time stamp and a trigger type field is constructed and stored in a fixed length queue with a first-in-first-out strategy, which not only guarantees the traceability of the system, but also builds an important data basis for driving subsequent mode switching. By recording the occurrence frequency of the interference event in real time, decision support is provided for system adaptive frequency reduction.

[0017] The application, the master control chip takes the generation frequency of the frequency reduction trigger flag in the sliding time window as the basis, and combines the frequency threshold and the predetermined duration judgment mechanism to accurately identify the high-frequency interference state in the wireless environment. When the interference duration condition is met, the master control chip and the wireless communication module are switched to the low-power frequency reduction mode synchronously, the main frequency is reduced and the listening duty cycle is compressed, unnecessary energy waste is significantly reduced, and the stability, durability and power control ability of the device in the complex electromagnetic environment are enhanced. BRIEF DESCRIPTION OF DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the present application or prior art, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description only illustrate the present application, and for those skilled in the art, other drawings can also be obtained without creative labor.

[0019] Fig. 1 The method flowchart of the embodiment of the present application is shown in the figure. Fig. 2 The S2 flowchart of the embodiment of the present application is shown in the figure. DETAILED DESCRIPTION

[0020] The present application will be described in detail below in combination with the drawings and specific embodiments. It should be noted that in order to make the embodiments more detailed, the following embodiments are the best, preferred embodiments, and other alternative ways can also be used by those skilled in the art to implement them; and the drawings are only used to describe the embodiments more specifically, and are not intended to limit the present application specifically.

[0021] It should be noted that in the specification, "one embodiment", "embodiment", "exemplary embodiment", "some embodiments" and the like indicate that the embodiments described can include specific features, structures or characteristics, but not necessarily every embodiment includes the specific features, structures or characteristics. In addition, when a specific feature, structure or characteristic is described in combination with an embodiment, it should be within the knowledge of those skilled in the art to realize this feature, structure or characteristic in combination with other embodiments (whether or not explicitly described).

[0022] Generally, terms can be understood at least partly from their use in context. For example, depending at least partly on the context, the term "one or more" as used herein can be used to describe any feature, structure, or characteristic in a singular sense, or a combination of features, structures, or characteristics in a plural sense. Additionally, the term "based on" can be understood not necessarily to convey an exclusive set of factors, but rather, alternatively, depending at least partly on the context, to allow for the presence of other factors that are not necessarily explicitly described.

[0023] like Figs. 1-2 As shown, a wireless command identification and frequency reduction control method for a bathroom controller, the bathroom controller including a wireless communication module and a main control chip, includes the following steps: S1: The wireless communication module listens to the wireless channel and receives wireless signals. The main control chip parses the wireless signals to obtain the raw command data packet, which includes the command content, signal strength, and signal stability. This includes the following sub-steps: S11: The wireless communication module listens to the wireless channel, receives wireless signals that conform to the physical layer protocol, and transmits the received wireless signals to the main control chip.

[0024] The wireless communication module continuously monitors a designated wireless channel based on an internally configured monitoring mode. During monitoring, the module uses power detection and synchronization matching to determine the presence of a wireless signal conforming to the physical layer protocol. A wireless signal conforming to the physical layer protocol is a radio frequency signal that meets the requirements of Bluetooth, Wi-Fi, or Zigbee communication standards, possessing a clear frame structure, synchronization header field, and modulation scheme. Upon detecting a legitimate wireless signal, the wireless communication module receives the signal and transmits the received complete signal to the main control chip via a hardware interface.

[0025] S12: The main control chip analyzes the wireless signal from the wireless communication module, converts it into a processable digital signal, and obtains the analyzed data.

[0026] After receiving a wireless signal from the wireless communication module, the main control chip initiates its built-in parsing module to perform multi-level processing on the signal. The parsing process includes three stages: demodulation, decoding, and cyclic redundancy check (CRC). The demodulation process uses a fixed baseband demodulation algorithm to restore the modulation information based on the physical layer protocol type corresponding to the wireless signal. The decoding process extracts the payload, frame control field, and command field from the data frame. CRC is used to verify the integrity of the data frame, ensuring that no errors occur during transmission. Only when the CRC result is passed does the main control chip mark the data frame as valid and store it as parsed data in the parsing buffer unit.

[0027] S13: The main control chip extracts the instruction content from the parsed data and simultaneously collects the signal strength and signal stability of the wireless signal.

[0028] The main control chip performs structured parsing on the analyzed data to accurately extract the instruction field content, forming instruction content data for subsequent execution and judgment. Simultaneously, the main control chip records the physical parameters of the wireless signal during reception based on the received signal strength indicator value provided by the wireless communication module.

[0029] To obtain accurate signal stability, the main control chip collects continuous received signal strength indication values ​​at a sampling frequency of no less than 1 kHz throughout the entire reception period of the wireless signal, and calculates its statistical variance based on this sequence. The statistical variance is the signal stability of the wireless signal, which is used to subsequently determine whether the command source is stable and reliable.

[0030] S14: The main control chip combines and encapsulates the extracted instruction content, signal strength, and signal stability to generate the original instruction data packet.

[0031] After completing instruction extraction and signal quality parameter acquisition, the main control chip initiates the encapsulation process. This encapsulation process writes the instruction content as data payload into the data field and attaches signal strength and signal stability as metadata tags to the data structure, forming a unified structured data format.

[0032] Encapsulation employs a fixed field order and length control to ensure data structure consistency and parsability during unpacking. The final encapsulated raw instruction data packet contains all three elements: instruction content, signal strength, and signal stability, providing a complete input basis for subsequent signal quality assessment and instruction validity determination.

[0033] S2: The main control chip performs multiple verifications on the original instruction data packet based on a preset signal quality assessment model, and generates an instruction validity judgment result, specifically: The signal quality assessment model is pre-installed in the internal storage unit of the main control chip. Its structure includes three functional sub-modules: a format verification sub-module, a parameter discrimination sub-module, and a comprehensive decision sub-module. The model's input is the original instruction data packet, and its output is the instruction validity judgment result. Its main execution flow is as follows: First, the format verification sub-module parses and verifies the communication protocol compliance of the instruction content fields; then, the parameter discrimination sub-module performs a joint logical judgment on signal strength and signal stability; finally, the comprehensive decision sub-module generates a preliminary judgment conclusion based on the decision rules.

[0034] S21: The main control chip calls the preset signal quality assessment model, extracts the instruction content from the original instruction data packet, performs format compliance verification, and generates format verification results.

[0035] The format verification submodule checks the communication protocol format consistency of the instruction content in the original instruction data packet. The main control chip first extracts the instruction content field from the original instruction data packet and passes it as input to the format verification submodule. This submodule is internally configured with a predefined communication protocol structure template, which includes rules for frame header, frame trailer, data length fields, and checksum field generation. The format verification submodule performs the following processing sequentially: The frame header field is compared to determine whether it matches the start identifier in the template; The frame end field is compared to determine whether it matches the termination identifier in the template; Parse the data length field value and verify its consistency with the actual effective data payload length; Perform a cumulative sum operation on the instruction content data load and determine whether the result matches the template checksum rules.

[0036] All field validations are performed using binary bit-by-bit matching as the standard, without any fuzzy tolerance processing. If all four items meet the predefined template requirements, the format validation submodule outputs a format validation result of "pass"; if any field fails to meet the requirements, the format validation result is "fail".

[0037] S22: The main control chip calls the preset signal quality assessment model, extracts the signal strength and signal stability from the original instruction data packet, performs joint logic judgment, and generates a joint judgment result.

[0038] The parameter discrimination submodule performs a joint logical judgment on the signal strength and signal stability recorded in the original command data packet. The main control chip extracts the signal strength and signal stability fields from the original command data packet and inputs them into the parameter discrimination submodule. This submodule is configured with two static threshold parameters: Preset strength threshold: Used to determine whether the signal strength meets the minimum reception quality requirements; Preset fluctuation threshold: Used to determine whether the signal stability meets the stability requirements.

[0039] The judgment logic executed internally by the parameter discrimination submodule is as follows: Determine whether the signal strength is greater than or equal to a preset strength threshold; Determine whether the signal stability is less than or equal to the preset fluctuation threshold; The combined judgment result is "pass" only if both of the above conditions are met simultaneously; If any one condition is not met, the combined judgment result is "fail".

[0040] The joint judgment logic is based on logical AND operation, and does not accept one-way satisfaction, thus ensuring the stability and integrity of instruction data.

[0041] S23: The main control chip, based on the format verification result and the joint judgment result, makes a comprehensive judgment according to the preset judgment rules and generates a preliminary judgment conclusion.

[0042] The integrated decision submodule receives the judgment results from the format verification submodule and the parameter discrimination submodule, and calls the built-in decision rules for logical merging and final judgment. The preset decision rules are Boolean logic double-check pass / fail, i.e.: The preliminary judgment is "valid user instruction" if and only if the format validation result is "passed" and the joint judgment result is "passed". In any other combination (i.e., if any "failure" occurs), the preliminary conclusion is "invalid interference signal".

[0043] The decision logic is implemented using a lookup table or a nested decision tree, ensuring unique output and irreversibility, thus avoiding uncertain instruction processing paths.

[0044] S24: The main control chip outputs the preliminary judgment result as the instruction validity judgment result, completing multiple verifications.

[0045] The main control chip uses the preliminary judgment as the core basis for determination, and constructs a data structure for the instruction validity judgment result containing two parts: Judgment Conclusion Field: Records the content of the preliminary judgment conclusion, and can only take the values ​​of "valid user instruction" or "invalid interference signal"; Original instruction data packet unique identifier field: Records the unique identifier of the original instruction data packet corresponding to this judgment, used for system-level tracing and abnormal record binding.

[0046] The unique identifier is generated by the main control chip at the time it receives and parses the wireless signal. It uses a unique encoding rule that combines a timestamp and the receiving channel number, ensuring global uniqueness and non-repetition. After constructing the decision result, the main control chip transmits the validity decision result of the instruction to the subsequent processing flow to trigger the subsequent instruction execution logic or frequency reduction control process.

[0047] S3: The main control chip executes the instruction validity judgment result. If the judgment result is an invalid interference signal, a frequency reduction trigger flag is generated, specifically: S31: The main control chip reads and parses the instruction validity judgment result and identifies the judgment conclusion contained therein.

[0048] After completing the multi-step verification process and generating the instruction validity judgment result, the main control chip initiates the judgment result reading mechanism. This instruction validity judgment result is a structured data object, which includes two fields: a judgment conclusion field and a unique identifier field for the original instruction data packet. The main control chip first performs field-level parsing on this structured data object to locate the judgment conclusion field and read the recorded value within it. This field is an enumeration type, and its values ​​are defined as follows: 0 indicates that the judgment conclusion is "valid user instruction"; 1 indicates that the judgment conclusion is "invalid interference signal".

[0049] After parsing and judging the enumerated value, the main control chip records the current judgment conclusion status, providing a basis for subsequent execution control or triggering frequency reduction.

[0050] S32: If the judgment result is a valid user instruction, the main control chip executes the bathroom equipment function control operation corresponding to the instruction content. If the judgment result is an invalid interference signal, the main control chip discards the original instruction data packet associated with the validity judgment result of the instruction.

[0051] When the judgment conclusion field value is 0, indicating a "valid user instruction," the main control chip calls the pre-built control function library to format and convert the instruction content field in the original instruction data packet. The converted control instruction is encapsulated into a data frame conforming to the controller driver standard and output to the actuator control unit through the main control chip's I / O interface. The actuator is a hardware module connected to the main control chip's I / O interface, including one or more of a solenoid valve, motor, or heater. The control function library has defined the mapping relationship between various instructions and actuator actions, enabling bathroom functions such as water temperature adjustment, shower head switching, and water flow start / stop.

[0052] When the judgment conclusion field value is 1, which means "invalid interference signal", the main control chip will clear the original instruction data packet associated with the validity judgment result of the instruction from the temporary buffer area and mark the data packet as "invalid and discarded" so that it will no longer participate in the subsequent control process and avoid erroneous execution.

[0053] S33: When the judgment conclusion is an invalid interference signal, the main control chip generates a frequency reduction trigger flag containing timestamp information and writes the frequency reduction trigger flag into the specified register or storage queue.

[0054] When the judgment conclusion field value is 1, the main control chip immediately constructs a frequency reduction trigger flag. This frequency reduction trigger flag is a structured data object containing the following two fields: Timestamp field: Records the system time of the current triggering event. The timestamp information is provided by the internal real-time clock of the main control chip, and its timing accuracy reaches the millisecond level to ensure recording accuracy. Trigger type field: This is an enumerated value, fixed at "triggered by invalid interference signal", used to distinguish it from other types of frequency reduction events.

[0055] After generation, the main control chip writes the frequency reduction trigger flag to a designated storage area, which is a fixed-length first-in-first-out (FIFO) storage queue. Each element in the storage queue is a frequency reduction trigger flag data object, and the system's default maximum capacity is N flag units (N is a fixed configuration constant). If the current storage queue is full, the main control chip automatically removes the oldest historical frequency reduction trigger flag written in the queue before writing a new flag, in order to maintain the queue capacity unchanged.

[0056] This mechanism ensures that the main control chip can record the continuous timing status of multiple frequency reduction trigger events, which is convenient for subsequent statistical analysis and reference for switching working modes.

[0057] S4: Based on the frequency of the frequency reduction trigger flag, the main control chip controls itself and the wireless communication module to switch to a low-power frequency reduction working mode, specifically: S41: The main control chip monitors and records the generation events of the frequency reduction trigger flag in real time, counts the cumulative number of frequency reduction trigger flags within a preset time window, and obtains the generation frequency of the frequency reduction trigger flag.

[0058] During system operation, the main control chip continuously monitors write events to its internal frequency reduction trigger flag storage queue. Whenever a new frequency reduction trigger flag is generated, i.e., the flag data object generated after the judgment conclusion is "invalid interference signal", the main control chip extracts and records the timestamp information of the flag.

[0059] To perform statistical processing, the main control chip internally constructs a first-in-first-out (FIFO) queue corresponding to a preset time window. The preset time window is a sliding time window of length T seconds, where T is an integer between 60 and 300, the specific value of which is set during system deployment. The queue entries in the FIFO queue contain the timestamp information field values ​​of each frequency reduction trigger flag. The main control chip compares the oldest timestamp in the queue with the current system time in real time. If the difference exceeds T seconds, it automatically dequeues the flag, ensuring that the queue content within the sliding time window always reflects the actual triggering situation within the most recent T seconds.

[0060] The length of the queue within the current sliding time window is the cumulative number of frequency reduction trigger flags. The main control chip divides this number by T to obtain the frequency of frequency reduction trigger flag generation per unit time, i.e., the generation frequency.

[0061] S42: The main control chip compares the generated frequency with the pre-stored frequency threshold. If the generated frequency continues to exceed the frequency threshold for a predetermined duration, a mode switching instruction is generated.

[0062] The main control chip internally stores a frequency threshold, which is initially a fixed value and supports a dynamic adjustment mechanism. At the end of each sliding time window, the main control chip records the generation frequency value within that time window and maintains a historical generation frequency record table, storing the generation frequencies of the previous few windows. Based on the historical average value and the perturbation coefficient, the main control chip performs a weighted correction on the initial frequency threshold, achieving adaptive dynamic adjustment of the frequency threshold.

[0063] The system also sets a predetermined duration M, representing "M consecutive preset time windows". The main control chip internally maintains a continuous trigger judgment counter. Whenever the generation frequency is greater than the current frequency threshold, the counter is incremented by 1; if the generation frequency is lower than the frequency threshold, the counter is reset to zero. Only when the counter value continuously reaches M does the main control chip consider that "the generation frequency has continuously exceeded the frequency threshold for the predetermined duration".

[0064] Once the above conditions are met, the main control chip generates a mode switching instruction. This mode switching instruction is a standard format data structure containing a target operating mode identifier field. This field enumerates the target power consumption level, explicitly specifying that the target after switching is "low-power frequency reduction operating mode" and its specific level, ensuring accurate response from subsequent modules.

[0065] S43: In response to the mode switching command, the main control chip controls its own operating clock frequency to decrease, and at the same time sends a control command to the wireless communication module to switch the wireless communication module to a low-power frequency reduction working mode.

[0066] Upon receiving the mode switching command generated by itself, the main control chip immediately initiates the power consumption switching process and executes dual-path control: The main control chip uses its internal clock manager to change the current system operating frequency from... Reduce to ,in For low-power operating clock frequency, meet The frequency constraint enables the main control chip to enter a low-power frequency reduction working mode.

[0067] Synchronously, a control command is sent to the wireless communication module. This command includes a low-power level parameter consistent with the target operating mode identifier field. Upon receiving this control command, the wireless communication module updates its internal listening scheduling mechanism, adjusting the channel listening duty cycle from... Reduce to ,in The minimum duty cycle in low-power monitoring mode, satisfying This ensures that the channel polling interval is lengthened to reduce power consumption.

[0068] During the entire low-power frequency reduction operation mode, the main control chip continuously maintains the monitoring logic of the sliding time window and reserves the conditions for subsequent frequency increase. This achieves a complete closed-loop control process from trigger event recognition and frequency threshold judgment to actual energy consumption adjustment.

[0069] This invention encompasses any substitutions, modifications, equivalent methods, and solutions made within the spirit and scope of this invention. To provide the public with a thorough understanding of this invention, specific details are described in detail in the following preferred embodiments; however, those skilled in the art will fully understand the invention even without these details. Furthermore, to avoid unnecessary misunderstanding of the essence of this invention, well-known methods, processes, procedures, components, and circuits are not described in detail.

[0070] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A method for wireless command recognition and frequency reduction control for a bathroom controller, the bathroom controller comprising a wireless communication module and a main control chip, characterized in that, Includes the following steps: S1: The wireless communication module listens to the wireless channel and receives wireless signals. The main control chip parses the wireless signals to obtain the original instruction data packet, which includes the instruction content, signal strength, and signal stability. S2: The main control chip performs multiple verifications on the original instruction data packet based on a preset signal quality assessment model, and generates an instruction validity judgment result; S3: The main control chip executes the instruction validity judgment result. If the judgment result is an invalid interference signal, a frequency reduction trigger flag is generated. S4: The main control chip controls itself and the wireless communication module to switch to a low-power frequency reduction working mode based on the generation frequency of the frequency reduction trigger flag.

2. The wireless command identification and frequency reduction control method for a bathroom controller according to claim 1, characterized in that, S1 includes: S11: The wireless communication module listens to the wireless channel, receives the wireless signal that conforms to the physical layer protocol when it detects it, and transmits the received wireless signal to the main control chip. S12: The main control chip analyzes the wireless signal from the wireless communication module and converts it into a processable digital signal to obtain the analyzed data; S13: The main control chip extracts the instruction content from the parsed data and simultaneously collects the signal strength and signal stability of the wireless signal; S14: The main control chip combines and encapsulates the extracted instruction content, signal strength, and signal stability to generate the original instruction data packet.

3. The wireless command identification and frequency reduction control method for a bathroom controller according to claim 2, characterized in that, The wireless signal conforming to the physical layer protocol in S11 refers to a radio frequency signal that conforms to the Bluetooth, Wi-Fi or Zigbee communication standards.

4. The wireless command identification and frequency reduction control method for a bathroom controller according to claim 3, characterized in that, The process of parsing the wireless signal specifically includes: demodulating, decoding, and performing cyclic redundancy check on the wireless signal, and using only complete data frames that pass the check as the parsed data.

5. A wireless command identification and frequency reduction control method for a bathroom controller according to claim 4, characterized in that, S2 includes: S21: The main control chip calls the preset signal quality assessment model, extracts the instruction content from the original instruction data packet and performs format compliance verification, and generates format verification results; S22: The main control chip calls the preset signal quality assessment model, extracts the signal strength and signal stability from the original instruction data packet, performs joint logic judgment, and generates a joint judgment result; S23: The main control chip, based on the format verification result and the joint judgment result, makes a comprehensive judgment according to the preset judgment rules and generates a preliminary judgment conclusion; S24: The main control chip outputs the preliminary judgment conclusion as the result of the instruction validity judgment, thus completing multiple verifications.

6. The wireless command identification and frequency reduction control method for a bathroom controller according to claim 5, characterized in that, The format compliance verification includes verifying whether the frame header, frame tail, data length, and checksum field of the instruction content conform to the predefined communication protocol format. The joint logic judgment specifically involves: determining whether the signal strength is greater than or equal to a preset strength threshold, and simultaneously determining whether the signal stability is less than or equal to a preset fluctuation threshold; if both conditions are met, a passing joint judgment result is generated; otherwise, a failing joint judgment result is generated.

7. A wireless command identification and frequency reduction control method for a bathroom controller according to claim 6, characterized in that, S3 includes: S31: The main control chip reads and parses the instruction validity judgment result, and identifies the judgment conclusion contained therein; S32: If the judgment result is a valid user instruction, the main control chip executes the bathroom equipment function control operation corresponding to the instruction content; if the judgment result is an invalid interference signal, the main control chip discards the original instruction data packet associated with the validity judgment result of the instruction. S33: When the judgment conclusion is an invalid interference signal, the main control chip generates a frequency reduction trigger flag containing timestamp information and writes the frequency reduction trigger flag into a designated register or storage queue.

8. A wireless command identification and frequency reduction control method for a bathroom controller according to claim 7, characterized in that, The identification of the judgment conclusion contained therein specifically involves: parsing the data structure of the instruction validity judgment result, reading the value in its predefined judgment conclusion field, which is an enumeration type used to explicitly characterize whether the judgment conclusion is a valid user instruction or an invalid interference signal.

9. A wireless command identification and frequency reduction control method for a bathroom controller according to claim 8, characterized in that, S4 includes: S41: The main control chip monitors and records the generation events of the frequency reduction trigger flag in real time, counts the cumulative number of the frequency reduction trigger flags within a preset time window, and obtains the generation frequency of the frequency reduction trigger flag; S42: The main control chip compares the generated frequency with a pre-stored frequency threshold. If the generated frequency continues to exceed the frequency threshold for a predetermined duration, a mode switching instruction is generated. S43: In response to the mode switching command, the main control chip controls its own operating clock frequency to decrease, and at the same time sends a control command to the wireless communication module to switch the wireless communication module to a low-power frequency reduction operating mode.

10. A wireless command identification and frequency reduction control method for a bathroom controller according to claim 9, characterized in that, The preset time window is a sliding time window of length T seconds, where T is an integer between 60 and 300. The main control chip maintains a first-in-first-out queue corresponding to the sliding time window to count the cumulative number of frequency reduction trigger flags.

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