Parallel test system for digital low dropout linear regulator

Abstract

The present application relates to the technical field of measuring electric variable, in particular to a kind of parallel test system of digital low dropout linear regulator, including test data acquisition module, current sharing error analysis module, current sharing performance analysis module, dynamic response performance analysis module and test result generation module, by obtaining the test data of parallel system formed by each parallel regulator, based on test data, the current sharing performance eigenvalue and dynamic response performance characteristic coefficient of parallel system are determined, so as to utilize dynamic response performance characteristic coefficient to correct current sharing performance eigenvalue, and finally determine the parallel test result of parallel system.The present application can more comprehensively and accurately test the performance of parallel regulator by analyzing the current sharing performance and dynamic response performance of multiple parallel regulators.

Description

Technical Field

[0001] This invention relates to the field of electrical variable measurement technology, and specifically to a parallel testing system for a digital low-dropout linear regulator. Background Technology

[0002] Digital low-dropout linear stabilizers are power management chips that achieve voltage stability through digital control technology, building upon traditional simulators. They retain the core advantages of low-dropout linear stabilizers—low dropout and low noise—while incorporating digital logic and programming capabilities, resulting in intelligent and high-precision features. Digital low-dropout linear stabilizers are suitable for scenarios requiring higher flexibility and intelligence, such as servers, intelligent sensor nodes, and communication equipment. In applications with high power output requirements, multiple regulators are often connected in parallel to meet the high current output demand.

[0003] Currently, parallel testing methods for digital low-dropout linear regulators mostly focus on the performance indicators of a single regulator. However, multiple regulators can affect each other after being connected in parallel. For example, there may be current sharing issues among the multiple regulators after parallel connection. If the current sharing performance is poor, it will affect the stability and reliability of the entire system, making it difficult to accurately evaluate the overall performance of the system under different operating conditions after parallel connection. Summary of the Invention

[0004] To address the problem that existing parallel testing methods often focus on the performance indicators of a single voltage regulator, making it difficult to accurately evaluate the overall performance of the parallel system under different operating conditions, this invention aims to provide a parallel testing system for digital low-dropout linear voltage regulators. The specific technical solution adopted is as follows:

[0005] In a first aspect, the present invention provides a parallel testing system for a digital low-dropout linear regulator, the system comprising:

[0006] The test data acquisition module is used to acquire test data of the parallel system composed of each voltage regulator connected in parallel. The test data includes the output current of each voltage regulator under different load currents and the response current when a step change occurs under different load currents.

[0007] The current sharing error analysis module is used to determine the current sharing error of each regulator under different load currents based on the difference in the output current of each regulator under the same load current.

[0008] The current sharing performance analysis module is used to determine the current sharing performance characteristic value of the parallel system based on the distribution of current sharing error of each voltage regulator under different load currents.

[0009] The dynamic response performance analysis module is used to determine the dynamic response performance characteristic coefficients of the parallel system based on the distribution of the response time of each regulator when it makes a step under different load currents.

[0010] The test result generation module is used to correct the current sharing performance characteristic value using the dynamic response performance characteristic coefficient, and to determine the parallel test result of the parallel system based on the corrected current sharing performance characteristic value.

[0011] In conjunction with the first aspect above, in some possible implementations, the current sharing error analysis module includes:

[0012] The reference output current acquisition unit is used to determine the reference output current under each load current based on the distribution of the output current of each regulator under each load current.

[0013] The current sharing error analysis unit is used to determine the current sharing error of each regulator under each load current based on the difference between the output current of each regulator under each load current and the reference output current.

[0014] In conjunction with the first aspect above, in some possible implementations, the current sharing performance analysis module includes:

[0015] The current distribution uniformity analysis unit is used to determine the current distribution uniformity of the parallel system under any load current based on whether the current sharing error exceeds the reference range.

[0016] The full-load current sharing characteristic analysis unit is used to determine the full-load current sharing characteristic value of the parallel system based on the distribution difference of the current distribution uniformity.

[0017] The current sharing performance characteristic analysis unit is used to determine the current sharing performance characteristic value of the parallel system based on the full load current sharing characteristic value and the change of current sharing error of each voltage regulator under different load currents.

[0018] In conjunction with the first aspect above, in some possible implementations, the current distribution uniformity analysis unit is configured as follows:

[0019] Under any load current, identify the target voltage regulator whose current sharing error exceeds the reference range, and the extent to which the current sharing error of the target voltage regulator exceeds the reference range.

[0020] Under any load current, the consistency of current sharing error is determined based on the consistent distribution of current sharing error of all regulators whose current sharing error does not exceed the reference range.

[0021] Based on the number of target voltage regulators, the degree of over-limit, and the consistency of current sharing error, the uniformity of current distribution in the parallel system under any load current is determined.

[0022] In conjunction with the first aspect above, in some possible implementations, the full-load current sharing characteristic analysis unit is configured as follows:

[0023] Clustering is performed on all the current distribution uniformity levels to obtain several clusters;

[0024] Based on the number of clusters and the distribution of the uniformity of current distribution within the clusters, the full-load current sharing characteristic value of the parallel system is determined.

[0025] In conjunction with the first aspect mentioned above, among some possible implementation methods, the full-load current sharing characteristic value of the parallel system is determined, including:

[0026] The average value of the current distribution uniformity in all the said clusters is determined to obtain the mean value of the current distribution uniformity;

[0027] Determine the maximum value among the number of current distribution uniformity levels in all said clusters to obtain the maximum number;

[0028] The ratio of the maximum number to the number of clusters with uniform current distribution is determined to obtain the proportion of the number.

[0029] The full-load current sharing characteristic value of the parallel system is determined based on the number of clusters, the average current distribution uniformity, and the proportion of the number clusters.

[0030] In conjunction with the first aspect above, in some possible implementations, the current sharing performance characteristic analysis unit is configured as follows:

[0031] Determine the variation of the current sharing error of the same voltage regulator under adjacent load currents, and determine the rate of change of the current sharing error of each voltage regulator;

[0032] Under any load current, the regulators whose current sharing error exceeds the reference range are marked as target regulators, and then the number of times each regulator is marked as a target regulator is determined.

[0033] Based on the full-load current sharing characteristic value, and combined with the changes in the rate of change of current sharing error of each voltage regulator, the number of times each voltage regulator is marked as the target voltage regulator, and the distribution level of the current sharing error of each voltage regulator, the current sharing performance characteristic value of the parallel system is determined.

[0034] In conjunction with the first aspect mentioned above, among some possible implementation methods, the current sharing performance characteristic values ​​of the parallel system are determined, including:

[0035] The slope of the fitted line for each voltage regulator is obtained by performing linear fitting on the rate of change of current sharing error of each voltage regulator.

[0036] The average value of the current sharing error of each voltage regulator is determined separately to obtain the average value of the current sharing error of each voltage regulator;

[0037] The stability of the current sharing performance of each voltage regulator is determined based on the slope of the fitted line of each voltage regulator, the mean value of the current sharing error, and the number of times each voltage regulator is marked as the target voltage regulator.

[0038] Based on the full-load current sharing characteristic value and combined with the distribution level of the current sharing performance stability of each voltage regulator, the current sharing performance characteristic value of the parallel system is determined.

[0039] In conjunction with the first aspect above, in some possible implementations, the dynamic response performance analysis module includes:

[0040] The response time group acquisition unit is used to determine a set of response times when a step transition occurs between the target load current and the rated load current, from the response times of each regulator when a step transition occurs under different load currents. The target load current is any load current that is not equal to the rated load current.

[0041] The response time difference analysis unit is used to determine the response time difference value between any two response times in the set of response times, and to determine the maximum response time difference value and the average response time difference value of each voltage regulator under all load currents.

[0042] The response time filtering unit is used to determine the maximum and minimum response times of each voltage regulator when it makes a step change under different load currents.

[0043] The dynamic response analysis unit is used to determine the dynamic response performance characteristic coefficients of the parallel system based on the maximum response time difference value and the average response time difference value corresponding to each voltage regulator, and in combination with the difference between the maximum response time and the minimum response time.

[0044] In conjunction with the first aspect above, in some possible implementations, the test result generation module includes:

[0045] An adjustment amplitude determination unit is used to determine the adjustment amplitude based on the dynamic response performance characteristic coefficients.

[0046] A current sharing performance characteristic correction unit is used to determine the sum of the current sharing performance characteristic value and the adjustment amplitude as the corrected current sharing performance characteristic value;

[0047] The parallel test performance level identification unit is used to determine the parallel test performance result of the parallel system based on the magnitude of the corrected current sharing performance characteristic value.

[0048] Secondly, the present invention also provides a parallel testing method for a digital low-dropout linear regulator, the method comprising:

[0049] Acquire test data of the parallel system consisting of each voltage regulator connected in parallel. The test data includes the output current of each voltage regulator under different load currents and the response current when a step change occurs under different load currents.

[0050] Based on the differences in the output current of each voltage regulator under the same load current, the current sharing error of each voltage regulator under different load currents is determined.

[0051] Based on the distribution of current sharing error of each voltage regulator under different load currents, the characteristic value of current sharing performance of the parallel system is determined.

[0052] Based on the distribution of response time of each voltage regulator when it makes a step change under different load currents, the dynamic response performance characteristic coefficients of the parallel system are determined.

[0053] The current sharing performance characteristic value is corrected using the dynamic response performance characteristic coefficient, and the parallel test result of the parallel system is determined based on the corrected current sharing performance characteristic value.

[0054] Thirdly, the present invention also provides a parallel testing device for a digital low-dropout linear regulator, including a memory and a processor. The memory is used to store executable computer program code, and the processor is used to call and run the executable computer program code from the memory, causing the device to perform the steps implemented by the modules in the first aspect or any possible implementation of the first aspect.

[0055] Fourthly, the present invention also provides a computer program product comprising: computer program code, which, when run on a computer, causes the computer to perform the steps implemented by the modules in the first aspect or any possible implementation thereof.

[0056] Fifthly, the present invention also provides a computer-readable storage medium storing computer program code that, when executed on a computer, causes the computer to perform the steps implemented by the modules in the first aspect or any possible implementation thereof.

[0057] This invention offers the following advantages: It determines the current-sharing error of each voltage regulator under different load currents by considering the differences in their output currents under the same load current. Then, based on the distribution of these errors, the current-sharing performance of the parallel system is evaluated, yielding characteristic values ​​for the parallel system's current-sharing performance. Simultaneously, based on the distribution of the response time of each voltage regulator during step changes under different load currents, the dynamic response performance of the parallel system is evaluated, yielding characteristic coefficients for the dynamic response performance. Finally, the characteristic coefficients are used to correct the current-sharing performance characteristic values, and the parallel test results of the parallel system are determined based on these corrected values. By considering the mutual influence of multiple voltage regulators connected in parallel, this invention analyzes the current-sharing performance and dynamic response performance of the parallel system, ultimately obtaining corrected characteristic values ​​for the current-sharing performance. This accurately reflects the reliability and stability of multiple voltage regulators in a parallel system, thus enabling a more comprehensive, accurate, and efficient test of the performance of a parallel system of digital low-dropout linear regulators. Attached Figure Description

[0058] To more clearly illustrate the technical solutions and advantages in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0059] Figure 1 This is a schematic diagram of the structure of a parallel test system for a digital low-dropout linear regulator according to an embodiment of the present invention;

[0060] Figure 2 This is a schematic diagram of the flow equalization error analysis module according to an embodiment of the present invention;

[0061] Figure 3 This is a schematic diagram of the flow equalization performance analysis module according to an embodiment of the present invention;

[0062] Figure 4 This is a schematic diagram of the dynamic response performance analysis module according to an embodiment of the present invention;

[0063] Figure 5 This is a schematic diagram of the test result generation module according to an embodiment of the present invention;

[0064] Figure 6 This is a flowchart illustrating the steps of a parallel testing method for a digital low-dropout linear regulator according to an embodiment of the present invention. Detailed Implementation

[0065] To clearly illustrate the technical features of this solution, the invention will be described in detail below through specific embodiments and in conjunction with the accompanying drawings.

[0066] Embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. While some embodiments of the invention are shown in the drawings, it should be understood that the invention can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the invention. It should be understood that the accompanying drawings and embodiments are for illustrative purposes only and are not intended to limit the scope of protection of the invention.

[0067] It should be understood that the various steps described in the method embodiments of the present invention may be performed in different orders and / or in parallel. Furthermore, the method embodiments may include additional steps and / or omit the steps shown. The scope of the present invention is not limited in this respect.

[0068] The term "comprising" and its variations as used herein are open-ended inclusions, meaning "including but not limited to". The term "based on" means "at least partially based on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments". Definitions of other terms will be given in the description below.

[0069] It should be noted that the concepts of "first" and "second" mentioned in this invention are only used to distinguish different devices, modules or units, and are not used to limit the order of functions performed by these devices, modules or units or their interdependencies.

[0070] Although operations or steps are described in a specific order in the accompanying drawings in the embodiments of the present invention, this should not be construed as requiring these operations or steps to be performed in the specific order or serial order shown, or requiring all of the shown operations or steps to be performed to obtain the desired result. In the embodiments of the present invention, these operations or steps may be performed serially; they may be performed in parallel; or a portion of these operations or steps may be performed.

[0071] Furthermore, it is understood that the data involved in the technical solutions of this invention (including but not limited to the data itself, the acquisition or use of the data) shall comply with the requirements of relevant laws, regulations and related provisions. Unless otherwise defined, all technical and scientific terms used in this invention have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains, and all parameters or indicators in the formulas involved in this invention are normalized values ​​that have eliminated the influence of dimensions.

[0072] To address the problem that existing parallel testing methods often focus on the performance indicators of a single voltage regulator, making it difficult to accurately evaluate the overall performance of the parallel system under different operating conditions, this invention provides a parallel testing system for a digital low-dropout linear voltage regulator. This system is essentially a software system, composed of modules that implement corresponding functions, as illustrated in the structural diagram below. Figure 1 As shown. The core of this system lies in implementing a parallel testing method for digital low-dropout linear regulators. Each module in the system corresponds to a step in the method, and the corresponding flowchart is shown below. Figure 2 As shown in the diagram. The following section provides a detailed description of each module of the system, following the specific steps of this method.

[0073] The test data acquisition module 100 is used to acquire test data of the parallel system composed of each voltage regulator connected in parallel. The test data includes the output current of each voltage regulator under different load currents and the response current when switching under different load currents.

[0074] Multiple identical digital low-dropout linear regulators to be tested are connected in parallel according to design requirements to form a parallel system. The parallel system is then tested to obtain test data. This test data includes the output current of each regulator under different load currents, and the response current of each regulator when switching load currents under different load currents.

[0075] In a specific example, to test a parallel system, the devices are first connected. The specific implementation process includes:

[0076] A high-precision DC power supply was selected to ensure its output voltage was stable and met the test requirements. The positive terminal of the DC power supply's output was connected to the common input terminal of each parallel regulator in the parallel system, and the negative terminal was connected to the ground terminal. This ensured that the DC power supply's output voltage was set to the rated input voltage range of the digital regulator. The input terminal of the electronic load was connected to the common output terminal of the parallel regulators, and the ground terminal of the electronic load shared a common ground with the DC power supply's ground terminal.

[0077] A high-precision current sampling resistor is connected in series in the output circuit of each voltage regulator. A digital multimeter's current measurement mode is connected across this resistor to measure the output current of each regulator. An oscilloscope channel is connected to the output of each regulator to observe and record the voltage waveform, thus obtaining the response time of each regulator's output voltage when it stabilizes after a sudden load change. Data acquisition equipment is connected to the oscilloscope and multimeter for automatic data acquisition and recording.

[0078] Secondly, based on the connected devices, data is collected to obtain test data. The specific implementation process includes:

[0079] Set a load variation mode on the electronic load. For example, set the load current to gradually increase from 0A to the rated load current in 0.1A increments. First, set the electronic load current to 0A. After the circuit stabilizes, read the output current value of each voltage regulator. Then, gradually increase the load current of the electronic load in 0.1A increments. After each increase, wait for the circuit to stabilize and record the output current value of each voltage regulator. Repeat the above steps until the load current reaches the rated load current.

[0080] Set a step change in the load on the electronic load, for example, jump from 0.2 times the rated load current to the rated load current, and then jump from the rated load current back to 0.2 times the rated load current. Repeat different load step changes and record the response time (i.e., the time interval between the start of the load step change and the time when it reaches a steady state) for different load step changes.

[0081] The current sharing error analysis module 200 is used to determine the current sharing error of each voltage regulator under different load currents based on the difference in the output current of each voltage regulator under the same load current.

[0082] In parallel systems of multiple digital low-dropout linear regulators, current sharing among the regulators is crucial. Under normal circumstances, when multiple regulators are connected in parallel, the current distribution is uniform, the output current of each regulator is approximately equal, and the deviations are within a small error range. Furthermore, the current sharing error remains relatively stable under different loads. However, when the parallel system has poor performance, such as uneven heat dissipation or unreasonable circuit design, the current distribution among the regulators becomes uneven, resulting in significant fluctuations under different loads and a lack of stable current sharing performance. Therefore, the current sharing error of each regulator under different load currents is first determined based on the current distribution of each regulator under different load conditions, thereby determining the current sharing performance of the parallel system composed of multiple regulators.

[0083] Furthermore, such as Figure 2 As shown, the current sharing error analysis module 200 includes a reference output current acquisition unit 201 and a current sharing error analysis unit 202, specifically:

[0084] The reference output current acquisition unit 201 is used to determine the reference output current under each load current based on the distribution of the output current of each regulator under each load current.

[0085] In the reference output current acquisition unit 201, the output current of each stabilizer under any load current is acquired, and then the average output current of all stabilizers under that arbitrary load current is calculated. This average output current is then used as the reference output current and denoted as . In this way, the reference output current of the parallel system composed of each voltage regulator can be determined under various load currents.

[0086] The current sharing error analysis unit 202 is used to determine the current sharing error of each regulator under each load current based on the difference between the output current of each regulator under each load current and the reference output current.

[0087] In the current sharing error analysis unit 202, under any load current, the output current of each voltage regulator is compared with the reference output current. The smaller the difference between the output current and the reference output current, the smaller the current sharing error. Thus, the current sharing error of each voltage regulator is determined. In the formula: This represents the current sharing error of the i-th voltage regulator under each load current; This represents the output current of the i-th voltage regulator under each load current; This represents the reference output current under each load current.

[0088] Using the above method, the current sharing error of each voltage regulator under each load current can be determined.

[0089] The current sharing performance analysis module 300 is used to determine the current sharing performance characteristic value of the parallel system based on the distribution of current sharing error of each voltage regulator under different load currents.

[0090] In a parallel system composed of different voltage regulators, different load conditions will produce different current demands and electrical characteristics. The output current of each voltage regulator will change with the load. When the current sharing performance of the same voltage regulator under different load conditions can always remain within a small and relatively stable range, it indicates that the voltage regulator has good adaptability to different loads, and the current sharing performance of the parallel system is relatively stable. Stable current sharing ensures that each voltage regulator can operate under a relatively balanced current under various load conditions, avoiding some voltage regulators from being overloaded due to excessive current or not fully functioning due to insufficient current. Therefore, it is necessary to accurately evaluate the current sharing performance of the parallel system based on the current sharing error of each voltage regulator under different loads.

[0091] Furthermore, such as Figure 3 As shown, the current sharing performance analysis module 300 includes a current distribution uniformity analysis unit 301, a full-load current sharing characteristic analysis unit 302, and a current sharing performance feature analysis unit 303, specifically:

[0092] The current distribution uniformity analysis unit 301 is used to determine the current distribution uniformity of the parallel system under any load current based on whether the current sharing error exceeds the reference range.

[0093] Generally, the current sharing error of voltage regulators is usually controlled within the reference range, such as ±5%. Therefore, the uniformity of current distribution in a parallel system under any load current can be determined by whether the current sharing error of each voltage regulator under any load exceeds the reference range. For example, under a certain load current, if the current sharing errors of most voltage regulators are within the reference range, it indicates that the current distribution uniformity of the parallel system under that load current is relatively high.

[0094] Furthermore, the aforementioned current distribution uniformity analysis unit 301 is configured to: under any load current, identify the target voltage regulator whose current sharing error exceeds the reference range, and the extent to which the current sharing error of the target voltage regulator exceeds the reference range; under any load current, determine the consistency of current sharing error based on the consistent distribution of current sharing errors of all voltage regulators whose current sharing errors do not exceed the reference range; and determine the current distribution uniformity of the parallel system under any load current based on the number of target voltage regulators, the extent to which the current sharing error exceeds the reference range, and the consistency of current sharing error.

[0095] In a specific example, in the current distribution uniformity analysis unit 301, firstly, since the current sharing error is generally controlled within ±5%, the reference range for the current sharing error under any load current is... , where the left endpoint right endpoint , This represents the reference output current under any load current.

[0096] Secondly, under any load current, determine whether the current sharing error of each voltage regulator is within its reference range. If it is not within the reference range, mark the voltage regulator as the target voltage regulator. Count the number of all target voltage regulators under each load current and record it as b. The higher the value of b, the more voltage regulators in the parallel system have current sharing errors that exceed the reference range, and the lower the reliability of the parallel system.

[0097] Next, under arbitrary load current, the extent to which the current sharing error of each target regulator exceeds the reference range is determined, and this extent is denoted as c. Wherein, when the current sharing error of the target regulator exceeds the right endpoint... At that time, its excess degree When the current sharing error of the target voltage regulator is less than the left endpoint At that time, its excess degree .

[0098] Then, under any load current, for all regulators within the reference range (i.e., all regulators whose current sharing error does not exceed the reference range), calculate the variance of all current sharing errors A, and denote this variance as... This will further reduce the variance The negative correlation mapping result is used as the consistency of current sharing error. The smaller the variance, the more stable and consistent the current sharing error of all regulators within the reference range, and the larger the corresponding value of the current sharing error consistency.

[0099] Finally, the uniformity of current distribution exhibited by the parallel system under any load current was determined: In the formula: B represents the uniformity of current distribution in the parallel system under any load current; b represents the number of target voltage regulators in the parallel system under any load current. This indicates the consistency of current sharing error in a parallel system under any load current. This represents the variance of the current sharing error of all regulators within the reference range under any load current. This represents the maximum extent to which the current sharing error of all target voltage regulators exceeds the reference range under any load current, i.e., the maximum extent to which all target voltage regulators exceed the reference range. , and All of these represent denominator correction parameters, used to prevent the denominator from being zero. They can be set appropriately as needed; no restrictions are set here. =0.5, =0.001, =0.001. Among them, the fewer the target voltage regulators, the smaller the extent to which their current sharing error exceeds the reference range, and the more consistent the current sharing errors of the voltage regulators within the reference range, the more uniform the current distribution of the parallel system under this load, and the larger the value of the current distribution uniformity B.

[0100] Using the same method, the uniformity of current distribution in a parallel system under any load current can be determined.

[0101] The full load current sharing characteristic analysis unit 302 is used to determine the full load current sharing characteristic value of the parallel system based on the distribution difference of the current distribution uniformity.

[0102] Under normal circumstances, the current distribution uniformity of a parallel system under different loads should be approximately uniform. Therefore, the differences in the distribution uniformity of current distribution under different load currents are analyzed to determine the full-load current sharing characteristic value of the parallel system.

[0103] Furthermore, the aforementioned full-load current sharing characteristic analysis unit 302 is configured to: cluster all the current distribution uniformity to obtain several clusters; and determine the full-load current sharing characteristic value of the parallel system based on the number of clusters and the distribution of the current distribution uniformity in the clusters.

[0104] In the full-load current sharing characteristic analysis unit 302, a clustering algorithm, such as DBSCAN (Density-Based Spatial Clustering of Applications with Noise), is used to cluster the current distribution uniformity of the parallel system under different loads obtained in the current distribution uniformity analysis unit 301, dividing all current distribution uniformity into several clusters. The full-load current sharing characteristic value of the parallel system is determined by the distribution of the number of current distribution uniformity values ​​within each cluster. For example, the fewer the number of clusters and the larger the full-load current sharing characteristic value in each cluster, the higher the full-load current sharing characteristic of the parallel system, and the larger the corresponding full-load current sharing characteristic value.

[0105] Further, determining the full-load current sharing characteristic value of the parallel system includes: determining the average value of the current distribution uniformity in all the clusters to obtain the average value of the current distribution uniformity; determining the maximum value among the number of current distribution uniformities in all the clusters to obtain the maximum number; determining the ratio of the maximum number to the number of current distribution uniformities in all the clusters to obtain the quantity proportion; and determining the full-load current sharing characteristic value of the parallel system based on the number of clusters, the average value of the current distribution uniformity, and the quantity proportion.

[0106] In a specific example, for several clusters obtained by dividing the current distribution uniformity corresponding to different load currents, the number of current distribution uniformity levels B contained in each cluster is determined. Then, the number of current distribution uniformity levels B in the cluster with the most B is determined to obtain the maximum number. The average value of all current distribution uniformity levels in all clusters is then determined to obtain the mean value of current distribution uniformity. Finally, the full load current sharing characteristics of the parallel system are determined. In the formula: C represents the full load current sharing characteristic value of the parallel system; d represents the mean of all current distribution uniformity B, i.e., the mean of current distribution uniformity; d represents the number of all clusters; e represents the number of current distribution uniformity B values ​​in the cluster with the most values ​​of current distribution uniformity B. This represents the number of current distribution uniformity levels B in all clusters. The fewer the number of clusters, the larger the proportion of current distribution uniformity level B in the cluster containing the most B values ​​indicates, meaning the current distribution uniformity under all loads is more consistent. Furthermore, a larger current distribution uniformity level B1 indicates better full-load current sharing characteristics of the parallel system, corresponding to a larger full-load current sharing characteristic value C.

[0107] The current sharing performance characteristic analysis unit 303 is used to determine the current sharing performance characteristic value of the parallel system based on the full load current sharing characteristic value and the change of current sharing error of each voltage regulator under different load currents.

[0108] A higher full-load current sharing characteristic indicates better current sharing performance of each voltage regulator in the parallel system. Simultaneously, if the current sharing error of each voltage regulator in the parallel system remains relatively stable under varying load currents, it indicates strong stability in the overall current sharing performance of the parallel system, reflecting its strong current sharing capability. Therefore, based on the full-load current sharing characteristic value of the parallel system, and by analyzing the variation of the current sharing error of each voltage regulator under different load currents, the characteristic value of the current sharing performance of the parallel system is determined.

[0109] Furthermore, the aforementioned current sharing performance characteristic analysis unit 303 is configured to: determine the variation of the current sharing error of the same voltage regulator under adjacent load currents, and determine the rate of change of the current sharing error of each voltage regulator; under any load current, mark the voltage regulator whose current sharing error exceeds the reference range as the target voltage regulator, and then determine the number of times each voltage regulator is marked as the target voltage regulator; based on the full load current sharing characteristic value, and combined with the variation of the rate of change of the current sharing error of each voltage regulator, the number of times each voltage regulator is marked as the target voltage regulator, and the distribution level of the current sharing error of each voltage regulator, determine the current sharing performance characteristic value of the parallel system.

[0110] In the current sharing performance characteristic analysis unit 303, for any voltage regulator in the parallel system, its current sharing error under different load currents is obtained, and the current sharing errors are sorted in ascending order of load current to obtain the current sharing error sequence of the voltage regulator. The rate of change of current sharing error between adjacent load currents in the current sharing error sequence is calculated. In the formula: and These represent the (i+1)th and ith current sharing errors in the current sharing error sequence of the voltage regulator, respectively. and They represent and Corresponding load current. Rate of change of current sharing error. The larger the value, the greater the change in current sharing error. This indicates that even a small change in the load current will cause a significant change in the current sharing error, meaning that the current sharing performance is more sensitive to load changes and has poor stability. The rate of change of current sharing error... The smaller the value, the lower the sensitivity of the voltage regulator's current sharing performance to load changes, and the better its stability.

[0111] Following the above method, multiple current sharing error change rates for each voltage regulator can be obtained. The better the full-load current sharing characteristics of the parallel system, and the more stable the current sharing error change rate of each voltage regulator is across the entire load variation range, the fewer times each voltage regulator is marked as a target voltage regulator, and the lower the current sharing error of each voltage regulator, the more stable the current sharing performance of the voltage regulators. Therefore, based on the full-load current sharing characteristics of the parallel system, combined with the changes in the current sharing error change rate of each voltage regulator, the number of times each voltage regulator is marked as a target voltage regulator, and the distribution level of the current sharing error of each voltage regulator, the characteristic values ​​of the current sharing performance of the parallel system can be determined.

[0112] Further, determining the current sharing performance characteristic value of the parallel system includes: performing linear fitting on the rate of change of current sharing error of each voltage regulator to obtain the slope of the fitted line for each voltage regulator; determining the average value of all current sharing errors of each voltage regulator to obtain the mean value of current sharing error for each voltage regulator; determining the current sharing performance stability of each voltage regulator based on the slope of the fitted line and the mean value of current sharing error of each voltage regulator, as well as the number of times each voltage regulator is marked as a target voltage regulator; and determining the current sharing performance characteristic value of the parallel system based on the full-load current sharing characteristic value and in combination with the distribution level of the current sharing performance stability of each voltage regulator.

[0113] In a specific example, firstly, for the multiple current sharing error change rates of the arbitrary voltage regulator determined above, these current sharing error change rates are arranged in ascending order of load current, thus obtaining a sequence of current sharing error change rates for the arbitrary voltage regulator. A linear fit is then performed on the sequence of variable current sharing error change rates, with the load current change as the abscissa and the current sharing error change rate as the ordinate. If the obtained fitted line is close to a straight line, i.e., the slope of the fitted line is close to 0, it indicates that the current sharing error change rate is relatively stable throughout the entire load variation range and does not change with load variations, indicating that the current sharing performance of the voltage regulator is more stable.

[0114] Next, based on the slope of the fitted line of each voltage regulator, the average value of all current sharing errors of each voltage regulator, and the number of times each voltage regulator was marked as the target voltage regulator, the stability of the current sharing performance of each voltage regulator is determined: In the formula: Indicates the first The stability of the current sharing performance of the voltage regulator; Indicates the first The average current sharing error of the voltage regulator under all loads. The smaller the value, the better the overall current sharing performance of the voltage regulator under different loads, and the more balanced the current distribution. Indicates the first The number of times the voltage regulator is considered the target voltage regulator under all load currents is recorded. The smaller the value, the more normal the current sharing performance of the voltage regulator; Indicates the first The current sharing error of the voltage regulator corresponds to the slope of the fitted straight line; This represents an exponential function with the natural constant e as the base. and These are all denominator correction parameters, used to prevent the denominator from being zero. They can be set appropriately as needed; there are no restrictions here. =0.001, =0.5.

[0115] Furthermore, based on the full-load current sharing characteristic value of the parallel system, and combined with the distribution level of the current sharing performance stability of each voltage regulator, the current sharing performance characteristic value of the parallel system is determined: In the formula: D represents the current sharing performance characteristic value of the parallel system; C represents the full-load current sharing characteristic value of the parallel system; This represents the average value of the current sharing performance stability of all voltage regulators in a parallel system; This represents a normalization function used to normalize values ​​to the range [0,1]. The larger the value, the larger the normalization result.

[0116] The dynamic response performance analysis module 400 is used to determine the dynamic response performance characteristic coefficients of the parallel system based on the distribution of the response time of each voltage regulator when it makes a step change under different load currents.

[0117] In parallel systems of digital low-dropout linear regulators, dynamic response speed is a crucial factor affecting the current-sharing performance of the regulators. When the load in the parallel system undergoes a sudden change, regulators with fast dynamic response speeds can quickly adjust their output current to adapt to the change in load current. A fast dynamic response speed ensures that the system can quickly adapt to load changes. If some regulators have slow dynamic response speeds and cannot keep up with the current adjustment speed of other regulators during load changes, it will lead to a momentary imbalance in current distribution, increased current-sharing error, and deteriorated current-sharing performance. Therefore, it is necessary to further refine the performance of the entire parallel system based on the dynamic response of each regulator in the parallel system.

[0118] Furthermore, such as Figure 4As shown, the dynamic response performance analysis module 400 includes a response time group acquisition unit 401, a response time difference analysis unit 402, a response time filtering unit 403, and a dynamic response analysis unit 404. Specifically:

[0119] The response time group acquisition unit 401 is used to determine a set of response times when a step transition occurs between the target load current and the rated load current, from the response times of each regulator when a step transition occurs under different load currents. The target load current is any load current that is not equal to the rated load current.

[0120] In the response time group acquisition unit 401, two step transitions—one from different load currents to the rated load current, and the other from the rated load current to a different load current—are grouped together. For example, a transition from 0.2 times the rated load current to the rated load current, and then from the rated load current to 0.2 times the rated load current, constitutes one group. Each group contains two load adjustments, corresponding to two response times. Therefore, from the response currents of each voltage regulator when transitioning under different load currents, a set of response times for transitions between any load current and the rated load current can be determined. In this case, one set of response times includes two response times. Following this method, multiple sets of response times between different load currents and the rated load current can be obtained.

[0121] The response time difference analysis unit 402 is used to determine the response time difference value between any two response times in the set of response times, and to determine the maximum response time difference value and the average response time difference value of each voltage regulator under all load currents.

[0122] In the response time difference analysis unit 402, for any voltage regulator in the parallel system, the two response times within any set of response times are calculated. and Response time difference value The closer the response times of the two voltage regulators within the same group, the more consistent their response times are during the adjustment from low load to high load and from high load to low load, indicating better dynamic response.

[0123] Furthermore, for each voltage regulator, the maximum response time difference value is determined for the response time difference value under all load currents, and the average value of all response time difference values ​​is determined to obtain the average response time difference value. Thus, the maximum response time difference value and the average response time difference value of each voltage regulator under all load currents are obtained.

[0124] The response time filtering unit 403 is used to determine the maximum and minimum response times of each voltage regulator when it makes a step change under different load currents.

[0125] In the response time screening unit 403, the maximum and minimum values ​​of the response time of each voltage regulator under different load changes, i.e., the response time when the rated load current jumps from different multiples to the rated load current, are determined and used as the maximum and minimum response times, respectively. The minimum response time represents the fastest response speed of the voltage regulator under the most ideal load change conditions, while the maximum response time reflects the slowest response speed under certain unfavorable load change amplitudes.

[0126] The dynamic response analysis unit 404 is used to determine the dynamic response performance characteristic coefficient of the parallel system based on the maximum response time difference value and the average response time difference value corresponding to each voltage regulator, and in combination with the difference between the maximum response time and the minimum response time.

[0127] In the dynamic response analysis unit 404, the dynamic response performance characteristic coefficient of the parallel system is determined based on the maximum and average response time differences of each voltage regulator, combined with the differences between the maximum and minimum response times. Specifically, the larger the values ​​of the maximum and average response time differences of each voltage regulator, and the greater the difference between the maximum and minimum response times, the smaller the corresponding dynamic response performance characteristic coefficient of the parallel system.

[0128] In a specific example, based on the maximum and average response time differences for each regulator, as well as the difference between the maximum and minimum response times, the dynamic response characteristic values ​​for each regulator are determined: In the formula: F represents the dynamic response characteristic value corresponding to each voltage regulator; This represents the difference in average response time among the various voltage regulators. This indicates the maximum difference in response time for each voltage regulator. The larger the value, the more significantly the response time of the voltage regulator is affected by the load change, and the less ideal the dynamic response characteristics of the voltage regulator are. Conversely, the smaller the value, the better the dynamic response, and the larger the corresponding dynamic response performance characteristic coefficient F. This represents the difference between the maximum and minimum response times for each voltage regulator. , and All of these represent denominator correction parameters, used to prevent the denominator from being 0. They can be set appropriately according to specific circumstances; no restrictions are imposed here. For example, setting... .

[0129] Furthermore, the dynamic response characteristic value F of any voltage regulator in the parallel system is normalized to... Within the range, the normalized value is obtained. And the normalized value of the dynamic response characteristic value F of all voltage regulators in the parallel system. The average value is calculated and used as the dynamic response performance characteristic coefficient of the parallel system, which is used to represent the overall dynamic response characteristics of the parallel system.

[0130] The test result generation module 500 is used to correct the current sharing performance characteristic value using the dynamic response performance characteristic coefficient, and to determine the parallel test result of the parallel system based on the corrected current sharing performance characteristic value.

[0131] In the test result generation module 500, the current sharing performance characteristic value of the parallel system is corrected based on the dynamic response performance characteristic coefficient of the parallel system, resulting in the corrected current sharing performance characteristic value. The larger the value of the dynamic response performance characteristic coefficient, the larger the corresponding corrected current sharing performance characteristic value.

[0132] Furthermore, such as Figure 5 As shown, the test result generation module 500 includes an amplitude adjustment determination unit 501, a current sharing performance characteristic correction unit 502, and a parallel test performance level identification unit 503. Specifically:

[0133] The adjustment amplitude determination unit 501 is used to determine the adjustment amplitude based on the dynamic response performance characteristic coefficient;

[0134] The current sharing performance characteristic correction unit 502 is used to determine the sum of the current sharing performance characteristic value and the adjustment amplitude as the corrected current sharing performance characteristic value;

[0135] The parallel test performance level identification unit 503 is used to determine the parallel test performance result of the parallel system based on the magnitude of the corrected current sharing performance characteristic value.

[0136] In a specific example, the current sharing performance characteristic value of the parallel system is corrected using the dynamic response performance characteristic coefficient of the parallel system, resulting in the corrected current sharing performance characteristic value: In the formula: This represents the corrected characteristic value of the flow sharing performance; The characteristic coefficients representing the dynamic response performance of a parallel system; This indicates the adjustment range. The better the dynamic response characteristics, the larger the current sharing performance characteristic value should be, and vice versa.

[0137] After obtaining the corrected flow uniformity characteristic value Then, based on the corrected flow sharing performance characteristic value To determine the parallel test results of the parallel system, a performance characteristic threshold is preset, such as setting the performance characteristic threshold to 0.6. When the corrected current sharing performance characteristic value... If the value is greater than 0.6, it indicates that the current sharing performance and dynamic response performance of the parallel system are good. In this case, the parallel test performance of the parallel system is deemed to meet the requirements. Otherwise, the parallel test performance of the parallel system is deemed not to meet the requirements.

[0138] In the parallel test system of the aforementioned digital low-dropout linear regulator, by considering the mutual influence of multiple regulators connected in parallel, the current sharing performance and dynamic response performance of the parallel system are analyzed. Finally, the corrected current sharing performance characteristic value of the parallel system is obtained, which accurately reflects the reliability and stability of multiple regulators in the parallel system. This allows for a more comprehensive, accurate, and efficient test of the performance of the digital low-dropout linear regulator parallel system, meeting the needs of product development and quality control. It also helps to gain a deeper understanding of the parallel system's performance under different operating conditions, promptly identify performance defects, optimize product design, improve product quality, effectively reduce the failure rate in practical applications, and ensure the reliability of its quality.

[0139] Based on the same inventive concept, embodiments of the present invention also provide a parallel testing method for digital low-dropout linear regulators, such as... Figure 6 As shown, the method includes:

[0140] Acquire test data of the parallel system consisting of each voltage regulator connected in parallel. The test data includes the output current of each voltage regulator under different load currents and the response current when a step change occurs under different load currents.

[0141] Based on the differences in the output current of each voltage regulator under the same load current, the current sharing error of each voltage regulator under different load currents is determined.

[0142] Based on the distribution of current sharing error of each voltage regulator under different load currents, the characteristic value of current sharing performance of the parallel system is determined.

[0143] Based on the distribution of response time of each voltage regulator when it makes a step change under different load currents, the dynamic response performance characteristic coefficients of the parallel system are determined.

[0144] The current sharing performance characteristic value is corrected using the dynamic response performance characteristic coefficient, and the parallel test result of the parallel system is determined based on the corrected current sharing performance characteristic value.

[0145] Based on the same inventive concept, embodiments of the present invention also provide a parallel testing device for a digital low-dropout linear regulator. The device includes: a memory, a processor, and computer program code stored in the memory and running on the processor. When the processor executes the computer program code, the device can perform the steps implemented by each module in any of the parallel testing systems for digital low-dropout linear regulators described above.

[0146] In this embodiment of the invention, the device can be divided into functional modules based on the steps implemented by each module in the above system. For example, each module can correspond to a specific function, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware. It should be noted that the module division in this embodiment is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods.

[0147] Based on the same inventive concept, embodiments of the present invention also provide a computer program product, which includes: computer program code, which, when run on a computer, causes the computer to execute the steps implemented by each module in any of the parallel test systems of the aforementioned digital low-dropout linear regulators.

[0148] Based on the same inventive concept, embodiments of the present invention also provide a computer-readable storage medium storing computer program code. When the computer program code is run on a computer, it causes the computer to execute the steps implemented by each module in the parallel test system of any of the aforementioned digital low-dropout linear regulators.

[0149] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A parallel testing system for a digital low-dropout linear regulator, characterized in that, The system includes: The test data acquisition module is used to acquire test data of the parallel system composed of each voltage regulator connected in parallel. The test data includes the output current of each voltage regulator under different load currents and the response current when a step change occurs under different load currents. The current sharing error analysis module is used to determine the current sharing error of each regulator under different load currents based on the difference in the output current of each regulator under the same load current. The current sharing performance analysis module is used to determine the current sharing performance characteristic value of the parallel system based on the distribution of current sharing error of each voltage regulator under different load currents. The dynamic response performance analysis module is used to determine the dynamic response performance characteristic coefficients of the parallel system based on the distribution of the response time of each regulator when it makes a step under different load currents. The test result generation module is used to correct the current sharing performance characteristic value using the dynamic response performance characteristic coefficient, and to determine the parallel test result of the parallel system based on the corrected current sharing performance characteristic value. The dynamic response performance analysis module includes: The response time group acquisition unit is used to determine a set of response times when a step transition occurs between the target load current and the rated load current, from the response times of each regulator when a step transition occurs under different load currents. The target load current is any load current that is not equal to the rated load current. The response time difference analysis unit is used to determine the response time difference value between any two response times in the set of response times, and to determine the maximum response time difference value and the average response time difference value of each voltage regulator under all load currents. The response time filtering unit is used to determine the maximum and minimum response times of each voltage regulator when it makes a step change under different load currents. The dynamic response analysis unit is used to determine the dynamic response performance characteristic coefficients of the parallel system based on the maximum response time difference value and the average response time difference value corresponding to each voltage regulator, and in combination with the difference between the maximum response time and the minimum response time.

2. The parallel testing system for a digital low-dropout linear regulator according to claim 1, characterized in that, The flow equalization error analysis module includes: The reference output current acquisition unit is used to determine the reference output current under each load current based on the distribution of the output current of each regulator under each load current. The current sharing error analysis unit is used to determine the current sharing error of each regulator under each load current based on the difference between the output current of each regulator under each load current and the reference output current.

3. The parallel testing system for a digital low-dropout linear regulator according to claim 1, characterized in that, The current sharing performance analysis module includes: The current distribution uniformity analysis unit is used to determine the current distribution uniformity of the parallel system under any load current based on whether the current sharing error exceeds the reference range. The full-load current sharing characteristic analysis unit is used to determine the full-load current sharing characteristic value of the parallel system based on the distribution difference of the current distribution uniformity. The current sharing performance characteristic analysis unit is used to determine the current sharing performance characteristic value of the parallel system based on the full load current sharing characteristic value and the change of current sharing error of each voltage regulator under different load currents.

4. The parallel testing system for a digital low-dropout linear regulator according to claim 3, characterized in that, The current distribution uniformity analysis unit is configured as follows: Under any load current, identify the target voltage regulator whose current sharing error exceeds the reference range, and the extent to which the current sharing error of the target voltage regulator exceeds the reference range. Under any load current, the consistency of current sharing error is determined based on the consistent distribution of current sharing error of all regulators whose current sharing error does not exceed the reference range. Based on the number of target voltage regulators, the degree of over-limit, and the consistency of current sharing error, the uniformity of current distribution in the parallel system under any load current is determined.

5. The parallel testing system for a digital low-dropout linear regulator according to claim 3, characterized in that, The full-load current sharing characteristic analysis unit is configured as follows: Clustering is performed on all the current distribution uniformity levels to obtain several clusters; Based on the number of clusters and the distribution of the uniformity of current distribution within the clusters, the full-load current sharing characteristic value of the parallel system is determined.

6. The parallel testing system for a digital low-dropout linear regulator according to claim 5, characterized in that, Determine the full-load current sharing characteristics of a parallel system, including: The average value of the current distribution uniformity in all the said clusters is determined to obtain the mean value of the current distribution uniformity; Determine the maximum value among the number of current distribution uniformity levels in all said clusters to obtain the maximum number; The ratio of the maximum number to the number of clusters with uniform current distribution is determined to obtain the proportion of the number. The full-load current sharing characteristic value of the parallel system is determined based on the number of clusters, the average current distribution uniformity, and the proportion of the number clusters.

7. The parallel testing system for a digital low-dropout linear regulator according to claim 3, characterized in that, The current sharing performance characteristic analysis unit is configured as follows: Determine the variation of the current sharing error of the same voltage regulator under adjacent load currents, and determine the rate of change of the current sharing error of each voltage regulator; Under any load current, the regulators whose current sharing error exceeds the reference range are marked as target regulators, and then the number of times each regulator is marked as a target regulator is determined. Based on the full-load current sharing characteristic value, and combined with the changes in the rate of change of current sharing error of each voltage regulator, the number of times each voltage regulator is marked as the target voltage regulator, and the distribution level of the current sharing error of each voltage regulator, the current sharing performance characteristic value of the parallel system is determined.

8. The parallel testing system for a digital low-dropout linear regulator according to claim 7, characterized in that, Determine the current sharing performance characteristic values ​​of a parallel system, including: The slope of the fitted line for each voltage regulator is obtained by performing linear fitting on the rate of change of current sharing error of each voltage regulator. The average value of the current sharing error of each voltage regulator is determined separately to obtain the average value of the current sharing error of each voltage regulator; The stability of the current sharing performance of each voltage regulator is determined based on the slope of the fitted line of each voltage regulator, the mean value of the current sharing error, and the number of times each voltage regulator is marked as the target voltage regulator. Based on the full-load current sharing characteristic value and combined with the distribution level of the current sharing performance stability of each voltage regulator, the current sharing performance characteristic value of the parallel system is determined.

9. The parallel testing system for a digital low-dropout linear regulator according to claim 1, characterized in that, The test result generation module includes: An adjustment amplitude determination unit is used to determine the adjustment amplitude based on the dynamic response performance characteristic coefficients. A current sharing performance characteristic correction unit is used to determine the sum of the current sharing performance characteristic value and the adjustment amplitude as the corrected current sharing performance characteristic value; The parallel test performance level identification unit is used to determine the parallel test performance result of the parallel system based on the magnitude of the corrected current sharing performance characteristic value.

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