Display device, electronic device including the same, and method of manufacturing the display device

Abstract

A display device, an electronic device including the same, and a method of manufacturing the display device are disclosed. The display device includes: a display panel including a plurality of pixels; and an input sensor on the display panel, where the input sensor includes: a first sensor insulating layer on the display panel; a sensor conductive layer on the first sensor insulating layer and including a plurality of conductive patterns; a second sensor insulating layer configured to cover each of the plurality of conductive patterns and including an organic material; and a protective layer on the second sensor insulating layer and including an inorganic material.

Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2024-0065972, filed on May 21, 2024, and Korean Patent Application No. 10-2024-0124161, filed on September 11, 2024, both filed with the Korean Intellectual Property Office, the entire disclosure of each of which is incorporated herein by reference. Technical Field

[0003] Some aspects of embodiments of this disclosure relate to display devices, electronic devices, and methods of manufacturing the display device. Background Technology

[0004] Multimedia devices such as televisions, mobile phones, tablet computers, navigation units, and game consoles include display devices that provide images to users via a screen. The display device may include a display panel that generates the image and input sensors that detect the user's touch.

[0005] Input sensors may include conductors that detect external inputs, and the conductors of input sensors located on the display panel may affect the luminous efficiency of the display device or the external light reflectivity of the display device.

[0006] The information disclosed in this background section is only intended to enhance the understanding of the background art, and therefore the information discussed in this background section does not necessarily constitute prior art. Summary of the Invention

[0007] Some aspects of embodiments of this disclosure relate to display devices, electronic devices, and methods of manufacturing the display device, and, for example, to display devices having relatively improved durability and shock resistance.

[0008] Some aspects of embodiments of this disclosure include a display device having relatively improved durability and shock resistance, and a method of manufacturing the display device.

[0009] According to some embodiments of this disclosure, a display device includes: a display panel including a plurality of pixels; and an input sensor on the display panel. According to some embodiments, the input sensor includes: a first sensor insulating layer on the display panel; a sensor conductive layer on the first sensor insulating layer and including a plurality of conductive patterns; a second sensor insulating layer covering each of the plurality of conductive patterns and including an organic material; and a protective layer on the second sensor insulating layer and including an inorganic material.

[0010] According to some embodiments, the input sensor may further include an intermediate sensor insulating layer that covers at least a portion of the sensor conductive layer.

[0011] According to some embodiments, the sensor conductive layer may include: a first sensor conductive layer on a first sensor insulating layer and including a plurality of first sensor conductive patterns; and a second sensor conductive layer on an intermediate sensor insulating layer and including a plurality of second sensor conductive patterns.

[0012] According to some embodiments, the protective layer may cover each of the plurality of conductive patterns of the second sensor.

[0013] According to some embodiments, the intermediate sensor insulating layer may include inorganic materials.

[0014] According to some embodiments, the intermediate sensor insulating layer may include organic materials.

[0015] According to some embodiments, the display panel may include a first non-foldable region, a foldable region, and a second non-foldable region arranged sequentially in one direction.

[0016] According to some embodiments, the second sensor insulating layer may include melamine resin.

[0017] According to some embodiments, the thickness of the second sensor insulating layer can be approximately 2.5 to approximately 4.5 times the thickness of the sensor conductive layer.

[0018] According to some embodiments, the display device may further include: an anti-reflective layer on the input sensor and including a plurality of color filters and a planarization layer covering the plurality of color filters.

[0019] According to some embodiments, the planarization layer may comprise the same material as the second sensor insulating layer.

[0020] According to some embodiments, the sensor conductive layer can be provided as a single layer. According to some embodiments, the second sensor insulating layer can be directly on the sensor conductive layer.

[0021] According to some embodiments, the display panel may include: a display area, in which a plurality of pixels are located; and a peripheral area adjacent to the display area. According to some embodiments, the peripheral area may include a pad area in which a plurality of pads are located, and the second sensor insulating layer may include pad openings that overlap with the pad area.

[0022] According to some embodiments, the display panel may include a first region, a bent region, and a second region arranged sequentially in one direction. According to some embodiments, the second sensor insulating layer may include a bent opening portion overlapping the bent region.

[0023] According to some embodiments, the display panel may include: a pixel defining film, with an emission opening portion defined in the pixel defining film; a light-emitting element, including at least an emission layer in the emission opening portion; and an encapsulation layer on the light-emitting element and the pixel defining film. A first sensor insulating layer may be directly on the encapsulation layer.

[0024] According to some embodiments of this disclosure, an electronic device includes: a display panel including a plurality of pixels; an input sensor on the display panel; and a housing housing the display panel and the input sensor. According to some embodiments, the input sensor includes: a first sensor insulating layer on the display panel; a sensor conductive layer on the first sensor insulating layer and including a plurality of conductive patterns; a second sensor insulating layer directly on the plurality of conductive patterns and including a low-temperature curable organic material; and a protective layer on the second sensor insulating layer.

[0025] According to some embodiments, the thickness of the second sensor insulating layer can be approximately 2.5 to approximately 4.5 times the thickness of the sensor conductive layer.

[0026] According to some embodiments of this disclosure, a method of manufacturing a display device includes: preparing a display panel comprising a plurality of pixels; and forming an input sensor on the display panel. According to some embodiments, forming the input sensor includes: forming a first sensor insulating layer on the display panel; forming a sensor conductive layer comprising a plurality of conductive patterns on the first sensor insulating layer; providing an organic composition to cover each of the plurality of conductive patterns; curing the organic composition to form a second sensor insulating layer; and depositing an inorganic material onto the second sensor insulating layer to form a protective layer.

[0027] According to some embodiments, the method of manufacturing a display device may further include: forming an antireflective layer on an input sensor comprising a plurality of color filters and a planarization layer covering the plurality of color filters. According to some embodiments, the planarization layer may be formed from the same material as the organic composition.

[0028] According to some embodiments, the curing of the organic composition can be performed at a temperature below approximately 100°C. Attached Figure Description

[0029] The accompanying drawings are included to provide a further understanding of embodiments according to this disclosure and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the inventive concept and, together with the description, serve to explain the principles of the inventive concept. In the drawings:

[0030] Figures 1A to 1C Each is a perspective view of an electronic device (or electronic apparatus) according to some embodiments of the present disclosure;

[0031] Figure 2AThis is an exploded perspective view of an electronic device according to some embodiments of the present disclosure;

[0032] Figure 2B This is a block diagram of an electronic device according to some embodiments of the present disclosure;

[0033] Figure 3 This is a plan view of a display panel according to some embodiments of the present disclosure;

[0034] Figure 4 This is a cross-sectional view of a display module according to some embodiments of the present disclosure;

[0035] Figure 5 This is a cross-sectional view of a portion of a display module according to some embodiments of the present disclosure;

[0036] Figure 6 This is a cross-sectional view of a display device according to some embodiments of the present disclosure;

[0037] Figure 7 This is a plan view of an input sensor according to some embodiments of the present disclosure;

[0038] Figures 8A to 8D Each is a cross-sectional view of an input sensor according to some embodiments of the present disclosure;

[0039] Figure 9 This is a plan view of a portion of a display panel according to some embodiments of the present disclosure;

[0040] Figure 10 This is a cross-sectional view of some components of a display device according to some embodiments of the present disclosure;

[0041] Figure 11A This is a flowchart of a method for manufacturing a display device according to some embodiments of the present disclosure;

[0042] Figure 11B This is a flowchart of some steps of a method for manufacturing a display device according to some embodiments of the present disclosure; and

[0043] Figures 12A to 12D This is a cross-sectional view of some steps of a method for manufacturing a display device according to some embodiments of the present disclosure. Detailed Implementation

[0044] In this disclosure, it will be understood that when an element (or area, layer, portion, etc.) is referred to as being "on" another element, "connected to" or "attached to" another element, it may be located directly on, directly connected to or directly attached to that other element, or a third element may be located between these elements.

[0045] As used herein, “directly located” can mean that there is no additional layer, membrane, zone, or plate between one part and another, such as a layer, membrane, zone, or plate. For example, “directly located” can mean that two layers or two components are arranged without additional components such as adhesive components.

[0046] The same reference numerals or symbols always refer to the same elements. Additionally, in the drawings, the thickness, proportions, and dimensions of elements are exaggerated for the purpose of effectively describing the technical content. The term "and / or" includes one or more combinations that can be defined by the relevant elements.

[0047] It will be understood that although the terms first, second, etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, a first element may be referred to as a second element without departing from the teachings of this disclosure, and similarly, a second element may be referred to as a first element. As used herein, unless the context clearly indicates otherwise, the singular form is intended to include the plural form as well.

[0048] Additionally, terms such as "below," "under," "above," and "over" are used to explain the relationships between the elements shown in the accompanying drawings. These terms are relative concepts and are interpreted based on the directions shown in the drawings.

[0049] It will be further understood that, when used herein, terms such as “comprising” or “having” indicate the presence of a feature, number, step, operation, element, part or combination thereof stated therein, but do not preclude the presence or addition of one or more other features, numbers, steps, operations, elements, parts or combinations thereof.

[0050] Unless otherwise specified, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It will be further understood that terms (such as those defined in common dictionaries) shall be interpreted as having the same meaning as they have in the context of the relevant field, and shall not be interpreted in an idealized or overly formal sense unless so explicitly defined herein.

[0051] In the following, aspects of some embodiments of the present disclosure will be described in more detail with reference to the accompanying drawings.

[0052] Figures 1A to 1C Each is a perspective view of an electronic device according to some embodiments of the present disclosure. Figure 1A The diagram shows the unfolded state, and Figure 1B and Figure 1C The image shows the folded state.

[0053] Reference Figures 1A to 1C According to some embodiments of this disclosure, an electronic device ED may include a display surface DS defined by a first direction DR1 and a second direction DR2 intersecting the first direction DR1. The electronic device ED can provide an image IM to a user through the display surface DS.

[0054] The display surface DS may include a display area DA and a non-display area NDA surrounding the display area DA (e.g., outside the periphery of the display area DA or outside the coverage area of ​​the display area DA). The display area DA may display an image IM, and the non-display area NDA may not display an image IM. The non-display area NDA may surround the display area DA (e.g., outside the periphery of the display area DA or outside the coverage area of ​​the display area DA). However, embodiments of this disclosure are not limited thereto, and the shapes of the display area DA and the non-display area NDA may be modified.

[0055] The display surface DS may include a sensing area TA. The sensing area TA may be a portion of the display area DA. The sensing area TA has a higher transmittance than other areas of the display area DA. In the following, the other areas of the display area DA besides the sensing area TA may be defined as ordinary display areas.

[0056] For example, visible or infrared light signals can propagate to the sensing area TA. An electronic device ED can use visible light passing through the sensing area TA to capture an external image, or it can use infrared light to determine the proximity of an external object. As an example, Figure 1A The figure illustrates a sensing area TA. However, embodiments of this disclosure are not limited thereto, and multiple sensing areas TA may be provided.

[0057] In the following text, the direction perpendicular (or substantially perpendicular) to the plane defined by the first direction DR1 and the second direction DR2 is defined as the third direction DR3. The third direction DR3 serves as a reference for distinguishing the front and rear surfaces of each component. The terms "in a plane" or "in a plan view" as used herein may be defined as the state when viewed from the third direction DR3 toward the electronic device ED. In the following text, the first direction to the third direction DR1, DR2, and DR3 are directions indicated by the first direction axis to the third direction axis, and are denoted by the same reference numerals or symbols.

[0058] The electronic device ED may include a folded region FA and multiple non-folded regions NFA1 and NFA2. The non-folded regions NFA1 and NFA2 may include a first non-folded region NFA1 and a second non-folded region NFA2. The folded region FA may be located between the first non-folded region NFA1 and the second non-folded region NFA2 in a second direction DR2.

[0059] like Figure 1B As illustrated, the folding region FA can be folded about a folding axis FX parallel to the first direction DR1. The folding region FA has a curvature (e.g., a set or predetermined curvature) and a radius of curvature (e.g., a set or predetermined radius of curvature) R1. The first non-folding region NFA1 and the second non-folding region NFA2 can face each other, and the electronic device ED can be folded inward so that the display surface DS is not exposed to the outside.

[0060] According to some embodiments of this disclosure, the electronic device ED can be folded outward, exposing the display surface DS to the outside. According to some embodiments of this disclosure, the electronic device ED can be provided to repeat the operation from unfolding to inward or outward folding, or vice versa, but is not limited thereto. According to some embodiments of this disclosure, the electronic device ED can be provided to select any one of unfolding, inward folding, and outward folding operations.

[0061] like Figure 1B As illustrated, the distance between the first non-folded region NFA1 and the second non-folded region NFA2 can be the same as (or substantially the same as) twice the radius of curvature R1, or alternatively, as shown in the figure. Figure 1C As shown in the figure, the distance between the first non-folded region NFA1 and the second non-folded region NFA2 can be less than twice the radius of curvature R1. Figure 1B and Figure 1C This is a view based on the display surface DS diagram, and the housing HM that constitutes the appearance of the electronic device ED (see...). Figure 2A They can contact each other in the end regions of the first non-folded region NFA1 and the second non-folded region NFA2.

[0062] Figure 2A This is an exploded perspective view of an electronic device according to some embodiments of the present disclosure. Figure 2B This is a block diagram of an electronic device according to some embodiments of the present disclosure.

[0063] like Figure 2A and Figure 2B As illustrated, the electronic device ED may include a display device DD, an electronic module EM, an electro-optical module ELM, a power module PSM, and a housing HM. According to some embodiments, the electronic device ED may further include a mechanical structure for controlling the folding operation of the display device DD.

[0064] The display device DD generates the image IM and detects external input. The display device DD includes a window WM and a display module DM. The window WM provides the front surface of the electronic device ED. The window WM will be described in detail later.

[0065] The display module (DM) may include at least the display panel (DP). Figure 2A The illustration only shows the display panel DP of the stacked structure of the display module DM, but the display module DM may further include multiple components located above the display panel DP. The stacked structure of the display module DM will be described in detail later.

[0066] The display panel DP is not particularly limited and can be an emitting display panel such as an organic light-emitting display panel or a quantum dot light-emitting display panel. The display panel DP can be a display panel that includes ultra-small light-emitting elements such as micron LEDs or nano LEDs.

[0067] The display panel DP includes the display area DA, which is connected to the electronic device ED (see...). Figure 1A ) and non-display area NDA (see Figure 1A The corresponding display area DP-DA and non-display area DP-NDA. In this disclosure, when "a zone / part corresponds to another zone / part", it means that these zones / parts overlap with each other, and is not limited to the meaning that these zones / parts have the same surface area.

[0068] The display panel DP can include and Figure 1A The sensing area TA corresponds to the sensing area DP-TA. The sensing area DP-TA can be an area with a lower resolution than the display area DP-DA. The sensing area DP-TA will be described in detail later.

[0069] like Figure 2A As illustrated, the driver chip DIC can be located on the non-display area DP-NDA of the display panel DP. The flexible circuit board FCB can be connected to the non-display area DP-NDA of the display panel DP. The flexible circuit board FCB can be connected to the main circuit board. The main circuit board can be an electronic component constituting the electronic module EM.

[0070] The driver chip DIC may include driving elements, such as data driving circuitry, for driving the pixels of the display panel DP. Figure 2A The diagram illustrates a structure where the driver chip DIC is mounted on the display panel DP, but the embodiments disclosed herein are not limited to this. For example, the driver chip DIC can be mounted on a flexible circuit board FCB.

[0071] like Figure 2B As illustrated, the display device DD may further include an input sensor IS and a digitizer DTM. The input sensor IS detects user input. If it is capacitive, the input sensor IS may be located above the display panel DP. The digitizer DTM detects input from a stylus. If it is electromagnetic induction, the digitizer DTM may be located below the display panel DP.

[0072] The electronic module EM may include a control module 10, a wireless communication module 20, an image input module 30, a sound input module 40, a sound output module 50, a memory 60, and an external interface module 70, etc. The electronic module EM may include a main circuit board, and the aforementioned modules may be mounted on the main circuit board or electrically connected to the main circuit board via a flexible circuit board. The electronic module EM is electrically connected to the power module PSM.

[0073] Reference Figure 2A The electronic module EM can be located in each of the first housing HM1 and the second housing HM2, and the power module PSM can be located in each of the first housing HM1 and the second housing HM2. According to some embodiments, the electronic module EM located in the first housing HM1 and the electronic module EM located in the second housing HM2 can be electrically connected to each other via a flexible circuit board.

[0074] The control module 10 controls the overall operation of the electronic device ED. For example, the control module 10 activates or deactivates the display device DD according to user input. The control module 10 can control the image input module 30, the sound input module 40, and the sound output module 50, etc., according to user input. The control module 10 may include at least one microprocessor.

[0075] The wireless communication module 20 can use Bluetooth or WiFi channels to send / receive wireless signals to / from another terminal. The wireless communication module 20 can use general communication channels to send / receive audio signals (or sound signals). The wireless communication module 20 may include multiple antenna modules.

[0076] The image input module 30 processes image signals and converts them into image data that can be displayed on the display device DD. The sound input module 40 receives external sound signals via a microphone in recording mode or audio recognition mode (or sound recognition mode), and converts the external audio signals (or external sound signals) into electronic audio data (or electronic sound data). The sound output module 50 converts sound data received from the wireless communication module 20 or sound data stored in the memory 60, and outputs the converted sound data to the outside.

[0077] The external interface module 70 acts as an interface for connecting to an external charger, wired / wireless data port, or card (e.g., memory card and SIM / UIM card) socket.

[0078] The Power Supply Module (PSM) supplies the power required for the overall operation of the electronic equipment (ED). The PSM may include a general-purpose battery device.

[0079] An electro-optic module (ELM) can be an electronic component that outputs or receives optical signals. An ELM may include a camera module and / or a proximity sensor. The camera module captures external images via a sensing area (DP-TA).

[0080] Figure 2A The housing HM shown in the diagram is connected to the display device DD, particularly to the window WM, and houses the other modules described above. The housing HM is illustrated as including a first housing HM1 and a second housing HM2 separated from each other, but is not limited thereto. According to some embodiments, the electronic device ED may further include a hinge structure for connecting the first housing HM1 and the second housing HM2 to each other.

[0081] Figure 3 This is a plan view of a display panel according to some embodiments of the present disclosure.

[0082] Reference Figure 3 The display panel (DP) may include a display area (DP-DA) and a non-display area (DP-NDA) surrounding the display area (DP-DA). The display area (DP-DA) and the non-display area (DP-NDA) can be distinguished based on the presence or absence of pixels (PX). Pixels (PX) are located within the display area (DP-DA). The scan driver (SDV), data driver, and transmit driver (EDV) may be located within the non-display area (DP-NDA). The data driver may be included in... Figure 3 The diagram shows a portion of the circuitry in the driver chip DIC.

[0083] The display panel DP includes a first region AA1, a second region AA2, and a bent region BA, which are divided along the second direction DR2. The second region AA2 and the bent region BA can be portions of the non-display region DP-NDA. The bent region BA can be located between the first region AA1 and the second region AA2.

[0084] The first region AA1 is related to Figure 1A The area corresponding to the display surface DS in the diagram. The first area AA1 may include a first non-folded area NFA10, a second non-folded area NFA20, and a folded area FA0. The first non-folded area NFA10, the second non-folded area NFA20, and the folded area FA0 are respectively associated with... Figures 1A to 1C The first non-folded region NFA1, the second non-folded region NFA2, and the folded region FA are shown in the figure.

[0085] In the first direction DR1, the length of each of the bending region BA and the second region AA2 can be less than the length of the first region AA1. Regions with shorter lengths in the bending axis direction can be bent more easily.

[0086] The display panel (DP) may include multiple pixels (PX), multiple scan lines SL1 to SLm, multiple data lines DL1 to DLn, multiple emission lines EL1 to ELm, a first control line CSL1 and a second control line CSL2, a power line PL, and multiple pads (PD). Here, m and n are each natural numbers greater than 0. Pixels (PX) may be connected to scan lines SL1 to SLm, data lines DL1 to DLn, and emission lines EL1 to ELm.

[0087] Scan lines SL1 to SLm can extend in the first direction DR1 to connect to the scan driver SDV. Data lines DL1 to DLn can extend in the second direction DR2 and connect to the driver chip DIC via the bend region BA. Transmit lines EL1 to ELm can extend in the first direction DR1 to connect to the transmit driver EDV.

[0088] The power line PL may include a portion extending in the second direction DR2 and a portion extending in the first direction DR1. The portion extending in the first direction DR1 and the portion extending in the second direction DR2 may be located in different layers. The portion of the power line PL extending in the second direction DR2 may extend to the second region AA2 via the bending region BA. The power line PL can supply a first voltage to the pixel PX.

[0089] The first control line CSL1 can be connected to the scan driver SDV and extends through the bend area BA toward the lower end of the second area AA2. The second control line CSL2 can be connected to the transmit driver EDV and extends through the bend area BA toward the lower end of the second area AA2.

[0090] The pad PD can be positioned adjacent to the lower end of the second region AA2 on a plane. The driver chip DIC, power line PL, first control line CSL1, and second control line CSL2 can be connected to the pad PD. The flexible circuit board FCB can be electrically connected to the pad PD through an anisotropic conductive adhesive layer.

[0091] The sensing area DP-TA can be an area with higher transmittance and lower resolution compared to the display area DP-DA. Transmittance and resolution are measured in a reference surface area. Compared to the display area DP-DA, the sensing area DP-TA has a smaller occupancy of light-blocking structures in the reference surface area. These light-blocking structures may include conductive patterns in circuit layers, electrodes of light-emitting elements, light-blocking patterns, etc., which will be described later.

[0092] The sensing region DP-TA has a lower resolution in the reference surface area than the display region DP-DA. Compared to the display region DP-DA, the sensing region DP-TA can be an area in which a smaller number of pixels PX lie within the reference surface area (or the same surface area). The sensing region DP-TA can be the area through which light signals pass.

[0093] Figure 4 This is a cross-sectional view of a display module according to some embodiments of the present disclosure. Figure 4 Diagram and Figure 2A The line I-I' in the diagram corresponds to the cross section of the display module DM.

[0094] Reference Figure 4 The display module DM may include a display panel DP, an input sensor IS, and an anti-reflective layer ARL. The display panel DP may include a substrate layer BL, a circuit layer DP-CL, a light-emitting element layer DP-EL, and a packaging layer TFE.

[0095] The substrate layer BL can provide a substrate surface on which the circuit layer DP-CL is located. The substrate layer BL can be a flexible substrate that can be bent, folded, or rolled. The substrate layer BL can be a glass substrate, a metal substrate, or a polymer substrate, etc. However, embodiments of the present invention are not limited thereto, and the substrate layer BL can be an inorganic layer, an organic layer, or a composite material layer.

[0096] The base layer BL can have a multilayer structure. For example, the base layer BL may include a first synthetic resin layer, an inorganic layer having a multilayer or single-layer structure, and a second synthetic resin layer located on the inorganic layer having a multilayer or single-layer structure. The first synthetic resin layer and the second synthetic resin layer may each include a polyimide resin, and are not particularly limited thereto.

[0097] The circuit layer DP-CL can be located on the substrate layer BL. The circuit layer DP-CL can include insulating layers, semiconductor patterns, conductive patterns, and signal lines, etc.

[0098] The light-emitting element layer DP-EL can be located on the circuit layer DP-CL. The light-emitting element layer DP-EL can include light-emitting elements. For example, light-emitting elements can include organic light-emitting materials, inorganic light-emitting materials, organic-inorganic light-emitting materials, quantum dots, quantum rods, micron LEDs, or nano LEDs.

[0099] The encapsulation layer TFE can be located on the light-emitting element layer DP-EL. The encapsulation layer TFE can protect the light-emitting element layer DP-EL from moisture, oxygen, and foreign matter such as dust particles. The encapsulation layer TFE may include at least one inorganic layer. The encapsulation layer TFE may include a stacked structure of inorganic layer / organic layer / inorganic layer.

[0100] The input sensor IS can be located directly on the display panel DP. The display panel DP and the input sensor IS can be formed through a continuous process. Here, "directly located" can mean that a third component is not located between the input sensor IS and the display panel DP. That is, a separate adhesive layer may not be located between the input sensor IS and the display panel DP.

[0101] An anti-reflective layer (ARL) can be directly located on the input sensor (IS). The ARL reduces the reflectivity of external light incident from outside the display device (DD). The ARL may include color filters. These filters may have an arrangement (e.g., a predetermined or set arrangement) or curvature. For example, the color filters may be arranged to take into account the emission colors of pixels (PX) included in the display panel (DP). Additionally, the ARL may further include a black matrix adjacent to the color filters.

[0102] According to some embodiments of this disclosure, the positions of the input sensor IS and the anti-reflective layer ARL can be interchanged. According to some embodiments of this disclosure, the anti-reflective layer ARL can be replaced by a polarizing film. The polarizing film can be attached to the input sensor IS via an adhesive layer.

[0103] Figure 5 This is a cross-sectional view of a portion of a display module according to some embodiments of the present disclosure. Figure 5 In Figure 4 A portion of the display module DM according to an embodiment is illustrated in more detail. For example, in Figure 5 In the diagram, the component corresponding to a pixel PX of the display module DM according to some embodiments is illustrated in more detail.

[0104] Figure 5 The diagram illustrates a light-emitting element (LD) and a pixel circuit PC comprising silicon S-TFTs and oxide TFTs. At least one of the plurality of transistors included in the pixel circuit PC may be an oxide TFT, and the remaining transistors may each be silicon S-TFTs.

[0105] A buffer layer BFL may be located on the substrate layer BL. The buffer layer BFL can prevent or reduce the diffusion of metal atoms or impurities from the substrate layer BL to the first semiconductor pattern SP1 above the buffer layer BFL. The first semiconductor pattern SP1 includes the active region AC1 of a silicon transistor S-TFT. The buffer layer BFL can adjust the heating rate during the crystallization process used to form the first semiconductor pattern SP1, so that the first semiconductor pattern SP1 is formed uniformly.

[0106] The first back metal layer BMLa can be located below the silicon transistor S-TFT, and the second back metal layer BMLb can be located below the oxide transistor O-TFT. The first back metal layer BMLa and the second back metal layer BMLb can be arranged to overlap with the pixel circuit PC. The first back metal layer BMLa and the second back metal layer BMLb can prevent or reduce external light from reaching the pixel circuit PC.

[0107] The first back metal layer BMLa can be arranged to correspond to at least a portion of the pixel circuit PC. The first back metal layer BMLa can be arranged to overlap with the driving transistor implemented as a silicon transistor S-TFT.

[0108] A first back metal layer BMLa may be located between the substrate layer BL and the buffer layer BFL. According to some embodiments of this disclosure, an inorganic barrier layer may further be located between the first back metal layer BMLa and the buffer layer BFL. The first back metal layer BMLa may be connected to an electrode or line and may receive a constant voltage or signal from the electrode or line. According to some embodiments of this disclosure, the first back metal layer BMLa may be a floating electrode having a configuration that isolates it from another electrode or line.

[0109] The second back metal layer BMLb can be arranged corresponding to the lower part of the oxide transistor O-TFT. The second back metal layer BMLb can be located between the second insulating layer IL2 and the third insulating layer IL3. The second back metal layer BMLb can be located on the same layer as the second electrode CE20 of the storage capacitor Cst. The second back metal layer BMLb can be connected to the contact electrode BML2-C and receive a constant voltage or signal. The contact electrode BML2-C can be located on the same layer as the gate GT2 of the oxide transistor O-TFT.

[0110] Each of the first back metal layer BMLa and the second back metal layer BMLb may include a reflective metal. For example, each of the first back metal layer BMLa and the second back metal layer BMLb may include silver (Ag), an alloy containing silver (Ag), molybdenum (Mo), an alloy containing molybdenum, aluminum (Al), an alloy containing aluminum, or aluminum nitride (Al). x N y ), tungsten (W), tungsten nitride (W) x N y Materials include, for example, copper (Cu). Additionally, each of the first back metal layer BMLa and the second back metal layer BMLb may include p+-doped amorphous silicon, etc. The first back metal layer BMLa and the second back metal layer BMLb may include the same material or may include different materials.

[0111] According to some embodiments, the second back metal layer BMLb can be omitted. The first back metal layer BMLa can extend below the oxide transistor O-TFT, and the first back metal layer BMLa can block light incident from below the oxide transistor O-TFT.

[0112] The first semiconductor pattern SP1 may be located on the buffer layer BFL. The first semiconductor pattern SP1 may include a silicon semiconductor. For example, the silicon semiconductor may include amorphous silicon or polycrystalline silicon, etc. For example, the first semiconductor pattern SP1 may include low-temperature polycrystalline silicon.

[0113] Figure 5 The illustration only shows the portion of the first semiconductor pattern SP1 located on the buffer layer BFL, and the first semiconductor pattern SP1 may be further located in another region. The first semiconductor pattern SP1 can be arranged throughout each pixel PX according to specific rules. Depending on whether the first semiconductor pattern SP1 is doped, the first semiconductor pattern SP1 can have different electrical properties. The first semiconductor pattern SP1 may include a first region with high conductivity and a second region with low conductivity. The first region may be doped with n-type dopant or p-type dopant. A p-type transistor may include a doped region doped with p-type dopant, and an n-type transistor may include a doped region doped with n-type dopant. The second region may be an undoped region or a region doped at a lower concentration than the first region.

[0114] The conductivity of the first region can be higher than that of the second region, and the first region can serve as an electrode or signal line. The second region can correspond to the active region (or channel) of a transistor. In other words, one part of the first semiconductor pattern SP1 can be the active region of a transistor, another part can be the source or drain of a transistor, and yet another part can be a connecting electrode or a connecting signal line.

[0115] The source region SE1 (or source electrode), active region AC1 (or channel), and drain region DE1 (or drain electrode) of a silicon transistor S-TFT can be provided by a first semiconductor pattern SP1. The source region SE1 and the drain region DE1 can extend from the active region AC1 in opposite directions in cross-section.

[0116] The first insulating layer IL1 may be located on the buffer layer BFL. The first insulating layer IL1 may commonly overlap with a plurality of pixels PX and cover the first semiconductor pattern SP1. The first insulating layer IL1 may be an inorganic layer and / or an organic layer, and has a single-layer or multi-layer structure. The first insulating layer IL1 may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. According to some embodiments, the first insulating layer IL1 may be a silicon oxide layer having a single-layer structure. In addition to the first insulating layer IL1, other insulating layers of the circuit layer DP-CL, which will be described later, may be inorganic layers and / or organic layers, and have a single-layer or multi-layer structure. Inorganic layers may include at least one of the foregoing materials, but are not limited thereto according to embodiments of this disclosure.

[0117] The gate GT1 of the silicon S-TFT is located on the first insulating layer IL1. Gate GT1 may be part of a metal pattern. Gate GT1 overlaps with the active region AC1. Gate GT1 may act as a mask in the process of doping the first semiconductor pattern SP1. Gate GT1 may include titanium (Ti), silver (Ag), silver-containing alloys, molybdenum (Mo), molybdenum-containing alloys, aluminum (Al), aluminum-containing alloys, or aluminum nitride (Al). x N y ), tungsten (W), tungsten nitride (W) x N y (e.g., copper (Cu), indium tin oxide (ITO), or indium zinc oxide (IZO), but not specifically limited to these.)

[0118] The second insulating layer IL2 can be located on the first insulating layer IL1 and cover the gate GT1. The third insulating layer IL3 can be located on the second insulating layer IL2. The second electrode CE20 of the storage capacitor Cst can be located between the second insulating layer IL2 and the third insulating layer IL3. In addition, the first electrode CE10 of the storage capacitor Cst can be located between the first insulating layer IL1 and the second insulating layer IL2.

[0119] The second semiconductor pattern SP2 may be located on the third insulating layer IL3. The second semiconductor pattern SP2 may include the active region AC2 of the oxide transistor O-TFT, which will be described later. The second semiconductor pattern SP2 may include an oxide semiconductor. The second semiconductor pattern SP2 may include a transparent conductive oxide (TCO) such as indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), zinc oxide (ZnO), or indium oxide (In2O3).

[0120] The oxide semiconductor may include multiple regions defined by whether or not the transparent conductive oxide is reduced. Regions where the transparent conductive oxide is reduced (hereinafter referred to as reduced regions) have a higher conductivity than regions where the transparent conductive oxide is not reduced (hereinafter referred to as non-reduced regions). Reduced regions act as signal lines or the source / drain of transistors. Non-reduced regions correspond to the semiconductor regions (or active regions or channels) of transistors. In other words, a portion of the second semiconductor pattern SP2 may be the semiconductor region of a transistor, another portion may be the source / drain region of a transistor, and yet another portion may be the signal transmission region.

[0121] The source region SE2 (or source electrode), active region AC2 (or channel), and drain region DE2 (or drain electrode) of the oxide transistor O-TFT can be provided by a second semiconductor pattern SP2. The source region SE2 and the drain region DE2 can extend in opposite directions from the active region AC2 in cross-section.

[0122] The fourth insulating layer IL4 can be located on top of the third insulating layer IL3. For example... Figure 5 As illustrated, the fourth insulating layer IL4 can be an insulating pattern that overlaps with the gate GT2 of the oxide transistor O-TFT and exposes each of the source region SE2 and drain region DE2 of the oxide transistor O-TFT. Figure 5 As illustrated, the fourth insulating layer IL4 can cover the second semiconductor pattern SP2.

[0123] like Figure 5 As illustrated, the gate GT2 of the oxide transistor O-TFT is located on the fourth insulating layer IL4. The gate GT2 of the oxide transistor O-TFT can be part of a metal pattern. The gate GT2 of the oxide transistor O-TFT overlaps with the active region AC2.

[0124] The fifth insulating layer IL5 may be located on the fourth insulating layer IL4 and cover the gate GT2. The first connection electrode CNE1 may be located on the fifth insulating layer IL5. The first connection electrode CNE1 may be connected to the drain region DE1 of the silicon transistor S-TFT through contact holes passing through the first insulating layer to the third insulating layers IL1, IL2 and IL3 and the fifth insulating layer IL5.

[0125] The sixth insulating layer IL6 may be located on the fifth insulating layer IL5. The second connecting electrode CNE2 may be located on the sixth insulating layer IL6. The second connecting electrode CNE2 may be connected to the first connecting electrode CNE1 through a contact hole passing through the sixth insulating layer IL6. The seventh insulating layer IL7 may be located on the sixth insulating layer IL6 and cover the second connecting electrode CNE2. The eighth insulating layer IL8 may be located on the seventh insulating layer IL7.

[0126] Each of the sixth insulating layer IL6, the seventh insulating layer IL7, and the eighth insulating layer IL8 may be an organic layer. For example, each of the sixth insulating layer IL6, the seventh insulating layer IL7, and the eighth insulating layer IL8 may include general polymers such as benzocyclobutene (BCB), hexamethyldisiloxane (HMDSO), polymethyl methacrylate (PMMA), or polystyrene (PS), polymer derivatives having phenolic groups, acryloyl polymers, imide polymers (e.g., polyimide), propylene ether polymers, amide polymers, fluorinated polymers, p-xylene polymers, vinyl alcohol polymers, and blends thereof.

[0127] A light-emitting element (LD) may include a first electrode AE, an emitting layer EL, and a second electrode CE. The second electrode CE may be provided in multiple light-emitting elements (LDs).

[0128] The first electrode AE ​​of the light-emitting element LD can be located on the eighth insulating layer IL8. The first electrode AE ​​of the light-emitting element LD can be a (semi-)transmissive electrode or a reflective electrode. According to some embodiments of this disclosure, the first electrode AE ​​of the light-emitting element LD may include a reflective layer made of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr or compounds thereof, and a transparent or semi-transparent electrode layer provided on the reflective layer. The transparent or semi-transparent electrode layer may include at least one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), zinc oxide (ZnO), indium oxide (In2O3), and aluminum-doped zinc oxide (AZO). For example, the first electrode AE ​​of the light-emitting element LD may include a stacked structure of ITO / Ag / ITO.

[0129] The pixel-defined film (PDL) may be located on the eighth insulating layer IL8. The PDL may have light-absorbing properties, and for example, it may be black. The PDL may include a black component (black colorant). The black component may include a black dye or black pigment. The black component may include carbon black, a metal such as chromium, or an oxide thereof. The PDL may correspond to a light-blocking pattern with light-blocking properties.

[0130] The pixel-defining film (PDL) can cover a portion of the first electrode AE ​​of the light-emitting element (LD). For example, an opening PDL-OP exposing a portion of the first electrode AE ​​of the light-emitting element LD can be defined in the pixel-defining film (PDL). The emitting layer EL can be disposed within the opening PDL-OP of the pixel-defining film (PDL). The pixel-defining film (PDL) can increase the distance between the edge of the second electrode CE of the light-emitting element LD and the edge of the first electrode AE. Therefore, the pixel-defining film (PDL) can be used to prevent or reduce situations such as electric arcing at the edge of the first electrode AE.

[0131] According to some embodiments, a hole control layer may be located between the first electrode AE ​​and the emitter layer EL. The hole control layer may include a hole transport layer and further include a hole injection layer. An electron control layer may be located between the emitter layer EL and the second electrode CE. The electron control layer may include an electron transport layer and further include an electron injection layer. The hole control layer and the electron control layer can be jointly provided in multiple pixels PX (see [reference]) using an aperture mask. Figure 3 )middle.

[0132] The encapsulation layer TFE can be located on the light-emitting element layer DP-EL. The encapsulation layer TFE may include an inorganic layer TFE1, an organic layer TFE2, and an inorganic layer TFE3 stacked in sequence, but the layers constituting the encapsulation layer TFE are not limited to these.

[0133] Inorganic layers TFE1 and TFE3 protect the DP-EL light-emitting element layer from moisture and oxygen, while organic layer TFE2 protects the DP-EL layer from foreign matter such as dust particles. Inorganic layers TFE1 and TFE3 may include silicon nitride, silicon oxynitride, silicon oxide, titanium oxide, or aluminum oxide layers, etc. Organic layer TFE2 may include, but is not limited to, an acrylamide-based organic layer.

[0134] The input sensor IS can be located on the display panel DP. The input sensor IS can be referred to as a sensor, an input sensing layer, or an input sensing panel. The input sensor IS may include a first sensor insulating layer 210, a first sensor conductive layer 220, an intermediate sensor insulating layer 230, a second sensor conductive layer 240, a second sensor insulating layer 250, and a protective layer 260.

[0135] The first sensor insulating layer 210 can be directly located on the display panel DP. The first sensor insulating layer 210 can be an inorganic layer including at least one of silicon nitride, silicon oxynitride, and silicon oxide. Alternatively, the first sensor insulating layer 210 can be an organic layer including epoxy resin, acrylic resin, or imide resin. The first sensor insulating layer 210 can have a monolayer structure or a multilayer structure in which the layers are stacked on a third-direction DR3.

[0136] Each of the first sensor conductive layer 220 and the second sensor conductive layer 240 may have a single-layer structure or a multilayer structure in which the layers are stacked on a third-direction DR3. The first sensor conductive layer 220 and the second sensor conductive layer 240 may include conductive patterns defining a grid-like sensing electrode. The conductive patterns may not overlap with the opening PDL-OP, but rather with the pixel defining film PDL.

[0137] The conductive layer having a single-layer structure may include a metal layer or a transparent conductive layer. The metal layer may include molybdenum, silver, titanium, copper, aluminum, or alloys thereof. The transparent conductive layer may include transparent conductive oxides such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium zinc tin oxide (IZTO). Alternatively, the transparent conductive layer may include conductive polymers such as PEDOT, metal nanowires, or graphene.

[0138] A conductive layer with a multilayer structure may include sequentially stacked metal layers. The metal layers may have a three-layer structure, such as titanium / aluminum / titanium. A conductive layer with a multilayer structure may include at least one metal layer and at least one transparent conductive layer.

[0139] An intermediate sensor insulating layer 230 may be located between the first sensor conductive layer 220 and the second sensor conductive layer 240. The intermediate sensor insulating layer 230 may include an inorganic film. The inorganic film may include at least one of alumina, titanium dioxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. Alternatively, the intermediate sensor insulating layer 230 may include an organic film. The organic film may include at least one of acryloyl resins, methacrylamide resins, polyisoprene, vinyl resins, epoxy resins, urethane resins, cellulose resins, siloxane resins, polyimide resins, polyamide resins, and perylene resins. Alternatively, the organic film may include melamine resin.

[0140] The second sensor insulating layer 250 is located on the second sensor conductive layer 240. The second sensor insulating layer 250 may include an organic material and is provided to have a thickness (e.g., a set or predetermined thickness) or greater and to planarize the upper part of the conductive pattern of the conductive layer located below the second sensor insulating layer 250.

[0141] A protective layer 260 is located on the second sensor insulating layer 250. The protective layer 260 may include an inorganic material that protects the underlying conductive pattern from external impacts and blocks moisture and oxygen. (See later...) Figure 8A The second sensor insulating layer 250 and protective layer 260 are described in detail in the following figures.

[0142] An anti-reflective layer (ARL) can be located on the input sensor (IS). The anti-reflective layer (ARL) may include a separator layer 310, multiple color filters 320, and a planarization layer 330.

[0143] The material constituting the separator layer 310 is not particularly limited, as long as it is a light-absorbing material. The separator layer 310 may be a black layer, and according to some embodiments, the separator layer 310 may include a black component (black colorant). The black component may include black dye or black pigment. The black component may include carbon black, a metal such as chromium, or an oxide thereof.

[0144] The separator layer 310 can prevent or reduce external light reflection caused by the conductive pattern of the second sensor conductive layer 240 located below the separator layer 310. The separator layer 310 can be omitted in certain areas of the display module DM. The areas where the separator layer 310 is omitted and not positioned can have a higher transmittance than other areas.

[0145] An opening 310-OP may be defined within a separating layer 310. An opening 310-OP may overlap with the first electrode AE ​​of the light-emitting element LD in a planar manner. Any one of the plurality of color filters 320 may overlap with the first electrode AE ​​of the light-emitting element LD. Any one of the plurality of color filters 320 may cover the opening 310-OP. Each of the plurality of color filters 320 may contact the separating layer 310.

[0146] The planarization layer 330 may cover the separator layer 310 and the plurality of color filters 320. The planarization layer 330 may include an organic material, and a flat surface may be provided on the top surface of the planarization layer 330. The planarization layer 330 may include the same material as that included in the second sensor insulating layer 250. According to some embodiments of this disclosure, the planarization layer 330 may be omitted.

[0147] Figure 6 This is a cross-sectional view of a display device according to some embodiments of the present disclosure. Figure 6 The diagram shows the DM module in its unfolded state without being bent. Figure 6 Diagram and Figure 3 The section corresponding to line II-II' in the diagram. Figure 6 In China, based on Figure 3 The DP diagram in the image divides the area of ​​the display module DM.

[0148] Reference Figure 6 The display device DD includes a window WM, an upper component, a display module DM, and a lower component LM. The upper component refers to the component located between the window WM and the display module DM, and the lower component LM refers to the component located below the display module DM.

[0149] The window WM may include a thin-film glass substrate UTG, a window protective layer PF located on the thin-film glass substrate UTG, and a border pattern BP located on the bottom surface of the window protective layer PF. According to some embodiments, the window protective layer PF may include a synthetic resin film. The window WM may include a window adhesive layer AL-W that bonds the window protective layer PF and the thin-film glass substrate UTG to each other.

[0150] Border pattern BP and Figure 1AThe non-display area NDA overlaps in the diagram. The border pattern BP can be located on one surface of the thin-film glass substrate UTG or on one surface of the window protective layer PF. As an example, Figure 6 The illustration shows a border pattern BP located on the bottom surface of a window protective layer PF. However, embodiments of this disclosure are not limited thereto, and the border pattern BP may be located on the top surface of the window protective layer PF. The border pattern BP is a colored light-blocking film and may be formed, for example, by coating. The border pattern BP may include a base material and a dye or pigment mixed with the base material.

[0151] Thin-film glass substrates (UTGs) can have a thickness ranging from 15 micrometers to 45 micrometers (or approximately 15 micrometers to approximately 45 micrometers). The thickness of a thin-film glass substrate (UTG) can be, for example, 30 micrometers (or approximately 30 micrometers). The thin-film glass substrate (UTG) can be chemically strengthened glass. Even during repeated folding and unfolding, the thin-film glass substrate (UTG) can minimize the occurrence of wrinkles.

[0152] The window protective layer PF can have a thickness ranging from 50 micrometers to 80 micrometers (or approximately 50 micrometers to approximately 80 micrometers). The synthetic resin film of the window protective layer PF may include polyimide, polycarbonate, polyamide, cellulose triacetate, polymethyl methacrylate, or polyethylene terephthalate. According to some embodiments, at least one of a hard coating, an anti-fingerprint layer, and an anti-reflective layer may be located on the top surface of the window protective layer PF.

[0153] The window adhesive layer AL-W can be a pressure-sensitive adhesive (PSA) film or an optically clear adhesive (OCA) component. The adhesive layers described below may also include the same adhesive as the window adhesive layer AL-W.

[0154] The window adhesive layer AL-W can be separated from the thin-film glass substrate UTG. Because the window protective layer PF has lower strength than the thin-film glass substrate UTG, it may be relatively more prone to scratches. The window adhesive layer AL-W and the window protective layer PF can be separated from each other, and then a new window protective layer PF can be attached to the thin-film glass substrate UTG. The sum of the individual thicknesses of the window adhesive layer AL-W and the window protective layer PF can be in the range of 100 micrometers to 110 micrometers (or approximately 100 micrometers to approximately 110 micrometers). For example, the sum of the individual thicknesses of the window adhesive layer AL-W and the window protective layer PF can be 105 micrometers (or approximately 105 micrometers).

[0155] The upper component may include a first adhesive layer AL1 that connects the display module DM and the window WM to each other. The first adhesive layer AL1 may be a pressure-sensitive adhesive (PSA) film or an optically clear adhesive (OCA) component. For example, the first adhesive layer AL1 may include a pressure-sensitive adhesive (PSA) film. In the display device DD according to some embodiments, the first adhesive layer AL1 may have a thickness in the range of 75 micrometers to 100 micrometers (or about 75 micrometers to about 100 micrometers).

[0156] The lower component LM may include a lower protective film PPL, a first support layer PLT, a cover layer SCV, a digital converter DTM, an electromagnetic shielding layer MML, a metal layer ML, a second support layer PP, and third adhesive layers AL3 to eighth adhesive layers AL8. Each of the third adhesive layers AL3 to eighth adhesive layers AL8 may each include an adhesive such as a pressure-sensitive adhesive or an optically transparent adhesive. According to some embodiments of this disclosure, some of the aforementioned components may be omitted.

[0157] The lower protective film (PPL) can be located below the display module (DM). The PPL protects the lower part of the display module (DM). The PPL may comprise a flexible synthetic resin film. For example, the PPL may comprise polyethylene terephthalate (PET).

[0158] According to some embodiments of this disclosure, the lower protective film PPL may not be located in the bending region BA. The lower protective film PPL may include a protective film for the display panel DP (see...). Figure 3 The first lower protective film PPL-1 of the first area AA1 and the protective display panel DP (see) Figure 3 The second lower protective film PPL-2 of the second region AA2.

[0159] The third adhesive layer AL3 connects the lower protective film PPL and the display panel DP to each other. The third adhesive layer AL3 may include a first part AL3-1 corresponding to the first lower protective film PPL-1 and a second part AL3-2 corresponding to the second lower protective film PPL-2.

[0160] The total thickness of the display module DM, the third adhesive layer AL3, and the lower protective film PPL can be in the range of 90 micrometers to 120 micrometers (or approximately 90 micrometers to approximately 120 micrometers). For example, the total thickness of the display module DM, the third adhesive layer AL3, and the lower protective film PPL can be 105 micrometers (or approximately 105 micrometers).

[0161] The lower protective film PPL can be located at the reference Figure 4 and Figure 5The described display panel DP is located below the substrate layer BL. According to some embodiments, the third adhesive layer AL3 may be located directly below the substrate layer BL of the display panel DP, and the lower protective film PPL may be located directly below the third adhesive layer AL3.

[0162] When the bending region BA is bent, the second lower protective film PPL-2 and the second region AA2 can be located below the first region AA1 and the first lower protective film PPL-1. Since the lower protective film PPL is not located in the bending region BA, the bending region BA can be bent more easily.

[0163] The bending region BA has a curvature (e.g., a set or predetermined curvature) and a radius of curvature (e.g., a set or predetermined radius of curvature). The radius of curvature can be in the range of 0.1 mm to 0.5 mm (or approximately 0.1 mm to approximately 0.5 mm). The display device DD may further include a bending protective layer located in the bending region BA. The bending protective layer may overlap with the bending region BA, the first region AA1, and the second region AA2. The bending protective layer may be located in a portion of the first region AA1 and a portion of the second region AA2. The bending protective layer may be bent together with the bending region BA. The bending protective layer protects the bending region BA from external impacts and controls the neutral plane of the bending region BA. The bending protective layer controls the stress in the bending region BA, such that the neutral plane is closer to the signal line located in the bending region BA.

[0164] The fourth adhesive layer AL4 connects the lower protective film PPL and the first support layer PLT to each other. The fourth adhesive layer AL4 used herein may be referred to as the first additional adhesive layer. The fourth adhesive layer AL4 may have a thickness ranging from 10 micrometers to 20 micrometers (or approximately 10 micrometers to approximately 20 micrometers). For example, the thickness of the fourth adhesive layer AL4 may be 16 micrometers (or approximately 16 micrometers).

[0165] The fourth adhesive layer AL4 may include a first portion AL4-1 and a second portion AL4-2 spaced apart from each other. The separation distance between the first portion AL4-1 and the second portion AL4-2 may be in the range of 7 mm to 15 mm (or approximately 7 mm to approximately 15 mm).

[0166] The first support layer PLT is located below the lower protective film PPL. The first support layer PLT supports the components located above it and maintains the display device DD in both its unfolded and folded states. The first support layer PLT may have a higher strength than the lower protective film PPL. The first support layer PLT includes at least a first support portion PLT-1 corresponding to the first non-folded region NFA10 and a second support portion PLT-2 corresponding to the second non-folded region NFA20. The first support portion PLT-1 and the second support portion PLT-2 are spaced apart from each other in the second direction DR2.

[0167] The first support layer PLT may further include a folded portion PLT-F corresponding to the folded region FA0 and located between the first support portion PLT-1 and the second support portion PLT-2, wherein a plurality of opening portions OP are defined. The plurality of opening portions OP may be arranged such that the folded region FA0 has a grid shape in the plane. The first support portion PLT-1, the second support portion PLT-2, and the folded portion PLT-F may have an integral shape.

[0168] exist Figure 1B and Figure 1C During the folding operation illustrated in the diagram, the folded portion PLT-F can prevent or reduce the entry of contaminants or foreign objects from below the central region of the lower protective film PPL, which is open from the first support portion PLT-1 and the second support portion PLT-2. Due to the multiple openings OP, the flexibility of the folded portion PLT-F is relatively improved. Additionally, the fourth adhesive layer AL4 may not be located on the folded portion PLT-F, and thus the flexibility of the first support layer PLT can be relatively improved. According to some embodiments of this disclosure, the folded portion PLT-F can be omitted. In this case, the first support layer PLT includes the first support portion PLT-1 and the second support portion PLT-2 spaced apart from each other.

[0169] The first support layer PLT can be selected from materials capable of transmitting electromagnetic fields generated from the digital converter DTM (described later) with lossless or minimal loss. The first support layer PLT may include materials with insulating properties. The first support layer PLT may include non-metallic materials. The first support layer PLT may include reinforcing fiber composite materials. The first support layer PLT may include reinforcing fibers located inside the matrix portion. The reinforcing fibers may be carbon fibers or glass fibers. The matrix portion may include a polymer resin. The matrix portion may include a thermoplastic resin. For example, the matrix portion may include polyamide resins or polypropylene resins. For example, the reinforcing fiber composite material may be carbon fiber reinforced plastic (CFRP) or glass fiber reinforced plastic (GFRP). The first support layer PLT may have a thickness in the range of 150 micrometers to 200 micrometers (or approximately 150 micrometers to approximately 200 micrometers).

[0170] The cover layer SCV and the digital converter DTM are located below the first support layer PLT. The cover layer SCV is arranged to overlap with the folded region FA0. The digital converter DTM may include a first digital converter DTM-1 and a second digital converter DTM-2 that overlap with the first support portion PLT-1 and the second support portion PLT-2, respectively. A portion of each of the first digital converter DTM-1 and the second digital converter DTM-2 may also be located below the cover layer SCV.

[0171] The fifth adhesive layer AL5 connects the first support layer PLT and the digital converter DTM to each other, and the eighth adhesive layer AL8 connects the cover layer SCV and the first support layer PLT to each other. The fifth adhesive layer AL5 may include a first portion AL5-1 that connects the first support portion PLT-1 to the first digital converter DTM-1 and a second portion AL5-2 that connects the second support portion PLT-2 to the second digital converter DTM-2.

[0172] The cover layer SCV can be located between the first portion AL5-1 and the second portion AL5-2 on the second direction DR2. The cover layer SCV can be spaced apart from the digital converter DTM to prevent or reduce interference to the digital converter DTM in the deployed state. The sum of the thicknesses of the cover layer SCV and the eighth adhesive layer AL8 can be less than the thickness of the fifth adhesive layer AL5. The sum of the thicknesses of the cover layer SCV and the eighth adhesive layer AL8 can be in the range of 10 micrometers to 20 micrometers (or approximately 10 micrometers to approximately 20 micrometers). For example, the sum of the thicknesses of the cover layer SCV and the eighth adhesive layer AL8 can be 16 micrometers (or approximately 16 micrometers). The thickness of the fifth adhesive layer AL5 can be in the range of 15 micrometers to 25 micrometers (or approximately 15 micrometers to approximately 25 micrometers). For example, the thickness of the fifth adhesive layer AL5 can be 20 micrometers (or approximately 20 micrometers).

[0173] The cover layer SCV can be manufactured in sheet form and attached to the first support layer PLT. The cover layer SCV can be attached to the underside of the portion corresponding to the folded portion PLT-F of the first support layer PLT. Because the cover layer SCV is attached to the underside of the folded portion PLT-F, it can prevent or reduce the entry of contaminants such as moisture and foreign matter into the multiple openings OP defined in the folded portion PLT-F. The cover layer SCV can comprise a material with a low modulus of elasticity, such as thermoplastic polyurethane. The cover layer SCV can be attached to the underside of the folded portion PLT-F of the first support layer PLT, but not to the underside of most of the first support portion PLT-1 and the second support portion PLT-2.

[0174] The width of the cover layer SCV in one direction may be greater than the width of the folded portion PLT-F in that direction. According to some embodiments, based on a second direction DR2 where the first support portion PLT-1, the folded portion PLT-F, and the second support portion PLT-2 are arranged, the folded portion PLT-F may have a first width, and the cover layer SCV may have a second width. The first width may be smaller than the value of the second width. The first width may be 0.5 mm to 3 mm (or approximately 0.5 mm to approximately 3 mm) smaller than the value of the second width. According to some embodiments, the first width may be in the range of 6 mm to 10 mm (or approximately 6 mm to approximately 10 mm). For example, the first width may be 8.65 mm (or approximately 8.65 mm). According to some embodiments, the second width may be in the range of 9 mm to 15 mm (or approximately 9 mm to approximately 15 mm). For example, the second width may be 10.65 mm (or approximately 10.65 mm).

[0175] The digital transceiver (DTM), also known as an electromagnetic resonance (EMR) sensing panel, includes multiple loop coils that generate a magnetic field with the stylus at a preset resonant frequency. The magnetic field generated by the loop coils is applied to an LC resonant circuit of the stylus, comprising a capacitor and an inductor (coil). The coils generate a current through the received magnetic field and transfer this current to the capacitor. The capacitor is then charged with the current input from the coil and discharged back into the coil. As a result, a magnetic field at the resonant frequency is emitted from the coil. The magnetic field emitted by the stylus can be reabsorbed by the loop coils of the DTM, and accordingly, the location of the stylus near the touchscreen can be determined.

[0176] The digital converter DTM may include a first digital converter DTM-1 and a second digital converter DTM-2. The first digital converter DTM-1 and the second digital converter DTM-2 are arranged to be separated from each other by a gap (e.g., a set or predetermined gap) GP. The gap GP may be in the range of 0.3 mm to 3 mm (or approximately 0.3 mm to approximately 3 mm) and may be arranged to correspond to the folded area FA0.

[0177] The digital converter (DTM) can have a thickness ranging from 120 micrometers to 180 micrometers (or approximately 120 micrometers to approximately 180 micrometers). The thickness of the DTM can also range from 140 micrometers to 160 micrometers (or approximately 140 micrometers to approximately 160 micrometers). For example, the thickness of the DTM can be 152 micrometers (or approximately 152 micrometers). When the thickness of the DTM meets the aforementioned ranges, the lower component LM including the DTM can protect against external impacts and can also prevent or reduce excessive increase in the thickness of the display device (DD).

[0178] The electromagnetic shielding layer MML is located below the digital converter DTM. The electromagnetic shielding layer MML can be located directly below the digital converter DTM. The electromagnetic shielding layer MML performs electromagnetic shielding functions. Because the electromagnetic shielding layer MML performs electromagnetic shielding functions, it minimizes the impact on the electronic module EM (see [link to electronic module]) located below it. Figure 2A ), Electro-optical module ELM (see Figure 2A ) and power module PSM (see Figure 2A The electromagnetic waves generated by electromagnetic waves (EMF) affect the digital converter (DTM) and display panel (DP). Furthermore, since the electromagnetic shielding layer (MML) is positioned correctly, the sensitivity of the DTM can be relatively improved, and the signal applied to the DTM can be uniform, thereby relatively improving the reliability of the display device (DD).

[0179] The electromagnetic shielding layer MML may include magnetic metal powder (MMP). The electromagnetic shielding layer MML may include magnetic metal powder for performing electromagnetic shielding functions. The magnetic metal powder included in the electromagnetic shielding layer MML may include soft magnetic powder alloys.

[0180] The electromagnetic shielding layer MML may include a first electromagnetic shielding layer MML-1 and a second electromagnetic shielding layer MML-2. The first electromagnetic shielding layer MML-1 may be located below a first digital transceiver (DTM)-1, and the second electromagnetic shielding layer MML-2 may be located below a second digital transceiver (DTM)-2. Alternatively, the first electromagnetic shielding layer MML-1 may be located directly below the first digital transceiver (DTM)-1, and the second electromagnetic shielding layer MML-2 may be located directly below the second digital transceiver (DTM)-2. The electromagnetic shielding layer MML may have a thickness in the range of 30 micrometers to 60 micrometers (or approximately 30 micrometers to approximately 60 micrometers).

[0181] A metal layer ML is located below the electromagnetic shielding layer MML. The metal layer ML may include a first metal layer ML1 and a second metal layer ML2 that overlap with the first support portion PLT-1 and the second support portion PLT-2, respectively. The metal layer ML can dissipate heat generated during the driving of the digital converter DTM to the outside. The metal layer ML transfers heat generated within the digital converter DTM to the underside. The metal layer ML may have high electrical and thermal conductivity. The metal layer ML may include copper or aluminum. The highly conductive metal layer ML can prevent or reduce heat from the electronic module EM (see [link to electronic module]) located below the metal layer ML. Figure 2A ), Electro-optical module ELM (see Figure 2A ) and power module PSM (see Figure 2AElectromagnetic waves generated by sources such as electromagnetic waves can affect the digital converter (DTM) as noise. According to some embodiments, the lower component LM may include an electromagnetic shielding layer MML and a metal layer ML located below the digital converter DTM, thereby preventing or reducing the extent to which the performance of the digital converter DTM is degraded due to electronic components such as electronic modules EM included in the electronic device ED.

[0182] The sixth adhesive layer AL6 connects the electromagnetic shielding layer MML and the metal layer ML to each other. The sixth adhesive layer AL6 may include a first portion AL6-1 and a second portion AL6-2 corresponding to the first metal layer ML1 and the second metal layer ML2, respectively. The total thickness of the metal layer ML and the sixth adhesive layer AL6 may be in the range of 15 micrometers to 25 micrometers (or approximately 15 micrometers to approximately 25 micrometers).

[0183] The second support layer PP is located below the metal layer ML. The second support layer PP may include a second-1 support layer PP1 and a second-2 support layer PP2 that overlap with the first metal layer ML1 and the second metal layer ML2, respectively. The second support layer PP can absorb external impacts applied from below. The second support layer PP may include an insulating material. According to some embodiments, the second support layer PP may include, for example, a polymer film. The second support layer PP may include polyimide, polycarbonate, polyamide, cellulose triacetate, polymethyl methacrylate, or polyethylene terephthalate. For example, the second support layer PP may include polyethylene terephthalate.

[0184] The seventh adhesive layer AL7 connects the metal layer ML and the second support layer PP to each other. The seventh adhesive layer AL7 may include a first portion AL7-1 and a second portion AL7-2 corresponding to the second-1 support layer PP1 and the second-2 support layer PP2, respectively. The total thickness of the second support layer PP and the seventh adhesive layer AL7 may be in the range of 1 micrometer to 10 micrometers (or approximately 1 micrometer to approximately 10 micrometers).

[0185] The magnetic field shielding sheet (MSM) is located below the second support layer (PP). The MSM shields the magnetic field generated by the electronic components located beneath it. The MSM prevents or reduces interference from magnetic fields generated by the electronic components with the digital converter (DTM). The electronic components may include those described above. Figure 2A and Figure 2B The electronic module EM, electro-optical module ELM, and power module PSM are described.

[0186] The magnetic field shielding sheet MSM comprises multiple parts. At least one of the multiple parts may have different thicknesses. The magnetic field shielding sheet MSM may include a first magnetic field shielding sheet MSM1 attached under a first electromagnetic shielding layer MML-1, a second magnetic field shielding sheet MSM2 attached under a second electromagnetic shielding layer MML-2, and a third magnetic field shielding sheet MSM3 attached under a second-first support layer PP1. The multiple parts may be arranged to conform to a stepped portion of a bracket located below the display device DD. The magnetic field shielding sheet MSM may have a structure in which magnetic field shielding layers and adhesive layers are alternately stacked. A portion of the magnetic field shielding sheet MSM may be directly attached to the underside of the second support layer PP, and a portion of the magnetic field shielding sheet MSM may be directly attached to the underside of the electromagnetic shielding layer MML.

[0187] Through-holes (LTHs) can be confined within certain components of the lower component (LM). The through-holes (LTHs) are arranged in conjunction with... Figure 2A The sensing areas DP-TA overlap. For example... Figure 6 As illustrated, the through-hole (LTH) can penetrate from the fourth adhesive layer AL4 to the second support layer PP. The through-hole (LTH) has a structure similar to the path from which the optical signal is removed from the light-blocking structure, and the through-hole (LTH) can relatively improve the optical signal reception efficiency of the electro-optical module (ELM).

[0188] Figure 7 This is a plan view of an input sensor according to some embodiments of the present disclosure.

[0189] Refer to together Figure 4 , Figure 5 and Figure 7 The input sensor IS includes a sensing area IS-DA and a non-sensing area IS-NDA adjacent to the sensing area IS-DA. The sensing area IS-DA and the non-sensing area IS-NDA can be respectively connected to... Figure 3 The display area DP-DA and the non-display area DP-NDA of the display panel DP are shown in the diagram. Additionally, the input sensor IS may include areas that are the same as or similar to the first area AA1, the second area AA2, and the bending area BA included in the display panel DP.

[0190] The input sensor IS includes a plurality of sensing electrodes located in the sensing region IS-DA. The sensing electrodes may include first sensing electrodes E1-1 to E1-5 (hereinafter referred to as the first electrodes) that are insulated from each other and intersect each other, and second sensing electrodes E2-1 to E2-4 (hereinafter referred to as the second electrodes). The input sensor IS includes a first signal line SL1 electrically connected to the first electrodes E1-1 to E1-5 and a second signal line SL2 electrically connected to the second electrodes E2-1 to E2-4, located in the non-sensing region IS-NDA. The first electrodes E1-1 to E1-5, the second electrodes E2-1 to E2-4, the first signal line SL1, and the second signal line SL2 may be defined by a combination of the first sensor conductive layer 220 and the second sensor conductive layer 240 described above.

[0191] The first electrodes E1-1 to E1-5 and the second electrodes E2-1 to E2-4 may each include multiple intersecting wires. The multiple wires define multiple openings, and each of the first electrodes E1-1 to E1-5 and the second electrodes E2-1 to E2-4 may have a grid shape. Each of the multiple openings may be defined as... Figure 5 The diagram shows the corresponding opening PDL-OP of the pixel-limited film PDL.

[0192] Any one of the first electrodes E1-1 to E1-5 and the second electrodes E2-1 to E2-4 may have an integral shape. According to some embodiments, the first electrodes E1-1 to E1-5 with an integral shape are provided as an example. The first electrodes E1-1 to E1-5 may include a sensing pattern SP1 and a connection pattern CP1. A portion of the aforementioned second sensor conductive layer 240 may correspond to the first electrodes E1-1 to E1-5.

[0193] The second electrodes E2-1 to E2-4 may each include a sensing pattern SP2 and a bridging pattern CP2 (or a connecting pattern). Two adjacent sensing patterns SP2 in the sensing pattern SP2 can be connected through the intermediate sensor insulating layer 230 (see...). Figure 5 The contact hole of the first sensor conductive layer 220 is connected to the bridging pattern CP2. A portion of the second sensor conductive layer 240 described above may correspond to the sensing pattern SP2. A portion of the first sensor conductive layer 220 described above may correspond to the bridging pattern CP2.

[0194] According to some embodiments, the bridging pattern CP2 is described as being composed of... Figure 5 The first sensor conductive layer 220 is formed as shown in the figure, and the first sensing electrodes E1-1 to E1-5 and the sensing pattern SP2 are described as being formed by... Figure 5 The second sensor conductive layer 240 is formed as shown in the figure. However, embodiments of this disclosure are not limited thereto. For example, the first sensing electrodes E1-1 to E1-5 and the sensing pattern SP2 can be formed by... Figure 5The first sensor conductive layer 220 shown in the figure is formed, and the bridging pattern CP2 can be formed by... Figure 5 The second sensor conductive layer 240 is formed as shown in the figure.

[0195] One of the first signal line SL1 and the second signal line SL2 receives a transmission signal for sensing external input from an external circuit, and the other one transmits the change in capacitance between the first electrodes E1-1 to E1-5 and the second electrodes E2-1 to E2-4 as a received signal to the external circuit.

[0196] A portion of the aforementioned second sensor conductive layer 240 may correspond to the first signal line SL1 and the second signal line SL2. The first signal line SL1 and the second signal line SL2 may have a multilayer structure and may include a first layer of lines formed by the aforementioned first sensor conductive layer 220 and a second layer of lines formed by the aforementioned second sensor conductive layer 240. The first layer of lines and the second layer of lines may be connected to each other through contact holes passing through the intermediate sensor insulating layer 230. Each of the first signal line SL1 and the second signal line SL2 may be connected to each of the input pads IS-PD.

[0197] Figure 8A This is a cross-sectional view of an input sensor according to some embodiments of the present disclosure. Figure 8A The diagram simply illustrates the arrangement and connection between the sensor insulating layer and the sensor conductive layer included in the input sensor IS when viewed in cross-section.

[0198] Reference Figure 8A The input sensor IS may include a first sensor insulating layer 210, a first sensor conductive layer 220, an intermediate sensor insulating layer 230, a second sensor conductive layer 240, a second sensor insulating layer 250, and a protective layer 260.

[0199] The first sensor insulating layer 210 can be directly located on the display panel DP (see...). Figure 5 The first sensor insulating layer 210 may be an inorganic layer comprising at least one of silicon nitride, silicon oxynitride, and silicon oxide. Alternatively, the first sensor insulating layer 210 may be an organic layer comprising epoxy resin, acrylic resin, or imide resin. The first sensor insulating layer 210 may have a monolayer structure or a multilayer structure in which the layers are stacked on a third-direction DR3.

[0200] The first sensor conductive layer 220 is located on the first sensor insulating layer 210. The first sensor conductive layer 220 may be located directly on the first sensor insulating layer 210. The first sensor conductive layer 220 may include a first sensor conductive pattern CDP1. Figure 8AOnly one first sensor conductive pattern CDP1 is illustrated, but multiple first sensor conductive patterns CDP1 can be provided. Multiple first sensor conductive patterns CDP1 can each be located on the first sensor insulating layer 210 and arranged to be spaced apart from each other in one direction.

[0201] The first sensor conductive layer 220 may include a first lower conductive layer CL10, a second lower conductive layer CL20 located above and in contact with the first lower conductive layer CL10, and a third lower conductive layer CL30 located below and in contact with the first lower conductive layer CL10. According to some embodiments of this disclosure, the third lower conductive layer CL30 may be omitted. The first lower conductive layer CL10 may have a first reflectivity, a first conductivity, and a first thickness. The second lower conductive layer CL20 may have a second reflectivity lower than the first reflectivity, a second conductivity lower than the first conductivity, and a second thickness less than the first thickness. The first lower conductive layer CL10, having lower resistance, corresponds to the substantial signal transmission path. In the input sensor IS according to some embodiments, the thickness can be increased by a three-layer structure, such that multiple conductive patterns are located within a small surface area on a plane. The second lower conductive layer CL20, having lower reflectivity, may cover the first lower conductive layer CL10 and reduce the reflectivity of external light. However, unlike the illustrated embodiment, the first sensor conductive layer 220 may have a single-layer structure instead of a three-layer structure. The first sensor conductive layer 220 may have a single-layer structure made of a single material.

[0202] An intermediate sensor insulating layer 230 may be located on the first sensor conductive layer 220. The intermediate sensor insulating layer 230 may cover the top and side surfaces of a plurality of first sensor conductive patterns CDP1. The intermediate sensor insulating layer 230 may include an inorganic film. The inorganic film may include at least one of alumina, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. Alternatively, the intermediate sensor insulating layer 230 may include an organic film. The organic film may include at least one of acrylamide resins, methacrylamide resins, polyisoprene, vinyl resins, epoxy resins, urethane resins, cellulose resins, siloxane resins, polyimide resins, polyamide resins, and perylene resins. Alternatively, the organic film may include melamine resin.

[0203] The second sensor conductive layer 240 is located on the intermediate sensor insulating layer 230. The second sensor conductive layer 240 may be located directly on the intermediate sensor insulating layer 230. The second sensor conductive layer 240 may include a plurality of second sensor conductive patterns CDP2. The plurality of second sensor conductive patterns CDP2 may each be located on the intermediate sensor insulating layer 230 and arranged to be spaced apart from each other along one direction.

[0204] The second sensor conductive layer 240 may include a first upper conductive layer CL1, a second upper conductive layer CL2 located above and in contact with the first upper conductive layer CL1, and a third upper conductive layer CL3 located below and in contact with the first upper conductive layer CL1. The first upper conductive layer CL1 of the second sensor conductive layer 240 may be made of the same material and have the same thickness as the first lower conductive layer CL10 of the first sensor conductive layer 220. The second upper conductive layer CL2 of the second sensor conductive layer 240 may be made of the same material and have the same thickness as the second lower conductive layer CL20 of the first sensor conductive layer 220. The third upper conductive layer CL3 of the second sensor conductive layer 240 may be made of the same material and have the same thickness as the third lower conductive layer CL30 of the first sensor conductive layer 220. However, unlike the illustrated embodiment, the second sensor conductive layer 240 may have a single-layer structure instead of a three-layer structure. The second sensor conductive layer 240 may have a single-layer structure made of a single material.

[0205] A portion of the second sensor conductive layer 240 can be electrically connected to the first sensor conductive layer 220 through a contact hole CNT passing through the intermediate sensor insulating layer 230. A portion of a plurality of second sensor conductive patterns CDP2 can be electrically connected to a portion of the first sensor conductive pattern CDP1 through a contact hole CNT.

[0206] The second sensor insulating layer 250 is located on the second sensor conductive layer 240. The second sensor insulating layer 250 may comprise an organic material and is provided to have a thickness (e.g., a set or predetermined thickness) or greater, and to planarize the upper portion of the conductive pattern of the conductive layer located below the second sensor insulating layer 250. The second sensor insulating layer 250 may have a thickness greater than the thickness of each of the first sensor insulating layer 210, the first sensor conductive layer 220, the intermediate sensor insulating layer 230, and the second sensor conductive layer 240 located below the second sensor insulating layer 250. The top surface of the second sensor insulating layer 250 may be a flat surface.

[0207] The second sensor insulating layer 250 includes a low-temperature curable organic material. The second sensor insulating layer 250 may include an organic material that is curable at temperatures below 100°C (or approximately 100°C). The second sensor insulating layer 250 may include, for example, melamine resin. The second sensor insulating layer 250 may include hexamethylol melamine.

[0208] The second thickness d2, which is the total thickness of the second sensor insulating layer 250, can be greater than the first thickness d1, which is the thickness of the second sensor conductive pattern CDP2, and for example, the second thickness d2 can be in the range of 2.5 times to 4.5 times (or approximately 2.5 times to approximately 4.5 times) the first thickness d1. According to some embodiments, the first thickness d1 can be... to (or approximately) up to approximately Within the range of ). For example, the first thickness d1 can be (or approximately) According to some embodiments, the second thickness d2 can be... to (or approximately) up to approximately Within the range of ). For example, the second thickness d2 can be (or approximately) The second thickness d2 can correspond to the minimum distance from the top surface of the intermediate sensor insulating layer 230, on which the second sensor conductive pattern CDP2 is not located, to the top surface of the second sensor insulating layer 250.

[0209] The third thickness d3, which is the thickness of the second sensor insulating layer 250 located on the second sensor conductive pattern CDP2, can be greater than the first thickness d1, which is the thickness of the second sensor conductive pattern CDP2, and for example, the third thickness d3 can be in the range of 1.4 times to 3.0 times (or approximately 1.4 times to approximately 3.0 times) the first thickness d1. According to some embodiments, the third thickness d3 can be... to (or approximately) up to approximately Within the range of ). For example, the third thickness d3 can be (or approximately) The third thickness d3 can correspond to the minimum distance from the top surface of the second sensor insulating layer 250 to the top surface of the second sensor conductive pattern CDP2.

[0210] A protective layer 260 is located on the second sensor insulating layer 250. The protective layer 260 may cover each of the plurality of second sensor conductive patterns CDP2. The protective layer 260 may be formed by deposition and may be an inorganic film having a thickness less than that of the second sensor insulating layer 250. The protective layer 260 may include at least one of, for example, alumina, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. Alternatively, the protective layer 260 may include a transparent conductive oxide (TCO). The protective layer 260 may include an inorganic material that protects the conductive patterns located beneath it from external impacts and blocks moisture and oxygen. Additionally, the protective layer 260 may protect the organic materials of the second sensor insulating layer 250 located beneath the protective layer 260 from the effects of subsequent processes. Organic materials included in the second sensor insulating layer 250 have poor chemical resistance, but the protective layer 260, which includes inorganic materials, can completely cover the top surface of the second sensor insulating layer 250, thereby preventing or reducing damage to the second sensor insulating layer 250 due to materials added in subsequent processes.

[0211] An input sensor IS included in a display device DD according to some embodiments may include sensor conductive layers 220 and 240, and a second sensor insulating layer 250 comprising an organic material, thereby relatively improving the durability and crush impact resistance of the input sensor IS and the display device DD.

[0212] According to some embodiments, the display device DD may include components for performing a folding operation, and when the upper reference is squeezed... Figures 1A to 1C When describing the folded region FA, the folded region FA has poorer compressive impact resistance than the non-folded regions NFA1 and NFA2. For example, when the folded region FA is compressed, as shown above... Figure 6 An anti-curvature portion is generated in the stepped portion between the first support layer PLT and the digital converter DTM, and the tensile stress applied as a result can propagate to the input sensor IS above the display panel DP.

[0213] Unlike the display device DD according to some embodiments, in the case where the second sensor insulating layer 250, including organic material, is not located on the sensor conductive layers 220 and 240, and an inorganic layer, such as one used to protect the conductive layers, is directly located on the sensor conductive layers 220 and 240, the propagating tensile stress may concentrate on the inorganic layer, and thus may induce cracks. Specifically, the inorganic layer with a small thickness may not cover the stepped portions caused by the sensor conductive layers 220 and 240, and therefore, cracks may be induced in the inorganic layer in the region corresponding to the stepped portions of the sensor conductive layers 220 and 240. Cracks induced in the inorganic layer may propagate to the underlying encapsulation layer TFE, and may generate progressively developing dark spots. As a result, the display characteristics of the display device may be degraded.

[0214] In the display device DD according to some embodiments, when a second sensor insulating layer 250 comprising organic material is located on the sensor conductive layers 220 and 240, tensile stress propagating when the folded region FA is compressed can be effectively mitigated. Specifically, the second sensor insulating layer 250 comprising organic material can have a large thickness to cover the stepped portions caused by the sensor conductive layers 220 and 240, and thus can remove the stepped portions where tensile stress is concentrated, preventing or reducing the occurrence of cracks. Therefore, the input sensor IS and the display device DD including the input sensor IS according to some embodiments can be relatively improved in terms of durability and resistance to compressive impact.

[0215] Figures 8B to 8D Each is a cross-sectional view of an input sensor according to some embodiments of the present disclosure. When in conjunction with... Figure 8A When observed on the corresponding cross section, Figures 8B to 8D Each is simply illustrated in the arrangement and connection relationship between the sensor insulating layer and the sensor conductive layer in the input sensor IS-1, IS-2 or IS-3 according to some embodiments.

[0216] Reference Figure 8B ,and Figure 8A Unlike the embodiments described above, the intermediate sensor insulating layer 230-1 in the input sensor IS-1 may include a low-temperature curable organic material. The intermediate sensor insulating layer 230-1 may include the same material as that included in the second sensor insulating layer 250. The intermediate sensor insulating layer 230-1 may include melamine resin. The intermediate sensor insulating layer 230-1 may include hexamethylol melamine.

[0217] The fifth thickness d5, which is the total thickness of the intermediate sensor insulating layer 230-1, can be greater than the fourth thickness d4, which is the thickness of the first sensor conductive pattern CDP1, and for example, the fifth thickness d5 can be 2.5 to 4.5 times (or approximately 2.5 to approximately 4.5 times) the fourth thickness d4. According to some embodiments, the fourth thickness d4 can be... to (or approximately) up to approximately Within the range of ). For example, the fourth thickness d4 can be (or approximately) According to some embodiments, the fifth thickness d5 can be... to (or approximately) up to approximately Within the range of ). For example, the fifth thickness d5 can be (or approximately) The fifth thickness d5 can correspond to the minimum distance from the top surface of the first sensor insulating layer 210, on which the first sensor conductive pattern CDP1 is not located, to the top surface of the intermediate sensor insulating layer 230-1.

[0218] Reference Figure 8C and Figure 8D ,and Figure 8A Unlike the embodiments described, the sensor conductive layers 220' and 240' in input sensors IS-2 and IS-3 can each be provided as a single layer. That is, unlike the embodiments where sensor conductive layers 220 and 240 comprise multiple conductive layers located on different insulating layers. Figure 8A The input sensor IS is different in that it is in Figure 8C and Figure 8D In the input sensors IS-2 and IS-3, each of the sensor conductive layers 220' and 240' is provided as a single layer located on an insulating layer. In the input sensors IS-2 and IS-3 according to some embodiments, the sensor conductive layers 220' and 240' may consist of only one conductive layer located on the single insulating layer.

[0219] As in Figure 8C In the first sensor insulating layer 210, a sensor conductive layer 220' comprising multiple sensor conductive patterns CDP1' can be located on the first sensor insulating layer 210, and a cover sensor insulating layer 230-2 comprising a low-temperature curable organic material can be located on the sensor conductive layer 220'. The cover sensor insulating layer 230-2 can cover the top and side surfaces of the sensor conductive layer 220'. In the input sensor IS-2, a third sensor insulating layer 260 can be directly located on the cover sensor insulating layer 230-2.

[0220] As in Figure 8DIn this design, a sensor conductive layer 240' comprising multiple sensor conductive patterns CDP2' can be located on an intermediate sensor insulating layer 230, and a second sensor insulating layer 250 comprising a low-temperature curable organic material can be located on the sensor conductive layer 240'. The second sensor insulating layer 250 can cover the top and side surfaces of the sensor conductive layer 240'. Figure 8A Unlike the embodiment illustrated in the figure, the separate sensor conductive layer may not be located on the first sensor insulating layer 210.

[0221] Figure 9 This is a plan view of a portion of a display panel according to some embodiments of the present disclosure. Figure 10 This is a cross-sectional view of some components of a display device according to some embodiments of the present disclosure. Figure 9 In the cross section corresponding to line III-III' in the diagram, Figure 10 The diagram simply illustrates a partial cross-section of the device DD, including a second sensor insulating layer 250 in the input sensor IS and a planarization layer 330 in the anti-reflective layer ARL.

[0222] Reference Figure 9 and Figure 10 The area containing the driver chip DIC in the non-display area DP-NDA of the display panel DP can be referred to as the chip area DCA. The area containing multiple pads PD in the non-display area DP-NDA can be referred to as the pad area PA. Additionally, the display panel DP includes a bent area BA located between the display area DP-DA and the pad area PA. The bent area BA can be a region bent with a curvature (e.g., a set or predetermined curvature) and a radius of curvature (e.g., a set or predetermined radius of curvature).

[0223] Included in the input sensor IS (see Figure 5 The second sensor insulating layer 250 in the ) and included in the anti-reflective layer ARL (see Figure 5 The planarization layer 330 in the second sensor insulating layer 250 may include the same material. Each of the second sensor insulating layer 250 and the planarization layer 330 may include a low-temperature curable organic material with excellent planarization properties. For example, each of the second sensor insulating layer 250 and the planarization layer 330 may include melamine resin.

[0224] In the non-display area DP-NDA, specifically the bending area BA, the chip area DCA, and the pad area PA, the input sensor IS can be removed (see...). Figure 5The second sensor insulating layer 250 is a portion of the second sensor insulating layer. The second sensor insulating layer 250 may not overlap with each of the bending region BA, the chip region DCA, and the pad region PA. The second sensor insulating layer 250 may include an opening portion corresponding to each of the bending region BA, the chip region DCA, and the pad region PA. The second sensor insulating layer 250 may include a first opening portion OP-1 corresponding to the bending region BA, a second opening portion OP-2 corresponding to the chip region DCA, and a third opening portion OP-3 corresponding to (or overlapping with) the pad region PA.

[0225] In the non-display area DP-NDA, specifically the bending area BA, the chip area DCA, and the pad area PA, the anti-reflective layer ARL can be removed (see...). Figure 5 The planarization layer 330 is a portion of the planarization layer 330. The planarization layer 330 may not overlap with each of the bending region BA, the chip region DCA, and the pad region PA. The planarization layer 330 may include an opening corresponding to each of the bending region BA, the chip region DCA, and the pad region PA. The planarization layer 330 may include a fourth opening OP-4 corresponding to the bending region BA, a fifth opening OP-5 corresponding to the chip region DCA, and a sixth opening OP-6 corresponding to the pad region PA.

[0226] The width of the opening portion defined in the second sensor insulating layer 250 may be greater than the width of the opening portion defined in the planarization layer 330. The opening portions defined in the second sensor insulating layer 250 and the opening portions defined in the planarization layer 330 may be spaced apart from each other by a first gap SS1 in one direction. The first gap SS1 may be in the range of 1 micrometer to 3 micrometers (or approximately 1 micrometer to approximately 3 micrometers). For example, the first gap SS1 may be 2 micrometers (or approximately 2 micrometers). The first opening portion OP-1 may be separated from the first gap SS1 by the fourth opening portion OP-4, the second opening portion OP-2 may be separated from the first gap SS1 by the fifth opening portion OP-5, and the third opening portion OP-3 may be separated from the first gap SS1 by the sixth opening portion OP-6.

[0227] Figure 11A This is a flowchart of a method for manufacturing a display device according to some embodiments of the present disclosure. Although Figure 11A The illustrations depict various operations in a method of manufacturing a display device, but the embodiments of this disclosure are not limited thereto, and according to some embodiments, unless otherwise stated or implied, the method may include additional or fewer operations, or the order of operations may be changed, without departing from the spirit and scope of the embodiments of this disclosure.

[0228] Figure 11BThis is a flowchart of some steps of a method for manufacturing a display device according to some embodiments of the present disclosure.

[0229] Figure 11B The following diagrams illustrate the operations included in forming the input sensor (operation S200). Although Figure 11B The illustrations depict various operations used in forming an input sensor, but the embodiments according to this disclosure are not limited thereto, and according to some embodiments, unless otherwise stated or implied, the operations may include additional or fewer operations, or the order of operations may be changed without departing from the spirit and scope of the embodiments according to this disclosure.

[0230] Reference Figure 11A A method for manufacturing a display device according to some embodiments of the present disclosure includes preparing a display panel including a plurality of pixels (operation S100) and forming an input sensor located on the display panel (operation S200). See also... Figure 11B The formation of the input sensor (operation S200) includes forming a first sensor insulating layer on the display panel (operation S210), forming a sensor conductive layer including a plurality of conductive patterns on the first sensor insulating layer (operation S220), providing an organic composition to cover each of the plurality of conductive patterns (operation S230), curing the organic composition to form a second sensor insulating layer (operation S240), and depositing an inorganic material onto the second sensor insulating layer to form a protective layer (operation S250).

[0231] Figures 12A to 12D This is a cross-sectional view of some steps of a method for manufacturing a display device according to some embodiments of the present disclosure. Figure 8A In the corresponding cross section, Figures 12A to 12D The diagrams sequentially illustrate the states during the formation of the input sensor in a method for manufacturing a display device.

[0232] Refer to together Figure 11B , Figure 12A and Figure 12B The formation of the input sensor (operation S200) includes forming a first sensor insulating layer 210 (operation S210) and forming sensor conductive layers 220 and 240, including multiple conductive patterns, on the first sensor insulating layer 210 (operation S220). Inorganic materials may be deposited to form the first sensor insulating layer 210.

[0233] Sensor conductive layers 220 and 240 may include a first sensor conductive layer 220 and a second sensor conductive layer 240. When forming sensor conductive layers 220 and 240, a conductive layer in the form of a common layer may be formed and then patterned to form sensor conductive layers 220 and 240 including a plurality of conductive patterns. According to some embodiments, a conductive layer in the form of a common layer may be formed on a first sensor insulating layer 210 and then patterned to form a first sensor conductive layer 220 to include a first sensor conductive pattern CDP1.

[0234] After forming a first sensor conductive layer 220 including a first sensor conductive pattern CDP1, an intermediate sensor insulating layer 230 may be formed covering the first sensor conductive layer 220, and a contact hole CNT may be formed in the intermediate sensor insulating layer 230 to expose the top surface of at least one of the first sensor conductive patterns CDP1.

[0235] According to some embodiments, a preliminary conductive layer 240-P in the form of a common layer can be formed on an intermediate sensor insulating layer 230, and then the preliminary conductive layer 240-P can be patterned to form a second sensor conductive layer 240 including a plurality of second sensor conductive patterns CDP2. The preliminary conductive layer 240-P can have a titanium / aluminum / titanium three-layer structure. According to some embodiments, after forming a photoresist mask, the patterning of the preliminary conductive layer 240-P can be performed by a dry etching process.

[0236] Refer to together Figure 11B , Figure 12B and Figure 12C The formation of the input sensor (operation S200) includes providing an organic composition OM to cover each of the conductive patterns (operation S230) and curing the organic composition OM to form a second sensor insulating layer 250 (operation S240). The organic composition OM can be provided on the second sensor conductive pattern CDP2 through at least one nozzle NZ. The organic composition OM can be provided on the entire intermediate sensor insulating layer 230 and the second sensor conductive pattern CDP2.

[0237] Organic composition OM comprises a low-temperature curable organic material. Organic composition OM may include organic materials that are curable at low temperatures below 100°C (or about 100°C). Organic composition OM may include, for example, melamine resin. Organic composition OM may include hexamethylol melamine. Organic composition OM can be cured at low temperatures below 100°C (or about 100°C) to form a second sensor insulating layer 250. Organic composition OM may be photocured, for example.

[0238] Only a portion of the organic composition OM can be cured, and the uncured remainder can be removed, resulting in the formation of a second sensor insulating layer 250 having an opening in the remainder. (Refer to the above.) Figure 9 and Figure 10 As described, the organic composition OM provided for the bending region BA, the chip region DCA and the pad region PA can be left uncured, and thus the corresponding opening portion of each of the bending region BA, the chip region DCA and the pad region PA can be formed in the second sensor insulating layer 250.

[0239] Refer to together Figure 11B , Figure 12C and Figure 12D The formation of the input sensor (operation S200) includes depositing an inorganic material IOM onto the second sensor insulating layer 250 to form a protective layer 260 (operation S250).

[0240] Inorganic material IOM can be provided on the second sensor insulating layer 250 to form a protective layer 260. The protective layer 260 can be formed by depositing the inorganic material IOM onto the top surface of the second sensor insulating layer 250. The protective layer 260 can be formed by chemical vapor deposition (CVD). The inorganic material IOM may include at least one of, for example, alumina, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. Alternatively, the inorganic material IOM may include a transparent conductive oxide (TCO).

[0241] According to some embodiments, after the protective layer 260 is formed, the anti-reflective layer ARL (see...) Figure 5 A protective layer 260 can be formed on the protective layer 260. The protective layer 260 can protect the second sensor insulating layer 250, which has poor chemical resistance, from the formation of the anti-reflective layer ARL (see...). Figure 5 The effects of materials added during the process. This includes the anti-reflective layer ARL (see...). Figure 5 Planarization layer 330 in ) (see Figure 5 It can be formed using the same material as the organic composition OM that forms the second sensor insulating layer 250, and like the second sensor insulating layer 250, a planarization layer 330 can be formed to provide a corresponding opening portion for each of the bending region BA, the chip region DCA, and the pad region PA.

[0242] According to some embodiments of this disclosure, it is possible to prevent or reduce the phenomenon initiation of cracks in the display panel and input sensors due to pressure applied to the folded portion of the display device, and the propagation of these cracks to generate gradually developing dark spots. Therefore, the durability and resistance to crushing impacts of the display device can be relatively improved.

[0243] Although aspects of some embodiments of this disclosure have been described, it is understood that this disclosure should not be limited to these embodiments, and various changes and modifications can be made by those skilled in the art as described in the spirit and scope of the claimed invention. Therefore, the technical scope of the embodiments according to this disclosure is not limited to what is described in the detailed description of the specification, but should be determined by the claims and their equivalents.

Claims

1. A display device, comprising: The display panel includes multiple pixels; as well as Input sensors, on the display panel, The input sensor includes: A first sensor insulating layer is located on the display panel; A sensor conductive layer is on the first sensor insulating layer and includes multiple conductive patterns; A second sensor insulating layer is configured to cover each of the plurality of conductive patterns and comprises an organic material; and A protective layer is provided on the insulating layer of the second sensor and includes inorganic material.

2. The display device according to claim 1, wherein, The input sensor further includes an intermediate sensor insulating layer configured to cover at least a portion of the sensor conductive layer.

3. The display device according to claim 2, wherein, The sensor conductive layer includes: A first sensor conductive layer, situated on the first sensor insulating layer and including a plurality of first sensor conductive patterns; and The second sensor conductive layer is located on the intermediate sensor insulating layer and includes a plurality of second sensor conductive patterns.

4. The display device according to claim 3, wherein, The protective layer covers each of the plurality of conductive patterns of the second sensors.

5. The display device according to claim 2, wherein, The insulating layer of the intermediate sensor comprises inorganic materials.

6. The display device according to claim 2, wherein, The insulating layer of the intermediate sensor comprises organic materials.

7. The display device according to claim 1, wherein, The display panel includes a first non-foldable area, a foldable area, and a second non-foldable area arranged sequentially in one direction.

8. The display device according to claim 1, wherein, The insulating layer of the second sensor comprises melamine resin.

9. The display device according to claim 1, wherein, The thickness of the second sensor insulating layer is in the range of 2.5 to 4.5 times the thickness of the sensor conductive layer.

10. The display device according to claim 1, further comprising: An anti-reflective layer is provided on the input sensor and includes a plurality of color filters and a planarization layer configured to cover the plurality of color filters.

11. The display device according to claim 10, wherein, The planarization layer and the second sensor insulating layer comprise the same material.

12. The display device according to claim 1, wherein, The sensor conductive layer is provided as a single layer, and The second sensor insulating layer is directly on the sensor conductive layer.

13. The display device according to claim 1, wherein, The display panel includes: A display area, wherein the plurality of pixels are located in the display area; and The outer area is adjacent to the display area. The peripheral region includes a pad area containing multiple pads, and The second sensor insulating layer includes a pad opening portion that overlaps with the pad region.

14. The display device according to claim 1, wherein, The display panel includes a first region, a bent region, and a second region arranged sequentially in one direction. The second sensor insulating layer includes a bent opening portion that overlaps with the bent region.

15. The display device according to claim 1, wherein, The display panel includes: A pixel defining film, wherein the emission opening portion is defined within the pixel defining film; A light-emitting element, comprising at least an emitting layer in the emitting opening portion; and An encapsulation layer is formed on the light-emitting element and the pixel defining film. The first sensor insulating layer is directly on the encapsulation layer.

16. An electronic device comprising: The display device according to any one of claims 1 to 15; as well as The housing contains the display panel and the input sensor.

17. A method of manufacturing a display device, the method comprising: Fabricating a display panel comprising multiple pixels; as well as An input sensor is formed on the display panel. The formation of the input sensor includes: A first sensor insulating layer is formed on the display panel; A sensor conductive layer comprising multiple conductive patterns is formed on the first sensor insulating layer; An organic composition is provided to cover each of the plurality of conductive patterns; Curing the organic composition to form a second sensor insulating layer; and Inorganic materials are deposited onto the insulating layer of the second sensor to form a protective layer.

18. The method of claim 17, further comprising: An anti-reflective layer comprising multiple color filters and a planarization layer covering the multiple color filters is formed on the input sensor. The planarization layer and the organic composition are formed from the same material.

19. The method according to any one of claims 17 and 18, wherein, The curing of the organic composition is performed at a temperature below 100°C.

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