JTAG interface data communication processing method, data communication structure and device

Abstract

The invention relates to the field of FPGA (Field Programmable Gate Array) embedded technology, and discloses a JTAG (Joint Test Action Group) interface data communication processing method, a data communication structure and a device. According to the method, control logic and command data of JTAG interface communication are separated, the control logic serves as a standardized general module to be called, and JTAG commands and data are dynamically processed independently and differentially. Modularization and generalization of JTAG interface communication execution logic and independent standardized dynamic configuration of communication data are achieved. The data communication structure unifies the whole communication process into one sequence, and facilitates arrangement, inspection, modification and tracking of the interface communication process. The security in the communication process can be improved, and the universality is improved.

Description

Technical Field

[0001] This invention relates to the field of FPGA embedded technology, and in particular to a JTAG interface data communication processing method, data communication structure, and apparatus. Background Technology

[0002] JTAG, as an important international standard testing protocol, plays a crucial role in chip internal testing, in-circuit programming, and embedded system debugging. The JTAG interface is widely used in applications such as in-circuit programming and joint debugging of FPGA embedded systems. Using the JTAG interface, functional testing and boundary scan testing of FPGAs can be performed. It also allows access to the FPGA's internal registers, memory, and other functional units for debugging and error tracing, including reading and modifying registers, observing signal states, and setting breakpoints.

[0003] In common JTAG interface application examples, FPGA design languages ​​are generally used to build corresponding FPGA processing methods and software logic for a specific functional requirement. FPGA code varies from person to person and changes according to functional requirements. It can be seen that the FPGA software in the current technology needs to be repeatedly developed during use, resulting in low security and poor versatility. Summary of the Invention

[0004] This invention provides a JTAG interface data communication processing method, data communication structure, and apparatus to solve the problems of repeated development, low security, and poor versatility of FPGA software in the prior art.

[0005] To achieve the above objectives, the present invention employs the following technical solution: In a first aspect, the present invention provides a JTAG interface data communication processing method, comprising: S1: Construct a data communication structure, which includes a command length register and a command sequence register; S2: Set the identifier code; S3: Decompose the JTAG interface communication requirements to be implemented into commands to obtain command length and command sequence, and store the obtained command length in the command length register and the obtained command sequence in the command sequence register; S4: The JTAG interface control logic reads the command length and command sequence from the data communication structure, sends the command and data to the JTAG interface in a cyclic manner based on the identifier code, and reads data from the JTAG interface to complete the JTAG interface communication.

[0006] Optionally, the command sequence includes a TMS command sequence, a TDI command sequence, a LEN command sequence, and a MASK sequence; Among them, the TMS command is a unified encoding of all JTAG TMS commands according to the TAP state transition matrix, with an encoding width of 10 bits. The first 7 bits are the TMS command and the last 3 bits are the TMS length; the TDI command is a JTAG command of uniform length; the LEN command consists of an identifier code and a value, the value of which is the number of idle 0s that need to be sent after the JTAG interface has sent the TDI command sequence; the MASK sequence is a value mask for reading data from the JTAG interface, where 1 means to take the value and 0 means not to take the value.

[0007] Optionally, the identification code includes a read data identification code, a write data identification code, a read / write address identification code, and a TCK switch identification code.

[0008] Optionally, the command length is the number of individual commands into which the entire JTAG interface communication process is broken down.

[0009] Optionally, the command sequence includes all individual commands in the communication order; wherein each command is encoded using a unified encoding method, and the encoded content of each command includes the command, sent data, readback data, data length, read, write, and address information; Optionally, for each communication request, different communication requests correspond to different command lengths and command sequence contents.

[0010] Optionally, the JTAG interface control logic is a standardized JTAG interface control logic established by the FPGA. The JTAG interface control logic reads the encoded information of each command from the command sequence and then decodes all commands in a loop before performing external communication.

[0011] Secondly, this application provides a JTAG interface data communication structure, including a command length register and a command sequence. The command length register is used to store the command length, and the command sequence includes a TMS command sequence, a TDI command sequence, a LEN command sequence, and a MASK sequence. Among them, the TMS command is a unified encoding of all JTAG TMS commands according to the TAP state transition matrix, with an encoding width of 10 bits. The first 7 bits are the TMS command and the last 3 bits are the TMS length; the TDI command is a JTAG command of uniform length; the LEN command consists of an identifier code and a value, the value of which is the number of idle 0s that need to be sent after the JTAG interface has sent the TDI command sequence; the MASK sequence is a value mask for reading data from the JTAG interface, where 1 means to take the value and 0 means not to take the value.

[0012] Secondly, this application provides a JTAG interface data communication device, including the JTAG interface data communication structure described in the first aspect.

[0013] Thirdly, this application provides a JTAG interface data communication device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the method described in the first aspect above.

[0014] Beneficial effects: This application provides a JTAG interface data communication processing method that separates the control logic and command data of JTAG interface communication. The control logic is called as a standardized, general-purpose module, while JTAG commands and data are processed independently and dynamically. This achieves modularization and generalization of the JTAG interface communication execution logic and independent, standardized, and dynamic configuration of communication data. The data communication structure unifies the entire communication process into a single sequence, facilitating the orchestration, inspection, modification, and tracking of the interface communication process. This improves security and enhances versatility during communication.

[0015] In further technical solutions, the data communication structure adopts a standardized coding method, which makes the commands and data in the interface communication process simple and clear, facilitating joint design and collaborative processing. Attached Figure Description

[0016] Figure 1 This is a flowchart of a preferred embodiment of the JTAG interface data communication processing method of the present invention; Figure 2 The TAP state transition matrix of JTAG in a preferred embodiment of the present invention; Figure 3 This is the TMS command encoding of a preferred embodiment of the present invention; Figure 4 This is a schematic diagram of read data, write data, read / write address, and TCK switch identifier code in a preferred embodiment of the present invention; Figure 5 This is a schematic diagram illustrating the command length and command sequence of a preferred embodiment of the present invention; Figure 6 This is a flowchart illustrating the JTAG interface control logic of a preferred embodiment of the present invention. Figure 7 This is a preferred embodiment of the data address identifier code processing flow of the present invention. Detailed Implementation

[0017] The technical solution of the present invention will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0018] Unless otherwise defined, the technical or scientific terms used in this invention shall have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. The terms "first," "second," and similar terms used in this invention do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms "an" or "a" and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms "connected" or "linked" and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up," "down," "left," "right," etc., are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship also changes accordingly.

[0019] Please see Figure 1 This application provides a JTAG interface data communication processing method, comprising: S1: Construct a data communication structure, which includes a command length register and a command sequence register; S2: Set the identifier code; S3: Decompose the JTAG interface communication requirements to be implemented into commands to obtain command length and command sequence, and store the obtained command length in the command length register and the obtained command sequence in the command sequence register; S4: The JTAG interface control logic reads the command length and command sequence from the data communication structure, sends the command and data to the JTAG interface in a cyclic manner based on the identifier code, and reads data from the JTAG interface to complete the JTAG interface communication.

[0020] In this step, the command length in the command length register and the command information in the command sequence register are read. One command is read at a time, and the reading is repeated in a loop according to the length.

[0021] Sending and reading are performed based on the identifier code. Different identifier codes will result in different sending and reading content. This is implemented in the JTAG interface control logic. In other words, different identifier codes implement different sending and reading.

[0022] The aforementioned JTAG interface data communication processing method separates the control logic and command data of JTAG interface communication. The control logic is called as a standardized, general-purpose module, while JTAG commands and data are processed independently and dynamically. This achieves modularization and generalization of the JTAG interface communication execution logic and independent, standardized, and dynamic configuration of communication data. The data communication structure unifies the entire communication process into a single sequence, facilitating the orchestration, inspection, modification, and tracking of the interface communication process. This enhances security and improves versatility during communication.

[0023] In this embodiment, the command sequence includes a TMS command sequence, a TDI command sequence, a LEN command sequence, and a MASK sequence; The TMS command is to assign all JTAG TMS commands as follows: Figure 2 The TAP state transition matrix shown is uniformly encoded with a 10-bit width. The first 7 bits represent the TMS command, and the last 3 bits represent the TMS length, corresponding to 1~7. Figure 3 As shown; the TDI command is a JTAG command of uniform length; the LEN command consists of an identifier and a value, the value being the number of idle 0s that need to be sent after the JTAG interface has sent the TDI command sequence; the MASK sequence is a value mask for reading data from the JTAG interface, 1 for taking a value and 0 for not taking a value.

[0024] In this embodiment, as Figure 4 As shown, the identification codes include read data identification codes, write data identification codes, read / write address identification codes, and TCK switch identification codes. In one example, the identification codes are shown in Table 1 below: Table 1 Identifier Code Definition In this implementation, the data communication structure adopts a standardized encoding method, which makes the commands and data in the interface communication process simple and clear, facilitating joint design and collaborative processing.

[0025] In one example, the JTAG interface communication requirements to be implemented are decomposed into commands to obtain command length and command sequence, such as... Figure 5 As shown.

[0026] In this application, the command length is the number of individual commands that the entire JTAG interface communication process is broken down into. The command sequence contains all individual commands in the communication order; each command is encoded using a unified encoding method, and the encoded content of each command includes the command, sent data, read-back data, data length, read, write, and address information.

[0027] Furthermore, after reading the command length and command sequence from the data communication structure, the JTAG interface control logic sends the commands and data to the JTAG interface in a cyclic manner, and reads data from the JTAG interface to complete the JTAG interface communication. The JTAG interface control logic workflow diagram is as follows: Figure 6 As shown, the data address identifier code processing flow is as follows: Figure 7 As shown.

[0028] In this embodiment, for each communication request, different communication requests correspond to different command lengths and command sequence contents.

[0029] The JTAG interface control logic is a standardized JTAG interface control logic established for the FPGA. The JTAG interface control logic reads the encoded information of each command from the command sequence and then decodes all commands in a loop before performing external communication.

[0030] This application also provides a JTAG interface data communication structure, including a command length register and a command sequence. The command length register is used to store the command length, and the command sequence includes a TMS command sequence, a TDI command sequence, a LEN command sequence, and a MASK sequence. Among them, the TMS command is a unified encoding of all JTAG TMS commands according to the TAP state transition matrix, with an encoding width of 10 bits. The first 7 bits are the TMS command and the last 3 bits are the TMS length; the TDI command is a JTAG command of uniform length; the LEN command consists of an identifier code and a value, the value of which is the number of idle 0s that need to be sent after the JTAG interface has sent the TDI command sequence; the MASK sequence is a value mask for reading data from the JTAG interface, where 1 means to take the value and 0 means not to take the value.

[0031] This JTAG interface data communication structure can implement various embodiments of the above-described JTAG interface data communication processing method and achieve the same beneficial effects, which will not be elaborated here.

[0032] This application also provides a JTAG interface data communication device, including the JTAG interface data communication structure described above. This JTAG interface data communication device can implement various embodiments of the above-described JTAG interface data communication processing method and achieve the same beneficial effects; further details are omitted here.

[0033] This application also provides a JTAG interface data communication, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the steps of the above-described method. This JTAG interface data communication can implement various embodiments of the above-described method and achieve the same beneficial effects; therefore, further details are omitted here.

[0034] The preferred embodiments of the present invention have been described in detail above. It should be understood that those skilled in the art can make numerous modifications and variations based on the concept of the present invention without creative effort. Therefore, all technical solutions that can be obtained by those skilled in the art based on the concept of the present invention through logical analysis, reasoning, or limited experimentation on the basis of existing technology should be within the scope of protection defined by the claims.

Claims

1. A JTAG interface data communication processing method, characterized in that, include: S1: Construct a data communication structure, which includes a command length register and a command sequence register; S2: Set the identifier code; S3: Decompose the JTAG interface communication requirements to be implemented into commands to obtain command length and command sequence, and store the obtained command length in the command length register and the obtained command sequence in the command sequence register; S4: The JTAG interface control logic reads the command length and command sequence from the data communication structure, sends the command and data to the JTAG interface in a cyclic manner based on the identifier code, and reads data from the JTAG interface to complete the JTAG interface communication.

2. The JTAG interface data communication processing method according to claim 1, characterized in that, The command sequence includes the TMS command sequence, TDI command sequence, LEN command sequence, and MASK sequence; Among them, the TMS command is a unified encoding of all JTAG TMS commands according to the TAP state transition matrix, with an encoding width of 10 bits. The first 7 bits are the TMS command and the last 3 bits are the TMS length; the TDI command is a JTAG command of uniform length; the LEN command consists of an identifier code and a value, the value of which is the number of idle 0s that need to be sent after the JTAG interface has sent the TDI command sequence; the MASK sequence is a value mask for reading data from the JTAG interface, where 1 means to take the value and 0 means not to take the value.

3. The JTAG interface data communication processing method according to claim 1, characterized in that, The identification codes include read data identification codes, write data identification codes, read / write address identification codes, and TCK switch identification codes.

4. The JTAG interface data communication processing method according to claim 1, characterized in that, The command length is the number of individual commands that the entire JTAG interface communication process is broken down into.

5. The JTAG interface data communication processing method according to claim 1, characterized in that, The command sequence contains all individual commands in the communication order; each command is encoded using a unified encoding method, and the encoded content of each command includes command information, sent data, readback data, data length, read, write, and address information.

6. The JTAG interface data communication processing method according to claim 1, characterized in that, For each communication request, different communication requests correspond to different command lengths and command sequence contents.

7. The JTAG interface data communication processing method according to claim 1, characterized in that, The JTAG interface control logic is a standardized JTAG interface control logic established for the FPGA. The JTAG interface control logic reads the encoded information of each command from the command sequence and then decodes all commands in a loop before performing external communication.

8. A JTAG interface data communication structure, characterized in that, It includes a command length register and a command sequence. The command length register is used to store the command length, and the command sequence includes a TMS command sequence, a TDI command sequence, a LEN command sequence, and a MASK sequence. Among them, the TMS command is a unified encoding of all JTAG TMS commands according to the TAP state transition matrix, with an encoding width of 10 bits. The first 7 bits are the TMS command and the last 3 bits are the TMS length; the TDI command is a JTAG command of uniform length; the LEN command consists of an identifier code and a value, the value of which is the number of idle 0s that need to be sent after the JTAG interface has sent the TDI command sequence; the MASK sequence is a value mask for reading data from the JTAG interface, where 1 means to take the value and 0 means not to take the value.

9. A JTAG interface data communication device, characterized in that, It includes the JTAG interface data communication structure as described in claim 8.

10. A JTAG interface data communication device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method described in any one of claims 1 to 7.

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