Data communication method, system and equipment capable of configuring field bus

Abstract

The invention discloses a data communication method, system and equipment capable of configuring a field bus. The method comprises the following steps: constructing a communication state machine, a master station shared memory and a slave station shared memory based on a master station and a slave station; when it is detected that the state of the communication state machine is a running state, communication data are written into a data sending area of a master station shared memory through the master station based on the data communication mode; reading communication data from a data sending area through a master station link layer, packaging the communication data into a data frame based on a preset data frame structure, and sending the data frame to a slave station shared memory for data communication processing; periodically polling a receiving data area of a shared memory of the master station through a link layer of the master station, and judging whether feedback data of the slave station is received within preset polling time or not; if yes, data communication is completed, and the data communication state of the master station shared memory and the slave station shared memory is cleared. According to the invention, a communication mechanism between the master station and the slave station is realized through the communication state machine, and then the shared memory is established to realize data access of the dual-core architecture.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of communication technology, in particular to a data communication method, system and device of a configurable field bus. BACKGROUND

[0002] With the development of real-time Ethernet technology, field buses based on real-time Ethernet are widely used in industrial control, servo drive and other fields. In the prior art, standard Ethernet has deficiencies in determinism, data transmission has random delay, and different types of real-time data access cannot be realized, which is difficult to meet the strict requirements of industrial control. Moreover, there are still limitations in the flexible configuration of the communication protocol structure. Most protocols use fixed frame structures, which cannot balance the special and general requirements of the bus in more scenarios. Therefore, how to realize different types of real-time data access while ensuring the flexibility of field bus configuration has become a problem to be solved.

[0003] The above content is only used to assist in understanding the technical solutions of the present application. SUMMARY

[0004] The main purpose of the present application is to provide a data communication method, system and device of a configurable field bus, which aims to solve the technical problem of how to realize different types of real-time data access while ensuring the flexibility of field bus configuration.

[0005] To achieve the above purpose, the present application provides a data communication method of a configurable field bus, which comprises: constructing a communication state machine, a master station shared memory and a slave station shared memory based on a master station and a slave station; when detecting that the state of the communication state machine is a running state, writing communication data into a sending data area of the master station shared memory through the master station based on a data communication mode; reading the communication data from the sending data area through a master station link layer, and encapsulating the communication data into a data frame based on a preset data frame structure, and sending to the slave station shared memory for data communication processing; periodically polling a receiving data area of the master station shared memory through the master station link layer to determine whether feedback data of the slave station is received within a preset polling time; if yes, completing data communication, and clearing the data communication state of the master station shared memory and the slave station shared memory.

[0006] Optionally, the data communication mode includes a periodic communication mode and an aperiodic communication mode. The periodic communication mode is that the master station and the slave station periodically send and receive data according to a preset time interval. The non-periodic communication mode is a dynamic trigger of sending and receiving data by the master station and the slave station according to specific events or conditions.

[0007] Optionally, the sending data area in the master station shared memory is written by the master station according to the data communication mode, comprising: When the data communication mode is periodic communication, the periodic data communication is triggered by the FPGA; Before the application of the external interrupt, the sending data area in the master station shared memory is written by the master station.

[0008] Optionally, the sending data area in the master station shared memory is written by the master station according to the data communication mode, further comprising: When the data communication mode is non-periodic communication, the non-periodic data communication is triggered by the application interface of the master station; The sending data area in the master station shared memory is written by the application interface.

[0009] Optionally, before the communication data is encapsulated into a data frame according to the preset data frame structure, further comprising: Detecting whether the master station initiates a frame structure configuration request modification instruction; If yes, encapsulating the configuration information of the master station into a to-be-updated configuration data frame according to a preset register space definition format, and sending the to-be-updated configuration data frame to the slave station by a broadcast write mode; Judging whether there is a slave station that has not successfully responded based on the number of response bits in the response return frame of the slave station; If no, updating the frame structure configuration information of the master station to obtain a preset data frame structure.

[0010] Optionally, after the to-be-updated configuration data frame is sent to the slave station by the broadcast write mode, comprising: Building a buffer isolation mechanism between a DPRAM and a data frame processing unit in the slave station; Writing the received to-be-updated configuration data frame into the DPRAM; Loading the configuration from the DPRAM by the data frame processing unit, selecting a target verification method from a plurality of verification methods, and verifying the loaded to-be-updated configuration data frame according to the target verification method, wherein the plurality of verification methods include a CRC8 verification algorithm, a CRC16 verification algorithm, and a CRC32 verification algorithm; After the verification is passed, the configuration data frame is loaded into a frame structure register in the data frame processing unit to update the frame structure configuration information of the slave station; After the update is completed, a feedback response return frame is returned to the master station.

[0011] Optionally, the encapsulating the communication data into data frames based on the preset data frame structure and sending the data frames to the slave station for data communication processing comprises: encapsulating the communication data into data frames based on the preset data frame structure and sending the data frames to an application data area of the shared memory of the slave station; receiving the data frames from the application data area by a link layer of the slave station and analyzing the data frames based on frame structure configuration information in the frame structure register to obtain the communication data; sending the communication data to the slave station to enable the slave station to perform an operation corresponding to the communication data.

[0012] Optionally, after the judging whether the feedback data of the slave station is received within the preset polling time, the method further comprises: if not, determining a communication error and clearing data communication states of the shared memory of the master station and the shared memory of the slave station.

[0013] In addition, to achieve the above object, the application further provides a data communication system of a configurable field bus, which comprises: a construction module configured to construct a communication state machine, a shared memory of a master station and a shared memory of a slave station based on the master station and the slave station; a writing module configured to write communication data into a sending data area of the shared memory of the master station based on a data communication mode by the master station when detecting that a state of the communication state machine is a running state; a sending module configured to read the communication data from the sending data area by a link layer of the master station, encapsulate the communication data into data frames based on a preset data frame structure and send the data frames to the shared memory of the slave station for data communication processing; a polling module configured to periodically poll a receiving data area of the shared memory of the master station by the link layer of the master station and judge whether feedback data of the slave station is received within a preset polling time; a clearing module configured to complete data communication and clear data communication states of the shared memory of the master station and the shared memory of the slave station if the feedback data of the slave station is received.

[0014] In addition, to achieve the above object, the application further provides a data communication device of a configurable field bus, which comprises a memory, a processor and a data communication program of a configurable field bus stored in the memory and capable of running on the processor, wherein the data communication program of the configurable field bus is configured to implement the steps of the data communication method of the configurable field bus.

[0015] The application firstly constructs a communication state machine, a master station shared memory and a slave station shared memory based on a master station and a slave station, when detecting that the state of the communication state machine is a running state, writes communication data into a sending data area of the master station shared memory through the master station based on a data communication mode, then reads the communication data from the sending data area through the master station link layer, encapsulates the communication data into a data frame based on a preset data frame structure, and sends to the slave station shared memory for data communication processing, then periodically polls a receiving data area of the master station shared memory through the master station link layer, judges whether feedback data of the slave station is received within a preset polling time; if yes, completes data communication, and clears the data communication state of the master station shared memory and the slave station shared memory. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 The figure is a total flowchart of the first embodiment of the data communication method of the configurable fieldbus of the application; Figure 2 The figure is a communication state machine diagram of the configurable fieldbus of the first embodiment of the data communication method of the configurable fieldbus of the application; Figure 3 The figure is a flowchart of the initialization state switching to the running state of the first embodiment of the data communication method of the configurable fieldbus of the application; Figure 4 The figure is a master station shared memory structure diagram of the first embodiment of the data communication method of the configurable fieldbus of the application; Figure 5 The figure is a slave station shared memory structure diagram of the first embodiment of the data communication method of the configurable fieldbus of the application; Figure 6 The figure is a flowchart of the master station driving aperiodic communication of the first embodiment of the data communication method of the configurable fieldbus of the application; Figure 7 The figure is a master station periodic communication diagram based on FPGA interrupt triggering of the first embodiment of the data communication method of the configurable fieldbus of the application; Figure 8 The figure is a master station driving periodic communication flowchart of the first embodiment of the data communication method of the configurable fieldbus of the application; Figure 9 The figure is a data frame structure diagram of the configurable fieldbus of the first embodiment of the data communication method of the configurable fieldbus of the application; Figure 10The data area structure diagram of the field bus of the first embodiment of the data communication method of the configurable field bus of the present application; Figure 11 The flow chart of the master station configuration data frame structure of the first embodiment of the data communication method of the configurable field bus of the present application; Figure 12 The slave station frame structure register configuration diagram of the first embodiment of the data communication method of the configurable field bus of the present application; Figure 13 The structure block diagram of the first embodiment of the data communication system of the configurable field bus of the present application.

[0017] The implementation, functional features and advantages of the present application will be further explained with reference to the embodiments and the accompanying drawings. DETAILED DESCRIPTION

[0018] It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.

[0019] The embodiments of the present application provide a data communication method of a configurable field bus, referring to Figure 1 , Figure 1 The total flow schematic diagram of the first embodiment of the data communication method of the configurable field bus of the present application.

[0020] In the embodiments, the data communication method of the configurable field bus comprises the following steps: S1, constructing a communication state machine, a master station shared memory and a slave station shared memory based on the master station and the slave station.

[0021] It is easy to understand that the execution subject of the embodiments can be a computer device with data processing, network communication and program running functions, and the embodiments are not limited thereto.

[0022] It should be further noted that the slave station can be one or multiple, and the embodiments are not limited thereto.

[0023] In the specific implementation, in order to ensure the orderly execution and management of the communication process between the master and slave devices, the communication state machine is constructed, the function authority and conversion condition of each state in the state machine are determined, and the stability of the bus operation and the consistency of the communication logic are ensured.

[0024] The switching of the bus communication state is initiated by the master station, and the slave station judges whether the state conversion condition is met and makes a corresponding response by detecting the completion of the current configuration information. In the designed configurable field bus communication, the communication state machine is divided into four basic states, which reflects the gradual progress of the system from initialization to formal operation, and the specific states are as shown in Figure 2 , Figure 2Fig. 1 is a schematic diagram of a communication state machine of a configurable field bus according to the data communication method of the configurable field bus of the first embodiment of the present application.

[0025] It should also be understood that the data interaction of the register can be directly accessed in a non-periodic communication manner in each communication state, but the application data interaction is related to the state of the state machine, and the channel data interaction can be performed only after the corresponding channel configuration is completed. In different states of the communication state machine, different communication functions can be completed, and the communication functions in each state of the embodiment are shown in Table 1.

[0026] Table 1

[0027] The communication state machine of the bus can only complete configuration and state detection and then switching step by step from the initialization state to the running state, and cannot be switched by grade. However, the process of switching from the running state to the initialization state in the reverse direction can be switched by grade. The switching of the whole state machine is managed and controlled by the master station, and the processing flow of the master station from the initialization state to the running state is as shown in Figure 3 Figure 3 Fig. 2 is a flowchart of switching from the initialization state to the running state according to the data communication method of the configurable field bus of the first embodiment of the present application.

[0028] It should also be understood that the data interaction of the register can be directly accessed in a non-periodic communication manner in each communication state, but the application data interaction is related to the state of the state machine, and the channel data interaction can be performed only after the corresponding channel configuration is completed. In different states of the communication state machine, different communication functions can be completed, and the communication functions in each state of the embodiment are shown in Table 1.

[0026] Table 1

[0027] The communication state machine of the bus can only complete configuration and state detection and then switching step by step from the initialization state to the running state, and cannot be switched by grade. However, the process of switching from the running state to the initialization state in the reverse direction can be switched by grade. The switching of the whole state machine is managed and controlled by the master station, and the processing flow of the master station from the initialization state to the running state is as shown in Figure 3 Figure 3 Fig. 2 is a flowchart of switching from the initialization state to the running state according to the data communication method of the configurable field bus of the first embodiment of the present application.

[0028] It should also be understood that the data interaction of the register can be directly accessed in a non-periodic communication manner in each communication state, but the application data interaction is related to the state of the state machine, and the channel data interaction can be performed only after the corresponding channel configuration is completed. In different states of the communication state machine, different communication functions can be completed, and the communication functions in each state of the embodiment are shown in Table 1.

[0026] Table 1

[0027] The communication state machine of the bus can only complete configuration and state detection and then switching step by step from the initialization state to the running state, and cannot be switched by grade. However, the process of switching from the running state to the initialization state in the reverse direction can be switched by grade. The switching of the whole state machine is managed and controlled by the master station, and the processing flow of the master station from the initialization state to the running state is as shown in Figure 3 Figure 3 Fig. 2 is a flowchart of switching from the initialization state to the running state according to the data communication method of the configurable field bus of the first embodiment of the present application.

[0028]

[0029] In the specific implementation, in order to meet the transmission and control of communication data and configuration information, under the architecture of “Microcontroller Unit (MCU) + Field-Programmable Gate Array (FPGA)” adopted by the master and slave devices, shared memory is designed as a data access interface between the link layer and the application layer. On this basis, according to the real-time requirements of different types of data, an access mode combining interruption and polling is adopted. Periodic tasks are triggered by interruption to ensure the timeliness of processing, and non-periodic tasks are processed in a polling mode to respond to the changes of data at any time.

[0030] (1) Master shared memory construction The master MCU writes the application data to be sent into shared memory and reads the feedback data from the slave station from shared memory. During data frame transmission, the link layer reads the application data to be sent from shared memory, frames it, and sends it. It also parses the received data frames to extract feedback data and writes it into shared memory. Considering the full-duplex nature of the bus communication in this project, to avoid conflicts caused by simultaneous read and write access to shared memory by the link layer, two independent dual-port RAMs are allocated in the master FPGA as shared memory. These include a download data area and an upload data area. The download data area is only written to by the application interface and read out during link layer processing; the upload data area is only written to by the link layer and read out by the application interface. (Reference) Figure 4 , Figure 4 This is a schematic diagram of the master station shared memory structure of the first embodiment of the configurable fieldbus data communication method of the present invention.

[0031] The download data area mainly contains communication-related configuration data and application data to be sent non-periodically and periodically; the upload data area mainly contains communication-related status data and non-periodic and periodic application data that have received feedback.

[0032] To facilitate the management of link layer communication by the application in the master station, the configuration data area and status data area in shared memory are used as management media. The master station writes configuration information to the configuration data area in shared memory and reads status information from the status data area in shared memory through the application interface; the master station's link layer accesses the configuration data area in shared memory to obtain configuration information, completes the configuration of the link layer, and writes the current status to the status data area, thereby realizing the management of bus link communication.

[0033] Based on the different real-time requirements of the communication process and to ensure the direction of data transmission, the system is divided into an aperiodic data transmission area and a periodic data transmission area to store the application data that the master station needs to output, and an aperiodic data reception area and a periodic data reception area to store the application data that has been received.

[0034] (2) Sharing memory setup for slave stations A dual-port RAM is allocated as shared memory in the slave FPGA. Both the slave's application interface and the link layer can read or write data to this memory space. The structure of the designed slave shared memory is as follows: Figure 5 As shown, Figure 5 This is a schematic diagram of the slave shared memory structure of the first embodiment of the configurable fieldbus data communication method of the present invention, which includes two parts: a register data area and an application data area.

[0035] Among them, the register data area mainly includes all register data related to bus communication, and the application data area includes channel data accessed by the application layer interface. For application data with different real-time characteristics and different read-write directions, the application data area is divided into four regions, namely process data input, process data output, service data input and service data output, which can be used for process data communication and service data communication respectively.

[0036] It should be further pointed out that the master station shared memory built outside the master station and the slave station shared memory built outside the slave station can also be externally connected, and the present embodiment is not limited thereto.

[0037] S2, when detecting that the state of the communication state machine is the running state, writing communication data into the sending data area of the master station shared memory through the master station based on the data communication mode.

[0038] It should be further pointed out that the data communication mode includes a periodic communication mode and an aperiodic communication mode. The periodic communication mode is that the master station and the slave station periodically send and receive data according to a preset time interval. The aperiodic communication mode is that the master station and the slave station dynamically trigger the sending and receiving of data according to specific events or conditions. When the data communication mode is the periodic communication mode, the FPGA triggers to start the periodic data communication. Before responding to the external interrupt, the master station writes the communication data into the sending data area of the master station shared memory, and the sending data area at this time is the periodic sending area. When the data communication mode is the aperiodic communication mode, the application interface of the master station triggers to start the aperiodic data communication. The communication data is written into the sending data area of the master station shared memory through the application interface, and the sending data area at this time is the aperiodic sending area.

[0039] The preset time interval can be user-defined, and the specific event or condition can also be user-defined, and the present embodiment is not limited thereto.

[0040] In the present embodiment, in order to facilitate the application interface of the master station to trigger the aperiodic data communication of the bus, based on the built shared memory, the sending enable signal in the aperiodic communication configuration is used to start the aperiodic communication of the link layer, and the data length is used to determine the byte length of the aperiodic sending data area and the aperiodic receiving data area accessed this time. The flow chart of the application interface of the master station driving the aperiodic communication is as shown in Figure 6 Figure 6 The flow chart of the application interface of the master station driving the aperiodic communication of the present application configurable field bus data communication method first embodiment, and the data sending process is directly written into the shared memory by the application layer and enabled to start.

[0041] ​In view of the requirement that periodic data communication needs to send data frames at fixed time, the master station uses the mode of FPGA timing sending periodic data frames for implementation. The external interruption generated by the FPGA is coordinated with the MCU to realize the periodic transmission and reception of data interaction, and the periodic communication process of the master station designed as shown in Figure 7 , Figure 7 The master station periodic communication schematic diagram based on FPGA interruption trigger of the first embodiment of the data communication method of the configurable field bus of the application is shown in FIG. 1, since the data sending process is triggered and started by the FPGA, the application responds to the external interruption, and when the interruption comes, the data is first written into the shared memory, and the flow of the master station application interface driving the periodic communication is shown in Figure 8 , Figure 8 The master station driving periodic communication flow chart of the first embodiment of the data communication method of the configurable field bus of the application is shown in FIG. 2.

[0042] S3, reading the communication data from the sending data area through the master station link layer, and encapsulating the communication data into a data frame based on a preset data frame structure, and sending to the slave station shared memory for data communication processing.

[0043] In view of the customization requirement of the data frame structure in the field bus communication, the scheme designs a configurable data frame structure, and adjusts the flexible configuration of the data frame structure through the construction of the corresponding configuration mechanism.

[0044] By adjusting the standard Ethernet frame format, a bus data frame format with user configurable capability is designed to adapt to diversified customization requirements. Through customizable modification in the frame header part and the check segment, the communication frame structure of the configurable field bus as shown in Figure 9 , Figure 9 The data frame structure diagram of the configurable field bus of the first embodiment of the data communication method of the configurable field bus of the application is shown in FIG. 3.

[0045] Among them, the frame header part customizes the design of the address field length and the frame header type identification. The destination address and the source address field support configuration in 2 / 4 / 6 three byte lengths, and the user can flexibly set according to the network node scale and the addressing range requirement. When configured as 6 bytes, the compatibility with the standard Ethernet frame is realized. The frame header type supports user-defined setting, which is used to distinguish different bus protocol data, and when the receiving node detects that the frame header type does not match, the frame content can be ignored, so as to realize protocol identification and isolation, and enhance the data security of the system.

[0046] In the frame check part, flexible configuration of multiple check modes is supported, and the multiple check methods include three check algorithms of CRC8, CRC16 and CRC32, and the three check algorithms are all non-standard check mechanisms, and correspond to 1 byte, 2 bytes and 4 bytes of field length respectively. Through the configuration mode of supporting the non-standard check mechanism, the identification and analysis of the traditional Ethernet device for the data frame can be effectively avoided, and the privacy of the communication process is further improved.

[0047] It should be further pointed out that the target check method is CRC8 algorithm or CRC16 algorithm or CRC32 algorithm, and the loaded configuration data frame to be updated can be calculated by the selected algorithm.

[0048] In order to improve the data organization efficiency of bus communication, the lumped frame structure design is adopted in the data area part, and the frame data area structure is as shown in Figure 10 Figure 10 It is the data area structure diagram of the field bus of the first embodiment of the data communication method of the configurable field bus of the application. The data area is composed of a bus header and a bus data area, the information of the whole current data area is described through the bus header, including data length, communication type and the like; through the plurality of sub-messages of the bus data area, the application data content actually needed to be transmitted is encapsulated, such as sensor feedback, control instruction and the like.

[0049] Among them, the meanings of the fields of the bus header and the sub-message are described in Table 2. In order to describe the byte length of all sub-messages in the bus data area, the total length is recorded through the data length field of the bus header; in order to describe the byte length of the data in a single sub-message, the local data length is recorded through the length field in the sub-message header.

[0050] Table 2

[0051] (1) Preset register space definition The field length and frame header type information of the destination address and the source address are respectively stored in the register, and the frame analysis function will be completed according to the content thereof during data frame processing. The space with addresses of 0xF90-0xF92 in the dual-port RAM (DPRAM) is used for temporarily storing the configuration information, and the definition is shown in Table 3. By default, the configuration uses 6 bytes of destination address and source address, and the frame header type of 0x85A1.

[0052] Table 3

[0053] ​For the currently used in engineering a variety of CRC check mode, the difference mainly reflected in the check polynomial, initial value, result XOR value, input and output whether to reverse, etc. To support flexible configuration, the parameters are designed as the configuration parameters can be modified, as shown in Table 4.

[0054] Table 4

[0055] By default, the configuration uses the same check mode as the standard network card, and the implementation is compatible with the standard Ethernet device, so the data frame can be captured and analyzed by the PC's Wireshark network capture software.

[0056] In the embodiment, the communication data is read from the sending data area by the master station link layer, and it is detected whether the master station initiates a frame structure configuration request modification instruction; if yes, the configuration information of the master station is encapsulated into the to-be-updated configuration data frame according to a preset register space definition format, and the to-be-updated configuration data frame is sent to the slave station through a broadcast write mode; whether there is a slave station that has not successfully responded is judged based on the number of response bits in the response return frame of the slave station; if no, the frame structure configuration information of the master station is updated, and a preset data frame structure is obtained.

[0057] After the to-be-updated configuration data frame is sent to the slave station through the broadcast write mode, the following steps are included: a buffer isolation mechanism between a DPRAM and a data frame processing unit is constructed through a double-port RAM inside the slave station; the received to-be-updated configuration data frame is written into the DPRAM; the configuration loading is performed from the DPRAM by the data frame processing unit, and the to-be-updated configuration data frame is subjected to CRC checking; after the checking is passed, the configuration data frame is loaded into the frame structure register in the data frame processing unit to update the frame structure configuration information of the slave station; after the update is completed, a response return frame is fed back to the master station.

[0058] (2) Frame structure configuration update In order to realize the quick configuration update of the self-defined structure type of the data frame, the configuration update is initiated by the master station, and a frame structure configuration interface is designed in the master station, and the application program realizes the update of the frame structure by directly operating the interface. When the frame structure scheme is changed, refer to Figure 11 , Figure 11 The flow chart for the master station to configure the data frame structure of the first embodiment of the configurable field bus data communication method of the application is shown in the following Figure 11 processing flow.

[0059] The master station application encapsulates the configuration information into configuration data according to the format defined in Table 3 and Table 4, sends a frame structure configuration data frame to all slave stations through a broadcast write mode, and after all slave stations successfully respond, the master station updates the local frame structure register configuration. In subsequent communication, the master station frames and deframes according to the new frame structure. If the slave stations do not respond within a set number of retries (3 by default), the master station sends a reset instruction frame to trigger all slave stations to immediately recover to the default frame structure, and the master station resets the local frame structure configuration and restarts the frame structure configuration process.

[0060] For configuration information update of the slave station, after receiving the data frame, the slave station processes according to the designed register address specification. If it is detected that the address of the sub-message header is 0xF90-0xF97, it is determined that it is a frame structure configuration data frame, and the slave station enters the frame structure configuration process. In order to avoid logical conflict problems caused by the direct effect of new configuration information on the ongoing frame processing, a buffer isolation mechanism is constructed by using a dual-port RAM in the slave station. The frame structure configuration of the slave station is as shown in Figure 12 Figure 12 The slave station frame structure register configuration diagram of the first embodiment of the data communication method of the configurable field bus of the application. The received configuration data is first written into the specified address area of the DPRAM for temporary storage. This memory area is isolated from the actual data frame processing unit. Only when the data frame reception is completed and the CRC check is passed, the configuration data is loaded from the DPRAM to the frame structure register.

[0061] After the frame structure configuration is completed, when the nodes of the bus receive subsequent data frames, the data frame processing unit will parse according to the information in the frame structure register. According to the field length configured in the frame structure register, the frame header address, frame header type, data area, and verification section of the data frame are parsed and identified. At the same time, the protocol type is matched and verified through the frame header type to confirm the processing applicability of the data frame. In the verification mechanism, a parameterized CRC verification processing flow is introduced, and the verification method is processed according to the user's self-defined selection.

[0062] Through the configurable design of the data frame structure, the frame header and frame tail verification and other parts are flexibly customized.

[0063] Further, based on the preset data frame structure, the communication data is encapsulated into a data frame and sent to the slave station for data communication processing, including: encapsulating the communication data into a data frame based on the preset data frame structure, and sending the data frame to the application data area of the shared memory of the slave station; receiving the data frame from the application data area through the link layer of the slave station, and parsing the data frame through the frame structure configuration information in the frame structure register to obtain the communication data; and sending the communication data to the slave station to make the slave station execute the operation corresponding to the communication data. The communication data can be understood as an instruction that the master station sends to the slave station to execute.​

[0064] S4, judging whether the feedback data of the slave station is received within the preset polling time by periodically polling the receiving data area of the master station shared memory through the master station link layer.

[0065] It is also necessary to point out that the polling is not timed out within the preset polling time (i.e. polling threshold time); the polling is timed out when the preset polling time is exceeded.

[0066] S5, if yes, completing the data communication and clearing the data communication state of the master station shared memory and the slave station shared memory.

[0067] Further, if no, judging the communication error and clearing the data communication state of the master station shared memory and the slave station shared memory.

[0068] It is also necessary to point out that the periodic data is process data and the aperiodic data is service data. The polling mode is used to read out the communication state in the aperiodic data receiving process, and the aperiodic receiving data (i.e. the feedback data of the slave station) is read out from the shared memory before the polling is timed out, completing the aperiodic communication process.

[0069] It is also necessary to point out that the periodic data receiving process is consistent with the aperiodic communication, and the polling mode is used to query the communication state and then acquire the returned periodic data (i.e. the feedback data of the slave station).

[0070] In the embodiment, first, the communication state machine, the master station shared memory and the slave station shared memory are constructed based on the master station and the slave station, when the state of the communication state machine is detected to be the running state, the communication data is written into the sending data area of the master station shared memory through the master station based on the data communication mode, then the communication data is read from the sending data area through the master station link layer, and the communication data is encapsulated into a data frame based on the preset data frame structure and sent to the slave station shared memory for data communication processing, after that, the receiving data area of the master station shared memory is periodically polled through the master station link layer, and whether the feedback data of the slave station is received within the preset polling time is judged; if yes, the data communication is completed, and the data communication state of the master station shared memory and the slave station shared memory is cleared. The communication state machine of the bus is designed to manage the communication demand between the master and slave nodes in the embodiment, the data frame structure supporting the parameterized definition and the configuration mechanism thereof are designed to realize the customizable frame structure, and the data access interface based on the shared memory is constructed, and the polling and interruption mechanism is designed to realize the data access of different real-time types.

[0071] Referring to Figure 13 , Figure 13 is the structure block diagram of the first embodiment of the configurable field bus data communication system of the application.

[0072] constructing module 1301 is configured to construct a communication state machine, a master station shared memory and a slave station shared memory based on the master station and the slave station; writing module 1302 is configured to write, when detecting that the state of the communication state machine is the running state, communication data into a sending data area of the master station shared memory based on a data communication mode; sending module 1303 is configured to read the communication data from the sending data area by a master station link layer, encapsulate the communication data into a data frame based on a preset data frame structure, and send the data frame to the slave station shared memory for data communication processing; polling module 1304 is configured to periodically poll a receiving data area of the master station shared memory by the master station link layer, and determine whether feedback data of the slave station is received within a preset polling time; clearing module 1305 is configured to complete data communication and clear the data communication state of the master station shared memory and the slave station shared memory if the feedback data of the slave station is received.

[0073] Other embodiments or specific implementations of the data communication system of the configurable field bus can refer to the above-mentioned method embodiments, which will not be described here.

[0074] It should be noted that in this paper, the term "including", "containing" or any other variant thereof is intended to cover non-exclusive inclusion, so that the process, method, article or system including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or system. Without more limitations, the element defined by the statement "including a" does not exclude the presence of another identical element in the process, method, article or system including the element.

[0075] The above-mentioned embodiment numbers of the application are only for description, not representing the advantages and disadvantages of the embodiments.

[0076] Through the above description of the embodiments, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be realized by means of software and necessary general hardware platform, of course, they can also be realized by hardware, but in many cases, the former is a better embodiment. Based on such understanding, the technical solutions of the application can be embodied in the form of a software product, which is stored in a storage medium (such as a read-only memory / random access memory, a magnetic disk, an optical disk), and includes a plurality of instructions for making a terminal device (which can be a mobile phone, a computer, a server, or a network device, etc.) execute the methods described in various embodiments of the application.

[0077] The above merely provides the preferred embodiments of the present application, and is not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made according to the content of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A data communication method with a configurable fieldbus, characterized in that, The method includes the following steps: A communication state machine, master station shared memory, and slave station shared memory are constructed based on the master station and slave station. When the communication state machine is detected to be in a running state, communication data is written to the transmission data area of ​​the master station's shared memory through the master station based on the data communication mode; The master station reads the communication data from the sending data area through the link layer, encapsulates the communication data into a data frame based on a preset data frame structure, and sends it to the slave station's shared memory for data communication processing. The master station link layer periodically polls the received data area of ​​the master station's shared memory to determine whether feedback data from the slave station has been received within a preset polling time. If so, the data communication is completed, and the data communication status of the master station shared memory and the slave station shared memory is cleared.

2. The method as described in claim 1, characterized in that, The data communication modes include periodic communication mode and aperiodic communication mode; The periodic communication mode is that the master station and the slave station periodically send and receive data at preset time intervals; The non-periodic communication mode refers to the sending and receiving of data by the master station and the slave station dynamically triggered according to specific events or conditions.

3. The method as described in claim 2, characterized in that, The step of writing communication data into the transmission data area of ​​the master station's shared memory based on the data communication mode includes: When the data communication mode is periodic communication mode, periodic data communication is initiated via FPGA trigger. Before the application responds to an external interrupt, the master station writes the communication data into the transmission data area of ​​the master station's shared memory.

4. The method as described in claim 2, characterized in that, The method of writing communication data into the transmission data area of ​​the master station's shared memory based on the data communication mode further includes: When the data communication mode is non-periodic communication mode, non-periodic data communication is triggered through the application interface of the main station. The communication data is written to the transmission data area of ​​the main station's shared memory through the application interface.

5. The method as described in claim 1, characterized in that, Before encapsulating the communication data into a data frame based on a preset data frame structure, the method further includes: Detect whether the master station has initiated a frame structure configuration request modification command; If so, the configuration information of the master station is encapsulated into a configuration data frame to be updated according to the preset register space definition format, and the configuration data frame to be updated is sent to the slave station through broadcast write. The number of response bits in the response return frame of the slave station determines whether the slave station failed to respond. If not, update the frame structure configuration information of the master station to obtain the preset data frame structure.

6. The method as described in claim 5, characterized in that, After sending the configuration data frame to be updated to the slave station via broadcast write, the process includes: A buffer isolation mechanism is constructed between the DPRAM and the data frame processing unit from the dual-port RAM inside the station. The received configuration data frame to be updated is written into the DPRAM; The configuration is loaded from the DPRAM by the data frame processing unit, a target verification method is selected from multiple verification methods, and the loaded configuration data frame to be updated is verified according to the target verification method. The multiple verification methods include CRC8 verification algorithm, CRC16 verification algorithm and CRC32 verification algorithm. After the verification is passed, the configuration data frame is loaded into the frame structure register in the data frame processing unit to update the frame structure configuration information of the slave station; After the update is completed, a feedback response frame is sent back to the main station.

7. The method as described in claim 6, characterized in that, The process of encapsulating the communication data into data frames based on a preset data frame structure and sending them to the slave station for data communication processing includes: The communication data is encapsulated into a data frame based on a preset data frame structure, and the data frame is sent to the application data area of ​​the slave station's shared memory. The communication data is obtained by receiving the data frame from the application data area through the slave link layer and parsing the data frame using the frame structure configuration information in the frame structure register. The communication data is sent to the slave station so that the slave station performs the operation corresponding to the communication data.

8. The method as described in claim 1, characterized in that, After determining whether feedback data has been received from the slave station within the preset polling time, the process includes: If not, a communication error is determined, and the data communication status of the master station shared memory and the slave station shared memory is cleared.

9. A data communication system with a configurable fieldbus, characterized in that, The system includes: The module is used to build a communication state machine, master station shared memory, and slave station shared memory based on the master station and slave station. The writing module is used to write communication data into the transmission data area of ​​the master station's shared memory based on the data communication mode when the state of the communication state machine is detected to be in the running state. The sending module is used to read the communication data from the sending data area through the master station link layer, encapsulate the communication data into a data frame based on a preset data frame structure, and send it to the slave station shared memory for data communication processing. The polling module is used to periodically poll the received data area of ​​the master station's shared memory through the master station link layer to determine whether feedback data from the slave station has been received within a preset polling time. The clearing module is used to complete data communication and clear the data communication status of the master station shared memory and the slave station shared memory if feedback data is received from the slave station.

10. A configurable fieldbus data communication device, characterized in that, The device includes: a memory, a processor, and a configurable fieldbus data communication program stored in the memory and executable on the processor, the configurable fieldbus data communication program being configured to implement the steps of the configurable fieldbus data communication method as described in any one of claims 1 to 8.

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