Image acquisition method, device and system for large-size display panel

Abstract

The embodiment of the invention relates to an image acquisition method, device and system for a large-size display panel. The method comprises the following steps: sending a checkerboard image to a to-be-tested display panel, so that the to-be-tested display panel displays the checkerboard image; obtaining checkerboard grid images respectively collected by a plurality of cameras; based on the coordinate of the first reference vertex on each checkerboard image under the reference pixel coordinate system, calculating an overlapping region in adjacent checkerboard images, and determining a camera position associated with the overlapping region according to the overlapping region when a set condition is met; after the positions of all the cameras are determined, grid images are sent to the display panel to be detected; the method comprises the following steps: after obtaining grid sub-images collected by a plurality of cameras, calculating grid line coordinates of all the grid sub-images, and determining cutting coordinate parameters of each grid sub-image; and cutting the image shot by the corresponding camera according to the cutting coordinate parameter of each grid sub-image. According to the technical scheme, the configuration requirement for the camera can be reduced, and the production cost is saved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of point screen testing, and in particular to an image acquisition method, device and system for a large-size display panel. BACKGROUND

[0002] In the automatic point screen testing technology, considering the development trend of large size and high resolution of display panels, a single high-definition camera cannot completely cover the display screen, so the industry often adopts the way of partition shooting of the display area of the display panel by multiple high-definition cameras. In the automatic point screen testing process of the display panel, the image generator lights up the screen of the display panel, multiple high-definition cameras shoot images of different areas, the effective image data of different areas are transmitted back to the host computer by the internal software algorithm processing of the high-definition camera, the host computer finally splices the transmitted effective image data into a complete image, and the software algorithm of the host computer analyzes the defects of the complete image.

[0003] Obviously, in the scheme of multiple high-definition cameras cooperating, the high-definition camera needs to be additionally integrated with image processing, cropping and other functions in addition to collecting high-quality images, and these functions need to pay high customization fees to the camera manufacturer, directly leading to high production cost of automatic point screen testing. SUMMARY

[0004] Therefore, the embodiments of the present application provide an image acquisition method, device and system for a large-size display panel to solve at least one problem in the background art, which can reduce the configuration requirements for the camera and save production cost.

[0005] In a first aspect, the embodiments of the present application provide an image acquisition method for a large-size display panel, comprising: sending a checkerboard image to a to-be-tested display panel to make the to-be-tested display panel display the checkerboard image on the full screen, wherein the checkerboard image is preset according to a plurality of cameras and pixel information of the to-be-tested display panel, and the plurality of cameras are used to shoot different areas of the to-be-tested display panel; acquiring checkerboard images respectively collected by the plurality of cameras, wherein the checkerboard images have at least one first reference vertex; calculating an overlapping area in adjacent two checkerboard images based on the coordinates of the first reference vertex on each checkerboard image in a preset reference pixel coordinate system, and determining the positions of two cameras associated with the overlapping area when the overlapping area meets a set condition; after determining the positions of all the cameras, sending a grid image to the to-be-tested display panel to make the to-be-tested display panel display the grid image on the full screen; After acquiring grid sub-images from multiple cameras, the coordinates of the grid lines of all the grid sub-images are calculated to determine the cropping coordinate parameters of each grid sub-image. The images captured by the corresponding camera are cropped according to the cropping coordinate parameters of each of the grid sub-images.

[0006] In conjunction with the first aspect of this application, in an optional embodiment, it further includes: The cropped images are stitched together to obtain the complete image displayed on the display panel under test.

[0007] In conjunction with the first aspect of this application, in an optional embodiment, calculating the overlapping region in two adjacent chessboard grid images based on the coordinates of the first reference vertices on each of the chessboard grid images in a preset reference pixel coordinate system includes: The acquired chessboard grid image is traversed to determine the number of rows and columns of squares of different colors in the chessboard grid image; The relative positions of each camera in the reference pixel coordinate system are determined based on the number of rows and columns of squares of different colors in each chessboard grid image, the starting pixel point, and the coordinates of the first reference vertex in the reference pixel coordinate system. Calculate the pixel width of the overlapping region in the chessboard grid images captured by two adjacent cameras.

[0008] In conjunction with the first aspect of this application, in an optional embodiment, determining the positions of two cameras associated with the overlapping region based on the overlapping region when a set condition is met includes: If the pixel width of the overlapping region exceeds a preset pixel threshold, the relative positions of two adjacent cameras associated with the overlapping region in the reference pixel coordinate system are determined, wherein the preset pixel threshold is determined based on the grid line spacing of the grid image.

[0009] In conjunction with the first aspect of this application, in an optional embodiment, it further includes: If the pixel width of the overlapping region is below the preset pixel threshold, the positions of the two adjacent cameras associated with the overlapping region are adjusted until the overlapping region meets the set conditions.

[0010] In conjunction with the first aspect of this application, in an optional embodiment, calculating the coordinates of the grid lines of all the grid sub-images and determining the clipping coordinate parameters of each of the grid sub-images includes: Determine the coordinates of the second reference vertex on the grid sub-image in the reference pixel coordinate system, wherein the coordinates of the second reference vertex in the reference pixel coordinate system are the same as those of the corresponding first reference vertex; Calculate the coordinates of the diagonal vertex opposite the second reference vertex in the reference pixel coordinate system, wherein the diagonal vertex is formed by the intersection of the grid horizontal line and the grid vertical line that are farthest from the second reference vertex on the grid sub-image; Along the pixel width direction of the overlapping region, determine the cropping coordinate components of two adjacent grid sub-images in the corresponding direction to obtain the cropping coordinate parameters of the grid sub-images.

[0011] In conjunction with the first aspect of this application, in an optional embodiment, determining the crop coordinate components of two adjacent grid sub-images in corresponding directions includes: The selection is made from the coordinate components of the diagonal vertices associated with the overlapping region in the target direction, wherein the cropping coordinate parameters of each of the grid sub-images formed by all the selected coordinate components satisfy that any two adjacent grid sub-images have the same boundary.

[0012] In conjunction with the first aspect of this application, in an alternative embodiment, the method is applied to an FPGA chip, a CPLD chip, or a high-speed ARM processor.

[0013] Secondly, embodiments of this application provide an image signal processing apparatus, comprising: processor; Memory used to store executable instructions for a computer; The processor is configured to execute the computer-executable instructions to implement the method as described in any one of the first aspects.

[0014] Thirdly, embodiments of this application provide an image acquisition system for a large-size display panel, including: Display panel under test; Multiple cameras are used to capture different areas of the display panel under test; An image signal processing device, electrically connected to the display panel under test and each of the cameras, is used to implement the method as described in any one of the first aspects.

[0015] Fourthly, embodiments of this application provide a screen testing system, including: Host computer; Display panel under test; Multiple cameras are used to capture different areas of the display panel under test; An image signal processing device is electrically connected to the host computer, the display panel under test, and each of the cameras; the image signal processing device is used to implement the method as described in any one of the first aspects, and after obtaining a complete image of the display panel under test, uploads the complete image to the host computer.

[0016] This application provides an image acquisition system, apparatus, and system for a large-size display panel. First, a checkerboard image is sent to the display panel under test. The checkerboard images returned by the cameras are analyzed to determine the overlapping area between two adjacent checkerboard images. Based on the overlapping area, the positions of two cameras related to the overlapping area are determined. Second, after determining the positions of all cameras, a grid image is switched and sent to the display panel under test. The grid sub-images returned by the cameras are analyzed to determine the cropping coordinate parameters of each grid sub-image. The cropping coordinate parameters are the coordinate boundaries. Finally, the images captured by the cameras can be effectively cropped according to the coordinate boundaries of each grid sub-image. The cropped image is the effective image captured by the corresponding camera. The effective images from multiple cameras can be directly stitched together to obtain the complete image of the display panel under test. The technical solution of this application first utilizes the high contrast of the checkerboard pattern to accurately locate the relative positions and overlapping areas of each camera, providing a stable foundation for subsequent calculation of the cropping coordinate data corresponding to each camera in the grid image. This avoids the loss of stitched images due to camera position deviations. Thus, even if ordinary high-definition cameras without image processing and cropping functions are used, the automated screen testing requirements for large-size display panels can be met, reducing the configuration requirements for high-definition cameras and saving production costs.

[0017] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0018] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings: Figure 1 A flowchart illustrating the image acquisition method for a large-size display panel provided in an embodiment of this application; Figure 2 This is the first schematic diagram of a chessboard pattern; Figure 3 This is a second schematic diagram of a chessboard pattern; Figure 4 This is a schematic diagram of the checkerboard image on the reference pixel coordinate axis. Figure 5 This is a schematic diagram of a grid image; Figure 6 A schematic diagram showing the distribution of the four overlapping regions in the reference pixel coordinate system and the distribution of the effective cropping region; Figure 7 A structural block diagram of an image acquisition system for a large-size display panel provided in an embodiment of this application; Figure 8This is a structural block diagram of the screen testing system provided in the embodiments of this application; Figure 9 This is a structural block diagram of the image signal processing apparatus provided in the embodiments of this application. Detailed Implementation

[0019] To make the technical solution and beneficial effects of the present invention more apparent and understandable, a detailed description is provided below by listing specific embodiments. The accompanying drawings are not necessarily drawn to scale, and local features may be enlarged or reduced to more clearly show the details of the local features; unless otherwise defined, the technical and scientific terms used herein have the same meanings as those in the technical field to which this application pertains.

[0020] The image acquisition method for a large-size display panel provided in this application embodiment can be specifically applied in an image signal processing device. This device can be an image generator or similar equipment. The image generator includes a processing chip that implements the method. The processing chip can be an FPGA (Field-Programmable Gate Array) chip, a CPLD (Complex Programmable Logic Device) chip, or a high-speed ARM processor. In this embodiment, the processing chip is specifically an FPGA chip.

[0021] like Figure 1 As shown, this application provides an image acquisition method for a large-size display panel, which is applied to an image generator and mainly includes steps S101 to S106.

[0022] Step S101: Send a checkerboard image to the display panel under test so that the display panel under test displays the checkerboard image in full screen. The checkerboard image is preset based on the pixel information of multiple cameras and the display panel under test. Multiple cameras are used to capture different areas of the display panel under test.

[0023] The image generator produces checkerboard image data, which can contain one or more sets of checkerboard squares. If there are two or four cameras, the checkerboard image can be called a single set of checkerboard squares, such as black and white squares. Figure 2 As shown; if the number of cameras is three or nine, then the checkerboard image can be multiple sets of checkerboard patterns, such as a combination of black and white squares and red and green squares. The main checkerboard pattern within the shooting range of each camera is the same set of checkerboard patterns, while the main checkerboard patterns of two adjacent cameras are different sets of checkerboard patterns, with different colors for each set, such as... Figure 3As shown, this is a checkerboard image corresponding to a 3x3 camera. This embodiment utilizes the high contrast of the checkerboard squares to quickly locate the reference vertex. Taking the pixel resolution of the display panel under test as 1920*1080 as an example, the side length of each square in the checkerboard image is 20 pixels, ensuring that the square boundaries are clear and identifiable.

[0024] Taking a large display panel with a pixel resolution of 1920*1080 tested by four cameras as an example, the FPGA chip of the image generator outputs a black and white grid image with a side length of 20 pixels to the display panel, which is then displayed full-screen on the panel's screen. The black and white in the checkerboard image have extremely high contrast. After the cameras transmit the captured black and white grid image back, the FPGA chip can identify the boundary features of the black and white grids in the image. For example... Figure 4 As shown, a reference pixel coordinate system is established on the screen of the display panel. The coordinates of the lower left vertex of the screen in the reference pixel coordinate system are defined as (1, 1), and the positive direction of the X-axis is from left to right, and the positive direction of the Y-axis is from bottom to top. Then there are four reference vertices in the chessboard image. The coordinates of the four reference vertices in the reference pixel coordinate system are: lower left vertex A (1, 1), upper left vertex B (1, 1080), upper right vertex C (1920, 1080), and lower right vertex D (1920, 1).

[0025] Step S102: Acquire chessboard grid images captured by multiple cameras respectively, with at least one first reference vertex on the chessboard grid image.

[0026] Generally, cameras a, b, c, and d take pictures of the four areas of the display panel under test: the lower left, lower right, upper right, and upper left. To ensure the accuracy of subsequent image cropping, cameras a, b, c, and d take pictures of the display panel under test, and the pictures must contain reference vertices A, B, C, and D. Otherwise, the camera positions need to be adjusted so that the camera can capture the corresponding reference vertices. In step S102, the chessboard grid images captured by cameras a, b, c, and d are obtained. The four chessboard grid images have first reference vertices A1, B1, C1, and D1 in sequence. The coordinates of the first reference vertices A1, B1, C1, and D1 are (1, 1), (1920, 1), (1920, 1080), and (1, 1080) in sequence.

[0027] Step S103: Based on the coordinates of the first reference vertex on each chessboard grid image in the preset reference pixel coordinate system, calculate the overlapping area in two adjacent chessboard grid images, and determine the positions of the two cameras associated with the overlapping area when the set conditions are met.

[0028] In some embodiments, step S103, calculating the overlapping region in two adjacent chessboard images based on the coordinates of the first reference vertex on each chessboard grid image in a preset reference pixel coordinate system, may include: traversing the acquired chessboard grid images to determine the number of rows and columns of squares of different colors in the chessboard grid images; determining the relative position of each camera in the reference pixel coordinate system based on the number of rows and columns of squares of different colors in each chessboard grid image, the starting pixel point, and the coordinates of the first reference vertex in the reference pixel coordinate system; and calculating the pixel width of the overlapping region in the chessboard grid images acquired by each of the two adjacent cameras. In this embodiment, the FPGA chip can traverse the black and white grid images returned by cameras a, b, c, and d to determine the number of rows and columns of squares and the starting pixel point in each black and white grid image. Next, based on the four starting pixels and the corresponding number of rows and columns of the grid, the four starting pixels are mapped to the corresponding first reference vertices A1, B1, C1, and D1. This allows the FPGA chip to determine the relative positions of cameras a, b, c, and d in the reference pixel coordinate system, thus clarifying that cameras a, b, c, and d correspond to the four regions: lower left, lower right, upper right, and upper left. After the FPGA chip determines the relative positions of the cameras, it can calculate the pixel width of the overlapping region of the black and white grids in the black and white grid images acquired by two adjacent cameras. The portion that appears simultaneously in two adjacent black and white grid images is the overlapping region.

[0029] Taking the black and white grid images captured by the lower left camera a and the lower right camera b as an example to calculate the pixel width of the overlapping area, we traverse the lower left and lower right images. From left to right, we can identify the number of pixels L1 on the X-axis of the lower left image in the reference pixel coordinate system, and from right to left, we can identify the number of pixels L2 on the X-axis of the lower right image. Given that the number of pixels from the first reference vertex A1 (1,1) to the first reference vertex B1 (1920,1) on the X-axis is 1920, we can calculate the pixel width of the overlapping area as L1+L2-1920.

[0030] In some embodiments, in step S103, determining the positions of the two cameras associated with the overlapping area based on the overlapping area meeting a set condition may include: if the pixel width of the overlapping area exceeds a preset pixel threshold, then determining the relative positions of the two adjacent cameras associated with the overlapping area in the reference pixel coordinate system, wherein the preset pixel threshold is determined based on the grid line spacing of the grid image.

[0031] In this embodiment, the FPGA chip can accurately calculate the pixel width of the overlapping area of ​​adjacent cameras. In order to meet the error compensation requirements of subsequent grid image cropping, the pixel width of the overlapping area should be greater than the interval between two adjacent lines in the grid image. In step S104, the interval length between two adjacent lines in the grid image is 10 pixels. Therefore, the preset pixel threshold can be set to 10. Thus, meeting the setting condition can be simply expressed as "the pixel width of the overlapping area exceeds the preset pixel threshold", which is essentially to meet the error compensation requirements of subsequent grid image cropping.

[0032] When the pixel width of the overlapping area of ​​the black and white grid images captured by the lower left camera a and the lower right camera b is calculated to be greater than 10 pixels, the relative position of the lower left camera a and the lower right camera b can meet the error compensation requirements for subsequent grid image cropping.

[0033] In some embodiments, the method may further include adjusting the positions of two adjacent cameras associated with the overlapping region until the overlapping region meets the set conditions if the pixel width of the overlapping region is below a preset pixel threshold. When it is calculated that the pixel width of the overlapping region of the black and white grid images captured by the lower left camera a and the lower right camera b is less than 10 pixels, the grid sub-images captured by the lower left camera a and the lower right camera b do not meet the error compensation requirements for cropping. Therefore, it is necessary to adjust the positions of the lower left camera a and the lower right camera b until the pixel width of the overlapping region of the images captured by the lower left camera a and the lower right camera b is greater than 10 pixels. If the pixel width of the overlapping region is less than 10 pixels, the system will automatically adjust the corresponding camera positions to lay the foundation for the integrity of subsequent image stitching. The system's adjustment of camera positions is well known to those skilled in the art and will not be described in detail here.

[0034] Step S104: After determining the positions of all cameras, send the grid image to the display panel under test so that the display panel under test displays the grid image in full screen.

[0035] Once the FPGA chip determines the relative positions of the lower left camera (a), lower right camera (b), upper right camera (c), and upper left camera (d) in the reference pixel coordinate system, the FPGA chip switches its output image, sending a grid image to the display panel under test. The grid image is formed by intersecting lines, with each grid line spaced 10 pixels apart and each line width being 1 pixel. For ease of calculation, as... Figure 5 As shown, optionally, the first vertical line x1 from left to right on the grid sub-image captured by the lower left camera a has a coordinate component of 10 on the X-axis in the reference pixel coordinate system, the second vertical line x2 has a coordinate component of 20 on the X-axis, and the horizontal line is similar.

[0036] Step S105: After acquiring grid sub-images from multiple cameras, calculate the coordinates of the grid lines in all grid sub-images and determine the cropping coordinate parameters for each grid sub-image.

[0037] In step S105, calculating the coordinates of the grid lines of all grid sub-images and determining the clipping coordinate parameters of each grid sub-image may include: determining the coordinates of the second reference vertex on the grid sub-image in the reference pixel coordinate system, wherein the coordinates of the second reference vertex in the reference pixel coordinate system are the same as those of the corresponding first reference vertex; calculating the coordinates of the diagonal vertex opposite to the second reference vertex in the reference pixel coordinate system, wherein the diagonal vertex is formed by the intersection of the grid horizontal line and the grid vertical line farthest from the second reference vertex on the grid sub-image; determining the clipping coordinate components of two adjacent grid sub-images in the corresponding direction along the pixel width direction of the overlapping region, thereby obtaining the clipping coordinate parameters of the grid sub-images; further, determining the clipping coordinate components of two adjacent grid sub-images in the corresponding direction may include: selecting from the coordinate components of the diagonal vertices associated with the overlapping region in the target direction, wherein the clipping coordinate parameters of each grid sub-image formed by all selected coordinate components satisfy that any two adjacent grid sub-images have the same boundary.

[0038] In this embodiment, grid sub-images captured by the lower left camera a, lower right camera b, upper right camera c, and upper left camera d are acquired. Each of the four grid sub-images has a second reference vertex A2, B2, C2, and D2, with coordinates (1, 1), (1920, 1), (1920, 1080), and (1, 1080) respectively. Each grid sub-image is traversed, and the number of vertical and horizontal lines in each grid sub-image is counted. For example, the grid sub-image captured by the lower left camera a has a vertical line i... a Strip, horizontal line j a Therefore, the coordinates of the diagonal vertex opposite the second reference vertex A2 (1, 1) in the reference pixel coordinate system are (10·i). a ,10·j a The coordinates of the diagonal vertex are denoted as (X). a Y a The grid sub-image captured by camera b in the lower right corner contains vertical lines i. b Strip, horizontal line j b Therefore, the coordinates of the diagonal vertex opposite the second reference vertex B2 (1920, 1) in the reference pixel coordinate system are (1920 - 10·(i b -1), 10·j b The coordinates of the diagonal vertex are denoted as (X). b Y b The grid sub-image captured by the upper right camera (c) contains vertical white lines (i).c Strip, horizontal white line j c Therefore, the coordinates of the diagonal vertex opposite the second reference vertex C2 (1920, 1080) in the reference pixel coordinate system are (1920 - 1080) / (i...). c -1), 1080 -10·(j c -1), the coordinates of the diagonal vertex are (X) c Y c The grid sub-image captured by the upper left camera d contains vertical white lines i. d Strip, horizontal white line j d Therefore, the coordinates of the diagonal vertex opposite the second reference vertex D2 (1, 1080) in the reference pixel coordinate system are (10·i) d ,1080 -10·(j d -1), the coordinates of the diagonal vertex are (X) d Y d ).

[0039] Considering that the pixel width of the overlapping region corresponding to two adjacent cameras is greater than 10 pixels, then X a >X b X d >X c X a and X d The size is determined based on the actual value, Y a >Y d Y b >Y c You can first take one pixel on the X-axis as the clipping information, and then take two pixels on the Y-axis as the clipping information. Specifically, for example... Figure 6 As shown, assume X d >X a To avoid image loss during subsequent cropping, we first set x=X on the X-axis. a As the vertical clipping line of the four grid sub-images, i.e., taking X a and X d If the smaller value is taken, then the larger value X is taken. d This will result in incomplete images captured by camera a, making subsequent stitching impossible; then, take y=Y on the Y-axis. a As the horizontal clipping line of the grid sub-images of cameras a and d, let y=Y b As the horizontal clipping lines for the grid sub-images of cameras b and c, the effective clipping region for the lower left grid sub-image is (1, 1) to (X). a Y a The effective cropping area of ​​the lower right grid sub-image is (X). a,1) to (1920, Y b The effective cropping area of ​​the upper right grid sub-image is (X). a Y b From (1920, 1080), the effective cropping region of the upper left grid sub-image is (1, Y). a ) to (X a ,1080).

[0040] Step S106: Based on the cropping coordinate parameters of each grid sub-image, crop the corresponding image captured by the camera.

[0041] In step S106, the clipping coordinate parameters for the four regions—lower left, lower right, upper right, and upper left—are (1, 1) to (X). a Y a ), (X) a ,1) to (1920, Y b ), (X) a Y b (1, Y) to (1920, 1080), and (1, Y) a ) to (X a The cropping coordinate parameters of these four regions (1080) correspond to the lower left camera a, lower right camera b, upper right camera c, and upper left camera d. Therefore, for the same display panel, the image cropping module in the FPGA chip can crop the images acquired by each camera according to their respective cropping coordinate parameters using the cropping coordinate parameters of the four cameras to obtain four valid images.

[0042] In some embodiments, the FPGA chip can also integrate an image stitching function. Based on this, it can further include: stitching the cropped image to obtain a complete image displayed on the display panel under test. In this embodiment, after the image is cropped, the FPGA chip stitches and integrates the effective images of the four regions to form a complete image that is completely consistent with the display panel under test. Finally, the complete image is sent back to the host computer for subsequent screen defect detection and analysis.

[0043] like Figure 7As shown, this application embodiment also provides an image acquisition system for a large-size display panel, including a display panel under test 701, an image signal processing device 703, and multiple cameras 702; the multiple cameras 702 are used to capture different areas of the display panel under test 701; the image signal processing device 703 is electrically connected to the display panel under test 701 and each camera 702, and is used to send a checkerboard image to the display panel under test 701 so that the display panel under test 701 displays the checkerboard image in full screen, wherein the checkerboard image is preset according to the pixel information of the multiple cameras 702 and the display panel under test 701; the system acquires the checkerboard images captured by the multiple cameras 702 respectively, wherein the checkerboard image has at least one first... A reference vertex is used; based on the coordinates of the first reference vertex on each chessboard grid image in a preset reference pixel coordinate system, the overlapping area in two adjacent chessboard grid images is calculated, and the positions of two cameras 702 associated with the overlapping area are determined according to the overlapping area when the set conditions are met; after determining the positions of all cameras 702, the grid image is sent to the display panel under test 701 so that the display panel under test 701 displays the grid image in full screen; after acquiring the grid sub-images collected by multiple cameras 702, the coordinates of the grid lines of all grid sub-images are calculated, and the cropping coordinate parameters of each grid sub-image are determined; according to the cropping coordinate parameters of each grid sub-image, the image captured by the corresponding camera 702 is cropped.

[0044] Furthermore, the image signal processing device 703 is also used to stitch the cropped image together to obtain a complete image displayed on the display panel 701 under test, so as to send the complete image to the host computer.

[0045] In the image signal processing device 703, the overlapping region in two adjacent chessboard images is calculated based on the coordinates of the first reference vertex on each chessboard image in a preset reference pixel coordinate system. This includes: traversing the acquired chessboard images to determine the number of rows and columns of squares of different colors in the chessboard images; determining the relative position of each camera 702 in the reference pixel coordinate system based on the number of rows and columns of squares of different colors in each chessboard image, the starting pixel point, and the coordinates of the first reference vertex in the reference pixel coordinate system; and calculating the pixel width of the overlapping region in the chessboard images acquired by each of the two adjacent cameras 702.

[0046] In the image signal processing apparatus 703, determining the positions of two cameras 702 associated with the overlapping region based on the overlapping region when a set condition is met may include: if the pixel width of the overlapping region exceeds a preset pixel threshold, determining the relative positions of two adjacent cameras 702 associated with the overlapping region in a reference pixel coordinate system, wherein the preset pixel threshold is determined based on the grid line spacing of the grid image.

[0047] Furthermore, the image signal processing device 703 is also used to: if the pixel width of the overlapping region is below a preset pixel threshold, adjust the positions of the two adjacent cameras 702 associated with the overlapping region until the overlapping region meets the set conditions.

[0048] In the image signal processing apparatus 703, calculating the coordinates of the grid lines of all grid sub-images and determining the cropping coordinate parameters of each grid sub-image may include: determining the coordinates of a second reference vertex on the grid sub-image in the reference pixel coordinate system, wherein the coordinates of the second reference vertex in the reference pixel coordinate system are the same as those of the corresponding first reference vertex; calculating the coordinates of the diagonal vertex opposite the second reference vertex in the reference pixel coordinate system, wherein the diagonal vertex is formed by the intersection of the grid horizontal line and the grid vertical line farthest from the second reference vertex on the grid sub-image; and determining the cropping coordinate components of two adjacent grid sub-images in corresponding directions along the pixel width direction of the overlapping region, thereby obtaining the cropping coordinate parameters of the grid sub-images. Specifically, determining the cropping coordinate components of two adjacent grid sub-images in corresponding directions may include: selecting from the coordinate components of the diagonal vertices associated with the overlapping region in the target direction, wherein the cropping coordinate parameters of each grid sub-image formed by all selected coordinate components satisfy the condition that any two adjacent grid sub-images have the same boundary.

[0049] like Figure 8 As shown in the figure, this application embodiment also provides a screen testing system, including a host computer 704, a display panel under test 701, an image signal processing device 703, and multiple cameras 702; the multiple cameras 702 are used to capture different areas of the display panel under test 701; the image signal processing device 703 is electrically connected to the host computer 704, the display panel under test 701, and each camera 702, and is used to upload the complete image to the host computer 704 after obtaining the complete image of the display panel under test 701. The specific implementation process of the function and role of the image signal processing device 703 can be found in the implementation process of the corresponding steps in the above method, and will not be described in detail here.

[0050] like Figure 9 As shown, this application embodiment also provides an image signal processing apparatus 703. The image signal processing apparatus 703 includes: one or more processors 901 and a memory 902; the memory 902 stores computer-executable instructions; the processor 901 is configured to execute the computer-executable instructions to implement the steps in the method as described in any of the above embodiments.

[0051] The image signal processing device 703 can be an image generator.

[0052] The processor 901 may be a central processing unit (CPU) or other form of processing unit with data processing and / or instruction execution capabilities, and may control other components in the electronic device to perform desired functions.

[0053] The memory 902 may include one or more computer program products, which may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. Volatile memory may include, for example, random access memory (RAM) and / or cache memory. Non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program instructions may be stored on the computer-readable storage medium, and the processor 901 may execute the program instructions to implement the steps in the text recognition methods of the various embodiments of this application above, and / or other desired functions.

[0054] In one example, the image signal processing apparatus 703 may further include input devices and output devices, which are interconnected via a bus system and / or other forms of connection mechanism (not shown in the figure).

[0055] In addition, input devices may include, for example, a keyboard, a mouse, a microphone, etc. Output devices can output various information to the outside, and may include, for example, a monitor, speakers, a printer, and communication networks and their connected remote output devices, etc.

[0056] Of course, for the sake of simplicity, Figure 9 Only a portion of the components of the image signal processing apparatus 703 relevant to this application are shown in this illustration, omitting components such as buses and input / output interfaces. In addition, the image signal processing apparatus 703 may include any other suitable components depending on the specific application.

[0057] This application also provides a computer-readable storage medium. The computer-readable storage medium stores instructions that, when executed by a processor of an electronic device, enable the electronic device to perform the steps of the method as described in any of the above embodiments.

[0058] Embodiments of this application may be systems, methods, and / or computer program products. A computer program product may include a computer-readable storage medium on which computer-readable program instructions are loaded to cause a processor to implement various aspects of this application. The computer program product may be written in any combination of one or more programming languages ​​to perform operations of embodiments of this application. Programming languages ​​include object-oriented programming languages ​​such as Java, C++, etc., and conventional procedural programming languages ​​such as the "C" language or similar programming languages. The program code may execute entirely on a user's computing device, partially on a user's device, as a standalone software package, partially on a user's computing device and partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computers, the remote computer may be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, electronic circuits, such as programmable logic circuits, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), are personalized by utilizing state information of computer-readable program instructions. These electronic circuits can execute computer-readable program instructions to implement various aspects of this application.

[0059] Computer-readable storage media can take the form of any combination of one or more readable media. A readable medium can be a readable signal medium or a readable storage medium. A computer-readable storage medium is a tangible device capable of holding and storing instructions for use by an instruction execution device. A readable storage medium can be, for example, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples (a non-exhaustive list) of readable storage media include: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disc read-only memory (CD-ROM), digital multifunction disc (DVD), memory sticks, floppy disks, mechanical encoding devices, such as punch cards or recessed protrusions storing instructions thereon, and any suitable combinations thereof. The computer-readable storage medium as used herein is not to be construed as a transient signal itself, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides or other transmission media (e.g., light pulses through fiber optic cables), or electrical signals transmitted through wires.

[0060] The computer-readable program instructions described herein can be downloaded from computer-readable storage media to various computing / processing devices, or downloaded via a network, such as the Internet, local area network, wide area network, and / or wireless network, to an external computer or external storage device. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to the computer-readable storage media in the respective computing / processing device.

[0061] Various aspects of this application are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0062] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that, when executed by the processor of the computer or other programmable data processing apparatus, they create means for implementing the functions / actions specified in one or more blocks of the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium that causes a computer, programmable data processing apparatus, and / or other device to operate in a particular manner; thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing aspects of the functions / actions specified in one or more blocks of the flowchart and / or block diagram.

[0063] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0064] It should be noted that the method embodiments, device embodiments, system embodiments, and computer-readable storage medium embodiments provided in this application belong to the same concept; the technical features in the technical solutions described in each embodiment can be arbitrarily combined without conflict.

[0065] It should be understood that the above embodiments are exemplary and are not intended to encompass all possible implementations included in the claims. Various modifications and changes can be made to the above embodiments without departing from the scope of this disclosure. Similarly, the various technical features of the above embodiments can be arbitrarily combined to form other embodiments of the present invention that may not be explicitly described. Therefore, the above embodiments only illustrate several implementations of the present invention and do not limit the scope of protection of this patent.

Claims

1. A method for acquiring images of a large-size display panel, characterized in that, include: A checkerboard image is sent to the display panel under test so that the display panel under test displays the checkerboard image in full screen. The checkerboard image is preset based on the pixel information of multiple cameras and the display panel under test. The multiple cameras are used to capture different areas of the display panel under test. Acquire chessboard grid images captured by multiple cameras, wherein each chessboard grid image has at least one first reference vertex; Based on the coordinates of the first reference vertex on each of the chessboard grid images in a preset reference pixel coordinate system, the overlapping area in two adjacent chessboard grid images is calculated, and the positions of the two cameras associated with the overlapping area are determined according to the overlapping area when the set conditions are met. After determining the positions of all the cameras, a grid image is sent to the display panel under test so that the display panel under test displays the grid image in full screen. After acquiring grid sub-images from multiple cameras, the coordinates of the grid lines of all the grid sub-images are calculated to determine the cropping coordinate parameters of each grid sub-image. The images captured by the corresponding camera are cropped according to the cropping coordinate parameters of each of the grid sub-images.

2. The method according to claim 1, characterized in that, Also includes: The cropped images are stitched together to obtain the complete image displayed on the display panel under test.

3. The method according to claim 1, characterized in that, The step of calculating the overlapping region in two adjacent chessboard grid images based on the coordinates of the first reference vertex on each of the chessboard grid images in a preset reference pixel coordinate system includes: The acquired chessboard grid image is traversed to determine the number of rows and columns of squares of different colors in the chessboard grid image; The relative positions of each camera in the reference pixel coordinate system are determined based on the number of rows and columns of squares of different colors in each chessboard grid image, the starting pixel point, and the coordinates of the first reference vertex in the reference pixel coordinate system. Calculate the pixel width of the overlapping region in the chessboard grid images captured by two adjacent cameras.

4. The method according to claim 1 or 3, characterized in that, The step of determining the positions of two cameras associated with the overlapping area based on the overlapping area when a set condition is met includes: If the pixel width of the overlapping region exceeds a preset pixel threshold, the relative positions of two adjacent cameras associated with the overlapping region in the reference pixel coordinate system are determined, wherein the preset pixel threshold is determined based on the grid line spacing of the grid image.

5. The method according to claim 4, characterized in that, Also includes: If the pixel width of the overlapping region is below the preset pixel threshold, the positions of the two adjacent cameras associated with the overlapping region are adjusted until the overlapping region meets the set conditions.

6. The method according to claim 1, characterized in that, The calculation of the coordinates of the grid lines of all the grid sub-images and the determination of the clipping coordinate parameters of each grid sub-image include: Determine the coordinates of the second reference vertex on the grid sub-image in the reference pixel coordinate system, wherein the coordinates of the second reference vertex in the reference pixel coordinate system are the same as those of the corresponding first reference vertex; Calculate the coordinates of the diagonal vertex opposite the second reference vertex in the reference pixel coordinate system, wherein the diagonal vertex is formed by the intersection of the grid horizontal line and the grid vertical line that are farthest from the second reference vertex on the grid sub-image; Along the pixel width direction of the overlapping region, determine the cropping coordinate components of two adjacent grid sub-images in the corresponding direction to obtain the cropping coordinate parameters of the grid sub-images.

7. The method according to claim 6, characterized in that, Determining the crop coordinate components of two adjacent grid sub-images in corresponding directions includes: The selection is made from the coordinate components of the diagonal vertices associated with the overlapping region in the target direction, wherein the cropping coordinate parameters of each of the grid sub-images formed by all the selected coordinate components satisfy that any two adjacent grid sub-images have the same boundary.

8. An image signal processing apparatus, characterized in that, include: processor; Memory used to store executable instructions for a computer; The processor is configured to execute the computer-executable instructions to implement the method as described in any one of claims 1 to 7.

9. An image acquisition system for a large-size display panel, characterized in that, include: Display panel under test; Multiple cameras are used to capture different areas of the display panel under test; An image signal processing device, electrically connected to the display panel under test and each of the cameras, is used to implement the method as described in any one of claims 1 to 7.

10. A screen dot test system, characterized in that, include: Host computer; Display panel under test; Multiple cameras are used to capture different areas of the display panel under test; An image signal processing device is electrically connected to the host computer, the display panel under test, and each of the cameras; the image signal processing device is used to implement the method as described in any one of claims 1 to 7, and after obtaining a complete image of the display panel under test, to upload the complete image to the host computer.

Images