An snn learning accelerator for ecg monitoring
By employing a fully asynchronous logic-based two-layer dynamic network and asynchronous circuit design, the high power consumption and individual difference adaptation issues of wearable ECG devices are resolved. This achieves low-power, high-precision ECG signal processing and long battery life, supports on-chip learning, and ensures user privacy and security.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- ZHEJIANG UNIV
- Filing Date
- 2025-11-04
- Publication Date
- 2026-04-17
AI Technical Summary
Existing wearable ECG devices suffer from high power consumption and difficulty adapting to individual physiological differences, resulting in insufficient battery life and low monitoring reliability. The fixed models of existing edge devices cannot adapt to the time-varying characteristics of ECG signals, and frequent data transmission exacerbates energy consumption.
A two-layer dynamic network with fully asynchronous logic, including binary classification CNN and four-class classification SNN, is adopted to support on-chip learning. Through asynchronous global control module and asynchronous weight update module, power consumption is reduced and individual differences are adapted. Combined with asynchronous circuit design and event-driven logic, redundant dynamic power consumption is reduced.
It achieves low-power, high-precision ECG signal processing, supports long battery life and individual difference adaptation, ensures user privacy and security, and provides efficient on-chip learning capabilities.
Smart Images

Figure CN121052316B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of ECG acceleration circuit design technology, specifically relating to an SNN learning accelerator for ECG monitoring. Background Technology
[0002] Cardiovascular disease is a leading cause of death worldwide. Electrocardiogram (ECG) monitoring is a core tool for the early diagnosis of arrhythmias, myocardial ischemia, and other conditions. While wearable ECG devices offer a new paradigm for home health management, their clinical application is still limited by two major technological bottlenecks: First, traditional ECG processors rely on fixed algorithms and high-energy-consuming wireless data transmission architectures, resulting in excessive system power consumption and continuous monitoring time typically less than 72 hours. Studies show that wireless communication modules account for over 60% of the total energy consumption in wearable systems. Second, ECG signal data is susceptible to motion artifacts, electrode contact noise, and individual physiological differences. Static processing models struggle to dynamically adapt to signal changes, severely restricting monitoring reliability. This contradiction is becoming increasingly prominent in the context of an aging society and surging demand for chronic disease management. However, current products suffer from issues such as limited battery life and interference from individual physiological differences in test results. Therefore, a breakthrough in low power consumption and adaptive capabilities through technological innovation is urgently needed.
[0003] In recent years, the development of edge intelligence has provided new ideas for medical electronics, reducing reliance on the cloud through localized data processing and simultaneously lowering latency and privacy risks. However, existing medical edge devices mostly focus on inference acceleration, and their fixed models cannot adapt to the time-varying characteristics of ECG signals, while traditional cloud-based learning solutions exacerbate energy consumption issues due to frequent data transmission. Against this backdrop, on-chip learning technology has become a key breakthrough—this technology allows devices to complete model training and updates locally, dynamically optimizing signal processing strategies. However, current research has not effectively solved the balance between energy efficiency and accuracy in medical scenarios: gradient approximation calculations, while reducing hardware overhead, may introduce model biases leading to inference accuracy problems; lightweight LSTM units, while improving temporal signal processing capabilities, still constrain overall energy efficiency due to their frequent memory accesses. Therefore, developing a circuit-algorithm co-optimization architecture for ECG processing has become an inevitable choice to drive wearable medical electronics towards practical application.
[0004] Against this backdrop, the integration of Spiking Neural Networks (SNNs) and asynchronous design technologies offers a new direction for overcoming existing bottlenecks: SNNs, by simulating the pulse coding mechanism of biological neurons, significantly reduce energy consumption through an event-driven asynchronous computing mode, naturally adapting to the temporal characteristics of ECG signal data; the asynchronous design architecture further eliminates redundant clock signals, achieving near-zero static power consumption. This technological path not only promises to drive the upgrade of wearable ECG devices to all-weather, high-precision monitoring, but will also promote the widespread adoption of cardiovascular health management through low-power, high-concurrency edge computing characteristics. Furthermore, research on SNN-based ECG chips can drive independent technological breakthroughs in neuromorphic computing and medical electronics, reducing reliance on high-end chips. Summary of the Invention
[0005] In view of the above, in order to at least solve the problems existing in the prior art, this invention proposes an SNN learning accelerator for ECG monitoring, which supports on-chip learning function. Under the premise of meeting the low power consumption requirements, user data can be learned online without uploading to the cloud, ensuring user privacy and security, eliminating the characteristic differences of individual users. At the same time, it introduces a two-layer dynamic network and asynchronous processing to further reduce chip power consumption, providing new ideas and solutions for wearable medical devices.
[0006] To achieve the aforementioned objectives, an embodiment provides an SNN learning accelerator for ECG monitoring, which employs a fully asynchronous two-layer dynamic network. The two-layer dynamic network includes a binary classification CNN in the upper layer and a four-class classification SNN in the lower layer. It supports efficient on-chip learning and monitors and processes user ECG signal data with extremely low power consumption, including:
[0007] The register configuration module provides a configurable interface to external users for storing configuration information, including the structure information and operating mode of the two-layer dynamic network.
[0008] The asynchronous global control module is used to receive and distribute register configuration information, monitor and control the status of all modules;
[0009] The asynchronous neural network control module is used for neural network state control, receives input configuration information, and dynamically adjusts the operation mode of the two-layer dynamic network.
[0010] The asynchronous binary classification CNN module is used for signal preprocessing of the accelerator. It calls the upper-level binary classification CNN to perform binary classification inference on the ECG signal data. If the inference result is normal, the inference ends and the binary classification CNN is turned off. Otherwise, an enable signal is sent to activate the lower-level high-precision four-class classification SNN and send the abnormal ECG signal data of this segment.
[0011] The asynchronous four-class SNN module is used for high-precision inference of the accelerator. The lower-level four-class SNN is activated by the upper-level CNN to perform four-class inference on abnormal ECG signal data: normal (N), supraventricular premature beats (SVEB), ventricular premature beats (VEB), and atrial fibrillation (F).
[0012] The asynchronous weight update module is used for weight update operations during the training process of a two-layer dynamic network in the accelerator.
[0013] The memory management module is used for managing membrane potential values, qualification trajectory values, and neuron states during training and inference computation, storing and allocating weights for each layer, and handling external data interaction operations.
[0014] Furthermore, the acceleration circuit corresponding to the accelerator adopts a fully asynchronous architecture design. At the module level, event-driven asynchronous logic Click units are used to replace the global clock network in the synchronous circuit. By reducing or even eliminating the redundant dynamic power consumption generated by the high-frequency switching of the global clock signal in the synchronous circuit, the dynamic power consumption of the circuit during the accelerated computing process is significantly reduced. Data interaction between modules is realized based on the Req-Ack request-acknowledgment handshake protocol, and the data transmission timing is precisely controlled through the asynchronous self-synchronization mechanism.
[0015] Furthermore, the structural information of the two-layer dynamic network configured in the register configuration module determines the network accuracy and the number of neurons used. Specifically, it includes the number of neurons in the middle layer of the input layer, the number of neurons in the output layer, and the connection structure of each layer in the four-class SNN module. The operating modes include inference mode and learning mode. In inference mode, the operating parameters are the neuron threshold parameters, and in learning mode, the operating parameters are the filter coefficients.
[0016] The entire accelerator circuit is flexibly configurable. According to the user's accuracy requirements, the number of neurons in the accelerator can be flexibly configured by writing configuration parameter information to the configuration register module, and the results and accuracy of the accelerator can be freely adjusted.
[0017] Furthermore, the asynchronous global control module adopts a fully asynchronous design, using external events to drive the state transition of the built-in state machine to control the SNN learning accelerator and reduce the dynamic power consumption caused by the clock flip of the control circuit.
[0018] Furthermore, the asynchronous neural network control module adopts an asynchronous control circuit composed of Click units and pipeline self-testing units. It uses event-driven characteristics to control the state transitions during the operation of the neural network. Based on the configuration information of the registers, it automatically adjusts the number of neurons and the operating mode of the fully asynchronous two-layer dynamic network. During the network operation, unnecessary calculations and counting are turned off to reduce the dynamic power consumption of the network in the accelerator.
[0019] Furthermore, the asynchronous four-class SNN module uses a fully asynchronous circuit to construct the lower-level four-class SNN network. It receives control signals from the asynchronous neural network control module and the asynchronous binary CNN module. Utilizing event-driven characteristics, it skips most of the normal ECG signal data that has been preprocessed by the upper-level CNN network and performs four-class inference on abnormal ECG signal data, classifying them as normal (N), supraventricular premature beats (SVEB), ventricular premature beats (VEB), and atrial fibrillation (F). This improves the accelerator's working efficiency and reduces its operating power consumption.
[0020] Furthermore, the asynchronous weight update module includes several basic computing units, which can simultaneously meet the requirements of time-sharing multiplexing and parallel computing. It adopts the e-prop learning algorithm, which has low computational complexity due to its improved approximate gradient and is highly hardware-friendly. It meets the requirements of efficient on-chip learning to update weights while having excellent power consumption performance. At the same time, its state is controlled by the asynchronous neuron control module, which further reduces power consumption.
[0021] The entire accelerator implements a highly efficient on-chip learning mechanism, ensuring learning performance while exhibiting excellent power consumption due to the use of superior learning algorithms. Furthermore, user data can be learned online without being uploaded to the cloud, ensuring user privacy and security. It effectively eliminates differences in ECG signal data between different individuals, providing users with more accurate monitoring.
[0022] Furthermore, the acceleration process of the accelerator includes the following steps:
[0023] 1) Write the configuration information of the SNN learning accelerator into the register of the register configuration module, send the Start request signal of the asynchronous global control module, and start the SNN learning accelerator to perform ECG monitoring; wherein, the configuration information includes network structure information, operating mode and network operating parameters;
[0024] 2) The asynchronous global control module configures the asynchronous neural network control module based on the network structure information and network operating parameters in the register, and controls the state transitions and module scheduling of the SNN learning accelerator;
[0025] 3) The memory management module allocates the memory required for the operation of the asynchronous two-layer network according to the network structure information and network operation parameters in the register, initializes and generates the weights corresponding to the network structure and stores them in the allocated memory, and performs data flow management and data storage management during the accelerator computation process.
[0026] 4) Upon receiving an external input event, the asynchronous neural network control module initializes the two-layer dynamic network parameters, configures the network working state, activates the binary classification CNN network in the asynchronous binary classification CNN module, and simultaneously determines whether to start the on-chip learning mode based on the network operating parameters.
[0027] 5) The binary classification CNN network receives the input ECG signal data, performs inference, and completes the inference if the result is normal and outputs the inference result; otherwise, it activates the four-class classification SNN network in the asynchronous four-class classification SNN module.
[0028] 6) After receiving abnormal ECG signal data from a binary CNN network, the four-class SNN network infers four classification results, including normal, supraventricular premature beats, ventricular premature beats, and atrial fibrillation.
[0029] 7) After completing the weight update or ECG signal data inference through the asynchronous weight update module, the accelerator operation is completed and enters the IDLE state to wait for the next event-driven operation.
[0030] In steps 5) and 6) above, during the inference and learning process of the two-layer dynamic network, the two-layer dynamic network interacts with the external environment through the memory management module to obtain the input ECG signal data required for inference and the sample data required for learning, so that the two-layer dynamic network can perform inference and learning calculations.
[0031] In steps 5) and 6) above, during the inference and learning process of the two-layer dynamic network, the memory management module is responsible for storing not only the weight values but also the membrane potential data, qualification trajectory data, input layer pulse data, and intermediate layer pulse data generated during the inference process.
[0032] Compared with the prior art, the beneficial effects of the present invention include at least the following:
[0033] 1. The overall hardware architecture of this invention adopts asynchronous logic circuit design and adaptive power consumption strategy, which can dynamically adjust the power consumption of the accelerator during operation. Compared with the commonly used synchronous circuit design, it can significantly reduce the dynamic power consumption during the acceleration process.
[0034] 2. The computation part of the two-layer dynamic network of this invention adopts a time-sharing and customization strategy for computing resources, which can significantly reduce hardware resource consumption.
[0035] 3. The accelerator proposed in this invention has the function of dynamic reconfiguration. By configuring registers, the number of neurons in the accelerator can be flexibly configured, and the results and accuracy of the accelerator can be freely adjusted.
[0036] 4. The accelerometer proposed in this invention has the advantages of low power consumption and high accuracy in the identification of ECG signal data, and is suitable for the application of wearable devices with long battery life and high stability.
[0037] 5. The accelerator proposed in this invention has efficient on-chip learning, and user data can be learned online without being uploaded to the cloud. It can eliminate the differences in signals between different users and improve the accuracy of monitoring while ensuring user privacy and security. Attached Figure Description
[0038] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0039] Figure 1 The accelerator hardware architecture diagram provided for embodiments of the present invention;
[0040] Figure 2 A flowchart illustrating the implementation of the acceleration scheme provided in this embodiment of the invention;
[0041] Figure 3 This is a schematic diagram of data interaction in an asynchronous two-layer dynamic network provided in an embodiment of the present invention;
[0042] Figure 4 This is a schematic diagram of the forward propagation membrane potential update of the asynchronous four-class SNN module provided in an embodiment of the present invention;
[0043] Figure 5 This is a schematic diagram illustrating the update of the forward propagation qualification trajectory value of the asynchronous four-class SNN module provided in an embodiment of the present invention.
[0044] Figure 6 This is a schematic diagram of weight update for the asynchronous four-class SNN module provided in an embodiment of the present invention. Detailed Implementation
[0045] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and do not limit the scope of protection of this invention.
[0046] This invention provides an SNN learning accelerator for ECG monitoring, such as... Figure 1As shown, the accelerator includes a register configuration module, an asynchronous global control module, an asynchronous neural network control module, an asynchronous binary classification CNN module, an asynchronous four-class classification SNN module, an asynchronous weight update module, and a memory management module. First, the corresponding circuit of this accelerator constructs a two-layer dynamic network with hierarchical dynamic power management, selectively activating a high-precision secondary anomaly detection four-class classification SNN network through a binary classification CNN network for primary anomaly detection. Second, this accelerator supports on-chip inference and efficient learning, effectively eliminating ECG feature differences between different individuals while ensuring user data privacy and security. Finally, the circuit uses a spiking neural network and asynchronous logic circuits for control, significantly reducing power consumption compared to synchronous networks.
[0047] In this embodiment, the register configuration module provides a configurable interface to external users for storing configuration information.
[0048] In this embodiment, the asynchronous global control module is used to receive and distribute register configuration information, monitor and control the state of all modules. Specifically, it adopts a fully asynchronous design, using external events to drive the state transitions of the built-in state machine to control the SNN learning accelerator.
[0049] In this embodiment, the asynchronous neural network control module is used for neural network state control, receiving input configuration information and dynamically adjusting the operating mode of the two-layer dynamic network. Specifically, it adopts an asynchronous control circuit composed of Click units and pipeline self-detection units, utilizing event-driven characteristics to control the state transitions during neural network operation. Based on the register configuration information, it automatically adjusts the number of neurons and operating mode of the fully asynchronous two-layer dynamic network, shutting down unnecessary calculations and counting during network operation.
[0050] In this embodiment, the asynchronous binary classification CNN module is used for signal preprocessing of the accelerator. That is, it calls the upper-level binary classification CNN to perform binary classification inference on the ECG signal data. If the inference result is normal, the inference ends and the binary classification CNN is turned off. Otherwise, an enable signal is sent to activate the lower-level high-precision four-class classification SNN and send the abnormal ECG signal data of this segment.
[0051] In this embodiment, the asynchronous four-class SNN module is used for high-precision inference of the accelerator. Specifically, the lower-level four-class SNN is activated by the upper-level CNN to perform four-class inference on abnormal ECG signal data: normal (N), supraventricular premature beats (SVEB), ventricular premature beats (VEB), and atrial fibrillation (F). Specifically, a fully asynchronous circuit is used to construct the lower-level four-class SNN network, receiving control signals from the asynchronous neural network control module and the asynchronous binary CNN module. Utilizing event-driven characteristics, it skips most of the normal ECG signal data preprocessed by the upper-level CNN network and performs four-class inference on the abnormal ECG signal data.
[0052] In this embodiment, the asynchronous weight update module is used for weight update operations during the training process of a two-layer dynamic network in the accelerator. Specifically, the asynchronous weight update module includes several basic computing units, which can simultaneously meet the requirements of time-sharing resource reuse and parallel computing. It adopts the e-prop learning algorithm to meet the on-chip efficient learning of the network to update weights, while reducing power consumption.
[0053] In this embodiment, the memory management module is used to manage membrane potential values, qualification trajectory values and neuron states during training and inference computation, store and allocate weights for each layer, and perform external data interaction operations.
[0054] Figure 2 The flowchart illustrates the implementation of the accelerator acceleration scheme. The external PS terminal connects to the configuration register module via an SPI interface to transmit accelerator configuration information, including the structure and operating mode of the two-layer dynamic network. The configured structure information determines the network accuracy and the number of neurons used, specifically including the number of neurons in the input and output layers of the four-class SNN module, and the connection structure of each layer. The operating modes include inference mode and learning mode. In inference mode, the operating parameters are neuron threshold parameters; in learning mode, the operating parameters are filter coefficients. The configuration information transmitted by the user can meet different requirements for accelerator accuracy and network size, and also determines the data flow and operating mode configuration in the asynchronous two-layer dynamic network.
[0055] After configuration is complete, the asynchronous global control module is activated by the first start signal (i.e., the Start signal). After reading the configuration information, the asynchronous global control module generates the second start signal (i.e., the Mem_Start signal) to start the memory management module to perform memory initialization operations. At the same time, it generates the third start signal (i.e., the Asyn_neu_Start signal) to start the asynchronous computation control module to read the configuration information and configure the two-layer dynamic network for inference and learning.
[0056] After completing memory initialization and inference learning configurations, the asynchronous global control module begins module control and scheduling according to the configured operating mode. It activates the upper-layer binary classification CNN network to accept input ECG signal data. Simultaneously, depending on the network operating parameters, it activates the on-chip learning mode. If the result is normal, the inference is completed and the inference result is output. Otherwise, the lower-layer asynchronous four-class classification SNN network is activated. After receiving abnormal data from the upper-layer binary classification CNN network, the lower-layer asynchronous four-class classification SNN network infers four results, including normal, supraventricular premature beats, ventricular premature beats, and atrial fibrillation, and ends the inference. After completing weight updates or ECG signal data inference, the accelerator operation is completed, and it enters the IDLE state to wait for the next event-driven operation.
[0057] The following example uses ECG signal data stream as the input data, where... Figure 3 The diagram shows the data flow during the inference learning process of a two-layer dynamic network for ECG monitoring SNN learning accelerators. The specific process is as follows:
[0058] Step 1: The asynchronous global control module receives external input events, starts the accelerator to enter the working state, and the asynchronous neural network control module controls the two-layer dynamic network to start inference and learning;
[0059] Step 2: After receiving the data, the memory management module interacts with the environmental data and stores the weight information into the input layer weight storage W. inp BRAM, intermediate layer weight storage W rec BRAM, Output Layer Weight Storage W out In BRAM;
[0060] Step 3: The pre-processed ECG signal data stream is read from the SD card and input into the first-stage binary classification CNN module for data pre-classification, that is, the input ECG signal data is divided into normal signal data and abnormal signal data;
[0061] Step 4: The binary classification CNN detects abnormal ECG signals, outputs an enable signal (i.e., the En signal) and the current abnormal ECG data stream, and activates the asynchronous four-class classification SNN module. The ECG signal data stream received by this module is encoded into a Spikes data stream by the Encoder module and stored as the spike signals of the input layer neurons in the input neuron pulse sequence (x map). The asynchronous leaky integration-and-fire (LIF) neurons and the EligibilityTraces (ET) update module are responsible for weighting the input neuron weights with the x map to obtain the input layer neuron membrane potential, eligibility trajectory values, and neuron activation state, which are stored in the neuron state storage Neuron BRAM.
[0062] Step 5: The activation state of the intermediate neurons is stored in the output neuron's spike signal as input to the output neuron in the output neuron's spike sequence (z map). The asynchronous LIF neuron and ET update module are responsible for weighting the intermediate layer neuron's weight value with the z map to obtain the intermediate layer neuron's membrane potential, qualification trajectory value, and neuron activation state, which are stored in the Neuron BRAM.
[0063] Step 6: The activation state of the intermediate layer neurons is used as the Spikes signal input to the output neurons. After being weighted by the asynchronous output neuron update module, the membrane potential value y of the output layer neurons is obtained, which is used as the reasoning result to complete one reasoning.
[0064] Step 7: If the configuration register module sets the learning signal (i.e., the learn signal) to 1, the asynchronous neural network control module sends a weight update instruction to the asynchronous weight update module. The output membrane potential y is processed with the difference between the input and output samples to obtain the error. The asynchronous weight update module processes the error to obtain the updated weight value, which is then stored back in the weight BRAM to complete one training cycle.
[0065] The following example illustrates the forward propagation and weight update calculation process in the learning and inference stages of an asynchronous two-layer dynamic network, using M as the number of input and intermediate layer neurons and N as the number of output layer neurons:
[0066] like Figure 4 The diagram illustrates the forward propagation membrane potential update of an asynchronous four-class SNN module. The forward propagation membrane potential update process is controlled by asynchronous click. The x-map represents the spike sequence of the input neurons. If a spike signal is present at the current time, the input layer neurons accumulate membrane potentials and store the neuron membrane potential values in the Neuron BRAM. After performing a difference operation with a threshold parameter, if the neuron membrane potential exceeds the threshold parameter, it is activated, and the activation value is stored as the spike sequence of the intermediate layer neurons in the z-map for intermediate layer neuron update. The neuron membrane potential values are then stored back in the Neuron BRAM after passing through leakage logic. Since the number of input and intermediate layer neurons is M, the above operation is repeated M times to complete the membrane potential update process. Where W... inp W represents the input layer weights. rec Indicates the intermediate layer weights, W out This represents the output layer weights.
[0067] like Figure 5 The diagram illustrates the update of eligibility trajectory values during the forward propagation of an asynchronous four-class SNN module. The update process is controlled by asynchronous click. The eligibility trajectory values for the input, intermediate, and output layer neurons are obtained by weighting xmap and zmap, respectively. After processing by leakage logic, they are stored back in the Neuron BRAM. α and κ are leakage parameters input from the register configuration module. Since the number of neurons in the input and intermediate layers is M, and the number of neurons in the output layer is N, the input and intermediate layer neurons are updated M times, and the output layer neurons are updated N times, completing the eligibility trajectory update process. Here, tr inp tr represents the input layer qualification trajectory value. rec Indicates the intermediate layer qualification trajectory value, tr out This represents the output layer qualification trajectory value.
[0068] like Figure 6The diagram illustrates the weight update process of an asynchronous four-class SNN module. Weight updates are controlled by asynchronous click. The neuron membrane potential is retrieved via a straight-through estimator lookup table (STE LUT) module to obtain the pseudo-derivative h. The weight update process for input and intermediate layer neurons is similar: the output layer neuron weights are multiplied and accumulated with the error to obtain the learning signal L. The neuron membrane potential is retrieved via the STE LUT to obtain the pseudo-derivative h. Both are then multiplied by the qualification trajectory values of the input and intermediate layer neurons, respectively, to obtain the updated weight ΔW. rec and ΔW inp The weights of the output layer neurons are obtained by multiplying the output layer qualification trajectory value by the error, resulting in the updated weights ΔW. out .
[0069] In this embodiment, during the inference learning process of the asynchronous two-layer dynamic network with M input and intermediate layer neurons and N output layer neurons, the forward inference part adopts a customized design of computing resources and uses a pipelined computing and cyclic judgment of neuron activation state design to reduce the computational logic in asynchronous computing and save area resources; the weight update part adopts the PE array method to perform parallel weight update operations and improve weight update efficiency.
[0070] This invention can significantly reduce the power consumption of ECG monitoring accelerators, which can well meet the demand for long battery life of wearable devices. At the same time, compared with ECG monitoring products on the market, it introduces efficient on-chip learning. Under the premise of meeting the low power consumption requirements, user data can be learned online without uploading to the cloud, ensuring user privacy and security, effectively eliminating the characteristic differences between different individuals, and enabling users to obtain more accurate monitoring results.
[0071] The specific embodiments described above illustrate the technical solution and beneficial effects of the present invention in detail. It should be understood that the above description is only the most preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, additions, and equivalent substitutions made within the scope of the principles of the present invention should be included within the protection scope of the present invention.
Claims
1. A SNN learning accelerator for ECG monitoring, characterized in that, It employs a fully asynchronous two-layer dynamic network, consisting of a binary classification CNN at the top and a four-class classification SNN at the bottom. This supports efficient on-chip learning and monitors and processes user ECG signal data with extremely low power consumption, including: The register configuration module provides a configurable interface to external users for storing configuration information, including the structure information and operating mode of the two-layer dynamic network. The asynchronous global control module is used to receive and distribute register configuration information, monitor and control the status of all modules; The asynchronous neural network control module is used for neural network state control, receives input configuration information, and dynamically adjusts the operation mode of the two-layer dynamic network. The asynchronous binary classification CNN module is used for data pre-classification of the accelerator. That is, it calls the upper-level binary classification CNN to perform binary classification inference on the ECG signal data. If the inference result is normal, the inference ends and the binary classification CNN is turned off. Otherwise, an enable signal is sent to activate the lower-level high-precision four-class classification SNN and send the abnormal ECG signal data of this segment. The asynchronous four-class SNN module is used for high-precision inference of the accelerator. The lower-level four-class SNN is activated by the upper-level CNN. It receives control signals from the asynchronous neural network control module and the asynchronous two-class CNN module. Utilizing the event-driven characteristics, it skips most of the normal ECG signal data that has been preprocessed by the upper-level CNN network and performs four-class inference on abnormal ECG signal data, including normal, supraventricular premature beats, ventricular premature beats, and atrial fibrillation. The asynchronous weight update module, with its several basic computing units, can simultaneously meet the requirements of time-sharing resource reuse and parallel computing, and is used for weight update operations during the training process of two-layer dynamic networks in accelerators. The memory management module is used for managing membrane potential values, qualification trajectory values, and neuron states during training and inference computation, storing and allocating weights for each layer, and handling external data interaction operations.
2. The SNN learning accelerator for ECG monitoring according to claim 1, characterized in that, The acceleration circuit corresponding to the accelerator adopts a fully asynchronous architecture design. At the module level, event-driven asynchronous logic Click units are used to replace the global clock network in the synchronous circuit. Data interaction between modules is achieved based on the Req-Ack request-acknowledgment handshake protocol, and the data transmission timing is precisely controlled through an asynchronous self-synchronization mechanism.
3. The SNN learning accelerator for ECG monitoring according to claim 2, characterized in that, The asynchronous global control module adopts a fully asynchronous design and uses external events to drive the state transitions of the built-in state machine to control the SNN learning accelerator.
4. The SNN learning accelerator for ECG monitoring according to claim 2, characterized in that, The asynchronous neural network control module uses an asynchronous control circuit composed of Click units and pipeline self-testing units. It utilizes event-driven characteristics to control the state transitions during the operation of the neural network. Based on the configuration information of the registers, it automatically adjusts the number of neurons and the operating mode of the fully asynchronous two-layer dynamic network. During network operation, unnecessary calculations and counting are turned off.
5. The SNN learning accelerator for ECG monitoring according to claim 2, characterized in that, The asynchronous four-class SNN module uses a fully asynchronous circuit to construct the lower-level four-class SNN network.
6. The SNN learning accelerator for ECG monitoring according to claim 2, characterized in that, In the asynchronous weight update module, the e-prop learning algorithm is used to achieve efficient on-chip learning of the network to update weights while reducing power consumption.
7. The SNN learning accelerator for ECG monitoring according to claim 1, characterized in that, In the register configuration module, the structure information of the configured two-layer dynamic network determines the network accuracy and the number of neurons used. Specifically, it includes the number of neurons in the middle layer of the input layer, the number of neurons in the output layer, and the connection structure of each layer in the four-class SNN module. The operating modes include inference mode and learning mode. In inference mode, the operating parameters are the neuron threshold parameters, and in learning mode, the operating parameters are the filter coefficients.
8. The SNN learning accelerator for ECG monitoring according to claim 1, characterized in that, The acceleration process of the accelerator includes the following steps: 1) Write the configuration information of the SNN learning accelerator into the register of the register configuration module, send the Start request signal of the asynchronous global control module, and start the SNN learning accelerator to perform ECG monitoring; wherein, the configuration information includes network structure information, operating mode and network operating parameters; 2) The asynchronous global control module configures the asynchronous neural network control module based on the network structure information and network operating parameters in the register, and controls the state transitions and module scheduling of the SNN learning accelerator; 3) The memory management module allocates the memory required for the operation of the asynchronous two-layer network according to the network structure information and network operation parameters in the register, initializes and generates the weights corresponding to the network structure and stores them in the allocated memory, and performs data flow management and data storage management during the accelerator computation process. 4) Upon receiving an external input event, the asynchronous neural network control module initializes the two-layer dynamic network parameters, configures the network working state, activates the binary classification CNN network in the asynchronous binary classification CNN module, and simultaneously determines whether to start the on-chip learning mode based on the network operating parameters. 5) The binary classification CNN network receives the input ECG signal data, performs inference, and completes the inference if the result is normal and outputs the inference result; otherwise, it activates the four-class classification SNN network in the asynchronous four-class classification SNN module. 6) After receiving abnormal ECG signal data from a binary CNN network, the four-class SNN network infers four classification results, including N, SVEB, VEB, and F. 7) After completing the weight update or ECG signal data inference through the asynchronous weight update module, the accelerator operation is completed and enters the IDLE state to wait for the next event-driven operation.
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