A low-noise fast-starting crystal oscillator circuit and a control method thereof

Abstract

The application belongs to the field of integrated circuit clock design, and discloses a low-noise fast start-up crystal oscillator circuit and a control method thereof. The low-noise fast start-up crystal oscillator circuit comprises a low-noise low-dropout linear voltage stabilizer for providing an output voltage, a control voltage generation circuit, an auxiliary start-up circuit and a crystal oscillator. The control voltage generation circuit is connected with the low-noise low-dropout linear voltage stabilizer, generates and outputs a control voltage with an upward trend. The auxiliary start-up circuit is connected with the control voltage generation circuit and the low-noise low-dropout linear voltage stabilizer respectively, and outputs a start-up signal. The crystal oscillator is connected with the low-noise low-dropout linear voltage stabilizer and the auxiliary start-up circuit respectively, receives the start-up signal, and outputs a clock signal. The device generates a control voltage, generates a start-up signal according to the control voltage, and significantly shortens the start-up time of the crystal oscillator.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit clock design, and in particular to a low-noise, fast-start crystal oscillator circuit and its control method. Background Technology

[0002] As the core clock source of modern electronic systems, the crystal oscillator's start-up speed and phase noise performance directly affect the real-time performance of communication, data synchronization accuracy, and system energy efficiency. Especially in battery-powered scenarios such as IoT terminals, wearable devices, and high-speed sensors, crystal oscillators face the need for microsecond-level rapid power-up and microvolt-level power supply noise suppression to meet the energy-saving protocol requirements for instant wake-up and transmission, and to ensure the clock quality of high-precision ADC / RF circuits.

[0003] However, there are some problems in the design of high-Q crystal oscillators.

[0004] First, there's the issue of start-up time. Traditional Pierce crystal oscillators rely on positive feedback to amplify internal noise for oscillation. However, high-Q crystals have extremely low equivalent noise, resulting in start-up times as long as 10-100 milliseconds. This makes it difficult to meet the rapid power-on requirements of scenarios such as high-speed communication and real-time control systems. In battery-powered portable devices, this long start-up process significantly increases the latency of the system switching from sleep to operating state, reducing user experience and increasing power consumption.

[0005] Secondly, there is the issue of noise pollution from the auxiliary circuit. Currently, common accelerated oscillation schemes (such as injecting external excitation signals) are difficult to completely shut down the auxiliary circuit after oscillation begins, and the additional noise introduced will affect the jitter performance of the output clock.

[0006] Finally, there's the issue of power supply noise coupling. Crystal oscillators operate with a high periodicity, and current fluctuations can interfere with the oscillator itself through power supply coupling. Conventional LDOs (Low Dropout Regulators) have insufficient loop gain (typically <10dB) at MHz-level oscillation frequencies, leading to a sharp drop in power supply rejection ratio (PSRR). When the crystal oscillator causes current fluctuations, conventional LDOs cannot effectively suppress the impact of these fluctuations on the output voltage, resulting in additional power supply noise coupling into the oscillation signal, further affecting the jitter performance of the output clock signal. Summary of the Invention

[0007] The purpose of this invention is to solve the problems of slow start-up of high-Q crystal oscillators and fluctuations caused by power supply current, while using the physical isolation self-shutdown function of the auxiliary start-up circuit to reduce noise.

[0008] To address the aforementioned technical problems, this invention provides a low-noise, fast-start crystal oscillator circuit, comprising:

[0009] Low-noise, low-dropout linear regulators are used to provide output voltage;

[0010] A control voltage generation circuit is connected to the low-noise, low-dropout linear regulator to generate and output a control voltage that shows an upward trend.

[0011] An auxiliary oscillation circuit is connected to the control voltage generating circuit and the low-noise, low-dropout linear regulator, respectively, and outputs an oscillation signal.

[0012] The crystal oscillator is connected to the low-noise, low-dropout linear regulator and the auxiliary oscillation circuit, respectively, to receive the oscillation signal and output a clock signal.

[0013] Furthermore, the auxiliary oscillation circuit includes:

[0014] The first comparator has its non-inverting input connected to the first reference voltage and its power supply connected to the low-noise, low-dropout linear regulator.

[0015] The first switch has one end connected to the low-noise, low-dropout linear regulator and the control end connected to the output of the first comparator.

[0016] The second switch has one end connected to the low-noise, low-dropout linear regulator and the control end connected to the output of the first comparator.

[0017] The first buffer has its first end connected to the other end of the second switch;

[0018] A ring voltage-controlled oscillator is connected to the inverting input of the first comparator, the other end of the first switch, and the second end of the first buffer, respectively.

[0019] The third switch has one end connected to the third end of the first buffer and the control end connected to the output end of the first comparator.

[0020] The fourth switch has one end connected to the third end of the first buffer and the control end connected to the output of the first comparator.

[0021] Furthermore, the ring voltage-controlled oscillator includes multiple inverting amplifiers connected in series, with the input of the first inverting amplifier connected to the output of the last inverting amplifier.

[0022] Furthermore, the control voltage generating circuit includes:

[0023] The second comparator has its non-inverting input connected to the low-noise, low-dropout linear regulator and its inverting input connected to the second reference voltage.

[0024] An AND gate, with its first input connected to the output of the second comparator and its second input connected to the output of the first comparator;

[0025] The first N-type MOS transistor has its gate connected to the output of the AND gate, its drain connected to the low-noise, low-dropout linear regulator via a first current source, and its source grounded via a first capacitor. The source of the first N-type MOS transistor is also connected to the inverting input of the first comparator and the ring voltage-controlled oscillator.

[0026] Furthermore, the crystal oscillator includes:

[0027] An inverting amplifier, the input terminal of which is connected to the other end of the third switch;

[0028] The second buffer has one end connected to the output terminal of the inverting amplifier and the other end of the fourth switch, and the other end serves as the output terminal.

[0029] The first protection element has one end connected between the other end of the third switch and the input terminal of the inverting amplifier, and the other end grounded through the second capacitor;

[0030] The second protection element has one end connected between the output terminal of the inverting amplifier and one end of the second buffer, and the other end grounded through a third capacitor.

[0031] The crystal oscillator is connected at one end between the first protection element and the second capacitor, and at the other end between the second protection element and the third capacitor.

[0032] Furthermore, the low-noise, low-dropout linear regulator includes:

[0033] The second N-type MOSFET has its drain connected to the power supply voltage through a second current source, its gate connected to the first bias voltage, and its source grounded through a third current source.

[0034] The first P-type MOSFET has its source connected to the power supply voltage and its gate connected between the second current source and the drain of the second N-type MOSFET, forming a first node;

[0035] The second P-type MOS transistor has its gate connected to the second bias voltage, its drain grounded through the third current source, and its source connected to the drain of the first P-type MOS transistor.

[0036] A resistor, one end of which is connected between the first node and the gate of the first P-type MOS transistor;

[0037] The fourth capacitor has one end connected to the other end of the resistor, and the other end connected between the drain of the first P-type MOS transistor and the source of the second P-type MOS transistor to form a second node, through which an output branch is formed.

[0038] The fifth capacitor has one end connected to the output branch and the other end grounded.

[0039] On the other hand, the present invention also provides a control method for a low-noise fast-start crystal oscillator circuit, employing the low-noise fast-start crystal oscillator circuit as described above, the control method comprising:

[0040] The output voltage is provided by a low-noise, low-dropout linear regulator.

[0041] The control voltage generating circuit generates and outputs a control voltage that shows an upward trend.

[0042] The auxiliary oscillation circuit generates an oscillation signal based on the control voltage and provides it to the crystal oscillator.

[0043] The oscillation signal gradually approaches the nominal frequency of the crystal oscillator and continuously outputs energy into the crystal oscillator, causing the crystal oscillator to start oscillating and output a clock signal.

[0044] Furthermore, the step of the control voltage generating circuit generating and outputting a control voltage with an upward trend includes:

[0045] The output voltage of the low-noise, low-dropout linear regulator is compared with a second reference voltage using a second comparator.

[0046] When the output voltage is higher than the second reference voltage, the second comparator outputs a flip signal, causing the first current source to charge the first capacitor, generating the control voltage that shows an upward trend.

[0047] Furthermore, when the control voltage exceeds the first reference voltage, the generation of the oscillation signal is stopped.

[0048] Furthermore, stopping the generation of the oscillation signal when the control voltage exceeds the first reference voltage includes:

[0049] The control voltage is compared with the first reference voltage using a first comparator;

[0050] When the control voltage exceeds the first reference voltage, the first comparator outputs a flipping control signal, causing the first current source to stop charging the first capacitor, and the control voltage to stop rising.

[0051] At the same time, the first switch, the second switch, the third switch and the fourth switch are turned off, that is, the power supply to the ring voltage-controlled oscillator and the first buffer and the connection between the auxiliary oscillation circuit and the crystal oscillator are cut off, so that the crystal oscillator can maintain oscillation by relying on its own positive feedback mechanism.

[0052] Compared with the prior art, the present invention has at least the following beneficial effects:

[0053] This invention generates an upward-trending control voltage through a control voltage generation circuit. The auxiliary oscillation circuit generates an oscillation signal based on the control voltage and automatically injects initial energy into the crystal oscillator, significantly shortening the oscillation time of the crystal oscillator.

[0054] Furthermore, when the control voltage exceeds the first reference voltage, the auxiliary oscillation circuit automatically disconnects from the power supply and the crystal oscillator, thereby avoiding noise introduced by the long-term operation of the auxiliary circuit and ensuring excellent jitter performance of the output clock signal. In addition, the low-noise, low-dropout linear regulator provided by this invention maintains a good power supply rejection ratio even under high-frequency oscillation conditions, effectively suppressing the impact of power supply noise on the crystal oscillator. Attached Figure Description

[0055] Figure 1 This is a structural block diagram of a low-noise, fast-start crystal oscillator circuit according to an embodiment of the present invention;

[0056] Figure 2 This is a circuit diagram of a low-noise, fast-start crystal oscillator circuit according to an embodiment of the present invention;

[0057] Figure 3 This is a circuit diagram of a low-noise, low-dropout linear regulator according to an embodiment of the present invention;

[0058] Figure 4 for Figure 3 A schematic diagram of the loop gain;

[0059] Figure 5 This is a voltage-frequency conversion diagram of the auxiliary oscillation circuit in one embodiment of the present invention;

[0060] Figure 6 This is a timing diagram of various signals in one embodiment of the present invention.

[0061] Reference numerals: 11. Low-noise, low-dropout linear regulator; 22. Control voltage generation circuit; 33. Auxiliary oscillation circuit; 44. Crystal oscillator; VREF1. First reference voltage; VREF2. Second reference voltage; Q1. First N-type MOSFET; Q2. Second N-type MOSFET; Q3. First P-type MOSFET; Q4. Second P-type MOSFET; I1. First current source; I2. Second current source; I3. Third current source; R. Resistor; C1. First capacitor; C2. Second capacitor; C3. Third capacitor; C4. Fourth capacitor; C5. Fifth capacitor Capacity; X, first node; Z, second node; VB1, first bias voltage; VB2, second bias voltage; CMP1, first comparator; CMP2, second comparator; S1, first switch; S2, second switch; S3, third switch; S4, fourth switch; BUF1, first buffer; BUF2, second buffer; VCO, ring voltage-controlled oscillator; VCTRL, control voltage; LDO_OUT, output voltage; XTAL1, first start-up signal; XTAL2, second start-up signal; VOUT, clock signal; VDD, power supply voltage. Detailed Implementation

[0062] Based on the teachings of this specification, those skilled in the art can form new technical solutions by combining different implementation methods without creating technical contradictions. Such variations should be considered to fall within the protection scope of this patent.

[0063] The following is a more detailed description of a low-noise, fast-start crystal oscillator circuit and its control method according to the present invention, with reference to schematic diagrams, which illustrate preferred embodiments of the invention. It should be understood that those skilled in the art can modify the invention described herein while still achieving its advantageous effects. Therefore, the following description should be understood as being of general knowledge to those skilled in the art and is not intended to limit the invention.

[0064] The invention is described more specifically by way of example in the following paragraphs with reference to the accompanying drawings. The advantages and features of the invention will become clearer from the following description. It should be noted that the drawings are in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the invention.

[0065] Example 1

[0066] like Figures 1 to 5 As shown, this embodiment of the invention proposes a low-noise, fast-start crystal oscillator circuit, specifically including a low-noise, low-dropout linear regulator 11, a control voltage generation circuit 22, an auxiliary oscillation circuit 33, and a crystal oscillator 44.

[0067] The low-noise, low-dropout linear regulator 11 provides the output voltage LDO_OUT; the control voltage generating circuit 22 is connected to the low-noise, low-dropout linear regulator 11, generating and outputting a control voltage VCTRL that shows an upward trend; the auxiliary oscillation circuit 33 is connected to both the control voltage generating circuit 22 and the low-noise, low-dropout linear regulator 11, and outputs an oscillation signal; the crystal oscillator 44 is connected to both the low-noise, low-dropout linear regulator 11 and the auxiliary oscillation circuit 33, receives the oscillation signal, and outputs a clock signal VOUT.

[0068] The control voltage generating circuit 22 generates an upward trending control voltage VCTRL, which drives the oscillation signal generated by the auxiliary oscillation circuit 33 to inject initial energy into the crystal oscillator 44 and accelerate the oscillation process of the crystal oscillator 44.

[0069] In this embodiment, as Figure 2 As shown, the auxiliary oscillation circuit 33 includes a first comparator CMP1, a first switch S1, a second switch S2, a first buffer BUF1, a ring voltage-controlled oscillator VCO, a third switch S3, and a fourth switch S4.

[0070] The non-inverting input of the first comparator CMP1 is connected to the first reference voltage VREF1, and the power supply is connected to the low-noise, low-dropout linear regulator 11.

[0071] One end of the first switch S1 is connected to the low-noise, low-dropout linear regulator 11, and the control end is connected to the output of the first comparator CMP1.

[0072] One end of the second switch S2 is connected to the low-noise, low-dropout linear regulator 11, and the control end is connected to the output of the first comparator CMP1.

[0073] The first end of the first buffer BUF1 is connected to the other end of the second switch S2.

[0074] The ring voltage-controlled oscillator VCO is connected to the inverting input of the first comparator CMP1, the other end of the first switch S1, and the second end of the first buffer BUF1.

[0075] One end of the third switch S3 is connected to the third end of the first buffer BUF1, and the control end is connected to the output end of the first comparator CMP1.

[0076] One end of the fourth switch S4 is connected to the third end of the first buffer BUF1, and the control end is connected to the output end of the first comparator CMP1.

[0077] like Figure 5 As shown, the frequency of the oscillation signal generated by the ring voltage-controlled oscillator (VCO) is proportional to the control voltage (VCTRL). As the control voltage (VCTRL) rises from 0V to the first reference voltage (VREF1), the frequency of the output signal of the ring voltage-controlled oscillator (VCO) decreases linearly from its highest frequency (FH) to its lowest frequency (FL). During the rise of the control voltage (VCTRL), the output frequency of the ring voltage-controlled oscillator (VCO) sweeps past the oscillation frequency (fosc) of the crystal oscillator (44). When the output frequency of the ring voltage-controlled oscillator (VCO) approaches the oscillation frequency (fosc), the energy output by the auxiliary oscillation circuit (33) is injected into the crystal oscillator (44), effectively exciting and driving the crystal oscillator (44) to start oscillating, thus increasing the start-up time.

[0078] When the control voltage VCTRL exceeds the first reference voltage VREF1, the output of the first comparator CMP1 flips, thereby controlling the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 to open simultaneously. The opening of the first switch S1 and the second switch S2 cuts off the power supply to the ring voltage-controlled oscillator VCO and the first buffer BUF1, causing them to immediately stop working. Simultaneously, the opening of the third switch S3 and the fourth switch S4 disconnects the connection between the auxiliary oscillation circuit 33 and the crystal oscillator 44, eliminating other noise transmission paths. This dual isolation mechanism prevents the auxiliary oscillation circuit 33 from affecting the already oscillating crystal oscillator 44, allowing the crystal oscillator 44 to maintain oscillation through its own positive feedback mechanism.

[0079] In this embodiment, the ring voltage-controlled oscillator includes multiple inverting amplifiers connected in series. The input terminal of the first inverting amplifier is connected to the output terminal of the last inverting amplifier. The reference frequency of the crystal oscillator 44 can be changed by adjusting the number of inverting amplifiers (usually an odd number). The frequency can be precisely controlled by adjusting the delay time of the inverting amplifiers through the control voltage VCTRL.

[0080] In one specific embodiment, the ring voltage-controlled oscillator (VCO) comprises three inverting amplifiers connected in series. This three-stage series structure provides a moderate oscillation frequency range and a natural differential output, offering advantages such as short start-up delay, low power consumption, small footprint, and low phase noise.

[0081] In this embodiment, as Figure 2 As shown, the control voltage generation circuit 22 includes a second comparator CMP2, an AND gate, a first N-type MOS transistor Q1, a first capacitor C1, and a first current source I1.

[0082] The non-inverting input of the second comparator CMP2 is connected to the low-noise, low-dropout linear regulator 11, and the inverting input is connected to the second reference voltage VREF2. The first input of the AND gate is connected to the output of the second comparator CMP2, and the second input is connected to the output of the first comparator CMP1. The gate of the first N-type MOSFET Q1 is connected to the output of the AND gate, its source is grounded through the first capacitor C1, and its drain is connected to the low-noise, low-dropout linear regulator 11 through the first current source I1. The source of the first N-type MOSFET Q1 is also connected to the inverting input of the first comparator CMP1 and the ring voltage-controlled oscillator VCO.

[0083] When the entire circuit is powered on, the output voltage LDO_OUT of the low-noise, low-dropout linear regulator 11 begins to rise. When the output voltage LDO_OUT is higher than the second reference voltage VREF2, the output of the second comparator CMP2 flips (the initial value of the DA signal output by the second comparator CMP2 is 0, and the initial value of the DN signal output by the first comparator CMP1 is 1), that is, the DA signal output by the second comparator CMP2 is set to 1. This controls the first N-type MOSFET Q1 to conduct through an AND gate, and the first current source I1 begins to charge the first capacitor C1. Since the capacitor charging current is constant, the voltage across the capacitor C1 exhibits a linear rising characteristic, thereby forming a rising control voltage VCTRL at the source of the first N-type MOSFET Q1. The control voltage VCTRL enables the auxiliary oscillation circuit 33 to start smoothly, avoiding oscillation instability that may be caused by sudden signal changes.

[0084] In this embodiment, as Figure 2 As shown, the crystal oscillator 44 includes an inverting amplifier, a second buffer BUF2, a first protection element, a second protection element, a crystal oscillator, a second capacitor C2, and a third capacitor C3.

[0085] The input terminal of the inverting amplifier is connected to the other end of the third switch S3. One end of the second buffer BUF2 is connected to the output terminal of the inverting amplifier and the other end of the fourth switch S4, with the other end serving as the output terminal. One end of the first protection element is connected between the other end of the third switch S3 and the input terminal of the inverting amplifier, and the other end is grounded through the second capacitor C2. The second protection element has one end connected between the output terminal of the inverting amplifier and one end of the second buffer BUF2, and the other end grounded through the third capacitor C3; one end of the crystal oscillator is connected between the first protection element and the second capacitor C2, and the other end is connected between the second protection element and the third capacitor C3.

[0086] The inverting amplifier provides a 180-degree phase shift and the necessary gain. The crystal oscillator, together with the second capacitor C2 and the third capacitor C3, forms a frequency selection network. The first and second protection elements are used to limit the voltage swing across the crystal oscillator to prevent excessive current from damaging it. The second buffer BUF2 is used to isolate the load connected to the output from the crystal oscillator 44 and to provide sufficient drive capability.

[0087] Under normal operating conditions, when the third switch S3 and the fourth switch S4 of the auxiliary oscillation circuit 33 are closed, the oscillation signal generated by the ring voltage-controlled oscillator (VCO) is processed by the first buffer BUF1 and injected into the input and output terminals of the inverting amplifier, respectively, providing initial energy to start the crystal oscillator oscillation. Once the crystal oscillator starts oscillating, the positive feedback loop formed by the inverting amplifier, the crystal oscillator, the second capacitor C2, and the third capacitor C3 maintains the oscillation state. When the third switch S3 and the fourth switch S4 of the auxiliary oscillation circuit 33 are open, the crystal oscillator 44 continues to oscillate stably based on its own positive feedback mechanism. The output frequency is determined by the inherent resonant frequency of the crystal oscillator, thus exhibiting high frequency stability and extremely low phase noise.

[0088] In this embodiment, as Figure 3 As shown, the low-noise, low-dropout linear regulator 11 includes a second N-type MOSFET Q2, a first P-type MOSFET Q3, a second P-type MOSFET Q4, a resistor R, a fourth capacitor C4, and a fifth capacitor C5.

[0089] The drain of the second N-type MOSFET Q2 is connected to the power supply voltage VDD through the second current source I2, the gate is connected to the first bias voltage VB1, and the source is grounded through the third current source I3.

[0090] The source of the first P-type MOSFET Q3 is connected to the power supply voltage VDD, and the gate is connected between the second current source I2 and the drain of the second N-type MOSFET Q2, forming a first node.

[0091] The gate of the second P-type MOS transistor Q4 is connected to the second bias voltage VB2, the drain is grounded through the third current source I3, and the source is connected to the drain of the first P-type MOS transistor Q3.

[0092] One end of the resistor R is connected between the first node X and the gate of the first P-type MOS transistor Q3.

[0093] One end of the fourth capacitor C4 is connected to the other end of the resistor R, and the other end is connected between the drain of the first P-type MOS transistor Q3 and the source of the second P-type MOS transistor Q4 to form a second node Z. An output branch is formed through the second node Z.

[0094] One end of the fifth capacitor C5 is connected to the output branch, and the other end is grounded.

[0095] The low-noise, low-dropout linear regulator 11 employs Miller compensation technology, forming a positive feedback structure through the first P-type MOSFET Q3 and the second P-type MOSFET Q4, which enhances the loop response speed. A feedback path is formed between the resistor R and the fourth capacitor C4, effectively configuring the main pole of the loop at an internal node, thus improving overall stability. Furthermore, a stable bias current is provided through the second N-type MOSFET Q2 and the third current source I3, while the first bias voltage VB1 and the second bias voltage VB2 ensure that the circuit operates at the optimal bias point.

[0096] like Figure 4 As shown in the figure, fp1 is the dominant pole frequency formed by the first node X, fosc is the crystal oscillation frequency, fz1 is the zero-point frequency, and fp2 is the stimulation frequency. The low-noise, low-dropout linear regulator 11 maintains a constant high-gain plateau in the low-frequency region. As the frequency increases, the gain begins to decrease, but it still maintains a loop gain of approximately 30dB at the crystal oscillation frequency (fosc). This gives the low-noise, low-dropout linear regulator 11 sufficient high-frequency suppression capability, effectively suppressing power current fluctuations near the crystal oscillator resonant frequency, providing a clean power supply, and further reducing output clock jitter. Compared with traditional low-noise, low-dropout linear regulators, this embodiment has better power supply rejection ratio (PSRR) performance in the high-frequency region, making it particularly suitable for powering the crystal oscillator 44, which has strict requirements for phase noise performance.

[0097] Example 2

[0098] This invention provides a control method for a low-noise, fast-start crystal oscillator circuit, employing the low-noise, fast-start crystal oscillator circuit described in Embodiment 1. The control method includes:

[0099] The output voltage LDO_OUT is provided by a low-noise, low-dropout linear regulator 11.

[0100] The control voltage generating circuit 22 generates and outputs a control voltage VCTRL that shows an upward trend.

[0101] The auxiliary oscillation circuit 33 generates an oscillation signal based on the control voltage VCTRL and provides it to the crystal oscillator 44.

[0102] The oscillation signal gradually approaches the nominal frequency of the crystal oscillator 44 and continuously outputs energy into the crystal oscillator 44, which then starts oscillating and outputs a clock signal VOUT.

[0103] In this embodiment, the oscillation signal includes a first oscillation signal XTAL1 and a second oscillation signal XTAL2.

[0104] In this embodiment, the step of the control voltage VCTRL generation circuit generating and outputting a control voltage VCTRL that shows an upward trend includes:

[0105] The output voltage LDO_OUT of the low-noise, low-dropout linear regulator 11 is compared with the second reference voltage VREF2 by the second comparator CMP2.

[0106] When the output voltage LDO_OUT is higher than the second reference voltage VREF2, the second comparator CMP2 outputs a flip signal (the initial value of the DA signal output by the second comparator CMP2 is 0), that is, the DA signal output by the second comparator CMP2 is set to 1, so that the first current source I1 charges the first capacitor C1, generating the control voltage VCTRL which has an upward trend.

[0107] The increasing control voltage can not only control the output frequency of the ring voltage-controlled oscillator (VCO), but also make the VCO gradually approach the resonant frequency of the crystal oscillator over time, forming a frequency scanning process. During the scanning process, when the frequency is close to the resonant frequency of the crystal oscillator, energy can be efficiently injected into the crystal oscillator 44.

[0108] In this embodiment, when the control voltage VCTRL exceeds the first reference voltage VREF1, the generation of the oscillation signal is stopped.

[0109] In one specific embodiment, stopping the generation of the oscillation signal when the control voltage VCTRL exceeds the first reference voltage VREF1 includes:

[0110] The control voltage VCTRL is compared with the first reference voltage VREF1 by the first comparator CMP1.

[0111] When the control voltage VCTRL exceeds the first reference voltage VREF1, the first comparator CMP1 outputs a flipped signal (the initial value of the DN signal output by the first comparator CMP1 is 1), that is, the DN signal output by the first comparator CMP1 is set to zero. The second input terminal of the AND gate receives the flipped signal. Through the AND gate, the first N-type MOS transistor Q1 is not turned on, thereby stopping the first current source I1 from charging the first capacitor C1, that is, the control voltage VCTRL stops rising.

[0112] At the same time, the first switch S1, the second switch S2, the third switch S3 and the fourth switch S4 are disconnected, that is, the power supply of the ring voltage-controlled oscillator VCO and the first buffer BUF1 and the connection between the auxiliary oscillation circuit 33 and the crystal oscillator 44 are cut off, so that the crystal oscillator 44 can maintain oscillation by relying on its own positive feedback mechanism.

[0113] Please refer to Figure 6 The timing diagram, taking the first oscillation signal XTAL1 output by the auxiliary oscillation circuit 33 as an example, illustrates the execution process of the control method described below.

[0114] When EN_XTAL (enable signal) transitions from low to high, the entire circuit begins to operate. At this time, the low-noise, low-dropout linear regulator 11 is activated, and the output voltage LDO_OUT begins to rise steadily.

[0115] When the output voltage LDO_OUT rises above the second reference voltage VREF2, the output of the second comparator CMP2 flips, controlling the first N-type MOSFET Q1 to conduct through an AND gate, and the first current source I1 begins to charge the first capacitor C1. It can be clearly observed in the figure that the control voltage VCTRL begins to rise when the output voltage LDO_OUT exceeds the second reference voltage VREF2.

[0116] As the control voltage VCTRL increases, the ring voltage-controlled oscillator VCO starts working and generates a clock signal with a gradually increasing frequency, which is injected into the crystal oscillator 44 through the third switch S3 and the fourth switch S4. On the output clock signal VOUT waveform, the first oscillation signal XTAL1 waveform begins to oscillate weakly, and then the amplitude gradually increases.

[0117] When the control voltage VCTRL rises to the first reference voltage VREF1, the output of the first comparator CMP1 flips, controlling the first switch S1, the second switch S2, the third switch S3 and the fourth switch S4 to open simultaneously, that is, disconnecting the power supply to the ring voltage-controlled oscillator VCO and the first buffer BUF1, and cutting off the connection between the auxiliary oscillation circuit 33 and the crystal oscillator 44.

[0118] exist Figure 6 In the process, it can be observed that after the control voltage VCTRL exceeds the first reference voltage VREF1, there is no waveform output for a period of time. Subsequently, a stable clock signal VOUT is output.

[0119] In other words, after the auxiliary oscillation circuit 33 is completely turned off, the crystal oscillator 44 maintains stable oscillation by relying on its own positive feedback mechanism, that is, the first oscillation signal XTAL1 presents a stable sine wave, and the output clock signal VOUT outputs a regular square wave clock signal. At this time, the phase noise of the crystal oscillator 44 is no longer affected by the auxiliary oscillation circuit 33, maintaining the excellent characteristics of the crystal oscillator itself.

[0120] In summary, this invention generates a linearly increasing control voltage through a control voltage generation circuit. The auxiliary oscillation circuit generates an oscillation signal based on the control voltage and automatically injects initial energy into the crystal oscillator, significantly shortening the oscillation time of the crystal oscillator. Furthermore, when the control voltage exceeds the first reference voltage, the auxiliary oscillation circuit automatically disconnects from the power supply and the crystal oscillator, thereby avoiding noise introduced by the long-term operation of the auxiliary circuit and resulting in excellent jitter performance of the output clock signal.

[0121] Furthermore, the low-noise, low-dropout linear regulator provided by this invention can maintain a good power supply rejection ratio under high-frequency oscillation conditions, effectively suppressing the influence of power supply noise on the crystal oscillator.

[0122] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A low-noise, fast-start crystal oscillator circuit, characterized in that, include: Low-noise, low-dropout linear regulators are used to provide output voltage; The control voltage generation circuit is connected to the low-noise, low-dropout linear regulator to generate and output a control voltage that shows an upward trend. An auxiliary oscillation circuit is connected to the control voltage generating circuit and the low-noise, low-dropout linear regulator, respectively, and outputs an oscillation signal. A crystal oscillator is connected to the low-noise, low-dropout linear regulator and the auxiliary oscillation circuit, receives the oscillation signal, and outputs a clock signal. The auxiliary oscillation circuit includes: The first comparator has its non-inverting input connected to the first reference voltage and its power supply connected to the low-noise, low-dropout linear regulator. The first switch has one end connected to the low-noise, low-dropout linear regulator and the control end connected to the output of the first comparator. The second switch has one end connected to the low-noise, low-dropout linear regulator and the control end connected to the output of the first comparator. The first buffer has its first end connected to the other end of the second switch; A ring voltage-controlled oscillator is connected to the inverting input of the first comparator, the other end of the first switch, and the second end of the first buffer, respectively. The third switch has one end connected to the third end of the first buffer and the control end connected to the output end of the first comparator. The fourth switch has one end connected to the third end of the first buffer and the control end connected to the output of the first comparator.

2. The low-noise, fast-start crystal oscillator circuit as described in claim 1, characterized in that, The ring voltage-controlled oscillator includes multiple inverting amplifiers connected in series, with the input of the first inverting amplifier connected to the output of the last inverting amplifier.

3. The low-noise, fast-start crystal oscillator circuit as described in claim 1, characterized in that, The control voltage generating circuit includes: The second comparator has its non-inverting input connected to the low-noise, low-dropout linear regulator and its inverting input connected to the second reference voltage. An AND gate, with its first input connected to the output of the second comparator and its second input connected to the output of the first comparator; The first N-type MOS transistor has its gate connected to the output of the AND gate, its drain connected to the low-noise, low-dropout linear regulator via a first current source, and its source grounded via a first capacitor. The source of the first N-type MOS transistor is also connected to the inverting input of the first comparator and the ring voltage-controlled oscillator.

4. The low-noise, fast-start crystal oscillator circuit as described in claim 1, characterized in that, The crystal oscillator includes: An inverting amplifier, the input terminal of which is connected to the other end of the third switch; The second buffer has one end connected to the output terminal of the inverting amplifier and the other end of the fourth switch, and the other end serves as the output terminal. The first protection element has one end connected between the other end of the third switch and the input terminal of the inverting amplifier, and the other end grounded through the second capacitor; The second protection element has one end connected between the output terminal of the inverting amplifier and one end of the second buffer, and the other end grounded through a third capacitor. The crystal oscillator is connected at one end between the first protection element and the second capacitor, and at the other end between the second protection element and the third capacitor.

5. The low-noise, fast-start crystal oscillator circuit as described in claim 1, characterized in that, The low-noise, low-dropout linear regulator includes: The second N-type MOSFET has its drain connected to the power supply voltage through a second current source, its gate connected to the first bias voltage, and its source grounded through a third current source. The first P-type MOSFET has its source connected to the power supply voltage and its gate connected between the second current source and the drain of the second N-type MOSFET, forming a first node; The second P-type MOS transistor has its gate connected to the second bias voltage, its drain grounded through the third current source, and its source connected to the drain of the first P-type MOS transistor. A resistor, one end of which is connected between the first node and the gate of the first P-type MOS transistor; The fourth capacitor has one end connected to the other end of the resistor, and the other end connected between the drain of the first P-type MOS transistor and the source of the second P-type MOS transistor to form a second node; the output branch is formed through the second node. The fifth capacitor has one end connected to the output branch and the other end grounded.

6. A control method for a low-noise, fast-start crystal oscillator circuit, employing the low-noise, fast-start crystal oscillator circuit as described in any one of claims 1-5, characterized in that, The control method includes: The output voltage is provided by a low-noise, low-dropout linear regulator. The control voltage generating circuit generates and outputs a control voltage that shows an upward trend. The auxiliary oscillation circuit generates an oscillation signal based on the control voltage and provides it to the crystal oscillator. The oscillation signal gradually approaches the nominal frequency of the crystal oscillator and continuously outputs energy into the crystal oscillator, causing the crystal oscillator to start oscillating and output a clock signal.

7. The control method for the low-noise, fast-start crystal oscillator circuit as described in claim 6, characterized in that, The steps of the control voltage generating circuit generating and outputting a control voltage that shows an upward trend include: The output voltage of the low-noise, low-dropout linear regulator is compared with a second reference voltage using a second comparator. When the output voltage is higher than the second reference voltage, the second comparator outputs a flip signal, causing the first current source to charge the first capacitor, generating the control voltage that shows an upward trend.

8. The control method for the low-noise, fast-start crystal oscillator circuit as described in claim 6, characterized in that, When the control voltage exceeds the first reference voltage, the generation of the oscillation signal is stopped.

9. The control method for the low-noise, fast-start crystal oscillator circuit as described in claim 8, characterized in that, The step of stopping the generation of the oscillation signal when the control voltage exceeds the first reference voltage includes: The control voltage is compared with the first reference voltage using a first comparator; When the control voltage exceeds the first reference voltage, the first comparator outputs a flipping control signal, causing the first current source to stop charging the first capacitor, and the control voltage to stop rising. At the same time, the first switch, the second switch, the third switch and the fourth switch are turned off, that is, the power supply to the ring voltage-controlled oscillator and the first buffer and the connection between the auxiliary oscillation circuit and the crystal oscillator are cut off, so that the crystal oscillator can maintain oscillation by relying on its own positive feedback mechanism.

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