Test method of PD fast charge protocol, terminal equipment and storage medium

Abstract

The invention is suitable for the field of electronic equipment testing, and discloses a PD fast charge protocol testing method, terminal equipment and a storage medium. The PD fast charge protocol test method comprises the following steps: acquiring a current channel state of a tested device; generating a channel switching instruction according to the current channel state; according to the channel switching instruction, a channel switching device is controlled to execute channel switching, and PD charging parameters of the switched channel are obtained; and generating a test report according to a comparison result of the PD charging parameter and a preset threshold value. By completing current channel state acquisition, channel switching instruction generation, channel switching control and parameter acquisition, and parameter comparison and report generation, manual participation in plugging operation of channel switching is not needed, the problem of low test efficiency caused by manual plugging is fundamentally solved, interface wear is avoided, and the test efficiency is improved. And the requirement of PD function batch detection on efficiency before consumer electronics leave a factory can be met.

Description

TECHNICAL FIELD

[0001] The present application belongs to the field of electronic equipment testing, and particularly relates to a PD fast charging protocol testing method, a terminal device and a storage medium. BACKGROUND

[0002] In the conventional PD fast charging protocol testing technology, the tested device needs to be repeatedly plugged in and out manually to switch the CC1 and CC2 channels, and finally a test report is formed.

[0003] The manual plugging operation not only results in long single testing time and low efficiency, but also causes interface wear due to plugging force and angle deviation, which cannot meet the efficiency requirement of the PD function batch detection of consumer electronics before leaving the factory. A new technical means is needed to solve the above technical problems. SUMMARY

[0004] In view of this, the embodiments of the present application provide a PD fast charging protocol testing method, a terminal device and a storage medium, which can solve the problem of low PD fast charging protocol testing efficiency in the related art.

[0005] The first aspect of the present application provides a PD fast charging protocol testing method, comprising: obtaining a current channel state of a tested device; generating a channel switching instruction according to the current channel state; controlling a channel switching device to perform channel switching according to the channel switching instruction, and obtaining a PD charging parameter of the switched channel; generating a test report according to a comparison result of the PD charging parameter and a preset threshold.

[0006] Optionally, in the first implementation manner of the first aspect of the present application, the step of obtaining the current channel state of the tested device comprises: receiving a level signal of a CC pin through serial communication; mapping the level signal into the current channel state of the tested device.

[0007] Optionally, in the second implementation manner of the first aspect of the present application, the step of generating the channel switching instruction according to the current channel state comprises: if the current channel state is CC1, generating a channel switching instruction switching to CC2; if the current channel state is CC2, generating a channel switching instruction switching to CC1.

[0008] Optionally, in the third implementation manner of the first aspect of the present application, the step of controlling the channel switching device to perform channel switching according to the channel switching instruction comprises: The main control chip sends a level control signal to the RS2227 switch device to drive the MOS transistor to turn on the CC pin link of the target channel.

[0009] Optionally, in a fourth implementation form of the first aspect of the present application, the step of obtaining the PD charging parameter of the channel after switching comprises: The I 2 The C bus reads the real-time voltage value collected by the SC2021A protocol chip and continuously monitors the power fluctuation within a preset time period to obtain the PD charging parameter.

[0010] Optionally, in a fifth implementation form of the first aspect of the present application, the preset threshold comprises a preset interval and a preset fluctuation threshold, and the step of generating a test report according to the comparison result of the PD charging parameter and the preset threshold comprises: If the real-time voltage value in the PD charging parameter is within the preset interval and the power fluctuation is continuously lower than the preset fluctuation threshold, it is determined that the current channel test is passed, and a test report of the channel test passed is generated; If the real-time voltage value in the PD charging parameter exceeds the preset interval and the power fluctuation is equal to or exceeds the preset fluctuation threshold, the channel is marked as abnormal, and a test report of the channel test failed is generated.

[0011] Optionally, in a sixth implementation form of the first aspect of the present application, the step of generating a test report of the channel test failed comprises: Structuring the abnormal information to obtain a test report of the channel test failed, the abnormal information comprising an abnormal channel identifier, a PD charging parameter at an abnormal time, and a test timestamp at a normal time.

[0012] Optionally, in a seventh implementation form of the first aspect of the present application, after the step of controlling the channel switch device to perform channel switching according to the channel switching instruction, the method further comprises: Monitoring whether a power failure event occurs in the device under test within a first preset time period; If the power failure event occurs, it is determined that the channel switching is abnormal, a test report of the channel switching abnormal is generated, and the test is terminated; Monitoring whether the device under test returns to the charging state within a second preset time period; If the device under test does not return to the charging state, it is determined that the protocol interaction fails, a test report of the protocol interaction failure is updated, and the test is terminated.

[0013] In a second aspect, the embodiments of the present application provide a terminal device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor implements the steps of the test method of the PD fast charging protocol when executing the computer program.

[0014] In a third aspect, an embodiment of the present application provides a computer readable storage medium, which stores a computer program. The computer program is executed by a processor to implement the steps of the test method of the PD fast charging protocol.

[0015] In a fourth aspect, an embodiment of the present application provides a computer program product, which, when executed on a terminal device, causes the terminal device to perform the test method of the PD fast charging protocol.

[0016] Compared with the prior art, the embodiment of the present application has the beneficial effects that: by completing the current channel state acquisition, channel switching instruction generation, channel switching control and parameter acquisition, parameter comparison and report generation, the manual plugging operation of channel switching is not required, the problem of low test efficiency caused by manual plugging is fundamentally solved, interface wear is avoided, and the demand for efficiency of batch detection of PD function before the consumer electronics leave the factory can be met. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0018] Figure 1 FIG. 1 is a schematic diagram of an embodiment of the test method of the PD fast charging protocol in the embodiment of the present application; Figure 2 FIG. 2 is a schematic diagram of a specific embodiment of step S101 of the test method of the PD fast charging protocol in the embodiment of the present application; Figure 3 FIG. 3 is a schematic diagram of a specific embodiment of step S103 of the test method of the PD fast charging protocol in the embodiment of the present application; Figure 4 FIG. 4 is a schematic diagram of a specific embodiment of step S104 of the test method of the PD fast charging protocol in the embodiment of the present application; Figure 5 FIG. 5 is a schematic diagram of an embodiment of the terminal device in the embodiment of the present application. DETAILED DESCRIPTION

[0019] In order to make the purpose, technical solutions and advantages of the present application more clear, the following will further describe the present application in combination with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application, and are not used to limit the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative labor are within the protection scope of the present application.

[0020] It is to be understood that the terminology "including", "comprising", and "having" used in the specification and the appended claims of the application herein, and the terms "comprises", "comprised of", "comprising" and the like in the above description and the claims of the application are open-ended, and are intended to mean including, but not limited to. For example, a process, method, article, or apparatus that comprises a list of steps or elements is not necessarily limited to the listed steps or elements, but can include additional steps or elements not expressly listed or inherent to such process, method, article, or apparatus. Terms such as "first" and "second" and the like used in the description and the claims of the application herein are applied to distinguish between two entities, operating, objects, etc., but do not necessarily require or imply these entities, operating, objects, etc., to be in any specific relationship or order.

[0021] Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase that an embodiment in various places in the specification are not necessarily all referring to the same embodiment, nor are they necessarily mutually exclusive of other embodiments. It is explicitly contemplated that embodiments described herein can be combined with other embodiments.

[0022] In the conventional PD fast charging protocol test technology, the measured device needs to be repeatedly plugged in and out manually to switch the CC1 and CC2 channels, and finally the test report is formed.

[0023] The manual plugging operation not only leads to long single test time and low efficiency, but also causes interface wear due to plugging force and angle deviation, which cannot meet the efficiency requirement of the batch detection of the PD function of consumer electronics before leaving the factory. A new technical means is needed to solve the above technical problems.

[0024] In view of this, the embodiments of the application provide a PD fast charging protocol test method, a terminal device and a storage medium, which complete current channel state acquisition, channel switching instruction generation, channel switching control and parameter acquisition, parameter comparison and report generation, without manual plugging operation for channel switching, fundamentally solving the problem of low test efficiency caused by manual plugging, avoiding interface wear, and meeting the efficiency requirement of the batch detection of the PD function of consumer electronics before leaving the factory.

[0025] In order to illustrate the technical solutions of the application, the following will be described through specific embodiments.

[0026] Figure 1A flowchart of a test method for a PD fast charging protocol is shown, which can be applied to a terminal device. The terminal device can be a mobile phone, a tablet computer, a notebook computer, an ultra-mobile personal computer (UMPC), a netbook, etc.

[0027] Specifically, the test method for the PD fast charging protocol can include the following steps S101 to S103.

[0028] In step S101, the current channel state of the device under test is obtained.

[0029] In the embodiment of the present application, the terminal device (the implementation device of the test method for the PD fast charging protocol) uses a master chip as a core control unit, which is responsible for instruction analysis and hardware driving; a communication conversion chip is used to realize bidirectional data interaction with the PC end, solve the communication compatibility problem of USB and serial port; a channel switch device is integrated to complete the physical switching of CC1 / CC2 channels; a PD protocol chip is configured to collect PD charging parameters (voltage, power, etc.); a power supply system is used to provide stable voltage for each component; at the same time, a test software is built-in to support threshold setting, data processing, comparison judgment and test report generation, forming a closed-loop control from instruction issuing to result feedback.

[0030] The terminal device starts the current channel state detection process. Specifically, the communication conversion chip inside the terminal device establishes communication with the master chip, and the master chip drives the CC pin detection module (based on the level signal detection principle) to obtain the real-time state signal of the CC pin of the device under test; after the processor of the terminal device receives the state signal, it converts the original signal into a recognizable "current channel state" (i.e. clearly the current CC1 channel or CC2 channel) according to the preset signal mapping rule (such as high level corresponding to CC1 and low level corresponding to CC2).

[0031] Optionally, the terminal device can use serial communication (such as UART protocol) to check the CC pin level signal again, or use the initial parameters fed back by the PD protocol chip to assist in judging the channel state, to further improve the accuracy of state recognition.

[0032] In step S102, a channel switching instruction is generated according to the current channel state.

[0033] In the embodiment of the present application, after determining the current channel state of the device under test, the channel switching instruction generation link is entered. The built-in test logic is called to analyze the current channel state.

[0034] If the current channel is the target channel that needs to be switched in the test process (for example, CC1 needs to be switched to CC2, and CC2 needs to be switched to CC1), a channel switching instruction containing the "target channel identifier" (for example, "switch to CC2") and the "switching control parameter" (for example, the duration of the level drive and the timing of the switch action) is automatically generated.

[0035] During the instruction generation process, the instruction format is checked to ensure that it meets the communication protocol requirements of the master chip and the channel switch device.

[0036] Optionally, the instruction generation logic is adjusted in combination with the preset test priority (for example, the fixed order of "first test CC1 and then test CC2"), or the tested channel is skipped according to the historical test record to optimize the switching efficiency.

[0037] In step S103, the channel switch device is controlled to perform channel switching according to the channel switching instruction, and the PD charging parameters of the channel after switching are obtained.

[0038] After the channel switching instruction is generated, the "channel switching control" and "PD charging parameter acquisition" operations are performed synchronously. On the one hand, the channel switching instruction is sent to the master chip through the internal communication link, and the master chip outputs the corresponding level control signal to the channel switch device (for example, RS2227) after receiving the instruction, drives the internal circuit of the switch device to act, and completes the physical switching of CC1 and CC2 channels, realizing the channel switching without manual plugging. On the other hand, after the channel switching is completed, the PD charging parameter acquisition process is started: the PD protocol chip (for example, SC2021A) acquires the PD charging parameters (for example, real-time voltage, power value, etc.) of the channel after switching in real time through the built-in voltage / current detection module, and the acquired parameters are transmitted to the processor of the terminal device through the I2C bus. The processor performs preliminary filtering and storage on the parameters to ensure data integrity.

[0039] Optionally, the parameter acquisition is started after the channel switching is delayed for a preset time (for example, 200-500 milliseconds), and the channel signal is stabilized to avoid the influence of parameter fluctuation at the switching moment on data accuracy.

[0040] Optionally, the real-time voltage value acquired by the SC2021A protocol chip is read through the I 2 C bus, and the power fluctuation within a preset time is continuously monitored to obtain the PD charging parameters. The real-time voltage value acquired by the SC2021A protocol chip is read through the I 2The C bus reads the real-time voltage value collected by the SC2021A protocol chip, and continuously monitors the power fluctuation in a preset time period to obtain the PD charging parameter. On the one hand, the voltage detection module integrated in the SC2021A protocol chip reduces the requirement for external components. On the other hand, by continuously monitoring the power fluctuation, the PD charging state can be more comprehensively reflected, instead of relying on a single voltage value, thereby improving the accuracy and integrity of the PD charging parameter acquisition.

[0041] In step S104, a test report is generated according to the comparison result of the PD charging parameter and the preset threshold value.

[0042] After obtaining the PD charging parameter of the switched channel, the result determination and report generation link is entered. The test software calls the preset threshold database (the database stores the standard parameter threshold corresponding to different PD fast charging specifications, such as the voltage threshold and power threshold corresponding to a 100W PD charger), and compares the collected measured PD charging parameter with the corresponding preset threshold one by one to determine whether the measured parameter is within the qualified range. Then, a test report is automatically generated according to the comparison result, and the report at least contains the core information such as “current test channel identifier”, “measured value of PD charging parameter”, “preset threshold range” and “comparison determination result” (such as “qualified” or “unqualified”), forming a complete test record.

[0043] Optionally, the test report is saved in a structured format (such as an Excel table or a JSON file) to the local storage, or uploaded to an external data management system (such as an MES system) through a communication module, facilitating subsequent data tracing and statistical analysis.

[0044] Compared with the prior art, the embodiment of the present application has the beneficial effects that by completing the current channel state acquisition, channel switching instruction generation, channel switching control and parameter acquisition, parameter comparison and report generation, manual intervention in the plugging operation of channel switching is not required, the problem of low test efficiency caused by manual plugging is fundamentally solved, interface wear is avoided, and the demand for efficiency in batch detection of PD function before the consumer electronics leave the factory can be met.

[0045] In the traditional PD fast charging protocol test, the channel state of the device under test needs to be obtained by manual observation or external special detection instrument. Manual observation is prone to channel state recognition errors due to subjective judgment deviation (such as misjudging the status of the indicator light). The external special detection instrument needs to build an additional detection link, which not only increases the test cost, but also prolongs the time consumption of channel state acquisition. Moreover, both of the above ways cannot seamlessly connect with the subsequent automatic channel switching process, and it is difficult to meet the demand for “quick and accurate acquisition of channel state” in the batch detection of PD function before the consumer electronics leave the factory, thereby affecting the overall test efficiency. Based on this, an optional embodiment of the present application is proposed. Referring to Figure 2 , Figure 2For a specific embodiment of step S101 of the test method of the PD fast charging protocol in the embodiments of the present application, step S101 further includes the following specific implementation: In step S1011, the level signal of the CC pin is received through serial communication.

[0046] In the embodiments of the present application, the terminal device switches the communication link between itself and the device under test to a serial communication mode (such as the UART protocol) through a communication conversion chip (CH340N) inside the terminal device, and establishes a stable serial connection; then, a signal acquisition instruction is sent, and the main control chip responds to the instruction to drive the detection module to collect the level signal (such as the high level signal or the low level signal) of the CC pin of the device under test in real time, and the level signal is transmitted to the processor of the terminal device at a preset baud rate, data bit, and other parameters through the established serial communication link.

[0047] Optionally, before receiving the level signal, a verification instruction is sent through the serial port to confirm whether the communication link between the device under test and the terminal device is smooth, and if the communication is abnormal, a pop-up window is prompted and the signal acquisition process is terminated.

[0048] Optionally, the signal sampling frequency (such as 10 times per second) is set, and the level signal is collected multiple times to eliminate accidental interference.

[0049] In step S1012, the level signal is mapped to the current channel state of the device under test.

[0050] In the embodiments of the present application, after receiving the level signal of the CC pin, the signal analysis and state mapping process is started. The processor calls a built-in signal mapping rule library (which is preset based on the level characteristics of CC1 and CC2 channels in the PD fast charging protocol, for example, high level corresponds to CC1 channel and low level corresponds to CC2 channel), and matches the received original level signal with the characteristic parameters in the rule library; if the matching is successful, the level signal is directly converted to an explicit "current channel state" (i.e., determining that the current channel is CC1 or CC2), and the state information is temporarily stored in the memory of the terminal device to provide data support for subsequent generation of channel switching instructions.

[0051] Optionally, the received level signal is filtered (such as removing noise and sharp pulses in the signal) before the mapping operation is performed to improve the accuracy of state determination.

[0052] Optionally, after the mapping is completed, the current channel state is intuitively displayed through an indicator light module (such as the LED indicator light of the terminal device) to facilitate real-time viewing by the operator.

[0053] In the optional embodiment of the present application, the channel state recognition does not need human intervention and does not need external special detection instruments, which avoids subjective errors of manual observation and saves the step of additional detection link, reduces the test cost and shortens the time consumption of channel state acquisition; the serial communication can be seamlessly connected with the subsequent automatic control process of the terminal equipment, realizes the automation and precision of channel state acquisition, and effectively solves the problems of low efficiency and poor accuracy of channel state acquisition in the traditional test.

[0054] Optionally, if the current channel state is CC1, a channel switching instruction switching to CC2 is generated; If the current channel state is CC2, a channel switching instruction switching to CC1 is generated. The bidirectional switching logic can realize the coverage test of the two key channels CC1 and CC2 in the PD fast charging protocol test, without manual judgment of the switching direction.

[0055] In the traditional PD fast charging protocol test, the channel switching needs to rely on manual repeated plugging and unplugging of the tested equipment to realize the switching of the CC1 and CC2 channels. The manual plugging and unplugging not only consumes a lot of time, but also easily causes wear of the TYPE-C interface due to the plugging and unplugging force and angle deviation, reduces the service life of the equipment; at the same time, the manual plugging and unplugging cannot accurately control the timing and stability of the channel switching, and easily causes problems such as poor channel contact and incomplete switching, which leads to inaccurate subsequent PD charging parameter collection and affects the reliability of the test result. Based on this, an optional embodiment is proposed. Figure 3 , Figure 3 This is a specific embodiment diagram of step S103 of the test method of the PD fast charging protocol in the embodiment of the present application. Step S103 further includes the following specific implementation: In step S1031, the main control chip sends a level control signal to the RS2227 type switching device to drive the MOS tube to turn on the CC pin link of the target channel.

[0056] In the embodiment of the present application, the channel switching instruction generated in the early stage is received and analyzed, and the "target channel identifier" (such as CC2) and "switching control requirement" (such as on duration, signal strength, etc.) in the instruction are extracted; then, according to the preset hardware driving rule, the abstract switching instruction is converted into specific control parameters recognizable by the main control chip, and the parameter format is verified to ensure that it meets the communication protocol standard of the main control chip and the RS2227 type switching device, avoiding switching failure caused by parameter error.

[0057] Optionally, after the parameter analysis, the internal log module records the key information (such as instruction generation time, target channel) of the current switching instruction, which is convenient for subsequent fault tracing.

[0058] Optionally, a pre-check instruction is first sent to the master chip, and the control parameters are issued after confirming that the master chip is in a normal working state.

[0059] Further, the analyzed control parameters are transmitted to the master chip, and the master chip starts the signal output module after responding, generates corresponding level control signals according to the control parameters; then, the master chip accurately sends the level control signals to the RS2227 type channel switch device through a preset hardware communication link, and triggers the internal circuit of the switch device to act. In this process, the signal transmission state is monitored in real time to ensure that the level control signals are transmitted to the switch device without loss or interference, and the effective transmission of the switching instruction is ensured.

[0060] Optionally, a signal retransmission mechanism is provided, and if the signal transmission is interrupted or abnormal, the master chip will resend the level control signal until the switch device successfully receives it; the current signal transmission stage can also be prompted through the indicator light module.

[0061] Further, after the RS2227 type switch device receives the level control signal sent by the master chip, the internal switch driving module is started to convert the level signal into a driving signal of the MOS tube; then, the switch device controls the conduction state of the corresponding MOS tube according to the driving signal. If the target channel is CC2, the MOS tube associated with the CC2 channel is driven to conduct, while the MOS tube associated with the CC1 channel is ensured to be in a cut-off state, so as to realize the physical conduction of the target channel (CC2) CC pin link. The terminal device will acquire the feedback signal (such as the MOS tube conduction state confirmation signal) of the switch device in real time through the master chip, judge whether the target channel link is successfully conducted, and if not, trigger the abnormal processing procedure.

[0062] Optionally, after the MOS tube is turned on, a preset time delay (such as 100-300 milliseconds) is set, and the subsequent PD charging parameter acquisition is performed after the channel link signal is stable, so as to avoid the influence of signal fluctuation in the switching moment on the test accuracy; the link conduction state of the target channel can also be detected by the PD protocol chip (SC2021A) to double-check the switching result.

[0063] In the optional embodiment of the application, manual participation in channel state identification is not required, and no special detection instrument is needed, which on the one hand avoids the subjective error of manual observation, and on the other hand saves the step of additionally building a detection link, reduces the test cost, shortens the time consumption of obtaining the channel state, and realizes the automation and precision of obtaining the channel state, effectively solving the problems of low efficiency and poor accuracy in obtaining the channel state in the traditional test.

[0064] In the conventional PD fast charging protocol test, the test result determination depends on manual comparison of parameters and standard values, which cannot meet the demand for accurate determination and efficient reporting in batch detection of PD functions before the consumer electronics are shipped. Based on this, an optional embodiment is provided. Figure 4 , Figure 4 is a specific embodiment of step S104 of the test method for the PD fast charging protocol in the embodiments of the present application, and step S104 further includes the following specific implementation: In step S1041, if the real-time voltage value in the PD charging parameter is in the preset interval and the power fluctuation continuously is lower than the preset fluctuation threshold, it is determined that the current channel test is passed, and a test report of the channel test passing is generated.

[0065] In the embodiments of the present application, after obtaining the PD charging parameter of the switched channel, a preset threshold calling process is started. The preset threshold corresponding to the current device under test (such as a docking station or a fast charging charger) is read from the memory, which is for the preset interval of the PD charging voltage and for the preset fluctuation threshold of the charging stability. The terminal device will perform validity check on the called threshold to confirm that the threshold is not damaged and does not exceed a reasonable range, and if the check fails, a threshold reloading process is triggered.

[0066] Optionally, the preset threshold can be manually adjusted through a software interface before the test to adapt to the test requirements of devices under test of different brands and different wattages.

[0067] Optionally, the device under test model is automatically associated to match the corresponding standard threshold from the threshold database, reducing manual operation.

[0068] In step S1042, if the real-time voltage value in the PD charging parameter exceeds the preset interval and the power fluctuation is equal to or exceeds the preset fluctuation threshold, the channel is marked as abnormal, and a test report of the channel test failing is generated.

[0069] Further, after the terminal device completes the preset threshold calling, it enters the parameter comparison link. The processor disassembles the collected PD charging parameter into two types of data, “real-time voltage value” and “power fluctuation condition”, and compares them with the corresponding preset threshold. On the one hand, it is determined whether the real-time voltage value falls within the preset interval; on the other hand, it analyzes the power fluctuation data within the preset time period to determine whether it continuously falls below the preset fluctuation threshold (such as the power fluctuation always being below 0.5 W). In this process, the comparison process data is recorded in real time.

[0070] Optionally, the power data with large fluctuations is smoothed and then compared with the threshold by using the average value of multiple comparisons to avoid the influence of instantaneous abnormal data on the determination result.

[0071] Optionally, a comparison log module is arranged to record the time, data content and preliminary result of each comparison, facilitating subsequent tracing.

[0072] Further, after completing the bidirectional comparison, test state determination and report generation operations are performed according to the comparison result. If both comparisons meet the requirements (the real-time voltage value is within the preset interval, and the power fluctuation continuously is lower than the preset fluctuation threshold), it is determined that the current channel test is passed, and the processor calls the report generation module to automatically generate a test report containing the test channel identifier, the measured value of the PD charging parameter, the preset threshold value and the determination result (PASS). If any one of the two comparisons does not meet the requirements (for example, the real-time voltage 19.2V exceeds the interval of 19.5-20.5V, or the power fluctuation reaches 0.6W exceeding the preset fluctuation threshold), the current channel is marked as abnormal, and it is determined that the test is not passed. The report generation module will clearly mark the abnormal type (such as "voltage over standard" or "power fluctuation too large") and the corresponding abnormal data in the report.

[0073] Optionally, the test report can be displayed in a visual format (such as a table or a chart) to intuitively present the difference between the parameters and the threshold values. The report can also be automatically associated with the test task number, and stored according to the number to facilitate the retrieval of the results after batch testing.

[0074] Optionally, the abnormal information is recorded in a structured manner to obtain a test report of the channel test not passed, and the abnormal information includes the abnormal channel identifier, the PD charging parameter at the abnormal time and the test timestamp at the normal time. The structured recording of the abnormal information generates the test report of the channel test not passed, solves the problems of data omission and format disorder in manual recording of abnormal information in the traditional test, and facilitates the summarization, statistics and analysis of abnormal data in the batch test scenario, avoiding the tedious process of manual sorting of abnormal information.

[0075] In the optional embodiment of the present application, the problems of inaccurate determination and low report generation efficiency in the traditional test are effectively solved.

[0076] In the traditional PD fast charging protocol test, there is a lack of active monitoring mechanism for the power-down risk and protocol interaction state after channel switching. Based on this, an optional embodiment of the present application is proposed. The step S103 further includes the following specific implementation manner: Step S201, monitoring whether the device under test has a power-down event within the first preset time length.

[0077] In the embodiment of the present application, after the channel switching is completed by the control channel switch device, the first stage monitoring process is entered. The timer module is called to start the timing of the first preset time length, and the power-down detection module is triggered to collect the power supply voltage signal of the device under test in real time through the voltage sampling circuit of the power supply system, and determine whether there is a power-down feature such as voltage drop or zero.

[0078] Optionally, the voltage data at the power-off moment is synchronously recorded into the report.

[0079] In step S202, if the power-off event occurs, it is determined that the channel switching is abnormal, a test report of the channel switching abnormality is generated, and the test is terminated.

[0080] In the embodiment of the present application, if the power-off event is monitored within the first preset time length, it is directly determined that the channel switching is abnormal, a report generation module is immediately called to generate a test report containing the conclusion of the channel switching abnormality and the moment when the power-off occurs, and a test termination instruction is triggered to stop all subsequent test procedures, so as to avoid invalid test from consuming resources.

[0081] Optionally, when the power-off event is monitored, the operator is prompted about the type of abnormality through an indicator light or a software pop-up window.

[0082] In step S203, whether the device under test returns to the charging state is monitored within the second preset time length.

[0083] In the embodiment of the present application, the timing of the second preset time length is started, and a charging state monitoring module is activated at the same time, so as to determine whether the device under test returns to the normal charging state through the charging enable signal and the current signal fed back by the PD protocol chip SC2021A. If the device under test is successfully monitored to return to the charging state within the second preset time length, it is determined that the protocol interaction after the channel switching is normal, and the subsequent PD charging parameter acquisition and comparison procedures are continued to be executed; if the charging state is not monitored to return, it is determined that the protocol interaction fails.

[0084] Optionally, the monitoring is performed in stages within the second preset time length, so as to refine the abnormality positioning; a warning mechanism can also be set, and when the second preset time length threshold is approached (for example, when 10% of the time length is left), a pop-up window is prompted to warn that the charging recovery is overtime, and then the determination result is determined after the remaining time length ends.

[0085] In step S204, if the charging state is not returned, it is determined that the protocol interaction fails, a test report of the protocol interaction failure is updated, and the test is terminated.

[0086] In the embodiment of the present application, after the timing of the second preset time length ends, the final processing is performed according to the charging state monitoring result. If it is determined that the protocol interaction fails, a report updating module is called to supplement the abnormality conclusion of the protocol interaction failure and the monitoring data of the charging state not being returned on the basis of the generated test report, and a test termination instruction is triggered to terminate the current test task; if it is determined that the charging state returns to normal, the report conclusion is not updated, only the intermediate state of the protocol interaction being normal is recorded, and then the control right is handed over to the subsequent PD charging parameter acquisition link, so as to ensure that the test procedure is continuously promoted.

[0087] Optionally, before the test is terminated, the intermediate data of the current test (such as channel switching records, monitoring logs) is saved, so as to facilitate subsequent tracing of failure causes.

[0088] In the optional embodiment of the application, by actively monitoring the power-off and protocol interaction state, the test can be terminated immediately when an exception occurs, so as to avoid resource waste; on the other hand, the problem that the protocol interaction failure is misjudged as a parameter not meeting the standard in the traditional test is avoided.

[0089] As shown in FIG. 5, it is a schematic diagram of a terminal device provided by an embodiment of the application. The terminal device 500 can include a processor 501, a memory 502, and a computer program 503 stored in the memory 502 and executable on the processor 501, for example, a test program of the PD fast charging protocol. The processor 501 implements the steps in the test embodiments of the various PD fast charging protocols when executing the computer program 503. Figure 5

[0090] The computer program can be divided into one or more modules / units, one or more modules / units are stored in the memory 502 and executed by the processor 501 to complete the application. One or more modules / units can be a series of computer program instruction segments capable of completing a specific function, which is used to describe the execution process of the computer program in the terminal device.

[0091] The terminal device can include, but is not limited to, the processor 501 and the memory 502. Those skilled in the art can understand that, Figure 5 It is only an example of the terminal device and does not constitute a limitation on the terminal device, and can include more or fewer components than the diagram, or combine certain components, or different components, for example, the terminal device can also include an input / output device, a network access device, a bus, etc.

[0092] The processor 501 can be a central processing unit (CPU), and can also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor.

[0093] ​The memory 502 can be an internal storage unit of the terminal device, for example, a hard disk or a memory of the terminal device. The memory 502 can also be an external storage device of the terminal device, for example, a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. equipped on the terminal device. Further, the memory 502 can include both the internal storage unit and the external storage device of the terminal device. The memory 502 is used to store computer programs and other programs and data required by the terminal device. The memory 502 can also be used to temporarily store data that has been output or will be output.

[0094] It should be noted that, for the convenience and brevity of description, the structure of the terminal device described above can also refer to the specific description of the structure in the method embodiments, which will not be described here.

[0095] The embodiment of the present application also provides a computer readable storage medium, the computer readable storage medium stores a computer program, and the computer program is executed by a processor to realize the steps in the test method of the PD fast charging protocol.

[0096] The embodiment of the present application provides a computer program product, when the computer program product is run on a mobile terminal, so that the mobile terminal executes the steps in the test method of the PD fast charging protocol.

[0097] In the above embodiments, the description of each embodiment has its own emphasis, and the parts not described or recorded in a certain embodiment can be referred to the related description of other embodiments.

[0098] Those skilled in the art can appreciate that the units and algorithm steps of the examples described in combination with the embodiments disclosed herein can be realized by electronic hardware or a combination of computer software and electronic hardware. Whether the functions are realized in hardware or software depends on the specific application and design constraints of the technical solution. A person skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0099] In the embodiments provided by the present application, it should be understood that the disclosed terminal device and method can be implemented by other ways. For example, the terminal device embodiments described above are only schematic. In addition, the mutual coupling or direct coupling or communication connection between the shown or discussed mutually can be indirect coupling or communication connection through some interfaces, devices or units, and can be electrical, mechanical or other forms.

[0100] The units described as separate components may or may not be physically separate, and the components displayed as units may or may not be physical units, i.e. may be located in one place, or may be distributed on multiple network units. Part or all of the units may be selected according to actual needs to achieve the purpose of the embodiment.

[0101] In addition, each functional unit in each embodiment of the present application can be integrated in one processing unit, or each unit can exist physically, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of a software functional unit.

[0102] The integrated module / unit, if realized in the form of a software functional unit and sold or used as an independent product, can be stored in a computer readable storage medium. Based on this understanding, all or part of the processes in the above-mentioned embodiment methods can also be completed by a computer program instructing related hardware, and the computer program can be stored in a computer readable storage medium. When the processor executes the computer program, the steps of each method embodiment can be implemented. The computer program includes computer program code, which can be in the form of source code, object code, executable file or some intermediate form, etc. The computer readable medium can include any entity or device capable of carrying the computer program code, recording medium, U disk, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signal, telecommunication signal and software distribution medium, etc.

[0103] The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than limit them. Although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacements to part of the technical features. These modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.

Claims

1. A method for testing a PD fast charging protocol, characterized in that, The method comprises the following steps: acquiring a current channel state of a device under test; generating a channel switching instruction according to the current channel state; controlling a channel switching device to perform channel switching according to the channel switching instruction and acquiring a PD charging parameter of a channel after switching; generating a test report according to a comparison result of the PD charging parameter and a preset threshold. 2.The test method of the PD fast charging protocol of claim 1, wherein, The step of acquiring the current channel state of the device under test comprises the following steps: receiving a level signal of a CC pin through serial communication; mapping the level signal to the current channel state of the device under test. 3.The test method of the PD fast charging protocol of claim 1, wherein, The step of generating the channel switching instruction according to the current channel state comprises the following steps: if the current channel state is CC1, generating a channel switching instruction to switch to CC2; if the current channel state is CC2, generating a channel switching instruction to switch to CC1. 4.The test method of the PD fast charging protocol of claim 1, wherein, The step of controlling the channel switching device to perform channel switching according to the channel switching instruction comprises the following steps: sending a level control signal to an RS2227 type switching device through a master control chip to drive a MOS tube to turn on a CC pin link of a target channel. 5.The test method of the PD fast charging protocol of claim 1, wherein, The step of acquiring the PD charging parameter of the channel after switching comprises the following steps: By I 2 The C bus reads the real-time voltage value collected by the SC2021A protocol chip, and continuously monitors the power fluctuation within a preset time length to obtain the PD charging parameters. 6.The test method of the PD fast charging protocol of claim 1, wherein, The preset threshold comprises a preset interval and a preset fluctuation threshold, and the step of generating the test report according to the comparison result of the PD charging parameter and the preset threshold comprises the following steps: if a real-time voltage value in the PD charging parameter is in the preset interval and a power fluctuation is continuously lower than the preset fluctuation threshold, determining that the current channel test is passed, and generating a test report of a channel test passed; if the real-time voltage value in the PD charging parameter exceeds the preset interval and the power fluctuation is equal to or exceeds the preset fluctuation threshold, marking a channel abnormality, and generating a test report of a channel test failed. 7.The test method of the PD fast charging protocol of claim 6, wherein, The step of generating the test report of the channel test failed comprises the following steps: structurally recording abnormal information to obtain the test report of the channel test failed, and the abnormal information comprises an abnormal channel identifier, a PD charging parameter at an abnormal time, and a test time stamp at a normal time. 8.The test method of the PD fast charging protocol of claim 1, wherein, The step of controlling the channel switching device to perform channel switching according to the channel switching instruction further comprises the following steps: monitoring whether a power-off event occurs in the device under test within a first preset time length; if the power-off event occurs, determining that the channel switching is abnormal, generating a test report of the channel switching abnormality and terminating the test; monitoring whether the device under test recovers to a charging state within a second preset time length; if the device under test does not recover to the charging state, determining that a protocol interaction fails, updating a test report of the protocol interaction failed and terminating the test. 9.A terminal device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements steps of a test method of a PD fast charging protocol according to any one of claims 1 to 8 when executing the computer program.

10. A computer-readable storage medium storing a computer program, the computer program comprising instructions that, when executed by a computer, cause the computer to perform the method of any one of claims 1 to 9. The computer program is executed by the processor to implement steps of a test method of a PD fast charging protocol according to any one of claims 1 to 8.

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