Rom program repair method, device, equipment and medium

Abstract

The application provides a ROM program repair method, device, equipment and medium, and relates to the technical field of ROMs. The method comprises the following steps: initializing a read-only memory to run patch reading code in the initialization process; reading patch enabling data, patch description data and patch content data from one-time programming memory by using the patch reading code, so as to determine a target patch point of the ROM program to be repaired and the corresponding patch entry quantity and patch entry content; and writing the patch entry content to the target patch point according to the patch entry quantity, so as to realize the repair of the ROM program. The application can significantly reduce the cost required for the repair of the ROM program, and effectively improve the security of the repair process of the ROM program.

Description

Technical Field

[0001] This invention relates to the field of ROM technology, and in particular to a ROM program repair method, apparatus, device, and medium. Background Technology

[0002] The program in read-only memory (ROM) is used to initialize the central processing unit (CPU), external devices such as serial ports and storage devices, and to load or verify the signature of the next-level boot program. The ROM program is provided by the chip manufacturer and is burned into the chip's ROM during the chip manufacturing process. Once the chip leaves the factory, its ROM program cannot be modified.

[0003] Before the ROM program is embedded into the chip, the chip manufacturer verifies it. However, the chip verification environment differs from the actual operating environment, causing some parameters in the ROM program to be insufficiently verified. Therefore, the ROM program of the manufactured chip may be defective, leading to the chip's inability to function properly.

[0004] To address this issue, relevant literature (such as publication number CN202410255361, titled "ROM Program Repair Method") discloses the following solution: All ROM functions are numbered, and these numbers are used as offsets for the corresponding function pointers; after the ROM program is compiled, a function entry address table is created, recording the entry address of each function according to its number, i.e., one number corresponds to one function's entry address; during chip manufacturing, the program and the function entry address table are hard-coded into the ROM; when the ROM program starts, the function entry address table is copied to RAM (Random Access RAM). The entry address in RAM is a pre-agreed address in the random access memory (RAM). After chip testing, if a functional defect is found and one or more functions need to be corrected, the corrected functions are copied into RAM, and the function entry address with the corresponding number in the function entry address table is updated to the entry address of the corrected function. When a function needs to be executed, the function entry address is first obtained from the function entry address table in RAM according to the function number, and the corresponding function is executed at that address. If the function has been corrected, the obtained function entry address is the entry address of the corrected function, and the corrected function is executed.

[0005] However, the above-mentioned ROM program repair methods have the following drawbacks: (1) High cost. RAM space in the chip is very precious. Existing ROM repair methods require allocating a portion of RAM space for ROM program repair. Even if the ROM program does not need to be repaired, this space still needs to be reserved. More RAM space means higher cost. (2) Security vulnerabilities exist. Current ROM repair methods reserve backdoors to bypass ROM programs. By simply modifying the entries in the function entry address table residing in RAM, it is possible to bypass the processes in the ROM program that cannot be modified, allowing the ROM to run other processes in RAM, which poses a security vulnerability. Summary of the Invention

[0006] In view of this, the purpose of the present invention is to provide a ROM program repair method, apparatus, device and medium that can significantly reduce the cost required for ROM program repair, while effectively improving the security of the ROM program repair process.

[0007] In a first aspect, the present invention provides a ROM program repair method, applied to a chip, the chip including a read-only memory and a one-time programmable memory, wherein a ROM program is burned into the read-only memory, the ROM program integrating patch reading code, and the one-time programmable memory storing patch enable data, patch description data, and patch content data, the method comprising:

[0008] Initialize the read-only memory to run patch read code during the initialization process;

[0009] Using the patch reading code, patch enable data, patch description data, and patch content data are read from the one-time programmable memory to determine the target patch point to be repaired in the ROM program and the number and content of the corresponding patch entries.

[0010] Based on the number of patch entries, the patch entry content is written to the target patch point to repair the ROM program.

[0011] In one implementation, the ROM program embeds multiple patch points, and each patch point integrates patch reading code; patch enable data is used to describe whether the patch point is repaired; patch description data is used to describe the number of patch entries; and patch content data is used to describe the content of the patch entries.

[0012] In one implementation, patch read code is used to read patch enable data, patch description data, and patch content data from a one-time programmable memory to determine the target patch points to be repaired in the ROM program and the corresponding number and content of patch entries, including:

[0013] Using patch read code, patch enable data is read from one-time programmable memory to determine at least one target patch point to be repaired from multiple patch points embedded in the ROM program based on the patch enable data;

[0014] The patch reading code is used to read patch description data from a one-time programmable memory, so as to determine the number of patch entries corresponding to the target patch point based on the patch description data;

[0015] The patch reading code is used to read patch content data from a one-time programmable memory. Based on the number of patch entries corresponding to the target patch point, the patch entry content corresponding to the target patch point is determined from the patch content data.

[0016] In one implementation, the patch enable data includes multiple bits, each bit being used to control whether a patch point is active.

[0017] Based on patch enable data, at least one target patch point to be repaired is identified from multiple patch points embedded in the ROM program, including:

[0018] For any bit in the patch enable data, determine whether the bit is enabled. If the result is yes, determine that the patch point corresponding to the bit is effective, and use the patch point corresponding to the bit as the target patch point to be repaired.

[0019] In one implementation, the patch description data includes multiple bit groups, each bit group including a start bit and an end bit. When the start bit is a first value, it indicates that the patch content data corresponding to the bit group is the start content of the patch. When the start bit is a second value, it indicates that the patch content data corresponding to the bit group is not the start content of the patch. When the end bit is a first value, it indicates that the patch content data corresponding to the bit group is the end content of the patch. When the end bit is a second value, it indicates that the patch content data corresponding to the bit group is not the end content of the patch.

[0020] The number of patch entries corresponding to the target patch location is determined based on the patch description data, including:

[0021] Traverse the target patch points. For the first target patch point, locate the first bit group with the first start bit as the first value from the patch description data, and locate the first bit group with the first end bit as the first value from the patch description data to obtain the number of bit groups. Use the number of bit groups as the number of patch entries corresponding to the first target patch point.

[0022] Continue iterating through the next target patch location until the number of patch entries corresponding to each target patch location is obtained.

[0023] In one implementation, the patch content data includes multiple patch entry contents, each patch entry content including an address and a piece of data;

[0024] Based on the number of patch entries corresponding to the target patch location, determine the content of the patch entries corresponding to the target patch location from the patch content data, including:

[0025] Traverse the target patch locations. For the first target patch location, start with the first patch entry in the patch content data and determine the patch entry content corresponding to the first target patch location from the patch content data based on the number of patch entries.

[0026] Continue iterating through the next target patch location until the patch entry content corresponding to each target patch location is obtained.

[0027] Secondly, the present invention also provides a ROM program repair device, which is applied to a chip. The chip includes a read-only memory and a one-time programmable memory. The read-only memory contains a ROM program, which integrates patch reading code. The one-time programmable memory stores patch enable data, patch description data, and patch content data. The device includes:

[0028] The code execution module is used to initialize the read-only memory so that patch reading code can be run during the initialization process;

[0029] The patch reading module is used to read patch enable data, patch description data and patch content data from the one-time programmable memory using patch reading code, so as to determine the target patch point to be repaired in the ROM program and the number and content of the corresponding patch entries.

[0030] The program repair module is used to write the patch entry content to the target patch point according to the number of patch entries, thereby repairing the ROM program.

[0031] In one implementation, the ROM program embeds multiple patch points, and each patch point integrates patch reading code; patch enable data is used to describe whether the patch point is repaired; patch description data is used to describe the number of patch entries; and patch content data is used to describe the content of the patch entries.

[0032] Thirdly, the present invention also provides an electronic device including a processor and a memory, the memory storing computer-executable instructions executable by the processor, the processor executing the computer-executable instructions to implement any of the methods provided in the first aspect.

[0033] Fourthly, the present invention also provides a computer-readable storage medium storing computer-executable instructions, which, when invoked and executed by a processor, cause the processor to implement any of the methods provided in the first aspect.

[0034] This invention provides a ROM program repair method, apparatus, device, and medium applied to a chip. The chip includes a read-only memory (ROM) and a one-time programmable memory (IPM). The ROM program is programmed into the ROM program, which integrates patch reading code. The IPM stores patch enable data, patch description data, and patch content data. First, the ROM is initialized to run the patch reading code during initialization. Then, the patch reading code reads the patch enable data, patch description data, and patch content data from the IPM to determine the target patch location to be repaired in the ROM program, along with the corresponding number and content of patch entries. Finally, based on the number of patch entries, the patch content is written to the target patch location, thus repairing the ROM program. This method integrates patch reading code into the ROM program and stores patch enable data, patch description data, and patch content data in the IPM, thereby achieving ROM program repair through the IPM. This significantly reduces the cost of ROM program repair and effectively improves the security of the ROM program repair process.

[0035] Other features and advantages of the invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention are realized and obtained in accordance with the structures particularly pointed out in the description, claims and drawings.

[0036] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0037] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0038] Figure 1 A flowchart illustrating a ROM program repair method provided in an embodiment of the present invention;

[0039] Figure 2This is a schematic diagram of the structure of an OTP memory provided in an embodiment of the present invention;

[0040] Figure 3 This is a schematic diagram of patch enable data provided in an embodiment of the present invention;

[0041] Figure 4 A schematic diagram of patch description data provided in an embodiment of the present invention;

[0042] Figure 5 A schematic diagram of patch content data provided in an embodiment of the present invention;

[0043] Figure 6 This is an overall flowchart of a ROM program repair method provided in an embodiment of the present invention;

[0044] Figure 7 This is a schematic diagram of the structure of a ROM program repair device provided in an embodiment of the present invention;

[0045] Figure 8 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0046] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0047] Currently, existing ROM program repair methods suffer from high costs and low security. To address this, this invention provides a ROM program repair method, apparatus, device, and medium that can significantly reduce the cost of ROM program repair while effectively improving the security of the ROM program repair process.

[0048] To facilitate understanding of this embodiment, a ROM program repair method disclosed in this invention will first be described in detail. This method is applied to a chip, which includes a read-only memory (ROM) and a one-time programmable memory (IPM). The ROM is programmed with a ROM program, which integrates patch reading code. The IPM stores patch enable data, patch description data, and patch content data. The ROM program embeds multiple patch points, and each patch point integrates patch reading code. The patch enable data describes whether to repair the patch point; the patch description data describes the number of patch entries; and the patch content data describes the content of the patch entries. (See [link to relevant documentation]). Figure 1The diagram shows a flowchart of a ROM program repair method, which mainly includes the following steps S102 to S106:

[0049] Step S102: Initialize the read-only memory to run patch read code during the initialization process.

[0050] Step S104: Using the patch reading code, patch enable data, patch description data, and patch content data are read from the one-time programming memory to determine the target patch point to be repaired in the ROM program and the number and content of its corresponding patch entries.

[0051] Step S106: Based on the number of patch entries, write the patch entry content to the target patch point to repair the ROM program.

[0052] The ROM program repair method provided in this invention proposes to integrate patch reading code into the ROM program and store patch enable data, patch description data, and patch content data in a one-time programmable memory. This allows ROM program repair to be achieved through the one-time programmable memory, which can significantly reduce the cost of ROM program repair and effectively improve the security of the ROM program repair process.

[0053] For ease of understanding, this embodiment of the invention provides a specific implementation of a ROM program repair method, including: a One-Time Programmable (OTP) memory, patch reading code, patch enable data, patch description data, and patch content data. The relationship between these parts is as follows: the OTP memory is part of the chip hardware, with contiguous space allocated for storing patch enable data, patch description data, and patch content data; the patch reading code is integrated into the ROM program and is used to read the patch enable data, patch description data, and patch content data; the patch enable data is stored in the OTP memory and is used to describe whether the patch is effective; the patch description data is stored in the OTP memory and is used to describe the quantity of patch content; the patch content data is stored in the OTP memory and is the specific content of the patch.

[0054] Specifically, the OTP memory is a hardware component within the chip. The OTP memory stores chip-related information such as the product serial number and production date. (See [link to documentation]). Figure 2 The diagram shows the structure of an OTP memory. To meet the ROM program repair function, the capacity of the OTP memory needs to be appropriately increased. A portion of its contiguous space is used to store patch enable data, patch description data, and patch content data.

[0055] Based on this, embodiments of the present invention provide an implementation method that utilizes patch reading code to read patch enable data, patch description data, and patch content data from a one-time programmable memory, in order to determine the target patch point to be repaired in the ROM program and its corresponding number of patch entries and patch entry content, including:

[0056] Step 1: Use the patch read code to read patch enable data from the one-time programmable memory, and determine at least one target patch point to be repaired from multiple patch points embedded in the ROM program based on the patch enable data.

[0057] The patch enable data includes multiple bits, each controlling whether a patch point is active. Specifically, the patch read code is part of the ROM program. Patch read code is added beforehand to areas in the ROM program where problems might occur. These locations where patch read code is added are also called patch points. Each patch point is controlled by the corresponding information in the patch enable data to determine whether the patch read code runs. The patch read code is used to read the patch enable data, patch description data, and patch content data.

[0058] Patch enable data is stored in the OTP memory. Each bit in the patch enable data corresponds to the enable state of a patch point bit. See [link to OTP memory]. Figure 3 The diagram illustrates patch enable data, which consists of 32 bits (0-31). Each bit controls whether a patch point is enabled, supporting a maximum of 32 patch points. When a bit in the patch enable data is enabled, the patch read code for the corresponding patch point reads the patch description data and patch content data from the OTP. When a bit in the patch enable data is disabled, the patch read code for the corresponding patch point will not run.

[0059] Based on this, the process of determining the target patch point is as follows: For any bit in the patch enable data, determine whether the bit is enabled, and if the result is yes, determine that the patch point corresponding to the bit is effective, so that the patch point corresponding to the bit is used as the target patch point to be repaired.

[0060] Step two: Use the patch reading code to read patch description data from the one-time programmable memory, and determine the number of patch entries corresponding to the target patch point based on the patch description data.

[0061] The patch description data consists of multiple bit groups. Each bit group includes a start bit and an end bit. When the start bit is the first value, it indicates that the patch content data corresponding to the bit group is the beginning of the patch; when the start bit is the second value, it indicates that the patch content data corresponding to the bit group is not the beginning of the patch. Similarly, when the end bit is the first value, it indicates that the patch content data corresponding to the bit group is the end of the patch; when the end bit is the second value, it indicates that the patch content data corresponding to the bit group is not the end of the patch. The first value can be 1, and the second value can be 0. Specifically, the patch description data is stored in the OTP memory. The patch description data is grouped into 2-bit sets, with each set corresponding to one piece of patch content data. See also... Figure 4 The diagram illustrates a patch description data set, containing 16 groups of patch description data ranging from 0 to 15. Each group corresponds to one patch content data entry. A start bit of 1 in the patch description data indicates the beginning of the patch content; a stop bit of 1 indicates the end of the patch content. For example, if one group of patch description data has a value of 11, the corresponding patch content is both the beginning and end of the patch, meaning this patch location occupies one patch content data entry. Similarly, if two consecutive groups of patch description data have a value of 1001, the first group corresponds to the beginning of the patch content, and the second group corresponds to the end of the patch content, meaning this patch location requires two patch content data entries. Finally, if three consecutive groups of patch description data have a value of 100001, the first group corresponds to the beginning of the patch content, the second group corresponds to the middle of the patch content, and the third group corresponds to the end of the patch content, meaning this patch location requires three patch content data entries. The patch description data shows that each enabled patch point occupies at least one patch content data entry and at most 16 patch content data entries.

[0062] Based on this, the process of determining the number of patch entries is as follows: Traverse the target patch points. For the first target patch point, locate the first bit group with the first start bit value in the patch description data, and locate the first bit group with the first end bit value in the patch description data to obtain the number of bit groups. Use this number of bit groups as the number of patch entries corresponding to the first target patch point. Continue traversing the next target patch point until the number of patch entries corresponding to each target patch point is obtained. For example, suppose there are two target patch points, and the values ​​of the first few bit groups in the patch description data are: 10000111, where "100001" is the number of patch entries corresponding to the first target patch point, which is 3, and "11" is the number of patch entries corresponding to the second target patch point, which is 1.

[0063] Step 3: Use the patch reading code to read the patch content data from the one-time programmable memory. Based on the number of patch entries corresponding to the target patch point, determine the patch entry content corresponding to the target patch point from the patch content data.

[0064] The patch content data includes multiple patch entries, each containing an address and a data entry. Specifically, the patch content data is stored in the OTP memory. The patch content data consists of different patch entries, each consisting of an address and a data entry. See Figure 5 for a schematic diagram of patch content data. The ROM program repair method supports 16 patch entries, from 0 to 15. The address in the patch entry stores the address that needs to be repaired in the ROM program, and the data in the patch entry stores the repaired data.

[0065] Based on this, the process of determining the patch entry content is as follows: Traverse the target patch points. For the first target patch point, starting with the first patch entry in the patch content data, determine the patch entry content corresponding to the first target patch point from the patch content data based on the number of patch entries; continue traversing the next target patch point until the patch entry content corresponding to each target patch point is obtained. Please continue to the next step. Figure 5 Assuming the number of patch entries corresponding to the first target patch point is 3 and the number of patch entries corresponding to the second target patch point is 1, then the content of the patch entry corresponding to the first target patch point includes: patch entry 0 address, patch entry 0 data, patch entry 1 address, patch entry 1 data, patch entry 2 address, and patch entry 2 data; the content of the patch entry corresponding to the second target patch point includes: patch entry 3 address and patch entry 3 data.

[0066] The process of writing patch entry content is as follows: write the corresponding patch entry data (such as patch entry 0 data, patch entry 1 data, patch entry 2 data) to the corresponding patch entry address (such as patch entry 0 address, patch entry 1 address, patch entry 2 address).

[0067] In summary, the embodiments of the present invention provide as follows: Figure 6 The flowchart of a ROM program repair method shown includes: Step 1, the patch reading code of each patch point in the ROM program first reads the patch enable data in the OTP register. If the current patch point is not enabled, jump to step 5, otherwise continue to the next step. Step 2, the patch reading code reads the patch description data. The patch description data determines how many patch entries the current patch point contains. Step 3, if the number of patch entries is not greater than 0, jump to step 5, otherwise continue to the next step. Step 4, the patch reading code reads the address and data in the patch entry, writes the read data into the read address, and then continues to the next step. Step 5, the current patch point does not need to be repaired, or all patch entries have been read and run. The above method provided by the embodiments of the present invention has at least the following characteristics: (1) ROM program repair is implemented using OTP memory, which is low in cost and high in security. (2) Patch description data and patch content data are used, and the length of the patch is not limited. The patch content can be adjusted according to the actual situation.

[0068] Based on the foregoing embodiments, this invention provides a ROM program repair device. This device is applied to a chip, which includes a read-only memory (ROM) and a one-time programmable memory (IPM). The ROM is programmed with a ROM program, which integrates patch reading code. The IPM stores patch enable data, patch description data, and patch content data. The ROM program embeds multiple patch points, and each patch point integrates patch reading code. The patch enable data describes whether to repair the patch point; the patch description data describes the number of patch entries; and the patch content data describes the content of each patch entry. See also... Figure 7 The diagram shows a ROM program repair device, which mainly includes the following parts:

[0069] Code execution module 702 is used to initialize the read-only memory so that patch reading code can be run during the initialization process;

[0070] The patch reading module 704 is used to read patch enable data, patch description data and patch content data from the one-time programmable memory using patch reading code, so as to determine the target patch point to be repaired in the ROM program and the number and content of the corresponding patch entries.

[0071] The program repair module 706 is used to write the patch entry content to the target patch point according to the number of patch entries, thereby repairing the ROM program.

[0072] The ROM program repair device provided in this invention proposes to integrate patch reading code into the ROM program and store patch enable data, patch description data and patch content data in a one-time programmable memory. This allows ROM program repair to be achieved through the one-time programmable memory, which can significantly reduce the cost of ROM program repair and effectively improve the security of the ROM program repair process.

[0073] The device provided in this embodiment of the invention has the same implementation principle and technical effect as the aforementioned method embodiment. For the sake of brevity, any parts not mentioned in the device embodiment can be referred to the corresponding content in the aforementioned method embodiment.

[0074] This invention provides an electronic device, specifically, the electronic device includes a processor and a memory; the memory stores a computer program, which, when run by the processor, executes the method described in any of the above embodiments.

[0075] Figure 8 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. The electronic device 100 includes: a processor 80, a memory 81, a bus 82, and a communication interface 83. The processor 80, the communication interface 83, and the memory 81 are connected through the bus 82. The processor 80 is used to execute executable modules, such as computer programs, stored in the memory 81.

[0076] The memory 81 may include high-speed random access memory (RAM) or non-volatile memory, such as at least one disk storage device. Communication between this system network element and at least one other network element is achieved through at least one communication interface 83 (which can be wired or wireless), such as the Internet, wide area network, local area network, metropolitan area network, etc.

[0077] Bus 82 can be an ISA bus, PCI bus, or EISA bus, etc. The bus can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 8 The symbol is represented by a single double-headed arrow, but this does not mean that there is only one bus or one type of bus.

[0078] The memory 81 is used to store programs. After receiving an execution instruction, the processor 80 executes the program. The method executed by the device for defining the flow process disclosed in any of the foregoing embodiments of the present invention can be applied to the processor 80 or implemented by the processor 80.

[0079] The processor 80 may be an integrated circuit chip with signal processing capabilities. In implementation, each step of the above method can be completed by the integrated logic circuitry in the hardware of the processor 80 or by instructions in software form. The processor 80 may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this invention. The general-purpose processor may be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this invention can be directly embodied in the execution of a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor. The software modules may reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. The storage medium is located in memory 81. The processor 80 reads the information in memory 81 and, in conjunction with its hardware, completes the steps of the above method.

[0080] The computer program product of the readable storage medium provided in the embodiments of the present invention includes a computer-readable storage medium storing program code. The instructions included in the program code can be used to execute the methods described in the foregoing method embodiments. For specific implementation, please refer to the foregoing method embodiments, which will not be repeated here.

[0081] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0082] Finally, it should be noted that the above-described embodiments are merely specific implementations of the present invention, used to illustrate the technical solutions of the present invention, and not to limit it. The scope of protection of the present invention is not limited thereto. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments within the technical scope disclosed in the present invention, or make equivalent substitutions for some of the technical features; and these modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A ROM program repair method, characterized in that, The method is applied to a chip, the chip including a read-only memory and a one-time programmable memory. The read-only memory contains a ROM program embedded with multiple patch points, each of which integrates patch reading code. The one-time programmable memory stores patch enable data, patch description data, and patch content data. The patch enable data describes whether the patch point should be repaired, the patch description data describes the number of patch entries, and the patch content data describes the content of each patch entry. The method includes: Initialize the read-only memory to run the patch read code during the initialization process; Using the patch reading code, the patch enable data, the patch description data, and the patch content data are read from the one-time programming memory to determine the target patch point to be repaired in the ROM program and the number and content of its corresponding patch entries. Based on the number of patch entries, the content of the patch entries is written to the target patch point to repair the ROM program.

2. The ROM program repair method according to claim 1, characterized in that, Using the patch read code, the patch enable data, patch description data, and patch content data are read from the one-time programmable memory to determine the target patch points to be repaired in the ROM program and their corresponding number and content of patch entries, including: Using the patch read code, the patch enable data is read from the one-time programmable memory to determine at least one target patch point to be repaired from multiple patch points embedded in the ROM program based on the patch enable data; Using the patch reading code, the patch description data is read from the one-time programming memory to determine the number of patch entries corresponding to the target patch location based on the patch description data; Using the patch reading code, the patch content data is read from the one-time programming memory. Based on the number of patch entries corresponding to the target patch point, the patch entry content corresponding to the target patch point is determined from the patch content data.

3. The ROM program repair method according to claim 2, characterized in that, The patch enable data includes multiple bits, each bit being used to control whether a patch point is active. Based on the patch enable data, at least one target patch point to be repaired is determined from multiple patch points embedded in the ROM program, including: For any bit in the patch enable data, determine whether the bit is enabled, and if the determination result is yes, determine that the patch point corresponding to the bit is effective, so that the patch point corresponding to the bit is used as the target patch point to be repaired.

4. The ROM program repair method according to claim 2, characterized in that, The patch description data includes multiple bit groups, each bit group including a start bit and an end bit. When the start bit is a first value, it indicates that the patch content data corresponding to the bit group is the patch start content. When the start bit is a second value, it indicates that the patch content data corresponding to the bit group is not the patch start content. When the end bit is a first value, it indicates that the patch content data corresponding to the bit group is the patch end content. When the end bit is a second value, it indicates that the patch content data corresponding to the bit group is not the patch end content. Determining the number of patch entries corresponding to the target patch location based on the patch description data includes: Traverse the target patch points. For the first target patch point, locate the first bit group whose start bit is the first value from the patch description data, and locate the first bit group whose end bit is the first value from the patch description data to obtain the number of bit groups. Use the number of bit groups as the number of patch entries corresponding to the first target patch point. Continue iterating through the next target patch location until the number of patch entries corresponding to each target patch location is obtained.

5. The ROM program repair method according to claim 2, characterized in that, The patch content data includes multiple patch entry contents, and each patch entry content includes an address and a piece of data; Based on the number of patch entries corresponding to the target patch location, the patch entry content corresponding to the target patch location is determined from the patch content data, including: Traverse the target patch locations. For the first target patch location, starting with the first patch entry in the patch content data, determine the patch entry content corresponding to the first target patch location from the patch content data based on the number of patch entries. Continue traversing the next target patch point until the patch entry content corresponding to each target patch point is obtained.

6. A ROM program repair device, characterized in that, The device is applied to a chip, the chip including a read-only memory and a one-time programmable memory. The read-only memory contains a ROM program embedded with multiple patch points, each patch point integrating patch reading code. The one-time programmable memory stores patch enable data, patch description data, and patch content data. The patch enable data describes whether to repair the patch point, the patch description data describes the number of patch entries, and the patch content data describes the content of each patch entry. The device includes: A code execution module is used to initialize the read-only memory to run the patch reading code during the initialization process; The patch reading module is used to read the patch enable data, the patch description data and the patch content data from the one-time programmable memory using the patch reading code, so as to determine the target patch point to be repaired in the ROM program and the number and content of the corresponding patch entries; The program repair module is used to write the content of the patch entries to the target patch point according to the number of patch entries, so as to repair the ROM program.

7. An electronic device, characterized in that, The method includes a processor and a memory, the memory storing computer-executable instructions executable by the processor, the processor executing the computer-executable instructions to implement the method of any one of claims 1 to 5.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions that, when invoked and executed by a processor, cause the processor to perform the method described in any one of claims 1 to 5.

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