Gigabit network port dual-channel ultra-low-capacitance anti-lightning stroke chip
By designing a gigabit Ethernet dual-channel ultra-low capacitance lightning protection chip, and adopting a combination structure of metal lead frame and electrostatic protection chip, wiring is simplified and costs are reduced. This solves the problem of large area occupation of electrostatic protection devices in existing technologies and achieves a highly efficient electrostatic protection effect.
Patent Information
- Application Number
- CN202410719771.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-05
- Publication Date
- 2025-12-12
AI Technical Summary
In existing electronic products, the electrostatic discharge (ESD) protection devices for gigabit Ethernet ports occupy a large area of printed circuit boards, have complex wiring, and are costly, making it difficult to meet the ESD protection needs of miniaturized electronic products.
A dual-channel ultra-low capacitance surge protection chip for gigabit Ethernet ports is designed. It adopts a combination structure of metal lead frame, silver paste solder, derating chip, electrostatic protection chip, metal ball and metal wire, and is wrapped with epoxy resin to form a dual-channel electrical connection, which simplifies wiring and reduces costs.
It effectively reduces the area of printed circuit boards and the number of surface mount devices, lowers costs, meets the electrostatic protection requirements of new electronic products, and has broad market application prospects.
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Figure CN121123151A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application relates to the technical field of semiconductors, and particularly relates to a dual-channel ultra-low capacitance lightning chip for a gigabit network port. BACKGROUND
[0002] At present, the landing of 5G communication technology promotes the upgrading of various electronic products, and the internal and external communication channels and data transmission rates of electronic products are improved accordingly. Electronic products are increasingly miniaturized, increasingly powerful, and increasingly complex in electromagnetic environments. Therefore, it is particularly important to configure considerable electrostatic protection devices in limited space. The prior art adopts single-channel electrostatic protection devices for electrostatic protection at the high-speed transmission signal end of electronic products. For example, a gigabit network port has four pairs of high-speed transmission signal lines, and the same number of electrostatic protection devices need to be used. This has the following problems: a large amount of printed circuit board area is occupied, wiring is relatively complex, the number of pasting is large, and the cost is high. Therefore, a new type of dual-channel ultra-low capacitance lightning chip for a gigabit network port is urgently needed. SUMMARY
[0003] In view of the problems in the prior art, the application aims to provide a dual-channel ultra-low capacitance lightning chip for a gigabit network port, which has a reasonable structure design, simpler wiring, reduced printed circuit board area and pasting number, reduced cost, meets the electrostatic protection requirements of current new electronic products, and is easy to popularize and use.
[0004] In order to achieve the above-mentioned purpose, the application is implemented by the following technical scheme: a dual-channel ultra-low capacitance lightning chip for a gigabit network port, comprising a metal lead frame, silver paste solder, a capacitance reduction chip, an electrostatic protection chip, a metal ball, a metal wire and epoxy resin, silver paste solder is placed on the inner side of 1-8 pins of the metal lead frame, a capacitance reduction chip is arranged on the silver paste solder on the inner side of each of the 2nd pin, the 4th pin, the 6th pin and the 8th pin, an electrostatic protection chip is arranged on the silver paste solder on the inner side of each of the 1st pin, the 3rd pin, the 5th pin and the 7th pin, and a metal ball is implanted on each electrostatic protection chip; the metal ball above the 1st pin of the metal lead frame is electrically connected to the capacitance reduction chip on the 2nd pin through a metal wire, the metal ball above the 3rd pin of the metal lead frame is electrically connected to the capacitance reduction chip on the 4th pin through a metal wire, the metal ball above the 5th pin of the metal lead frame is electrically connected to the capacitance reduction chip on the 6th pin through a metal wire, and the metal ball above the 7th pin of the metal lead frame is electrically connected to the capacitance reduction chip on the 8th pin through a metal wire; the metal lead frame, the silver paste solder, the capacitance reduction chip, the electrostatic protection chip, the metal ball and the metal wire are peripherally half-wrapped with epoxy resin to form a dual-channel ultra-low capacitance lightning chip structure for a gigabit network port.
[0005] Preferably, the metal ball is made by firing silver or gold wire; and the metal wire is one of silver or gold wire.
[0006] The device has the advantages of simple wiring, reduced printed circuit board area and patching times, greatly reduced cost, and wide application prospect. BRIEF DESCRIPTION OF DRAWINGS
[0007] The application will be described in detail below with reference to the drawings and specific embodiments.
[0008] Fig. 1 The application is a structural schematic diagram.
[0009] Fig. 2 The application is an internal circuit diagram. DETAILED DESCRIPTION
[0010] In order to make the technical means, creative features, purposes and effects of the application easy to understand, the application will be further described below with reference to the specific embodiments.
[0011] REFERENCE Figs. 1-2 The specific embodiment adopts the following technical scheme: a gigabit network port double-channel ultra-low capacitance lightning chip, comprising a metal lead frame A, silver paste solder B, a capacitance reduction chip C, an electrostatic protection chip D, a metal ball E, a metal wire F and epoxy resin G, the inner side of 1-8 pins of the metal lead frame A is respectively placed with the silver paste solder B, the silver paste solder B on the inner side of 2 pins, 4 pins, 6 pins and 8 pins is respectively arranged with a capacitance reduction chip C, the silver paste solder B on the inner side of 1 pin, 3 pin, 5 pin and 7 pin is respectively arranged with an electrostatic protection chip D, and one metal ball E is implanted on each electrostatic protection chip D; the metal ball E above the 1 pin of the metal lead frame A is electrically connected with the capacitance reduction chip C on the 2 pin through the metal wire F, the metal ball E above the 3 pin of the metal lead frame A is electrically connected with the capacitance reduction chip C on the 4 pin through the metal wire F, the metal ball E above the 5 pin of the metal lead frame A is electrically connected with the capacitance reduction chip C on the 6 pin through the metal wire F, and the metal ball E above the 7 pin of the metal lead frame A is electrically connected with the capacitance reduction chip C on the 8 pin through the metal wire F; the periphery of the metal lead frame A, the silver paste solder B, the capacitance reduction chip C, the electrostatic protection chip D, the metal ball E and the metal wire F is semi-encapsulated with the epoxy resin G, forming a gigabit network port double-channel ultra-low capacitance lightning chip structure.
[0012] Notably, the metal ball E is made by firing silver or gold wire; and the metal wire F is silver or gold wire.
[0013] The embodiment is formed by connecting four capacity-reducing chips C and four electrostatic protection chips D through a metal lead frame A, silver paste solder B, metal balls E, metal wires F in a designated circuit, and then semi-wrapped by epoxy resin G to form two groups of arrays composed of two electrostatic protection chips and two capacity-reducing chips, thereby realizing the electrical characteristics of bidirectional double-channel ultra-low-capacitance and high power.
[0014] The embodiment is designed for anti-static and anti-lightning of a gigabit network port, can reduce the printed circuit board area and the patching times, and reduce the cost. The device meets the current requirements of small size and multi-channel anti-static and anti-lightning of a gigabit network port of electronic products, and has a wide market application prospect.
[0015] The basic principles and main features of the application and the advantages of the application are shown and described above. It should be understood by those skilled in the art that the application is not limited by the above examples, and the above examples and descriptions in the specification are only to illustrate the principles of the application. Without departing from the spirit and scope of the application, various changes and improvements can be made to the application, and these changes and improvements all fall within the scope of the claimed application. The scope of protection of the application is defined by the appended claims and their equivalents.
Claims
1. A gigabit network port dual-channel ultra-low capacitance lightning chip, characterized in that, The application relates to a chip structure of a dual-channel ultra-low capacitance lightning chip of a gigabit network port, which comprises a metal lead frame (A), silver paste solder (B), a capacity-reducing chip (C), an electrostatic protection chip (D), a metal ball (E), a metal wire (F) and epoxy resin (G), silver paste solder (B) is arranged on the inner side of 1-8 pins of the metal lead frame (A), a capacity-reducing chip (C) is arranged on the inner side of the silver paste solder (B) of the 2nd pin, the 4th pin, the 6th pin and the 8th pin, an electrostatic protection chip (D) is arranged on the inner side of the silver paste solder (B) of the 1st pin, the 3rd pin, the 5th pin and the 7th pin, a metal ball (E) is implanted on each electrostatic protection chip (D); the metal ball (E) above the 1st pin of the metal lead frame (A) is electrically connected with the capacity-reducing chip (C) on the 2nd pin through the metal wire (F), the metal ball (E) above the 3rd pin of the metal lead frame (A) is electrically connected with the capacity-reducing chip (C) on the 4th pin through the metal wire (F), the metal ball (E) above the 5th pin of the metal lead frame (A) is electrically connected with the capacity-reducing chip (C) on the 6th pin through the metal wire (F), and the metal ball (E) above the 7th pin of the metal lead frame (A) is electrically connected with the capacity-reducing chip (C) on the 8th pin through the metal wire (F); the metal lead frame (A), the silver paste solder (B), the capacity-reducing chip (C), the electrostatic protection chip (D), the metal ball (E) and the metal wire (F) are peripherally semi-wrapped with the epoxy resin (G), so that the chip structure of the dual-channel ultra-low capacitance lightning chip of the gigabit network port is formed.
2. The dual-channel ultra-low capacitance and lightning chip for a gigabit network port according to claim 1, wherein, The metal ball (E) is a metal ball sintered by silver alloy wire or gold wire.
3. The dual-channel ultra-low capacitance and lightning chip for a gigabit network port according to claim 1, wherein, The metal wire (F) is one of silver alloy wire and gold wire.