A polar code decoding method, system, device and medium based on a memory-computing integrated device and a random number bit stream

Abstract

The application relates to a Polar code decoding method, system, device and medium based on a memory-computing integrator and a random number bit stream, which comprises the following steps: constructing a Polar code sparse check matrix and a probability graph model; acquiring an initial log-likelihood ratio of a variable node; constructing a decoding circuit architecture based on a memory-computing integrator array; performing hard decision check on the initial log-likelihood ratio, outputting a decoding result when a termination condition is met, otherwise mapping the confidence transmitted from the variable node to the check node into a Bernoulli random bit stream, injecting the second memory-computing integrator array for routing, and calculating the confidence of the check node to the variable node; calculating the confidence of the variable node to the check node and the posterior log-likelihood ratio of the variable node by using the first memory-computing integrator array; and performing hard decision check and iterative calculation on the posterior log-likelihood ratio of the variable node until the termination condition is met, and then outputting the decoding result. The application can be widely applied to the technical field of signal decoding.

Description

Technical Field

[0001] This invention belongs to the field of communications, specifically to the field of signal decoding technology, and more specifically to a Polar code decoding method, system, device, and medium based on a memory computing unit and a random number bit stream. Background Technology

[0002] Current Polar code decoding generally relies on FPGA (Field Programmable Gate Array) or ASIC based on CMOS technology. During the decoding process, large-scale discrete fixed-point addition / multiplication, comparison and memory random access operations are required, which limits the energy efficiency of the communication baseband to the power consumption of SRAM (Static Random Access Memory) access and the overhead of digital operations, making it difficult to achieve a fundamental improvement in energy efficiency.

[0003] Polar code decoding has gradually become a major factor in power consumption in communication systems, and existing digital decoding implementations struggle to fundamentally improve the energy efficiency of communication basebands. To achieve more efficient Polar code decoding, it is urgent to explore innovative hardware architectures to effectively reduce decoding power consumption and improve decoding efficiency. Summary of the Invention

[0004] To address the aforementioned problems, the purpose of this invention is to provide a Polar code decoding method, system, device, and medium based on an in-memory computing array and a random number bit stream. By utilizing the unique in-memory computing characteristics of the in-memory computing array and combining it with a random number bit stream and an XOR module, the decoding computation efficiency and energy efficiency are improved.

[0005] To achieve the above objectives, the present invention adopts the following technical solution:

[0006] In a first aspect, the present invention provides a Polar code decoding method based on a memory-based computing unit and a random number bit stream, comprising:

[0007] A bipartite factor graph is constructed based on the received Polar code, and redundant nodes in the bipartite factor graph are pruned and optimized to obtain the sparse parity-check matrix of the Polar code and the corresponding probabilistic graphical model.

[0008] Obtain the initial log-likelihood ratio of each variable node in the probabilistic graphical model, and use it as the initial confidence level from the variable node to the verification node;

[0009] A decoding circuit architecture comprising a first in-memory computing array, a second in-memory computing array, a random number generator module, and an XOR module is constructed, and the resistance state of each cross node in the first and second in-memory computing arrays is configured based on the Polar code sparse parity-check matrix and the corresponding probabilistic graphical model.

[0010] A hard-decision check is performed on the initial log-likelihood ratio. If the termination condition is met, the Polar code decoding result is output; otherwise, iterative calculation continues.

[0011] The confidence level initially transmitted from the variable node to the verification node is mapped to a Bernoulli random bit stream using the random number generator module, and the Bernoulli random bit stream is injected into the second in-memory computing array for routing. The confidence level transmitted from the verification node to the variable node is calculated using the XOR module.

[0012] Based on the confidence level passed from the verification node to the variable node, the confidence level from the variable node to the verification node and the posterior log-likelihood ratio of the variable node are calculated and superimposed using the first in-memory computing array.

[0013] Hard-decision verification is performed on the posterior log-likelihood ratio of each variable node after each iteration until the termination condition is met, at which point the Polar code decoding result is output.

[0014] Secondly, the present invention provides a Polar code decoding system based on an in-memory computing unit and a random number bit stream, comprising:

[0015] The preprocessing unit is used to construct a bipartite factor graph based on the received Polar code, and to prune and optimize redundant nodes in the bipartite factor graph to obtain the sparse parity-check matrix of the Polar code and the corresponding probabilistic graphical model.

[0016] The initialization unit is used to obtain the initial log-likelihood ratio of each variable node in the probabilistic graphical model, which serves as the initial confidence level passed from the variable node to the verification node.

[0017] The decoding circuit architecture building unit is used to build a decoding circuit architecture including a first in-memory computing array, a second in-memory computing array, a random number generator module and an XOR module, and to configure the resistance state of each cross node in the first in-memory computing array and the second in-memory computing array based on the Polar code sparse parity-check matrix and the corresponding probabilistic graphical model.

[0018] The preliminary verification unit is used to perform hard decision verification on the initial log-likelihood ratio. If the verification condition is met, the Polar code decoding result is output; otherwise, it enters the first calculation unit for iterative calculation.

[0019] The first computing unit is used to map the initial confidence level transmitted from the variable node to the verification node into a Bernoulli random bit stream using a random number generator module, and inject the Bernoulli random bit stream into the second in-memory computing array for routing, and use the XOR module to calculate the confidence level transmitted from the verification node to the variable node.

[0020] The second computing unit is used to calculate and superimpose the confidence level from the variable node to the verification node and the posterior log-likelihood ratio of the variable node based on the confidence level passed from the verification node to the variable node using the first in-memory computing array.

[0021] The iterative output unit is used to perform hard decision verification on the posterior log-likelihood ratio of each variable node after each iteration until the preset number of iterations is reached or the verification condition is met, and then outputs the Polar code decoding result.

[0022] Thirdly, the present invention provides a computer-readable storage medium for storing one or more programs, the one or more programs including instructions that, when executed by a computing device, cause the computing device to perform the Polar code decoding method based on a memory-computer interface and a random number bit stream.

[0023] Fourthly, the present invention provides a computing device, comprising: one or more processors and a memory, wherein the memory stores one or more programs and is configured to be executed by the one or more processors, the one or more programs including instructions for executing the Polar code decoding method based on a memory-to-computer and a random number bit stream.

[0024] The present invention has the following advantages due to the adoption of the above technical solutions:

[0025] 1. This invention transforms the decoding process into a message passing process between variable nodes and check nodes based on a probabilistic graphical model. At the same time, it uses a first in-memory computing array to calculate the confidence level from the variable node to the check node and the posterior log-likelihood ratio of the variable node. It uses a random number bit stream to select the path for the second in-memory computing array and uses an XOR module to calculate the confidence level from the check node to the variable node. This fully utilizes the in-memory computing characteristics of the in-memory computing array, improves decoding efficiency, and reduces power consumption.

[0026] 2. In this invention, the first in-memory computing array can be arranged in different ways according to actual needs, and at the same time, it can be used in conjunction with the second in-memory computing array to select the number of output paths for variable nodes, which is more flexible.

[0027] 3. This invention utilizes a random number bitstream and an XOR module to jointly calculate the confidence level from the verification node to the variable node. Compared to the minimum sum decoding algorithm, which requires multiple multiple input-multiple output structures, this invention can further reduce power consumption.

[0028] Therefore, this invention can be widely applied in the field of signal decoding technology. Attached Figure Description

[0029] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts. In the drawings:

[0030] Figure 1 This is a schematic diagram of the Polar code decoding method based on a memory computing unit and a random number bit stream provided in this embodiment of the invention;

[0031] Figure 2 This is a schematic diagram of a Polar code decoding circuit based on a memory-to-computer interface and a random number bit stream, provided in an embodiment of the present invention. Detailed Implementation

[0032] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention are within the scope of protection of the present invention.

[0033] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of exemplary embodiments according to the invention. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0034] In some embodiments of the present invention, a Polar code decoding method based on an in-memory computing unit and a random number bitstream is provided, comprising: creating a Polar code sparse parity-check matrix according to the Polar code, and using a probabilistic graphical model to convert the Polar code decoding process into a confidence transfer process between variable nodes and parity nodes; dividing the in-memory computing unit array into a first in-memory computing unit array and a second in-memory computing unit array according to the confidence transfer process between variable nodes and parity nodes, configuring the node resistance states of the two sets of in-memory computing unit arrays, and designing a random number generator module and an XOR module; obtaining the initial log-likelihood ratio of each variable node; using the initial log-likelihood ratio as the initial input, using the configured in-memory computing unit array to realize the iterative update of the confidence between variable nodes and parity nodes and the output of decoding results. The present invention can significantly reduce the number of random memory accesses and the power consumption of digital domain operations, breaking through the energy consumption bottleneck of traditional digital circuits.

[0035] Correspondingly, in other embodiments of the present invention, a Polar code decoding system, device, and medium based on a memory-based computing unit and a random number bit stream are provided.

[0036] Example 1

[0037] like Figure 1 As shown, this embodiment provides a Polar code decoding method based on a memory-based computing unit and a random number bit stream, which includes the following steps:

[0038] S1. Construct a bipartite factor graph based on the received Polar code, and prune and optimize redundant nodes in the bipartite factor graph to obtain the sparse parity-check matrix of the Polar code and the corresponding probabilistic graphical model.

[0039] Specifically, the process of obtaining the sparse parity-check matrix of the Polar code and the corresponding probabilistic graphical model includes the following steps:

[0040] S11. Construct a bipartite factor graph based on the polarization encoding scheme (i.e., its generator matrix) of the received Polar code.

[0041] Polar codes are a typical type of non-systematic code, meaning that the codeword itself does not explicitly contain the original information bits; instead, the original information bits are implicitly embedded in the encoded codeword through a linear transformation. Polar codes typically use the Kronecker product (Kronecker multiplication). Construct the generating matrix ,in, A classical polarization kernel of 2*2 can be represented as ; This is the number of Kronecker products, which is also equivalent to the "polarization depth" of the polar code; Given the code length, it can be represented as The actual encoding process is as follows: codeword ,in, It is an input bit sequence consisting of information bits and frozen bits.

[0042] This embodiment is based on ( Taking polar codes as an example, this section introduces the process of constructing a bipartite factor graph for Polar codes. First, starting from the encoded polarization relation / butterfly network mapped by the generator matrix, each polarization process / butterfly intermediate node is considered a variable node (VN), and local XOR and equality connection relationships are considered check nodes (CN). The original polarization relation / butterfly network is then flattened into a bipartite factor graph, yielding the set of variable nodes and the set of factor variables, respectively:

[0043] The set of variable nodes, including the Channel Variable Node (VNCH): corresponding to the rightmost node in the bipartite factorization graph. There are 10 nodes, and the initial value of each variable node is set to the channel output LLR value; Hidden Variable Node (VNH): a node in the intermediate layer of the polar code (stage=1,2,…,n-1), which has no initial information, so the initial LLR is set to 0; Frozen Variable Node (VNF): the node at the frozen position in the leftmost input bit sequence.

[0044] The set of verification nodes includes XOR constraint nodes: degree 3, indicating that the bits of the three connected variable nodes satisfy the XOR constraint (modulo 2 sum is 0); and replica nodes: degree 2, indicating that the bits of the two connected variable nodes are equal.

[0045] The total number of variable nodes is There are [number] verification nodes. There are 15 nodes (of which XOR nodes and replica nodes each account for half).

[0046] S12. Prune redundant nodes in the bipartite factorization graph to reduce redundancy, and obtain the Polar code sparse parity-check matrix. .

[0047] In this embodiment, to reduce redundancy during the tiling process, the bipartite factor graph needs to be pruned. The following redundant nodes are deleted according to the pruning algorithm: frozen variable nodes, check nodes with a degree of 1, check nodes with a degree of 2, and hidden variable nodes with a degree of 1 or 2, to obtain a simplified bipartite factor graph.

[0048] Specifically, the pruning algorithm can follow the following process:

[0049] Delete VNF

[0050] while true do

[0051] Delete CN with degree 1 and its associated VN.

[0052] Delete CN with degree 2 and merge the VNH and VNCH connected to it.

[0053] Delete VNH with degree 1, and delete CN connected to it.

[0054] Delete VNHs with a degree of 2 and merge the CNs connected to them.

[0055] Delete CNs with a degree of 2 and merge the VNHs connected to them.

[0056] If the check matrix remains unchanged

[0057] return verification matrix

[0058] end if

[0059] end while

[0060] Based on a simplified bipartite factor graph, the check relationships corresponding to each check node are listed to construct the sparse check matrix of the Polar code. Among them, the sparse parity-check matrix of the Polar code. Each row corresponds to a check node (whether it's an XOR node or a copy node) in the simplified bipartite factorization graph, and each column corresponds to a variable node. When a variable node is connected to a check node, the Polar code sparse parity-check matrix... Set the corresponding element in the table to 1, otherwise set it to 0.

[0061] S13. Create a corresponding probabilistic graphical model based on the sparse parity-check matrix of the Polar code, and convert the Polar code decoding process into a message passing process between variable nodes and parity-check nodes.

[0062] Specifically, a probabilistic graphical model can be created based on the sparse parity-check matrix of a Polar code. This model includes multiple variable nodes, multiple parity-check nodes, and multiple undirected edges. Variable nodes can be categorized as channel variable nodes and non-channel variable nodes. Undirected edges connect variable nodes and parity-check nodes that are already connected. Each variable node uniquely corresponds to a column vector in the Polar code sparse parity-check matrix, and each parity-check node uniquely corresponds to a row vector in the same matrix. If the row order in the Polar sparse parity-check matrix is ​​equal to... Column order equals If the element is 1, then the order of the first node is equal to... The order of the variable node and the second node is equal to The check nodes are connected, if the row order in the Polar code sparse check matrix is ​​equal to... Column order equals If the element is 0, then the order of the first node is equal to... The order of the variable node and the second node is equal to The verification nodes have no connection relationship. The first node's order is the sequence number of the variable node among all variable nodes, and the second node's order is the sequence number of the verification node among all verification nodes.

[0063] S2. Obtain the initial log-likelihood ratio for each variable node in the probabilistic graphical model, as the initial confidence level propagated from the variable node to the validation node. .

[0064] This embodiment uses Binary Phase Shift Keying (BPSK) as an example to introduce the communication between the transmitter and decoder, as well as the decoding target of this embodiment. Specifically, it uses ( Taking Polar codes as an example, the code length of a Polar code is... The number of information bits is When the bitrate is fixed at 1 / 2, The sending end can transmit information in bits of 1000. The codeword is encoded into indivual Then, based on BPSK, it was modulated into a symbol And send it to the decoding end. Due to noise interference during transmission, the decoding end will receive a symbol , represented as The decoding task at the decoding end is to... indivual Restore to Thus, based on each Get the original from the sender Each code character.

[0065] Specifically, when acquiring the initial input, there are two types based on the variable node type: for VNCH nodes, based on the input received by the decoder... a symbol (i.e. ) to perform calculations, because a symbol Corresponding to There are 10 Channel Variable Nodes (VNCHs). Therefore, the specific formula for calculating the initial log-likelihood ratio for each VNCH is as follows:

[0066]

[0067] in, For the first The initial log-likelihood ratio of each variable node. For the first The set of sub-constellation symbols with bits 0 and 1. These are the symbols received by the decoding end. The symbols sent by the sending end. This represents noise power.

[0068] Taking BPSK as an example, let's assume the actual received signal is represented as follows: ,but .

[0069] For non-VNCH variable nodes, this invention assumes their initial log-likelihood ratio is 0, that is... ; thereby obtaining all The initial log-likelihood ratio of each variable node It can be considered as the initial confidence level from the variable node to the verification node. .

[0070] The initial input can be calculated using other digital circuits, or it can be input directly from the outside without calculation. This invention does not impose any restrictions on this.

[0071] Here, loading the initial input into the input portion of the in-memory computing array in the form of voltage means setting the input of the in-memory computing array as a voltage value vector proportional to the initial log-likelihood ratio.

[0072] S3. Construct a decoding circuit architecture that includes a first in-memory computing array, a second in-memory computing array, a random number generator, and an XOR module, and configure the resistance state of each cross node in the in-memory computing array based on the Polar code sparse parity check matrix and the corresponding probabilistic graphical model.

[0073] Among them, in-memory computing devices are integrated devices that have both storage and computing capabilities, such as resistive random access memory, phase-change memory, magnetic memory, and flash memory.

[0074] Specifically, it includes the following steps:

[0075] S31. Analyze the decoding process of Polar codes and construct a decoding circuit architecture that includes a first in-memory array, a second in-memory array, a random number generator module, and an XOR module.

[0076] In this embodiment, based on the analysis of the Polar code decoding process, it can be roughly divided into two parts: first, based on the confidence level from the check node to the variable node in the previous iteration, the confidence level from the variable node to the check node and the posterior log-likelihood ratio of the variable node are calculated; second, based on the confidence level from the variable node to the check node in the current iteration, the confidence level from the check node to the variable node is calculated.

[0077] Specifically, assuming that Represents variable nodes To the verification node To determine the confidence level, its calculation requires obtaining all verification nodes from the previous iteration. To the variable node The confidence level and initial log-likelihood ratio, and the verification node Refers to all nodes related to variables The set of connected verification nodes Except for the check node Other verification nodes besides (see equation (3) below); Indicates the verification node To the variable node The confidence level requires obtaining all variable nodes for calculation. To the verification node confidence level variable node Refers to all nodes related to verification The set of connected variable nodes Variable nodes Other variable nodes (see equation (8) below).

[0078] Based on this, this embodiment designs a decoding circuit architecture, which includes a first in-memory processor array, a second in-memory processor array, a random number generator module, and an XOR module, such as... Figure 2 As shown. The first in-memory compute array is used for variable nodes. To the verification node Confidence level and variable nodes The posterior log-likelihood ratio is calculated; the random number generator module is used to generate variable nodes. To the verification node The transmitted confidence level is mapped to a Bernoulli random bit stream, which is then injected into a second in-memory compute array for routing. The second in-memory compute array is used for the routing output, and it works in conjunction with the random number generator module and the XOR module to select other variable nodes. To the verification node confidence level The corresponding Bernoulli random bit stream output column positions are grouped together to form a check node. To the variable node Iterative calculation of confidence level; the XOR module is used to calculate the verification node. To the variable node The confidence level of the transmission.

[0079] S32. Based on the sparse parity-check matrix of the Polar code and the corresponding probabilistic graphical model, determine the confidence propagation matrix from the variable node to the parity node, and perform resistive configuration on the cross nodes of the first in-memory computing array based on the confidence propagation matrix.

[0080] Specifically, the confidence level from the variable node to the check node can be divided into the external confidence level and the internal confidence level (i.e., the initial log-likelihood ratio, also known as the channel prior) from the variable node to the check node; the posterior log-likelihood ratio of the variable node can also be divided into the external posterior log-likelihood ratio and the internal posterior log-likelihood ratio of the variable node; the decoding output is simply the N-bit codeword extracted from the posterior log-likelihood ratio result of the variable node.

[0081] Each row of the first in-memory compute array is used as input and connected to the output of each XOR module. Each column of the first in-memory compute array is used as output and connected to the random number generator module. Each column is used to calculate the confidence level from the variable node to the verification node in an undirected edge.

[0082] To calculate the confidence propagation process from variable nodes to verification nodes using an in-memory compute array, the confidence propagation process from variable nodes to verification nodes and the posterior log-likelihood ratio of the variable nodes are first expressed by the following formula:

[0083]

[0084] in, For variable nodes To the verification node External confidence level; For verification nodes To the variable node Confidence level; For all nodes with variables The set of connected verification nodes, i.e., variable nodes The verification relationship of the verification equations corresponding to all these verification nodes, verification nodes In the set Except for the check node Other verification nodes besides; For variable nodes To the verification node Confidence level; For variable nodes The initial log-likelihood ratio; For variable nodes The external posterior log-likelihood ratio; For variable nodes The posterior log-likelihood ratio.

[0085] Secondly, the confidence propagation process and the posterior log-likelihood ratio of the variable nodes need to be vectorized to obtain the corresponding configuration function matrix.

[0086] Specifically, this embodiment will take the order of variable nodes as an example for explanation, and will describe the variable nodes... To the verification node external confidence Arrange them to get:

[0087]

[0088] in, For the sparse parity-check matrix of the Polar code, The elements in the first node are ordered as follows: The confidence scores are calculated from the undirected edges between each variable node and each verification node that has a connection relationship; concatenating these vectors yields the vector... Each element in this vector represents the confidence level from a variable node to a verification node. In this embodiment, vectors are used respectively. and To represent vectors The variable node and check node numbers corresponding to each element, for example, The 5th element is ,but The 5th element is , The 5th element is .

[0089] For variable nodes To the verification node confidence level Arrange them to obtain vectors ,in, and They are vectors and The first in One element, For variable nodes To the verification node Confidence level;

[0090] For variable nodes external posterior log-likelihood ratio Arrange them to obtain vectors ,in, Represents variable nodes The external posterior log-likelihood ratio;

[0091] For variable nodes The posterior log-likelihood ratio Arrange them into a vector. ,in, Represents variable nodes The posterior log-likelihood ratio;

[0092] For verification nodes To the variable node confidence level Arrange them to get , For verification nodes To the variable node The confidence level.

[0093] It can be seen that the function of the first in-memory computing array is to utilize To calculate and , represented as:

[0094]

[0095] in, and These are the first configuration function matrix and the second configuration function matrix, respectively, and the first configuration function matrix... The size is , the elements Second configuration function matrix The size is , the elements .

[0096] Finally, the resistance state of the first in-memory computing array node is configured according to the configuration function matrix. During the configuration, if the splicing matrix... If the corresponding element is 1, then the cross node of the corresponding first in-memory compute array is set to a low-resistance state. If the splicing matrix... If the corresponding element is 0, then the cross node of the corresponding first in-memory compute array is set to a high-impedance state.

[0097] S33. According to the configuration rules of the first in-memory computing array, the cross nodes of the second in-memory computing array are configured in a resistive state.

[0098] Specifically, when configuring the cross nodes of the second in-memory compute array in a resistive state, the following steps are included:

[0099] The second in-memory computing array is divided into... There are 3 small arrays, each of which has a size of 1. , To find the maximum row degree of the Polar code sparse parity-check matrix, find the columns of all small arrays (total...) -1 columns) are used as input and connected to the output of the random number generator module, connecting each row of each small array (total) The output (line) is connected to each XOR module;

[0100] Determine the third configuration function matrix Its size is And the third configuration function matrix The value of each element in the array must be such that each subarray can calculate the corresponding check node. To the variable node When passing confidence levels, it is possible to include other variable nodes. Give this verification node The confidence level conveyed The corresponding Bernoulli random bitstream output column positions are clustered together. Other variable nodes... Give this verification node The confidence level conveyed The output column of the corresponding Bernoulli random bit stream is determined by the arrangement of each column in the first in-memory array.

[0101] For example, in the original permutation All of these correspond to undirected edges of the first verification node, but they cannot be adjacent in the output of the first in-memory compute array. Therefore, it is necessary to convert them in the second in-memory compute array. Set the corresponding column to 1 (i.e., set it to low impedance state), and set the corresponding positions in other columns to 0 (i.e., set them to high impedance state), and then select the path for output.

[0102] To reuse different codewords and code lengths, it is necessary to consider the maximum row degree of the sparse parity-check matrix. (The maximum number of 1s in each row of the corresponding sparse parity check matrix) is configured with redundancy. If the row degree of some parity rows is less than the maximum row degree, the column output of the corresponding path is always forced to a low level of 0. Based on this, the matrix that needs to be configured in the second in-memory computing array is... The size is .

[0103] It should be noted that, in this embodiment, the sorting method for different columns in the first in-memory compute array is not restricted. It is only necessary to simultaneously perform adaptive configuration of the node resistance states of the second in-memory compute array, that is, to satisfy the requirement that the computation verification nodes... To the variable node When passing confidence scores, other variable nodes will be included. Give this verification node The confidence level conveyed The corresponding output column positions of the Bernoulli random bit stream can be grouped together.

[0104] Alternatively, a route selector can be used instead of a second in-memory computing array, again only requiring that the computation verification node... To the variable node When passing confidence scores, other variable nodes will be included. Give this verification node The confidence level conveyed The corresponding output column positions of the Bernoulli random bit stream can be grouped together.

[0105] S4. Use the peripheral circuit to perform hard decision verification on the initial log-likelihood ratio. If the termination condition is met, output the Polar code decoding result; otherwise, proceed to step S5.

[0106] Specifically, hard-decision verification is implemented through the verification output module. The process is as follows: First, a hard decision is made on the initial log-likelihood ratio of each variable node. If the initial log-likelihood ratio of the variable node is <0, it is determined to be 1 (high level); if it is >0, it is determined to be 0 (low level), thus obtaining the codeword corresponding to each variable node. Then, the obtained codewords Perform a check; if it satisfies... , If a modulo operation is required, the iteration stops, and items are selected according to the position corresponding to VNCH at the time of input. Output the final decoding result; otherwise, proceed with the following steps.

[0107] S5. Map the confidence level transmitted from the variable node to the verification node to a Bernoulli random bit stream, and inject the Bernoulli random bit stream into the second in-memory array for routing, and calculate the confidence level transmitted from the verification node to the variable node.

[0108] Specifically, it includes the following steps:

[0109] S51. Use the random number generator module to map the confidence level passed from the variable node to the verification node into a Bernoulli random bit stream.

[0110] In this embodiment, the random number generator module includes a random bit stream generator, a cyclic shifter, and Road First Bit counter First function implementer and Road comparator (CMP).

[0111] The random bit stream generator is used to continuously generate random bits, where the probability of 0 and 1 occurring is equal, and the random bit sequence is processed... Bit storage; a circular shifter is used to cyclically shift a random bit sequence and then assign it to each first bit. Bit counter, and continues Next; First of each Bit counters are used for statistics The number of 1s in the random bit sequence, and after each iteration... After counting the bits, the count is reset to zero and restarted, resulting in bits from 0 to... Uniformly distributed among integers A random number; each first function implementer and each first path first A bit counter is connected for use with The function outputs the values ​​of each bit counter. A random number is converted into a uniformly distributed random log-likelihood ratio; each comparator is used to convert... The random log-likelihood ratio output by the first function implementer of each path is compared with the confidence level of the transmission from the variable node to the verification node. If the random log-likelihood ratio is greater than the transmission confidence level of the transmission from the variable node to the verification node, a high level (1) is output; otherwise, a low level (0) is output. Each path is divided according to time slots. This process yields the Bernoulli random bit stream corresponding to the confidence level passed from each variable node to the verification node.

[0112] In summary, each output of the random number generator module has The number of random numbers is equal to the number of 1s in the sparse parity check matrix, i.e., the number of undirected edges. The purpose of cyclic shifting in the cyclic shifter is to reduce the number of random bit stream generators required; only one generator is needed to generate multiple approximately independent random numbers.

[0113] S52. Inject the Bernoulli random bit stream into the second in-memory array for routing, and connect the Bernoulli random bit streams corresponding to adjacent check nodes to the same XOR module.

[0114] S53. Perform a bitwise XOR operation on all accessed Bernoulli random bit streams using the XOR module. By statistically analyzing the XOR operation results and performing a logarithmic domain transformation, obtain the confidence level transmitted from each check node to the variable node.

[0115] In this embodiment, the XOR module includes a common-bit XOR unit and a second... A bit counter and a second function implementer. The bit counter is used to perform a bitwise XOR operation on all incoming bit streams to obtain the result bit stream; the second... A bit counter is used to count the probability of a 1 appearing in the resulting bit stream, serving as a check node. To the variable node The probabilistic form of the transmitted confidence level; the second function implementer is used to utilize... Verification node To the variable node The probabilistic form of the transmitted confidence level is converted into a verification node. To the variable node The logarithmic field form of the transmitted confidence, i.e., the output of a series of XOR modules, is then... .

[0116] Specifically, the second The bit counter calculates the probability of a 1 appearing in the bit stream and uses this probability as the base value. This is equivalent to calculating in probability:

[0117]

[0118] in, For iteration rounds, For verification nodes To the variable node The probabilistic form of the confidence level being transmitted. For variable nodes To the verification node The probabilistic form of the confidence level being transmitted.

[0119] S6. Based on the confidence level passed from the verification node to the variable node, the external confidence level from the variable node to the verification node and the external log-likelihood ratio of the variable node are calculated using the first in-memory computing array, and then superimposed to obtain the complete confidence level from the variable node to the verification node and the complete posterior log-likelihood ratio of the variable node.

[0120] S7. Use external circuitry to perform hard-decision verification on the posterior log-likelihood ratio of each variable node until the termination condition is met, i.e., the preset number of iterations is reached or the verification condition is met. At that time, select according to the position corresponding to each VNCH during input. As the result of Polar code decoding.

[0121] Example 2

[0122] The above-described embodiment 1 provides a Polar code decoding method based on an in-memory computing unit and a random number bit stream. Correspondingly, this embodiment provides a Polar code decoding system based on an in-memory computing unit and a random number bit stream. The system provided in this embodiment can implement the Polar code decoding method based on an in-memory computing unit and a random number bit stream of embodiment 1. This system can be implemented through software, hardware, or a combination of both. For example, the system may include integrated or separate functional modules or units to execute the corresponding steps in the methods of embodiment 1. Since the system in this embodiment is basically similar to the method embodiment, the description process in this embodiment is relatively simple. For relevant details, please refer to the description of embodiment 1. The system embodiment provided in this embodiment is merely illustrative.

[0123] The Polar code decoding system based on a memory-to-computer interface and a random number bitstream provided in this embodiment includes:

[0124] The preprocessing unit is used to construct a bipartite factor graph based on the received Polar code, and to prune and optimize redundant nodes in the bipartite factor graph to obtain the sparse parity-check matrix of the Polar code and the corresponding probabilistic graphical model.

[0125] An initialization unit is used to obtain the initial log-likelihood ratio of each variable node, which serves as the initial confidence level from the variable node to the verification node in the probabilistic graphical model.

[0126] The decoding circuit architecture construction unit is used to construct a decoding circuit architecture including a first in-memory computing array, a second in-memory computing array, a random number generator module and an XOR module, and to configure the resistance state of each cross node in the first in-memory computing array and the second in-memory computing array based on the Polar code sparse parity-check matrix and the corresponding probabilistic graphical model.

[0127] The preliminary verification unit is used to perform hard decision verification on the initial log-likelihood ratio. If the termination condition is met, the Polar code decoding result is output; otherwise, it enters the first and second calculation units for iterative calculation.

[0128] The first computing unit is used to map the confidence level transmitted from the variable node to the verification node into a Bernoulli random bit stream, and inject the Bernoulli random bit stream into the second in-memory computing array in analog form for routing, and use the XOR module to calculate the confidence level transmitted from the verification node to the variable node.

[0129] The second computing unit is used to calculate and superimpose the complete confidence from the variable node to the verification node and the complete posterior log-likelihood ratio of the variable node based on the confidence passed from the verification node to the variable node using the first in-memory computing array.

[0130] The iterative output unit performs hard-decision verification on the posterior log-likelihood ratio of each variable node after each iteration until the termination condition is met. Then, it selects the nodes according to their positions at the time of input. As the result of Polar code decoding.

[0131] Furthermore, the preprocessing unit includes:

[0132] The bipartite factor graph construction module is used to construct a bipartite factor graph based on the polarization encoding scheme (i.e., its generator matrix) of the received Polar code.

[0133] The pruning optimization module is used to prune redundant nodes in the bipartite factor graph to reduce redundancy and obtain the Polar code sparse parity-check matrix.

[0134] The probabilistic graphical model creation module is used to create a corresponding probabilistic graphical model based on the sparse parity-check matrix of the Polar code, and to convert the Polar code decoding process into a confidence transfer process between variable nodes and parity nodes.

[0135] Furthermore, the decoding circuit architecture building unit includes:

[0136] The analysis unit is used to analyze the decoding process of Polar codes and construct a decoding circuit architecture that includes a first in-memory array, a second in-memory array, a random number generator module, and an XOR module.

[0137] The first node resistive configuration module is used to determine the confidence propagation matrix from the variable node to the check node based on the Polar code sparse parity check matrix and the corresponding probabilistic graphical model, and to perform resistive configuration on the cross nodes of the first in-memory computing array based on the confidence propagation matrix.

[0138] The second node resistive configuration module is used to perform resistive configuration on the cross nodes of the second in-memory computing array according to the configuration rules of the first in-memory computing array.

[0139] Furthermore, the first computing unit includes:

[0140] The mapping module is used to map the confidence level passed from the variable node to the verification node into a Bernoulli random bit stream using the random number generator module;

[0141] The routing module is used to inject the Bernoulli random bit stream into the second in-memory computing array in analog form for routing, and to connect the bit streams corresponding to adjacent verification nodes to the same XOR module.

[0142] The XOR module is used to perform a bitwise XOR operation on all incoming bit streams. By statistically analyzing the XOR operation results and performing a logarithmic field conversion, the confidence level transmitted from the check node to the variable node is obtained.

[0143] Example 3

[0144] This embodiment provides a processing device corresponding to the Polar code decoding method based on in-memory computing and random number bit stream provided in Embodiment 1. The processing device can be applied to client processing devices, such as mobile phones, laptops, tablets, desktop computers, etc., to execute the method of Embodiment 1.

[0145] The processing device includes a processor, a memory, a communication interface, and a bus. The processor, memory, and communication interface are connected via the bus to enable communication between them. The memory stores computer programs that can run on the processing device. When the processing device runs the computer program, it executes the Polar code decoding method based on a memory-to-computer interface and a random number bit stream provided in Embodiment 1.

[0146] In some implementations, the memory may be high-speed random access memory (RAM), and may also include non-volatile memory, such as at least one disk storage device.

[0147] In other implementations, the processor can be any type of general-purpose processor, such as a central processing unit (CPU) or a digital signal processor (DSP), and there is no limitation here.

[0148] Furthermore, the logical instructions in the aforementioned memory can be implemented as software functional units and sold or used as independent products, and can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0149] Those skilled in the art will understand that the structure of the above-described computing device is only a partial structure related to the present invention and does not constitute a limitation on the computing device to which the present invention is applied. A specific computing device may include more or fewer components, or combine certain components, or have different component arrangements.

[0150] Example 4

[0151] This embodiment provides a computer program product corresponding to the Polar code decoding method based on in-memory computing and random number bit stream provided in Embodiment 1. The computer program product may include a computer-readable storage medium on which computer-readable program instructions for executing the Polar code decoding method based on in-memory computing and random number bit stream described in Embodiment 1 are loaded.

[0152] A computer-readable storage medium can be a tangible device that holds and stores instructions for use by an instruction execution device. A computer-readable storage medium can be, for example, but not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any combination thereof.

[0153] The computer-readable storage medium provided in the above embodiments has a similar implementation principle and technical effect to the above method embodiments, and will not be described again here.

[0154] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0155] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0156] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0157] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A Polar code decoding method based on a memory-based computing unit and a random number bit stream, characterized in that, include: A bipartite factor graph is constructed based on the received Polar code, and redundant nodes in the bipartite factor graph are pruned and optimized to obtain the sparse parity-check matrix of the Polar code and the corresponding probabilistic graphical model. Obtain the initial log-likelihood ratio of each variable node in the probabilistic graphical model, and use it as the initial confidence level from the variable node to the verification node; A decoding circuit architecture comprising a first in-memory computing array, a second in-memory computing array, a random number generator module, and an XOR module is constructed, and the resistance state of each cross node in the first and second in-memory computing arrays is configured based on the Polar code sparse parity-check matrix and the corresponding probabilistic graphical model. A hard-decision check is performed on the initial log-likelihood ratio. If the termination condition is met, the Polar code decoding result is output; otherwise, iterative calculation continues. The confidence level initially transmitted from the variable node to the verification node is mapped to a Bernoulli random bit stream using the random number generator module, and the Bernoulli random bit stream is injected into the second in-memory computing array for routing. The confidence level transmitted from the verification node to the variable node is calculated using the XOR module. Based on the confidence level passed from the verification node to the variable node, the external confidence level and the external log-likelihood ratio of the variable node are calculated using the first in-memory computing array. These are then superimposed with the initial confidence level and the initial log-likelihood ratio of the variable node to the verification node to obtain the confidence level and the posterior log-likelihood ratio of the variable node. Hard-decision verification is performed on the posterior log-likelihood ratio of each variable node after each iteration until the termination condition is met, at which point the Polar code decoding result is output.

2. The Polar code decoding method based on a memory-based computing unit and a random number bit stream as described in claim 1, characterized in that, The construction includes a decoding circuit architecture comprising a first in-memory compute array, a second in-memory compute array, a random number generator module, and an XOR module. Based on the Polar code sparse parity-check matrix and the corresponding probabilistic graphical model, the impedance states of each cross node in the first and second in-memory compute arrays are configured, including: The decoding process of Polar codes is analyzed, and a decoding circuit architecture including a first in-memory array, a second in-memory array, a random number generator module, and an XOR module is constructed. The first in-memory compute array is used for variable nodes. To the verification node Confidence level and variable nodes The posterior log-likelihood ratio is calculated; the random number generator module is used to generate variable nodes. To the verification node The transmitted confidence level is mapped to a Bernoulli random bit stream, and this stream is injected into the second in-memory compute array for routing. The XOR module is used to calculate the verification node based on the output of the second in-memory compute array. To the variable node The confidence level of the transmitted information; Based on the sparse parity-check matrix of the Polar code and the corresponding probabilistic graphical model, the confidence propagation matrix from the variable node to the parity node is determined, and the cross nodes of the first in-memory computing array are configured in a resistive state based on the confidence propagation matrix. According to the configuration rules of the first in-memory compute array, the cross nodes of the second in-memory compute array are configured in a resistive state.

3. The Polar code decoding method based on a memory-based computing unit and a random number bit stream as described in claim 2, characterized in that, The step of determining the confidence propagation matrix from the variable node to the check node based on the Polar code sparse parity-check matrix and the corresponding probabilistic graphical model, and configuring the cross nodes of the first in-memory compute array in a resistive state based on the confidence propagation matrix, includes: Each row of the first in-memory compute array is used as input and connected to the output of each XOR module, and each column of the first in-memory compute array is used as output and connected to the random number generator module. The first in-memory compute array is configured with resistive states at each cross-node, including: Based on the sparse parity-check matrix of Polar codes and the corresponding probabilistic graphical model, the confidence propagation process from variable nodes to parity nodes is expressed by the following formula: in, For variable nodes To the verification node External confidence level; For verification nodes To the variable node Confidence level; For all nodes with variables The set of connected check nodes, variable nodes The verification relationship and verification nodes involved in all these verification equations In the set Except for the check node Other verification nodes besides; For variable nodes To the verification node Confidence level; For variable nodes The initial log-likelihood ratio; For variable nodes The external posterior log-likelihood ratio; For variable nodes The posterior log-likelihood ratio; Secondly, the confidence propagation process from variable nodes to verification nodes is arranged into a vector form to obtain the concatenation matrix. ; The vector form is expressed as: in, By analyzing variable nodes To the verification node external confidence By arranging, The elements in the first node are ordered as follows: The confidence score is calculated from the undirected edges between the variable node and each verification node that has a connection relationship. By analyzing variable nodes external posterior log-likelihood ratio By arranging, Represents variable nodes The external posterior log-likelihood ratio; By verifying the node To the variable node confidence level By arranging, For verification nodes To the variable node Confidence level, and They are vectors and The first in One element, and They are vectors The number vector of the variable node and check node corresponding to each element; and These are the first configuration function matrix and the second configuration function matrix, respectively, and the first configuration function matrix... The size is , the elements Second configuration function matrix The size is , the elements ; Finally, the impedance state of the first in-memory compute array node is configured according to the splicing matrix: if the splicing matrix If the corresponding element is 1, then the cross node of the corresponding first in-memory compute array is set to a low-resistance state. If the splicing matrix... If the corresponding element is 0, then the cross node of the corresponding first in-memory compute array is set to a high-impedance state.

4. The Polar code decoding method based on a memory-based computing unit and a random number bit stream as described in claim 3, characterized in that, The step of configuring the cross nodes of the second in-memory computing array in a resistive state according to the configuration rules of the first in-memory computing array includes: The second in-memory computing array is divided into... There are 3 small arrays, each of which has a size of 1. , To determine the maximum row degree of the Polar code sparse parity-check matrix, each column of all the subarrays is used as input and connected to the output of the random number generator module, and each row of each subarray is used as output and connected to each XOR module. Determine the third configuration function matrix Its size is And the third configuration function matrix The value of each element in the array must be such that each subarray can calculate the corresponding check node. To the variable node When passing confidence levels, it is possible to include other variable nodes. Give this verification node The confidence level conveyed The corresponding output column positions of the Bernoulli random bitstream are clustered together, where other variable nodes Give this verification node The confidence level conveyed The output column of the corresponding Bernoulli random bit stream is determined by the arrangement of each column in the first in-memory array.

5. The Polar code decoding method based on a memory-based computing unit and a random number bit stream as described in claim 1, characterized in that, The method involves using a random number generator module to map the initial confidence level transmitted from the variable node to the verification node into a Bernoulli random bit stream, injecting the Bernoulli random bit stream into the second in-memory compute array for routing, and using an XOR module to calculate the confidence level transmitted from the verification node to the variable node, including: The confidence level passed from the variable node to the verification node is mapped to a Bernoulli random bit stream using the random number generator module; The Bernoulli random bit stream is injected into the second in-memory computing array for routing, and the Bernoulli random bit streams corresponding to adjacent verification nodes are connected to the same XOR module. The XOR module performs a bitwise XOR operation on all the accessed Bernoulli random bit streams. By statistically analyzing the XOR operation results and performing a logarithmic field transformation, the confidence level transmitted from each check node to the variable node is obtained.

6. The Polar code decoding method based on a memory-based computing unit and a random number bit stream as described in claim 5, characterized in that, The random number generator module includes: Random bit stream generator, cyclic shifter, Road First Bit counter First function implementer and Road comparator; The random bit stream generator is used to continuously generate random bits, where the probability of 0 and 1 occurring is equal, and to process the random bit sequence. Bit storage; The cyclic shifter is used to cyclically shift the random bit sequence and output it to each of the first... Bit counter, and continues Second-rate; Each of the first A bit counter is used to count the number of 1s in a random bit sequence, and after each iteration... After counting the bits, the count is reset to zero and restarted, resulting in bits from 0 to... Uniformly distributed among integers A random number; Each of the first function implementers and each of the first A bit counter is connected for use with The function will each of the first Bit counter output A random number is converted into a uniformly distributed random log-likelihood ratio; Each of the comparators is used to... The random log-likelihood ratio output by the first function implementer of each channel is compared with the confidence level transmitted from the variable node to the verification node. If the random log-likelihood ratio is greater than the confidence level transmitted from the variable node to the verification node, a high level is output; otherwise, a low level is output. Each channel is divided according to time slots. This process yields the Bernoulli random bit stream corresponding to the confidence level passed from each variable node to the verification node.

7. The Polar code decoding method based on a memory-based computing unit and a random number bit stream as described in claim 5, characterized in that, The XOR module includes a isotope XOR unit and a second... Bit counter and second function implementer; The XOR unit is used to perform an XOR operation on all the accessed Bernoulli random bit streams to obtain the result bit stream; The second A bit counter is used to count the probability of a 1 appearing in the resulting bit stream, serving as a check node. To the variable node The probabilistic form of the confidence level being transmitted; The second function implementer is used to utilize Verification node To the variable node The probabilistic form of the transmitted confidence level is converted into a verification node. To the variable node The logarithmic field form of the confidence level of the transitive statement.

8. A Polar code decoding system based on a memory-based computing unit and a random number bit stream, characterized in that, include: The preprocessing unit is used to construct a bipartite factor graph based on the received Polar code, and to prune and optimize redundant nodes in the bipartite factor graph to obtain the sparse parity-check matrix of the Polar code and the corresponding probabilistic graphical model. The initialization unit is used to obtain the initial log-likelihood ratio of each variable node in the probabilistic graphical model, which serves as the initial confidence level passed from the variable node to the verification node. The decoding circuit architecture building unit is used to build a decoding circuit architecture including a first in-memory computing array, a second in-memory computing array, a random number generator module and an XOR module, and to configure the resistance state of each cross node in the first in-memory computing array and the second in-memory computing array based on the Polar code sparse parity-check matrix and the corresponding probabilistic graphical model. The preliminary verification unit is used to perform hard decision verification on the initial log-likelihood ratio. If the termination condition is met, the Polar code decoding result is output; otherwise, it enters the first and second calculation units for iterative calculation. The first computing unit is used to map the initial confidence level transmitted from the variable node to the verification node into a Bernoulli random bit stream using a random number generator module, and inject the Bernoulli random bit stream into the second in-memory computing array for routing, and use the XOR module to calculate the confidence level transmitted from the verification node to the variable node. The second computing unit is used to calculate the external confidence level from the variable node to the verification node and the external log-likelihood ratio of the variable node based on the confidence level passed from the verification node to the variable node using the first in-memory computing array. The external confidence level from the variable node to the verification node and the external log-likelihood ratio of the variable node are then superimposed with the initial confidence level from the variable node to the verification node and the initial log-likelihood ratio of the variable node to obtain the confidence level from the variable node to the verification node and the posterior log-likelihood ratio of the variable node. The iterative output unit is used to perform hard decision verification on the posterior log-likelihood ratio of each variable node after each iteration until the termination condition is met, and then outputs the Polar code decoding result.

9. A computer-readable storage medium for storing one or more programs, characterized in that, The one or more programs include instructions that, when executed by a computing device, cause the computing device to perform any of the Polar code decoding methods based on in-memory computing devices and random number bit streams as described in claims 1 to 7.

10. A computing device, characterized in that, include: One or more processors and a memory, wherein the memory stores one or more programs and is configured to be executed by the one or more processors, the one or more programs including instructions for performing any of the Polar code decoding methods based on in-memory computing devices and random number bit streams as described in claims 1 to 7.

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