A method of correcting a reticle layout

Abstract

The application provides a method for correcting a mask layout, and is applied to the technical field of semiconductors. In the application, a plurality of pixel patterns whose interval length does not satisfy a preset range are screened out based on the interval length between adjacent pixel patterns, then the critical dimension of the screened pixel patterns is multiplied by N times at different ratios to construct a plurality of first test masks, and then the best magnification ratio of an initial mask is determined based on the combination of wafer data, an incremental limit suboptimal solution and two-side clamping theorem, that is, a target mask is obtained. Unexpected effects are that the best magnification ratio of each pixel pattern in the initial mask can be quickly determined by using only a small part of pixel patterns in the initial mask, the manufacturing efficiency, quality of the mask, and the space utilization of the mask and the wafer are improved, and the manufacturing cost of the mask is reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, in particular to a method for correcting mask layout. BACKGROUND

[0002] In the conventional optical lithography technology, the ultraviolet exposure technology of mask to photoresist layer can be mainly divided into contact optical lithography technology and projection lithography technology.

[0003] The mask used in the contact optical lithography technology has a key size of pattern in a 1:1 ratio with the pattern actually copied on the wafer, and the exposure is performed in a manner of directly approaching the surface of the photoresist layer; while the mask used in the projection lithography technology has a key size of pattern which is several times of the pattern actually copied on the wafer, and the exposure is performed on the photoresist layer by means of projection of optical system.

[0004] In the projection lithography technology, due to the imperfection and diffraction effect of the optical system, there is a certain difference (pattern distortion) between the developed lithography pattern and the pattern on the mask, which will cause adverse effects on the photoelectric performance of integrated circuits. Therefore, how many times the pattern in the mask is scaled has become a technical problem to be solved by the person skilled in the art. SUMMARY

[0005] The present application aims to provide a method for correcting mask layout, which can quickly determine the optimal scaling ratio of each pixel pattern in the initial mask by using only a small part of the pixel pattern in the initial mask, thereby improving the production efficiency, quality of the mask, and the space utilization of the mask and wafer, and reducing the production cost of the mask.

[0006] In a first aspect, to solve the above technical problems, the present application provides a method for correcting mask layout, comprising:

[0007] providing an initial mask having a plurality of pixel patterns and initial lithography conditions.

[0008] Based on the interval length between adjacent pixel patterns, a plurality of pixel patterns whose interval length does not satisfy a preset range are screened out, and the key size of the screened pixel patterns is scaled N times to form a plurality of first test masks, wherein N≥1.

[0009] obtaining wafer data of the plurality of first test masks exposed on the wafer under the initial lithography conditions, and performing function fitting on the wafer data to obtain a function relationship between the key size parameter of the pixel pattern and the exposure parameter of the initial lithography conditions, the exposure parameter including exposure dose parameter and focus depth parameter.

[0010] The function relationship is calculated by using incremental limit suboptimal solution to determine the suboptimal solution of the critical dimension parameter of the pixel pattern.

[0011] The suboptimal solution of the critical dimension parameter of the pixel pattern is segmented, and the segmented multiple sets of values are clamped by using two-side clamping theorem to obtain the optimal solution of the critical dimension parameter of the pixel pattern and the optimal scaling ratio of the pixel pattern.

[0012] The pixel pattern in the initial mask is scaled by using the optimal scaling ratio to obtain a target mask.

[0013] In some optional examples, the ratio of the critical dimension of the pixel pattern in at least one of the first test masks to the critical dimension of the pixel pattern actually replicated on the wafer can be 1:1.

[0014] In some optional examples, the step of scaling the critical dimension of the screened pixel pattern N times to form the first test masks can include:

[0015] Wafer data of the screened pixel pattern exposed on a wafer under the initial lithography condition is obtained, and a mask error enhancement factor of the initial mask is calculated based on the wafer data.

[0016] The mask error enhancement factor is used as a scaling ratio to scale the critical dimension of the screened pixel pattern N times, and the pixel pattern after each scaling is reassembled into a first test mask.

[0017] In some optional examples, the step of calculating the mask error enhancement factor of the initial mask based on the wafer data of the screened pixel pattern exposed on a wafer under the initial lithography condition can include:

[0018] From the wafer data, an actual measurement value of the critical dimension of the screened pixel pattern exposed on a wafer is determined.

[0019] A difference between the actual measurement value and a target value of the critical dimension of the screened pixel pattern is used as a variation amount of the critical dimension of the screened pixel pattern on a wafer.

[0020] A ratio of the variation amount of the critical dimension of the screened pixel pattern on a wafer to a variation amount of the critical dimension of the screened pixel pattern on the initial mask is used as the mask error enhancement factor.

[0021] In some optional examples, the function relationship of the critical dimension parameter of the pixel pattern and the exposure parameter of the initial lithography condition can include:

[0022] The depth-of-focus parameter and the exposure dose parameter have a linear functional relationship.

[0023] In some optional examples, the functional relationship between the key size parameters of the pixel pattern and the exposure parameters of the initial lithography conditions may include:

[0024] The key size parameters of the pixel graphic are related to the exposure dose parameters as a linear function.

[0025] In some optional examples, the critical size parameters of the pixel pattern may include the maximum exposure size parameters of the pixel pattern on the wafer, and the scaled-down critical size parameters of the pixel pattern on the first test mask.

[0026] In some optional examples, after obtaining the optimal scaling ratio of the pixel image, and before obtaining the target photomask using the optimal scaling ratio, the process may further include:

[0027] Using the optimal scaling ratio, the unselected pixel pattern in the initial photomask is scaled down to form a second test photomask.

[0028] The wafer data of the second test photomask exposed on the wafer under the initial photolithography conditions is obtained, and based on the wafer data, it is determined whether the limit exposure size value of the unselected pixel pattern on the wafer is consistent with the limit exposure size value of the selected pixel pattern on the wafer.

[0029] By combining the wafer data of the first test photomasks exposed on the wafer under the initial photolithography conditions, it is determined whether the average depth of focus of the initial photomasks is greater than the depth of focus corresponding to the optimal solution.

[0030] If not, adjust the optical characteristic parameters corresponding to the initial photolithography conditions, and return to the step of obtaining the wafer data of the selected pixel pattern exposed on the wafer under the initial photolithography conditions.

[0031] In some of the optional examples, the optical characteristic parameters may include at least one of vertical aperture, resolution, aberration, polarization, or optical constant.

[0032] In some optional examples, the method for correcting the photomask layout may further include:

[0033] If the average depth of focus of the initial photomask is greater than the depth of focus corresponding to the optimal solution, and the limit exposure size of the unselected pixel pattern on the wafer is consistent with the limit exposure size of the selected pixel pattern on the wafer, then an optical model of the target photomask is established based on the wafer data of the first test photomask and the second test photomask exposed on the wafer under the initial photolithography conditions.

[0034] In a second aspect, the present invention also provides an electronic device, including a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus.

[0035] Memory, used to store computer programs;

[0036] When a processor executes a program stored in memory, it implements the method steps described above for correcting the photomask layout.

[0037] Thirdly, the present invention also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the method steps for correcting the photomask layout as described above.

[0038] Compared with the prior art, the technical solution provided by the present invention has at least one of the following beneficial effects:

[0039] This invention provides a method for correcting a photomask layout, comprising: providing an initial photomask with multiple pixel patterns and initial photolithography conditions; selecting multiple pixel patterns whose spacing length does not meet a preset range based on the spacing length between adjacent pixel patterns; performing N-fold scaling on the key dimensions of the selected pixel patterns to form a plurality of first test photomasks, wherein N≥1; acquiring wafer data of the plurality of first test photomasks exposed on a wafer under the initial photolithography conditions; and performing function fitting on the wafer data to obtain the key dimension parameters of the pixel patterns and the initial photolithography conditions. The exposure parameters, including exposure dose and depth of focus, are given by a functional relationship. An incremental limit suboptimal solution is calculated on this functional relationship to determine the suboptimal solution for the key size parameters of the pixel image. The values ​​adjacent to the suboptimal solution of the key size parameters are segmented, and the squeeze theorem is used to squeeze the multiple sets of values ​​obtained from the segmentation to obtain the optimal solution for the key size parameters of the pixel image and the optimal scaling ratio of the pixel image. Using the optimal scaling ratio, the pixel image in the initial photomask is scaled down to obtain the target photomask.

[0040] In this invention, multiple first test photomasks are constructed by repeatedly scaling down several pixel patterns with small spacing lengths in the initial photomask at different ratios. Then, wafer data of the several first test photomasks is collected, and the optimal scaling ratio of the initial photomask is determined based on the combination of the wafer data, the incremental limit suboptimal solution, and the two-sided squeeze theorem, thus obtaining the target photomask. An unexpected effect is that the optimal scaling ratio of each pixel pattern in the initial photomask can be quickly determined using only a small portion of the pixel patterns in the initial photomask, which improves the photomask manufacturing efficiency, quality, and space utilization of the photomask and wafer, and reduces the photomask manufacturing cost. Attached Figure Description

[0041] The accompanying drawings are provided to further illustrate the present application and form part of the specification. They are used together with the following detailed description to explain the present application, but do not constitute a limitation thereof. In the drawings:

[0042] Figure 1 This is a schematic diagram of a pixel array corresponding to a photomask of an image sensor provided in one embodiment of the present invention.

[0043] Figure 2 This is a flowchart illustrating a method for correcting the photomask layout according to an embodiment of the present invention.

[0044] Figure 3 This is an example of an FEM focal length energy matrix plot drawn based on actual measured values ​​corresponding to a first test mask, according to an embodiment of the present invention.

[0045] Figure 4 This is another example of an FEM focal length energy matrix plot drawn based on actual measured values ​​corresponding to a first test mask, according to an embodiment of the present invention.

[0046] Figure 5 This is another example of an FEM focal length energy matrix plot drawn based on actual measured values ​​corresponding to a first test mask, according to an embodiment of the present invention.

[0047] Figure 6 This is another example of an FEM focal length energy matrix plot drawn based on actual measured values ​​corresponding to a first test mask, according to an embodiment of the present invention.

[0048] Figure 7 This is an example curve illustrating the functional relationship between the key size parameters of a pixel graphic and the exposure parameters of the initial photolithography conditions in one embodiment of the present invention.

[0049] Figure 8 This is another example curve illustrating the functional relationship between the key size parameters of the pixel pattern and the exposure parameters of the initial photolithography conditions in one embodiment of the present invention.

[0050] In the accompanying drawings, the same parts are referred to by the same reference numerals, and the drawings are not drawn to scale. Detailed Implementation

[0051] To make the technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Although exemplary implementation methods of the present invention are shown in the accompanying drawings, it should be understood that the present invention can be implemented in various forms and should not be limited to the embodiments described herein. Rather, these embodiments are provided to enable a more thorough understanding of the present invention and to fully convey the scope of the present invention to those skilled in the art.

[0052] During the photolithography process, due to imperfections in the optical system and diffraction effects, there is a certain difference between the developed photolithographic pattern and the pattern on the photomask (pattern distortion). A common solution is to use optical proximity correction (OPC) technology to correct the size of the photomask, thereby canceling out the adverse deformation effects of the photolithographic pattern.

[0053] However, for certain patterns, such as the photomask corresponding to a pixel array of an image sensor (containing multiple pixel patterns of square or rectangular shape, where one pixel pattern corresponds to one pixel unit in the pixel array, such as...),... Figure 1 As shown in the figure, if contact optical lithography is used, the optimal scaling ratio cannot be determined. If scaling lithography is used, it is necessary to select the optimal scaling ratio one by one from a large number of sets of scaling ratios, which requires a lot of time, manpower and equipment resources.

[0054] To address this issue, this invention provides a method for correcting the layout of a photomask. Before performing OPC correction on the photomask, a subset of pixel patterns are selected from the photomask. These selected pixel patterns are then scaled down using contact optical lithography and reduction lithography techniques to form several first test photomasks. The optimal scaling ratio for each pixel pattern in the initial photomask is then quickly determined using these first test photomasks. This improves the fabrication efficiency and quality of the photomask, as well as the space utilization of the photomask and wafer, and reduces the fabrication cost of the photomask.

[0055] Please refer to Figure 2 As shown, Figure 2 This is a schematic flowchart illustrating a method for correcting the photomask layout according to an embodiment of the present invention. Figure 2 As shown, the method for correcting the photomask layout may include at least the following steps:

[0056] Step S201: Provide an initial photomask and initial photolithography conditions with a pattern of multiple pixels.

[0057] Step S202: Based on the spacing length between adjacent pixel patterns, select multiple pixel patterns whose spacing length does not meet the preset range, and perform N-fold scaling on the key dimensions of the selected pixel patterns to form a plurality of first test masks, wherein N≥1.

[0058] Step S203: Obtain wafer data of the plurality of first test photomasks exposed on the wafer under the initial photolithography conditions, and perform function fitting on the wafer data to obtain the functional relationship between the key size parameters of the pixel pattern and the exposure parameters of the initial photolithography conditions. The exposure parameters include exposure dose parameters and depth of focus parameters.

[0059] Step S204: Perform incremental limit suboptimal solution calculation on the functional relationship to determine the suboptimal solution of the key size parameters of the pixel image.

[0060] Step S205: Segment the values ​​of the suboptimal solution of the key size parameter of the pixel image into adjacent values, and use the squeeze theorem to squeeze the multiple sets of values ​​obtained from the segmentation to obtain the optimal solution of the key size parameter of the pixel image and the optimal scaling ratio of the pixel image.

[0061] Step S206: Using the optimal scaling ratio, the pixel pattern in the initial photomask is scaled down to obtain the target photomask.

[0062] In step S201 above, an initial photomask can be formed first for the pixel array of the image sensor to which the target photomask is to be formed. The initial photomask may include multiple pixel patterns, each corresponding one-to-one with a pixel unit in the pixel array of the image sensor, and each pixel pattern may be square or rectangular. In one embodiment, the multiple pixel patterns on the initial photomask may all be square, and the multiple pixel patterns may be arranged alternately along a horizontal or vertical direction to form a pixel pattern array, such as... Figure 1 As shown, but not limited to. The initial lithography conditions may be the actual lithography conditions used when the target photomask corresponding to the pixel array of the image sensor is exposed on the wafer using a lithography machine.

[0063] It should be understood that when forming a photomask, it is necessary to first determine the key dimension (linewidth, CD) scaling ratio corresponding to whether the pattern contained on the photomask is formed using contact optical lithography or scaling lithography. Since at least one of the several first test photomasks formed in the embodiments of the present invention must be a test photomask corresponding to contact optical lithography, in order to simplify the setup and save costs, the ratio of the key dimension of the pixel pattern contained on the initial photomask in the embodiments of the present invention to the key dimension of the pixel pattern actually copied on the wafer is 1:1, that is, the key dimension of the pixel pattern on the initial photomask is consistent with the key dimension of the pixel pattern actually copied on the wafer, but this is not a limitation.

[0064] In step S202 above, multiple pixel patterns can be selected from the initial photomask, and then the key dimensions of the selected pixel patterns can be scaled down (enlarged or reduced) to construct a first test photomask containing several or a series of pixel patterns with different key dimensions.

[0065] In one embodiment, pixel patterns for constructing the first test photomask can be selected based on the spacing length between adjacent pixel patterns in the initial photomask. For example, multiple pixel patterns whose spacing length between adjacent pixel patterns in the initial photomask does not meet a preset range (such as the spacing length being less than a certain threshold or the minimum spacing value that the pixel pattern can be exposed) can be selected, but this is not a limitation. Preferably, in this embodiment of the invention, multiple adjacent pixel patterns with the smallest spacing length in the initial photomask can be selected. Then, for the selected multiple pixel patterns, their key dimensions are scaled down multiple times at different ratios or proportions to construct the plurality of first test photomasks, wherein N≥1, that is, the value of N can be: 1, 2, 3, 4, 5, 6, 7, ..., n.

[0066] Furthermore, since the pixel pattern in this embodiment of the invention is square, when scaling down the selected pixel pattern, the length (line edge) and width (line edge) of each pixel pattern selected from the initial photomask can be enlarged or reduced by the same amount. For example, the key dimensions of the pixel pattern with a key size of 110 (both length and width are 110) selected from the initial photomask, and the pixel pattern with a key size of 150 selected from the initial photomask, are both enlarged to 130 and 170 (length and width are enlarged by a change step of 20 respectively) according to a change step of 20. The pixel patterns with key sizes of 130 and 170 are combined to construct a first test photomask. By analogy, a plurality of first test photomasks can be formed, wherein each first test photomask may contain a plurality of pixel patterns.

[0067] Preferably, this embodiment of the invention provides a specific implementation method for scaling down the key dimensions of the selected pixel graphics N times to form the plurality of first test masks, which may specifically include the following steps:

[0068] Step S202.1: Obtain wafer data of the selected pixel pattern exposed on the wafer under the initial photolithography conditions, and calculate the mask error enhancement factor of the initial photomask based on the wafer data; and Step S202.2: Use the mask error enhancement factor as a scaling factor to scale down the key dimensions of the selected pixel pattern N times, and reassemble the pixel pattern after each scaling down into a first test photomask.

[0069] Specifically, after selecting multiple pixel patterns from the initial photomask, wafer data of the selected pixel patterns exposed on the wafer under the initial photolithography conditions can be further obtained. The wafer data can be, for example, the actual measured value (on water CD) of the critical dimension of the selected pixel pattern exposed on the wafer. Then, the difference between the actual measured value and the target value (the theoretical value of the critical dimension expected to be exposed on the wafer) of the critical dimension of the selected pixel pattern is used as the change in the critical dimension of the selected pixel pattern on the wafer. Then, the formula for calculating the mask error enhancement factor (MEEF) is used: ΔS1 / ΔS2, where ΔS1 is the change in the critical dimension measured on the wafer after pattern development, and ΔS2 is the change in the critical dimension of the mask, that is, the ratio of the change in the critical dimension of the selected pixel pattern on the wafer to the change in the critical dimension of the selected pixel pattern on the initial photomask (the difference between the value of the critical dimension of the selected pixel pattern on the initial photomask and the target value), which is used as the mask error enhancement factor (MEEF). This allows us to determine the relationship between the change in the selected pixel pattern on the initial photomask and its change on the wafer under actual photolithography conditions (the photomask error enhancement factor, MEEF). This relationship is then used as the scaling ratio (or step size, n×MEEF) for subsequent scaling down. The critical dimensions of the selected pixel pattern are then scaled down N times. The value of n in n×MEEF can be greater than or equal to 0 or less than or equal to 0. For example, in the first scaling down, n in n×MEEF can be 0, meaning the ratio of the critical dimension of the pixel pattern in the first test photomask to the critical dimension actually copied onto the wafer is 1:1. Then, in the second scaling down, n in n×MEEF can be 1, meaning the ratio of the critical dimension of the pixel pattern in the second test photomask to the critical dimension actually copied onto the wafer is 1+MEEF:1, and so on, to obtain the plurality (the N) first test photomasks, but this is not a limitation.

[0070] It should be understood that, in other embodiments, the photomask error enhancement factor, which serves as a scaling ratio (or a change in step size), can also be solved using the actual measured uniformity (CDU) of the first-line edge (length or width) of the selected pixel pattern on the wafer; specifically, wafer data of the selected pixel pattern exposed on the wafer can be obtained first under the initial photolithography conditions, such as the actual measured values ​​of the critical dimensions of the selected pixel pattern exposed on the wafer (onwater). The first test mask is then divided into multiple segments of equal or unequal length (CD) along the selected pixel pattern. The actual measured value of each sub-line edge is then determined, and the CDU value of the selected pixel pattern's line edge is determined based on the average value calculation formula. Next, the difference between the CDU value and the target value (the theoretical value of the critical dimension expected to be exposed on the wafer) of the selected pixel pattern's critical dimension is used as the change in the critical dimension of the selected pixel pattern on the wafer. Then, the photomask error enhancement factor (MEEF) is determined using the calculation formula, and finally, N scaling operations are performed to form the plurality of first test masks, but this is not limited to this.

[0071] In step S203 above, after constructing the plurality of first test masks, each containing pixel patterns with different key dimensions, wafer data exposed on the wafer under the initial photolithography conditions can be obtained using each first test mask. This wafer data can be, for example, the actual measured values ​​of the length or width (line edges) of the pixel patterns of the plurality of first test masks on the wafer, depth of focus, exposure dose, etc. Furthermore, a focus energy matrix (FEM) diagram can be drawn based on the actual measured values ​​corresponding to the plurality of first test masks, such as... Figures 3-6 As shown; wherein, the Figures 3-6 The red areas in the image represent the pixel values ​​corresponding to the pattern distortion defects such as chamfering and bridging that occurred after the first test mask, scaled down by a certain multiple, was exposed on the wafer. Figure 3 The “Test Mask 1” shown indicates a first test mask with a 1:1 ratio between the critical dimension of the pixel pattern and the critical dimension of the pixel pattern actually replicated on the wafer. Figure 4 The “Test Mask 2” shown refers to the first test mask formed by reducing the critical size of the pixel pattern selected from the initial mask by 10nm. Figure 5 The “test mask 3” shown refers to the first test mask formed by reducing the critical size of the pixel pattern selected from the initial mask by 20nm. Figure 6 The “Test Mask 4” shown represents the first test mask formed by reducing the critical size of the pixel pattern selected from the initial mask by 30nm.

[0072] Depend on Figures 3-6 As shown, the critical size at which the pixel pattern of each of the first test masks is exposed on the wafer without distortion can be determined, i.e., the minimum critical size at which the pixel pattern can be developed without distortion. Furthermore, it can be determined what scaling factor will be applied to the pixel patterns selected from the initial mask so that their corresponding minimum critical size for undistorted development on the wafer will remain unchanged.

[0073] In one embodiment, after determining the wafer data obtained by exposing each of the first test photomasks on the wafer under the initial photolithography conditions, a function fitting can be performed on the wafer data to obtain the functional relationship between the key size parameters of the pixel pattern and the exposure parameters of the initial photolithography conditions. The key size parameters of the pixel pattern include the maximum exposure size parameter of the pixel pattern on the wafer, and the scaled-down key size parameter of the pixel pattern on the first test photomask. In one embodiment, the functional relationship between the key size parameters of the pixel pattern and the exposure parameters of the initial photolithography conditions may include: a linear functional relationship between the depth-of-focus parameter and the exposure dose parameter, and a linear functional relationship between the key size parameters of the pixel pattern and the exposure dose parameter.

[0074] Please see Figure 7 , Figure 7 This is an example curve illustrating the functional relationship between key size parameters of a pixel graphic and exposure parameters of the initial photolithography conditions in one embodiment of the present invention; for example... Figure 7 As shown, the linear functional relationship between the depth-of-focus parameter / limited exposure size parameter and the exposure dose parameter can be expressed as:

[0075] Limit CD / DOF = k1 × Dose + b1;

[0076] Where Limit CD is the limit exposure size parameter, DOF is the depth of focus parameter, Dose is the exposure dose parameter, k1 and b1 are both coefficients, where k1≤0 and b1>0.

[0077] It should be understood that, through research, it is known that the linear functional relationship between the depth of focus parameter and the exposure dose parameter is the same as the linear functional relationship between the limiting exposure size parameter and the exposure dose parameter. Therefore, the two can be combined into a single functional relationship, but this is not a limitation.

[0078] Please see Figure 8 , Figure 8 This is another example curve illustrating the functional relationship between the key size parameters of the pixel image and the exposure parameters of the initial photolithography conditions in one embodiment of the present invention; as shown below. Figure 8As shown, the key dimension parameters of the pixel pattern after being scaled down on the first test photomask have a functional relationship with the exposure dose parameters of the initial simulated photolithography conditions as follows:

[0079] Mask CD = k2 × Dose + b2;

[0080] Wherein, Mask CD is the key size parameter of the pixel image after being scaled down on the first test mask, Dose is the exposure dose parameter, and k2 and b2 are both coefficients, wherein k2>0 and b2>0.

[0081] In step S204 above, after fitting the functional relationship between the above multiple parameters, the incremental limit suboptimal solution (also known as the zero-point limit suboptimal solution) can be calculated for the linear functional relationship between the depth-of-focus parameter / limit exposure size parameter and the exposure dose parameter to determine the suboptimal solution of the depth-of-focus parameter / limit exposure size parameter, and the suboptimal solution of the exposure dose parameter value actually exposed on the wafer when the depth-of-focus parameter / limit exposure size parameter is a suboptimal solution, which is affected by the actual photolithography process and the photomask. The suboptimal solution of the exposure dose parameter value actually exposed on the wafer is then substituted into the functional relationship between the key size parameter of the pixel pattern after being scaled down on the first test photomask and the exposure dose parameter of the initial simulated photolithography conditions, thereby obtaining the suboptimal solution of the key size of the pixel pattern after being scaled down on the first test photomask.

[0082] In step S205 above, after calculating the suboptimal solutions of the above multiple parameters using the incremental limit suboptimal solution method, the values ​​of the parameters, such as the suboptimal solution of the key dimension of the pixel image after scaling on the first test photomask, can be divided into multiple points. The squeeze theorem is used to squeeze the multiple sets of values ​​obtained by the division to obtain the optimal solution of the key dimension parameter of the pixel image after scaling on the first test photomask. Then, by comparing it with the key dimension of the pixel image before scaling on the initial photomask, the corresponding scaling ratio can be determined, and the scaling ratio is taken as the optimal scaling ratio of the pixel image.

[0083] Following step S205 above, after obtaining the optimal scaling ratio of the pixel pattern, the method may further include: using the optimal scaling ratio to scale down the unselected pixel pattern in the initial photomask to form a second test photomask; then acquiring the wafer data of the second test photomask exposed on the wafer under the initial photolithography conditions, and determining, based on the wafer data, whether the limit exposure size value of the unselected pixel pattern on the wafer is consistent with the limit exposure size value of the selected pixel pattern on the wafer, and combining the wafer data of the plurality of first test photomasks exposed on the wafer under the initial photolithography conditions to determine whether the average depth of focus value of the initial photomask is greater than the depth of focus value corresponding to the optimal solution; if so, it indicates that when the target photomask after scaling down to the optimal scaling ratio is actually exposed based on the initial photolithography conditions, the morphology of the developed pixel pattern on the wafer is consistent, and the average depth of focus also meets the design requirements. Therefore, an optical model of the target photomask can be further established based on the wafer data of the first and second test photomasks exposed on the wafer under the initial photolithography conditions. Otherwise, it indicates that when the target photomask, after being scaled down to the optimal ratio, is actually exposed based on the initial photolithography conditions, the resulting pixel pattern on the wafer has inconsistent morphology, or the average depth of focus does not meet the design requirements. Therefore, adjustments are needed. For example, the optical characteristic parameters corresponding to the initial photolithography conditions can be adjusted. Then, the step of obtaining the wafer data of the selected pixel pattern exposed on the wafer under the initial photolithography conditions is returned to the step of determining the mask error enhancement factor (MEEF). This adjusts the initial photolithography conditions to change the factors that may cause poor pixel pattern morphology in the actual photolithography process caused by unreasonable actual photolithography condition settings. For example, the optical characteristic parameters include at least one of vertical aperture, resolution, aberration, polarization, or optical constant, but are not limited thereto.

[0084] In step S206 above, the optimal scaling ratio can be used to scale down all the pixel graphics in the initial photomask to obtain the target photomask; then, the target photomask can be modified accordingly, such as adding auxiliary graphics or other subsequent steps, but not limited to this.

[0085] In summary, this invention provides a method for correcting a photomask layout, comprising: providing an initial photomask with multiple pixel patterns and initial photolithography conditions; based on the spacing length between adjacent pixel patterns, selecting at least one pixel pattern whose spacing length does not meet a preset range; and performing N-fold scaling on the key dimensions of the selected pixel patterns to form a plurality of first test photomasks, wherein N≥1; acquiring wafer data of the plurality of first test photomasks exposed on a wafer under the initial photolithography conditions; and performing function fitting on the wafer data to obtain the key dimension parameters of the pixel patterns and the... The initial photolithography conditions are determined by a functional relationship of exposure parameters, including exposure dose and depth of focus. An incremental limit suboptimal solution is calculated on this functional relationship to determine the suboptimal solution for the critical size parameters of the pixel image. The values ​​adjacent to the suboptimal solution of the critical size parameters are segmented, and the squeeze theorem is used to squeeze the multiple sets of values ​​obtained from the segmentation to obtain the optimal solution for the critical size parameters of the pixel image and the optimal scaling ratio of the pixel image. Using the optimal scaling ratio, the pixel image in the initial photomask is scaled down to obtain the target photomask. In this invention, one or several pixel patterns with smaller spacing lengths in the initial photomask are scaled down multiple times at different ratios to construct several first test photomasks. Then, the wafer data of the several first test photomasks is collected, and based on the combination of the wafer data, the incremental limit suboptimal solution, and the two-sided squeeze theorem, the optimal scaling ratio of the initial photomask is determined, thus obtaining the target photomask. An unexpected effect is that the optimal scaling ratio of each pixel pattern in the initial photomask can be quickly determined using only a small portion of the pixel patterns in the initial photomask, which improves the photomask manufacturing efficiency, quality, and space utilization of the photomask and wafer, and reduces the photomask manufacturing cost.

[0086] This invention also provides an electronic device, including a processor, a communication interface, a memory, and a communication bus. The processor, communication interface, and memory communicate with each other through the communication bus. The memory is used to store computer programs. When the processor executes the program stored in the memory, it implements the method for correcting photomask layout provided in this invention.

[0087] In addition, other implementations of the method for correcting the photomask layout by the processor executing the program stored in the memory are the same as those mentioned in the aforementioned method embodiment section, and will not be repeated here.

[0088] The communication bus mentioned in the control terminal above can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. This communication bus can be divided into address bus, data bus, control bus, etc. For ease of illustration, only one thick line is used to represent it in the diagram, but this does not mean that there is only one bus or one type of bus.

[0089] The communication interface is used for communication between the aforementioned electronic devices and other devices.

[0090] The memory may include random access memory (RAM) or non-volatile memory (NVM), such as at least one disk storage device. Optionally, the memory may also be at least one storage device located remotely from the aforementioned processor.

[0091] The processors mentioned above can be general-purpose processors, including central processing units (CPUs), network processors (NPs), etc.; they can also be digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.

[0092] In another embodiment of the present invention, a computer-readable storage medium is also provided, which stores instructions that, when executed on a computer, cause the computer to perform a method for correcting a photomask layout as described in any of the above embodiments.

[0093] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present invention are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid-state disk (SSD)).

[0094] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0095] The various embodiments in this specification are described in a related manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the embodiments of apparatus, electronic devices, and computer-readable storage media are basically similar to the method embodiments, and therefore the descriptions are relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0096] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention are included within the scope of protection of the present invention.

Claims

1. A method for correcting the layout of a photomask, characterized in that, include: Provide initial photomask and initial photolithography conditions with multiple pixel patterns; Based on the spacing length between adjacent pixel patterns, multiple pixel patterns whose spacing length does not meet the preset range are selected, and the key dimensions of the selected pixel patterns are scaled down N times to form a number of first test masks, wherein N≥1; The wafer data of the plurality of first test photomasks exposed on the wafer under the initial photolithography conditions is obtained, and the wafer data is fitted by a function to obtain the functional relationship between the key size parameters of the pixel pattern and the exposure parameters of the initial photolithography conditions. The exposure parameters include exposure dose parameters and depth of focus parameters. Incremental limit suboptimal solution calculation is performed on the functional relationship to determine the suboptimal solution of the key size parameters of the pixel image; The values ​​of the suboptimal solutions of the key size parameters of the pixel image are segmented, and the squeeze theorem is used to squeeze the multiple sets of values ​​obtained by the segmentation to obtain the optimal solution of the key size parameters of the pixel image and the optimal scaling ratio of the pixel image. Using the optimal scaling ratio, the pixel pattern in the initial photomask is scaled down to obtain the target photomask; The step of scaling down the key dimensions of the selected pixel graphics N times to form the plurality of first test masks includes: The selected pixel pattern is exposed on the wafer under the initial photolithography conditions. The wafer data is then used to calculate the mask error enhancement factor of the initial photomask. Using the photomask error enhancement factor as the scaling ratio, the key dimensions of the selected pixel pattern are scaled down N times, and the pixel pattern after each scaling down is reassembled into a first test photomask; and the scaling ratios corresponding to the N scaling down are different.

2. The method for correcting the photomask layout as described in claim 1, characterized in that, At least one of the plurality of first test masks, the ratio of the critical dimension of the pixel pattern in the first test mask to the critical dimension of the pixel pattern actually replicated on the wafer is 1:

1.

3. The method for correcting the photomask layout as described in claim 1, characterized in that, The step of calculating the mask error enhancement factor of the initial photomask based on the wafer data of the selected pixel patterns exposed on the wafer under the initial photolithography conditions includes: From the wafer data, determine the actual measured values ​​of the key dimensions of the selected pixel patterns exposed on the wafer; The difference between the actual measured value and the target value of the key dimension of the selected pixel pattern is taken as the change in the key dimension of the selected pixel pattern on the wafer. The ratio of the change in the critical dimension of the selected pixel pattern on the wafer to the change in the critical dimension of the selected pixel pattern on the initial photomask is used as the photomask error enhancement factor.

4. The method for correcting the photomask layout as described in claim 1, characterized in that, The functional relationship between the key size parameters of the pixel pattern and the exposure parameters of the initial photolithography conditions includes: The depth-of-focus parameter and the exposure dose parameter have a linear functional relationship.

5. The method for correcting the photomask layout as described in claim 1, characterized in that, The functional relationship between the key size parameters of the pixel pattern and the exposure parameters of the initial photolithography conditions includes: The key size parameters of the pixel graphic are related to the exposure dose parameters as a linear function.

6. The method for correcting the photomask layout as described in claim 5, characterized in that, The key size parameters of the pixel pattern include the maximum exposure size parameters of the pixel pattern on the wafer, and the scaled-down key size parameters of the pixel pattern on the first test mask.

7. The method for correcting the photomask layout as described in claim 6, characterized in that, After obtaining the optimal scaling ratio of the pixel image, and before obtaining the target photomask using the optimal scaling ratio, the method further includes: Using the optimal scaling ratio, the unselected pixel pattern in the initial photomask is scaled down to form a second test photomask; The wafer data of the second test photomask exposed on the wafer under the initial photolithography conditions is obtained, and based on the wafer data, it is determined whether the limit exposure size value of the unselected pixel pattern on the wafer is consistent with the limit exposure size value of the selected pixel pattern on the wafer. Based on the wafer data of the first test photomasks exposed on the wafer under the initial photolithography conditions, it is determined whether the average depth of focus of the initial photomasks is greater than the depth of focus corresponding to the optimal solution. If not, adjust the optical characteristic parameters corresponding to the initial photolithography conditions, and return to the step of obtaining the wafer data of the selected pixel pattern exposed on the wafer under the initial photolithography conditions.

8. The method for correcting the photomask layout as described in claim 7, characterized in that, The optical characteristic parameters include at least one of vertical aperture, resolution, aberration, polarization, or optical constant.

9. The method for correcting the photomask layout as described in claim 8, characterized in that, Also includes: If the average depth of focus of the initial photomask is greater than the depth of focus corresponding to the optimal solution, and the limit exposure size of the unselected pixel pattern on the wafer is consistent with the limit exposure size of the selected pixel pattern on the wafer, then an optical model of the target photomask is established based on the wafer data of the first test photomask and the second test photomask exposed on the wafer under the initial photolithography conditions.

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