Low-noise reference voltage generation circuit, chip and electronic equipment
By combining negative temperature coefficient circuits and positive temperature coefficient circuits, a difference signal is generated and superimposed. By using power supply circuit mirroring and voltage boosting, the flexibility and reliability issues of reference voltage changes in the prior art are solved, and adaptive adjustment of the reference voltage and noise reduction are achieved.
Patent Information
- Application Number
- CN202511286063.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-09
- Publication Date
- 2025-12-19
AI Technical Summary
Existing low-noise reference voltage generation circuits cannot adaptively change the power supply voltage when the reference voltage required by the user changes, resulting in poor flexibility and reliability, as well as relatively high noise.
The design combines negative temperature coefficient (NTC) and positive temperature coefficient (PTC) circuits. By generating and superimposing a difference signal, the power supply circuit mirrors the current input signal and boosts the preset voltage, outputting an adaptive voltage to adapt to changes in the reference voltage.
It improves the flexibility and reliability of the low-noise reference voltage generation circuit, reduces noise, and ensures that the reference voltage remains stable when the temperature changes.
Smart Images
Figure CN121165879A_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of electronic circuit technology, and in particular relates to a low-noise reference voltage generating circuit, chip and electronic device. Background Technology
[0002] The relevant reference voltage generation circuit includes a negative temperature coefficient voltage generation circuit and a positive temperature coefficient voltage generation circuit. The negative temperature coefficient voltage generation circuit extracts the threshold voltage of the N-type field-effect transistor as the negative temperature coefficient voltage. The positive temperature coefficient voltage generation circuit uses subthreshold field-effect transistors with equal drain-source current but different aspect ratios to generate a positive temperature coefficient voltage, which is then superimposed with the negative temperature coefficient voltage output by the negative temperature coefficient voltage generation circuit to output the reference voltage. Both the negative temperature coefficient voltage generation circuit and the positive temperature coefficient voltage generation circuit are powered by a fixed supply voltage.
[0003] However, when the user's required reference voltage changes, the device parameters in the positive temperature coefficient circuit need to be configured. After configuring the device parameters, using the original fixed supply voltage will prevent the reference voltage generation circuit from functioning. Furthermore, the core device in the relevant reference voltage generation circuit is typically a field-effect transistor (FET), which results in significant noise.
[0004] Therefore, the related low-noise reference voltage generation circuit cannot adaptively change the power supply voltage according to the change of the reference voltage, resulting in poor flexibility and reliability. Summary of the Invention
[0005] The purpose of this application is to provide a low-noise reference voltage generation circuit, chip, and electronic device, which aims to solve the problems of poor flexibility and reliability and high noise in related low-noise reference voltage generation circuits.
[0006] This application provides a low-noise reference voltage generation circuit, including:
[0007] The negative temperature coefficient circuit includes an eleventh transistor, which is used to output a voltage divider signal that is positively correlated with the base-emitter voltage of the eleventh transistor.
[0008] A positive temperature coefficient circuit, including a nineteenth transistor and a twenty-third transistor, is connected to the negative temperature coefficient circuit to generate a difference signal. The circuit then superimposes the voltage divider signal and the difference signal to generate a superimposed signal. Under adaptive voltage power supply, a reference voltage is output based on the superimposed signal. The difference signal is the difference between the base-emitter voltage of the nineteenth transistor and the base-emitter voltage of the twenty-third transistor.
[0009] The power supply circuit includes a first resistor connected to the positive temperature coefficient circuit. It is used to receive a current input signal, mirror the current input signal to obtain a mirror current, and boost the reference voltage by a preset voltage to output the adaptive voltage. The preset voltage is the voltage drop across the first resistor caused by the mirror current.
[0010] In one embodiment, the power supply circuit is specifically configured to mirror the current input signal to obtain the mirrored current and connect it to an internal voltage. In response to the reference voltage being less than the internal voltage, the internal voltage is boosted by the preset voltage to output the adaptive voltage. In response to the reference voltage being greater than or equal to the internal voltage, the reference voltage is boosted by the preset voltage to output the adaptive voltage.
[0011] In one embodiment, the power supply circuit includes a first field-effect transistor, a second field-effect transistor, a third field-effect transistor, a fourth field-effect transistor, a fifth field-effect transistor, a sixth field-effect transistor, a seventh field-effect transistor, a first transistor, a second transistor, a third transistor, a first resistor, and a second resistor;
[0012] The emitter of the third transistor, the source of the third field-effect transistor, and the source of the fourth field-effect transistor are connected and together form the internal voltage input terminal of the power supply circuit, so as to connect to the internal voltage.
[0013] The emitter of the first transistor forms the reference voltage input terminal of the power supply circuit, so as to be connected to the reference voltage;
[0014] The source of the fifth field-effect transistor and the source of the sixth field-effect transistor are connected and together form the power supply voltage input terminal of the power supply circuit to receive the power supply voltage.
[0015] The drain of the third field-effect transistor, the gate of the third field-effect transistor, and the gate of the fourth field-effect transistor are connected and together form the current input signal input terminal of the power supply circuit, so as to receive the current input signal.
[0016] The drain of the fifth field-effect transistor and the first end of the first resistor are connected to form the output terminal of the power supply circuit, which is connected to the positive temperature coefficient circuit and the negative temperature coefficient circuit to output the adaptive voltage.
[0017] The first terminal of the second resistor is connected to the base of the first transistor, the base of the second transistor, the base of the third transistor, the collector of the first transistor, and the collector of the third transistor. The gate of the fifth field-effect transistor is connected to the gate of the sixth field-effect transistor, the drain of the sixth field-effect transistor, and the drain of the seventh field-effect transistor. The gate of the seventh field-effect transistor is connected to the drain of the second field-effect transistor and the drain of the fourth field-effect transistor. The collector of the second transistor is connected to the drain of the first field-effect transistor, the gate of the first field-effect transistor, and the gate of the second field-effect transistor. The source of the first field-effect transistor, the source of the second field-effect transistor, the source of the seventh field-effect transistor, and the second terminal of the second resistor are all connected to the power supply ground.
[0018] In one embodiment, it further includes:
[0019] A bias circuit, connected to the positive temperature coefficient circuit, is used to receive an enable signal and, in response to the enable signal, outputs a bias signal.
[0020] The positive temperature coefficient circuit is specifically used to generate the difference signal in response to the bias signal, and to superimpose the voltage divider signal and the difference signal to generate a superimposed signal, and to output the reference voltage according to the superimposed signal under the power supply of the adaptive voltage.
[0021] In one embodiment, the bias circuit includes a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a first capacitor, a third resistor, a fourth resistor, and a fifth resistor;
[0022] The first end of the fifth resistor constitutes the input terminal of the bias circuit to receive the enable signal.
[0023] The emitter of the seventh transistor, the base of the sixth transistor, and the first end of the fourth resistor are connected and together form the output terminal of the bias circuit, which is connected to the positive temperature coefficient circuit to output the bias signal.
[0024] The first terminal of the first capacitor, the emitter of the fourth transistor, the first terminal of the third resistor, and the collector of the seventh transistor are all connected to the first power supply. The second terminal of the fifth resistor is connected to the second terminal of the first capacitor, the collector of the fourth transistor, and the base of the fifth transistor. The collector of the fifth transistor is connected to the base of the seventh transistor and the collector of the sixth transistor. The emitter of the sixth transistor and the second terminal of the fourth resistor are all connected to the power supply ground.
[0025] In one embodiment, the negative temperature coefficient circuit is specifically used to extract the voltage difference between the adaptive voltage and the base-emitter voltage of the eleventh transistor, divide the voltage difference, and use the divided voltage difference as the voltage divider signal.
[0026] In one embodiment, the negative temperature coefficient circuit includes an eighth field-effect transistor, an eighth transistor, a ninth transistor, a thirteenth transistor, an eleventh transistor, a twelfth transistor, a thirteenth transistor, a sixth resistor, a seventh resistor, an eighth resistor, and a ninth resistor.
[0027] The collector, base, base of the eighth transistor, base of the ninth transistor, and base of the thirteenth transistor are connected and together form the current input signal input terminal of the negative temperature coefficient circuit, so as to receive the current input signal.
[0028] The emitter of the eighth transistor, the emitter of the ninth transistor, the emitter of the thirteenth transistor, the collector of the eleventh transistor, the base of the eleventh transistor, and the first end of the eighth resistor are connected and together form the power supply terminal of the negative temperature coefficient circuit, which is connected to the power supply circuit to access the adaptive voltage.
[0029] The second end of the eighth resistor and the first end of the ninth resistor are connected and together form the output terminal of the negative temperature coefficient circuit to output the voltage divider signal;
[0030] The collector of the ninth transistor is connected to the collector of the twelfth transistor, the base of the twelfth transistor, and the base of the thirteenth transistor. The emitter of the twelfth transistor is connected to the first terminal of the sixth resistor and the drain of the eighth field-effect transistor. The collector of the thirteenth transistor is connected to the collector of the thirteenth transistor and the gate of the eighth field-effect transistor. The emitter of the thirteenth transistor is connected to the first terminal of the seventh resistor. The emitter of the eleventh transistor is connected to the source of the eighth field-effect transistor and the second terminal of the ninth resistor. The second terminals of the sixth resistor and the seventh resistor are both connected to the power supply ground.
[0031] In one embodiment, the positive temperature coefficient circuit is specifically used to generate the difference signal, and to superimpose the voltage divider signal and the difference signal to generate a superimposed signal, and under the power supply of the adaptive voltage, the difference between the adaptive voltage and the voltage of the superimposed signal is used as the reference voltage.
[0032] In one embodiment, the positive temperature coefficient circuit includes a ninth field-effect transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, a seventeenth transistor, an eighteenth transistor, a nineteenth transistor, a twenty-third transistor, a twenty-first transistor, a twenty-second transistor, a tenth resistor, an eleventh resistor, a twelfth resistor, and a thirteenth resistor.
[0033] The gate of the 23rd transistor forms the voltage divider signal input terminal of the positive temperature coefficient circuit and is connected to the negative temperature coefficient circuit to receive the voltage divider signal.
[0034] The bases of the fourteenth transistor, the fifteenth transistor, the sixteenth transistor, and the twenty-second transistor are connected and together form the bias signal input terminal of the positive temperature coefficient circuit, which is connected to the bias circuit to receive the bias signal.
[0035] The first end of the tenth resistor, the first end of the eleventh resistor, the first end of the twelfth resistor, and the emitter of the twenty-first transistor are connected and together form the power supply terminal of the positive temperature coefficient circuit, which is connected to the power supply circuit to access the adaptive voltage.
[0036] The drain of the ninth field-effect transistor and the first end of the thirteenth resistor are connected and together form the output terminal of the positive temperature coefficient circuit, which is connected to the power supply circuit to output the reference voltage.
[0037] The second end of the tenth resistor is connected to the collector of the nineteenth transistor and the emitter of the seventeenth transistor. The second end of the eleventh resistor is connected to the collector of the twenty-third transistor and the emitter of the eighteenth transistor. The collector of the seventeenth transistor is connected to the collector of the fourteenth transistor, the base of the seventeenth transistor, and the base of the eighteenth transistor. The emitter of the nineteenth transistor is connected to the emitter of the twenty-third transistor and the collector of the fifteenth transistor. The collector of the eighteenth transistor... The electrode is connected to the collector of the sixteenth transistor and the base of the twenty-first transistor. The collector of the twenty-first transistor is connected to the gate of the ninth field-effect transistor and the collector of the twenty-second transistor. The source of the ninth field-effect transistor is connected to the second terminal of the twelfth resistor and the base of the nineteenth transistor. The second terminal of the thirteenth resistor, the emitter of the fourteenth transistor, the emitter of the fifteenth transistor, the emitter of the sixteenth transistor, and the emitter of the twenty-second transistor are all connected to the power supply ground.
[0038] This invention also provides a chip, which includes the low-noise reference voltage generating circuit described above.
[0039] This invention also provides an electronic device, which includes the low-noise reference voltage generating circuit described above.
[0040] The beneficial effects of this invention compared to the prior art are as follows: The power supply circuit mirrors the current input signal to obtain a mirrored current and boosts the reference voltage by a preset voltage to output an adaptive voltage; the preset voltage is the voltage drop across the first resistor from the mirrored current; the positive temperature coefficient circuit generates a difference signal and superimposes the voltage divider signal and the difference signal to generate a superimposed signal; under the power supply of the adaptive voltage, the reference voltage is output based on the superimposed signal; the difference signal is the difference between the base-emitter voltage of the second transistor and the base-emitter voltage of the third transistor; therefore, the power supply circuit outputs an adaptive voltage based on the reference voltage, so that when the user's required reference voltage changes, the device parameters in the positive temperature coefficient circuit can be configured as needed. After configuring the device parameters, the power supply voltage (adaptive voltage) of the positive temperature coefficient circuit follows the change of the reference voltage, reducing the possibility that the low-noise reference voltage generation circuit will not work and improving the flexibility and reliability of the low-noise reference voltage generation circuit; at the same time, the core devices of both the positive and negative temperature coefficient circuits are transistors, reducing the noise of the low-noise reference voltage generation circuit. Attached Figure Description
[0041] To more clearly illustrate the technical inventions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0042] Figure 1 A schematic diagram of a low-noise reference voltage generation circuit provided in an embodiment of this application;
[0043] Figure 2 This is a schematic diagram of another structure of a low-noise reference voltage generation circuit provided in an embodiment of this application;
[0044] Figure 3 This is a partial example circuit schematic of a low-noise reference voltage generation circuit provided in an embodiment of this application. Detailed Implementation
[0045] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.
[0046] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.
[0047] It should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.
[0048] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.
[0049] Figure 1 A schematic diagram of a low-noise reference voltage generating circuit according to a preferred embodiment of this application is shown. For ease of explanation, only the parts relevant to this embodiment are shown, and are described in detail below:
[0050] The aforementioned low-noise reference voltage generation circuit includes a negative temperature coefficient circuit 10, a positive temperature coefficient circuit 20, and a power supply circuit 30.
[0051] The negative temperature coefficient circuit 10 includes an eleventh transistor for outputting a voltage divider signal that is positively correlated with the base-emitter voltage of the eleventh transistor.
[0052] The positive temperature coefficient circuit 20 includes a nineteenth transistor and a twenty-third transistor with common emitter connections. It is connected to the negative temperature coefficient circuit 10 to generate a difference signal. The voltage divider signal and the difference signal are superimposed to generate a superimposed signal. Under the power supply of the adaptive voltage, a reference voltage is output according to the superimposed signal. The difference signal is the difference between the base-emitter voltage of the nineteenth transistor and the base-emitter voltage of the twenty-third transistor.
[0053] The power supply circuit 30 includes a first resistor connected to the positive temperature coefficient circuit 20. It is used to receive a current input signal, mirror the current input signal to obtain a mirror current, and boost the reference voltage by a preset voltage to output an adaptive voltage. The preset voltage is the voltage drop across the mirror current in the first resistor.
[0054] In one embodiment, the negative temperature coefficient circuit 10 is specifically used to extract the voltage difference between the adaptive voltage and the base-emitter voltage of the eleventh transistor, divide the voltage difference, and use the divided voltage difference as the voltage divider signal.
[0055] It is understandable that, since the base-emitter voltage of the eleventh transistor is negatively correlated with temperature, and the difference between the adaptive voltage and the base-emitter voltage of the eleventh transistor is extracted and the voltage difference after voltage division is used as the voltage division signal, the voltage difference after voltage division is negatively correlated with temperature.
[0056] In one embodiment, the positive temperature coefficient circuit 20 is specifically used to generate a difference signal and superimpose the voltage divider signal and the difference signal to generate a superimposed signal, and under the power supply of the adaptive voltage, the difference between the voltage of the adaptive voltage and the voltage of the superimposed signal is used as a reference voltage.
[0057] It can be understood that the difference signal is the difference ΔV between the base-emitter voltage of the nineteenth transistor and the base-emitter voltage of the twenty-third transistor. BE Due to the difference in base-emitter voltage ΔV BE The voltage difference after voltage division is positively correlated with temperature. Since the voltage difference after voltage division and the difference signal are superimposed to generate a superimposed signal, and the reference voltage is output according to the voltage of the superimposed signal, the superimposed signal does not change with temperature, thus the reference voltage achieves zero temperature drift.
[0058] The power supply circuit 30 is specifically used to mirror the current input signal to obtain a mirrored current and connect it to the internal voltage. In response to the reference voltage being less than the internal voltage, the internal voltage is boosted by a preset voltage to output an adaptive voltage. In response to the reference voltage being greater than or equal to the internal voltage, the reference voltage is boosted by a preset voltage to output an adaptive voltage.
[0059] Understandably, if the reference voltage is lower than the internal voltage, and the reference voltage is still boosted by a preset voltage to output an adaptive voltage, the adaptive voltage will be too small, causing the positive temperature coefficient circuit 20 to fail to work. Therefore, when the reference voltage is lower than the internal voltage, the internal voltage is boosted by a preset voltage to output an adaptive voltage, thereby reducing the possibility that the low-noise reference voltage generation circuit will fail to work and improving the reliability of the low-noise reference voltage generation circuit.
[0060] like Figure 2 As shown, the low-noise reference voltage generation circuit also includes a bias circuit 40.
[0061] The bias circuit 40 is connected to the positive temperature coefficient circuit 20, and is used to receive the enable signal and output the bias signal in response to the enable signal.
[0062] The positive temperature coefficient circuit 20 is specifically used to generate a difference signal in response to the bias signal, and to superimpose the voltage divider signal and the difference signal to generate a superimposed signal. Under the power supply of the adaptive voltage, the reference voltage is output according to the superimposed signal.
[0063] Through the above technical solution, when an enable signal is input, a bias signal is output to enable the positive temperature coefficient circuit 20 to work normally, thereby realizing the on and off control of the low noise reference voltage generation circuit.
[0064] Figure 3 The illustration shows a partial example circuit structure of a low-noise reference voltage generation circuit provided in an embodiment of the present invention. For ease of explanation, only the parts relevant to the embodiment of the present invention are shown, and are described in detail below:
[0065] The power supply circuit 30 includes a first field-effect transistor M1, a second field-effect transistor M2, a third field-effect transistor M3, a fourth field-effect transistor M4, a fifth field-effect transistor M5, a sixth field-effect transistor M6, a seventh field-effect transistor M7, a first transistor Q1, a second transistor Q2, a third transistor Q3, a first resistor R1, and a second resistor R2.
[0066] The emitter of the third transistor Q3, the source of the third field-effect transistor M3, and the source of the fourth field-effect transistor M4 are connected and together form the internal voltage input terminal of the power supply circuit 30, to be connected to the internal voltage VAA; the emitter of the first transistor Q1 forms the reference voltage input terminal of the power supply circuit 30, to be connected to the reference voltage V0; the source of the fifth field-effect transistor M5 and the source of the sixth field-effect transistor M6 are connected and together form the supply voltage input terminal of the power supply circuit 30, to be connected to the supply voltage VIN; the drain of the third field-effect transistor M3, the gate of the third field-effect transistor M3, and the gate of the fourth field-effect transistor M4 are connected and together form the current input signal input terminal of the power supply circuit 30, to be connected to the current input signal Iin; the drain of the fifth field-effect transistor M5 and the first end of the first resistor R1 are connected and together form the output terminal of the power supply circuit 30, which is connected to the positive temperature coefficient circuit 20. It is connected to the negative temperature coefficient circuit 10 to output an adaptive voltage V1; the first end of the second resistor R2 is connected to the base of the first transistor Q1, the base of the second transistor Q2, the base of the third transistor Q3, the collector of the first transistor Q1, and the collector of the third transistor Q3; the gate of the fifth field-effect transistor M5 is connected to the gate of the sixth field-effect transistor M6, the drain of the sixth field-effect transistor M6, and the drain of the seventh field-effect transistor M7; the gate of the seventh field-effect transistor M7 is connected to the drain of the second field-effect transistor M2 and the drain of the fourth field-effect transistor M4; the collector of the second transistor Q2 is connected to the drain of the first field-effect transistor M1, the gate of the first field-effect transistor M1, and the gate of the second field-effect transistor M2; the source of the first field-effect transistor M1, the source of the second field-effect transistor M2, the source of the seventh field-effect transistor M7, and the second end of the second resistor R2 are all connected to the power supply ground.
[0067] The bias circuit 40 includes a fourth transistor Q4, a fifth transistor Q5, a sixth transistor Q6, a seventh transistor Q7, a first capacitor C1, a third resistor R3, a fourth resistor R4, and a fifth resistor R5.
[0068] The first end of the fifth resistor R5 forms the input terminal of the bias circuit 40 to receive the enable signal EN; the emitter of the seventh transistor Q7, the base of the sixth transistor Q6, and the first end of the fourth resistor R4 are connected and together form the output terminal of the bias circuit 40, which is connected to the positive temperature coefficient circuit 20 to output the bias signal Vbias; the first end of the first capacitor C1, the emitter of the fourth transistor Q4, the first end of the third resistor R3, and the collector of the seventh transistor Q7 are all connected to the first power supply VDD; the second end of the fifth resistor R5 is connected to the second end of the first capacitor C1, the collector of the fourth transistor Q4, and the base of the fifth transistor Q5; the collector of the fifth transistor Q5 is connected to the base of the seventh transistor Q7 and the collector of the sixth transistor Q6; and the emitter of the sixth transistor Q6 and the second end of the fourth resistor R4 are all connected to the power supply ground.
[0069] The negative temperature coefficient circuit 10 includes an eighth field-effect transistor M8, an eighth transistor Q8, a ninth transistor Q9, a thirteenth transistor Q10, an eleventh transistor Q11, a twelfth transistor Q12, a thirteenth transistor Q13, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, and a ninth resistor R9.
[0070] The collector, base, base of transistor Q8, base of transistor Q9, and base of transistor Q10 are connected and together form the current input signal input terminal of the negative temperature coefficient circuit 10, for receiving a current input signal; the emitters of transistors Q8, Q9, and Q10, the collector and base of transistor Q11, and the first terminal of resistor R8 are connected and together form the power supply terminal of the negative temperature coefficient circuit 10, which is connected to the power supply circuit 30 to receive the adaptive voltage V1; the second terminal of resistor R8 and the first terminal of resistor R9 are connected and together form the input terminal of the negative temperature coefficient circuit 10. The output terminal is used to output a voltage divider signal; the collector of the ninth transistor Q9 is connected to the collector of the twelfth transistor Q12, the base of the twelfth transistor Q12, and the base of the thirteenth transistor Q13; the emitter of the twelfth transistor Q12 is connected to the first terminal of the sixth resistor R6 and the drain of the eighth field-effect transistor; the collector of the thirteenth transistor Q10 is connected to the collector of the thirteenth transistor Q13 and the gate of the eighth field-effect transistor M8; the emitter of the thirteenth transistor Q13 is connected to the first terminal of the seventh resistor R7; the emitter of the eleventh transistor Q11 is connected to the source of the eighth field-effect transistor M8 and the second terminal of the ninth resistor R9; the second terminals of the sixth resistor R6 and the second terminals of the seventh resistor R7 are connected to the power supply ground.
[0071] The positive temperature coefficient circuit 20 includes the ninth field-effect transistor M9, the fourteenth transistor Q14, the fifteenth transistor Q15, the sixteenth transistor Q16, the seventeenth transistor Q17, the eighteenth transistor Q18, the nineteenth transistor Q19, the twenty-third transistor Q20, the twenty-first transistor Q21, the twenty-second transistor Q22, the tenth resistor R10, the eleventh resistor R11, the twelfth resistor R12, and the thirteenth resistor R13;
[0072] The gate of the 23rd transistor Q20 forms the voltage divider signal input terminal of the positive temperature coefficient circuit 20, and is connected to the negative temperature coefficient circuit 10 to receive the voltage divider signal; the bases of the 14th transistor Q14, the 15th transistor Q15, the 16th transistor Q16, and the 22nd transistor Q22 are connected and together form the bias signal input terminal of the positive temperature coefficient circuit 20, and are connected to the bias circuit 40 to receive the bias signal Vbias; the first terminal of the 10th resistor R10 and the first terminal of the 11th resistor R11... One end of the 12th resistor R12 and the first end of the 21st transistor Q21 are connected together to form the power supply terminal of the positive temperature coefficient circuit 20, which is connected to the power supply circuit 30 to receive the adaptive voltage V1; the drain of the 9th field-effect transistor M9 and the first end of the 13th resistor R13 are connected together to form the output terminal of the positive temperature coefficient circuit 20, which is connected to the power supply circuit 30 to output the reference voltage V0; the second end of the 10th resistor R10 is connected to the collector of the 19th transistor Q19 and the emitter of the 17th transistor Q17. The terminals of transistors are connected as follows: the second terminal of the eleventh resistor R11 is connected to the collector of the twenty-third transistor Q20 and the emitter of the eighteenth transistor Q18; the collector of the seventeenth transistor Q17 is connected to the collector of the fourteenth transistor Q14, the base of the seventeenth transistor Q17, and the base of the eighteenth transistor Q18; the emitter of the nineteenth transistor Q19 is connected to the emitter of the twenty-third transistor Q20 and the collector of the fifteenth transistor Q15; and the collector of the eighteenth transistor Q18 is connected to the collector of the sixteenth transistor Q16. The base of transistor Q21 is connected to the gate of transistor M9 and the collector of transistor Q22. The source of transistor M9 is connected to the second terminal of resistor R12 and the base of transistor Q19. The second terminal of resistor R13, the emitter of transistor Q14, the emitter of transistor Q15, the emitter of transistor Q16, and the emitter of transistor Q22 are all connected to the power supply ground.
[0073] The following is based on the working principle. Figure 3 Further explanation is provided below:
[0074] In the negative temperature coefficient circuit 10, transistors Q9 and Q10 mirror the input current signal flowing through transistor Q8, and the collector of transistor Q13 outputs a voltage signal that controls the conduction of transistor M8, thereby turning on transistor 11. When the current flowing through resistor R6 increases, the drain voltage of transistor M8 increases, the gate voltage of transistor M8 decreases, the collector voltage of transistor Q13 decreases, and the current flowing through transistors Q10 and Q13 decreases. Due to the mirroring effect between the current flowing through transistor Q13 and the current flowing through transistor Q12, the current flowing through transistor Q12 (i.e., the current flowing through resistor R6) decreases, thus forming negative feedback to improve the stability of the negative temperature coefficient circuit 10. It can be deduced that the voltage between the emitter and collector of the eleventh transistor Q11 is the base-emitter voltage VBE of the eleventh transistor Q11. Therefore, the eighth resistor R8 and the ninth resistor R9 divide the base-emitter voltage of the eleventh transistor Q11 to obtain the voltage drop across the eighth resistor R8, and use this voltage drop as the voltage divider signal. It is worth emphasizing that the base-emitter voltage VBE of the transistor is negatively correlated with temperature, and the voltage temperature coefficient is about -2mV / ℃. Therefore, the voltage divider signal is negatively correlated with temperature.
[0075] In the positive temperature coefficient circuit 20, transistors Q14 (fourteenth), Q16 (sixteenth), Q17 (seventeenth), and Q18 (eighteenth) form the first operational amplifier, while transistors Q15 (fifteenth), Q19 (nineteenth), and Q20 (twenty-third) form the second operational amplifier. The output of the first operational amplifier sends a control signal to the base of transistor Q21 to control transistor Q21, which in turn controls the ninth field-effect transistor M9, thereby outputting a reference voltage. When the reference voltage increases, the source voltage of the ninth field-effect transistor M9 increases, the base voltage of the nineteenth transistor Q19 increases, the current flowing through the tenth resistor R10 increases, and the emitter voltage of the seventeenth transistor Q17 decreases. The control signal increases, thus reducing the conduction of transistors Q21 and M9, decreasing the current flowing through the thirteenth resistor R13, and decreasing the reference voltage, forming a negative feedback loop to improve the stability of the positive temperature coefficient circuit 20. It can be concluded that the base of the 23rd transistor Q20 is connected to the voltage divider signal, and the emitter of the 23rd transistor Q20 and the emitter of the 19th transistor Q19 are connected together. The difference signal is the difference between the base-emitter voltage of the 19th transistor and the base-emitter voltage of the 23rd transistor. The base voltage of the 19th transistor (i.e., the voltage at the second end of the 12th resistor R12) is the superimposed signal generated by superimposing the voltage divider signal and the difference signal. It can be seen that since the voltage divider signal is negatively correlated with temperature and the difference signal is positively correlated with temperature, the superimposed signal does not change with temperature. Therefore, the reference voltage achieves zero temperature drift.
[0076] In the power supply circuit 30, the third field-effect transistor M3 and the fourth field-effect transistor M4 form the first current mirror, the first field-effect transistor M1 and the second field-effect transistor M2 form the second current mirror, the fifth field-effect transistor M5 and the sixth field-effect transistor M6 form the third current mirror, and the first transistor Q1 to the third transistor Q3 form the third operational amplifier. When the adaptive voltage V1 increases, the current flowing through the first field-effect transistor M1 increases. Due to the mirroring effect of the second current mirror, the current flowing through the second field-effect transistor M2 increases, the gate voltage of the seventh field-effect transistor M7 decreases, and the current flowing through the sixth field-effect transistor M6 decreases. Due to the mirroring effect of the third current mirror, the current flowing through the fifth field-effect transistor M5 decreases, thereby reducing the voltage drop across the first resistor R1, decreasing the adaptive voltage, forming negative feedback, and improving the stability of the power supply circuit 30. It should be noted that, due to the virtual short effect of the operational amplifier, the emitter voltage of the second transistor Q2 is the larger of the reference voltage and the internal voltage (i.e., the first voltage). The adaptive voltage V1 is the sum of this first voltage and the voltage drop across the first resistor R1. When the reference voltage required by the user changes, by configuring the device parameters in the positive temperature coefficient circuit 20 as needed (e.g., the resistance value of the thirteenth resistor R13), the power supply voltage (adaptive voltage) of the positive temperature coefficient circuit 20 follows the reference voltage V0 after the device parameters are configured. This reduces the possibility that the low-noise reference voltage generation circuit will not work and improves the flexibility and reliability of the low-noise reference voltage generation circuit.
[0077] It is important to emphasize that the voltage drop across the first resistor R1 must be greater than the sum of the voltage drop across the twelfth resistor R12 and the collector-emitter voltage of the ninth field-effect transistor M9.
[0078] This invention also provides a chip, which includes the low-noise reference voltage generating circuit described above.
[0079] This invention also provides an electronic device, which includes the low-noise reference voltage generating circuit described above.
[0080] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.
[0081] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.
Claims
1. A low noise reference voltage generating circuit, characterized by comprising: include: The negative temperature coefficient circuit includes an eleventh transistor, which is used to output a voltage divider signal that is positively correlated with the base-emitter voltage of the eleventh transistor. A positive temperature coefficient circuit, including a nineteenth transistor and a twenty-third transistor, is connected to the negative temperature coefficient circuit to generate a difference signal. The circuit then superimposes the voltage divider signal and the difference signal to generate a superimposed signal. Under adaptive voltage power supply, a reference voltage is output based on the superimposed signal. The difference signal is the difference between the base-emitter voltage of the nineteenth transistor and the base-emitter voltage of the twenty-third transistor. The power supply circuit includes a first resistor connected to the positive temperature coefficient circuit, used to receive a current input signal, mirror the current input signal to obtain a mirror current, and boost the reference voltage by a preset voltage to output the adaptive voltage. The preset voltage is the voltage drop across the first resistor caused by the mirror current.
2. The low noise reference voltage generating circuit of claim 1, wherein, The power supply circuit is specifically used to mirror the current input signal to obtain the mirrored current, and connect it to the internal voltage. In response to the reference voltage being less than the internal voltage, the internal voltage is boosted by the preset voltage to output the adaptive voltage. In response to the reference voltage being greater than or equal to the internal voltage, the reference voltage is boosted by the preset voltage to output the adaptive voltage.
3. The low noise reference voltage generating circuit of claim 2, wherein, The power supply circuit includes a first field-effect transistor, a second field-effect transistor, a third field-effect transistor, a fourth field-effect transistor, a fifth field-effect transistor, a sixth field-effect transistor, a seventh field-effect transistor, a first transistor, a second transistor, a third transistor, a first resistor, and a second resistor; The emitter of the third transistor, the source of the third field-effect transistor, and the source of the fourth field-effect transistor are connected and together form the internal voltage input terminal of the power supply circuit, so as to connect to the internal voltage. The emitter of the first transistor forms the reference voltage input terminal of the power supply circuit, so as to be connected to the reference voltage; The source of the fifth field-effect transistor and the source of the sixth field-effect transistor are connected and together form the power supply voltage input terminal of the power supply circuit to receive the power supply voltage. The drain of the third field-effect transistor, the gate of the third field-effect transistor, and the gate of the fourth field-effect transistor are connected and together form the current input signal input terminal of the power supply circuit, so as to receive the current input signal. The drain of the fifth field-effect transistor and the first end of the first resistor are connected to form the output terminal of the power supply circuit, which is connected to the positive temperature coefficient circuit and the negative temperature coefficient circuit to output the adaptive voltage. The first end of the second resistor is connected with the base of the first transistor, the base of the second transistor, the base of the third transistor, the collector of the first transistor and the collector of the third transistor, the gate of the fifth field effect transistor is connected with the gate of the sixth field effect transistor, the drain of the sixth field effect transistor and the drain of the seventh field effect transistor, the gate of the seventh field effect transistor is connected with the drain of the second field effect transistor and the drain of the fourth field effect transistor, the collector of the second transistor is connected with the drain of the first field effect transistor, the gate of the first field effect transistor and the gate of the second field effect transistor, the source of the first field effect transistor, the source of the second field effect transistor, the source of the seventh field effect transistor and the second end of the second resistor are commonly connected to a power supply ground.
4. The low noise reference voltage generating circuit of claim 1, wherein, Further comprising: a bias circuit connected with the positive temperature coefficient circuit, used for accessing an enable signal and outputting a bias signal in response to the enable signal; The positive temperature coefficient circuit is specifically used for generating the difference signal in response to the bias signal, superimposing the divided voltage signal and the difference signal to generate a superimposed signal, and outputting the reference voltage according to the superimposed signal under the power supply of the adaptive voltage.
5. The low noise reference voltage generating circuit of claim 4, wherein, The bias circuit comprises a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a first capacitor, a third resistor, a fourth resistor and a fifth resistor; The first end of the fifth resistor constitutes an input end of the bias circuit to access the enable signal; The emitter of the seventh transistor, the base of the sixth transistor and the first end of the fourth resistor are connected and commonly constitute an output end of the bias circuit connected with the positive temperature coefficient circuit to output the bias signal; The first end of the first capacitor, the emitter of the fourth transistor, the first end of the third resistor and the collector of the seventh transistor are commonly connected to a first power supply, the second end of the fifth resistor is connected with the second end of the first capacitor, the collector of the fourth transistor and the base of the fifth transistor, the collector of the fifth transistor is connected with the base of the seventh transistor and the collector of the sixth transistor, the emitter of the sixth transistor and the second end of the fourth resistor are commonly connected to a power supply ground.
6. The low noise reference voltage generating circuit of claim 1, wherein, The negative temperature coefficient circuit is specifically used for extracting a difference voltage between the adaptive voltage and the base-emitter voltage of the eleventh transistor, and dividing the difference voltage to obtain a divided voltage signal.
7. The low noise reference voltage generating circuit of claim 6, wherein, The negative temperature coefficient circuit comprises an eighth field effect transistor, an eighth transistor, a ninth transistor, a thirteenth transistor, an eleventh transistor, a twelfth transistor, a tenth transistor, a sixth resistor, a seventh resistor, an eighth resistor and a ninth resistor; The collector of the eighth transistor, the base of the eighth transistor, the base of the ninth transistor and the base of the thirteenth transistor are connected and commonly constitute a current input signal input end of the negative temperature coefficient circuit to access the current input signal; The emitter of the eighth transistor, the emitter of the ninth transistor and the emitter of the thirteenth transistor, the collector of the eleventh transistor, the base of the eleventh transistor and the first end of the eighth resistor are connected and jointly constitute a power end of the negative temperature coefficient circuit, connected with the power supply circuit to access the adaptive voltage; The second end of the eighth resistor and the first end of the ninth resistor are connected and jointly constitute an output end of the negative temperature coefficient circuit to output the divided voltage signal; The collector of the ninth transistor is connected with the collector of the twelfth transistor, the base of the twelfth transistor and the base of the tenth transistor, the emitter of the twelfth transistor is connected with the first end of the sixth resistor and the drain of the eighth field effect transistor, the collector of the thirteenth transistor is connected with the collector of the tenth transistor and the gate of the eighth field effect transistor, the emitter of the tenth transistor is connected with the first end of the seventh resistor, the emitter of the eleventh transistor is connected with the source of the eighth field effect transistor and the second end of the ninth resistor, and the second end of the sixth resistor and the second end of the seventh resistor are commonly connected to a power supply ground.
8. The low noise reference voltage generating circuit of claim 1, wherein, The positive temperature coefficient circuit is specifically used for generating the difference signal, superimposing the divided voltage signal and the difference signal to generate a superimposed signal, and taking the difference between the adaptive voltage and the voltage of the superimposed signal as the reference voltage under the power supply of the adaptive voltage.
9. The low noise reference voltage generating circuit of claim 8, wherein, The positive temperature coefficient circuit comprises a ninth field effect transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, a seventeenth transistor, an eighteenth transistor, a nineteenth transistor, a twenty-third transistor, a twenty-first transistor, a twenty-second transistor, a tenth resistor, an eleventh resistor, a twelfth resistor and a thirteenth resistor; The gate of the twenty-third transistor constitutes a divided voltage signal input end of the positive temperature coefficient circuit, connected with the negative temperature coefficient circuit to access the divided voltage signal; The base of the fourteenth transistor, the base of the fifteenth transistor, the base of the sixteenth transistor and the base of the twenty-second transistor are connected and jointly constitute a bias signal input end of the positive temperature coefficient circuit, connected with a bias circuit to access a bias signal; The first end of the tenth resistor, the first end of the eleventh resistor, the first end of the twelfth resistor and the emitter of the twenty-first transistor are connected and jointly constitute a power end of the positive temperature coefficient circuit, connected with the power supply circuit to access the adaptive voltage; The drain of the ninth field effect transistor and the first end of the thirteenth resistor are connected and jointly constitute an output end of the positive temperature coefficient circuit, connected with the power supply circuit to output the reference voltage; The second end of the tenth resistor is connected with the collector of the nineteenth transistor and the emitter of the seventeenth transistor, the second end of the eleventh resistor is connected with the collector of the twenty-third transistor and the emitter of the eighteenth transistor, the collector of the seventeenth transistor is connected with the collector of the fourteenth transistor, the base of the seventeenth transistor and the base of the eighteenth transistor, the emitter of the nineteenth transistor is connected with the emitter of the twenty-third transistor and the collector of the fifteenth transistor, the collector of the eighteenth transistor is connected with the collector of the sixteenth transistor and the base of the twenty-first transistor, the collector of the twenty-first transistor is connected with the gate of the ninth field effect transistor and the collector of the twenty-second transistor, the source of the ninth field effect transistor is connected with the second end of the twelfth resistor and the base of the nineteenth transistor, the second end of the thirteenth resistor, the emitter of the fourteenth transistor, the emitter of the fifteenth transistor, the emitter of the sixteenth transistor and the emitter of the twenty-second transistor are commonly connected with the power ground.
10. A chip, characterized by The chip comprises the low-noise reference voltage generating circuit according to any one of claims 1 to 9.
11. An electronic device, comprising: The electronic device comprises the low-noise reference voltage generating circuit according to any one of claims 1 to 9.