Planar vector spine special shape correction method and system and storage medium
By constructing new subtractive patches and fusing adjacent patches, the improved planar vector spike irregularity correction method solves the data error and gap problems caused by the reduction of patch area in the prior art, and achieves a more ideal data correction effect.
Patent Information
- Application Number
- CN202511315260.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-15
- Publication Date
- 2025-12-19
AI Technical Summary
Existing technologies, when correcting planar vector spikes and irregular shapes, suffer from problems such as reduced area of individual patches leading to increased overall data error and gaps in continuous data.
An improved planar vector spike irregularity correction method is adopted, which includes conventional methods to correct spike irregularities, extract subtractive patches, extend common edges, construct new subtractive patches, and fuse adjacent patches based on the longest common edge principle. The threshold condition is reached through iterative checks.
It effectively eliminates gaps in the overall continuous data, avoids the increase in overall data error caused by the reduction of the area of a single patch, obtains more ideal correction results, and reduces data complexity.
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Figure CN121169760A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of computer graphics and geographic information system, and particularly relates to a planar vector sharp abnormal shape correction method and system and a storage medium. BACKGROUND
[0002] In GIS graphic data, the planar vector sharp abnormal shape is a sharp protrusion of a local planar patch, and the essence is that the polygon corner is too small, which belongs to a common geometric anomaly and quality defect of planar vector data. Most of the planar vector sharp abnormal shapes are caused by superposition of data from different sources or different time phases, conversion of data of different scales, and a small number of them are caused by data collection errors. The planar vector sharp abnormal shape not only affects the drawing beauty, but also unnecessarily increases the data complexity and reduces the data stability, thereby leading to low efficiency or even failure and collapse of high-order applications such as morphological analysis, network analysis, and path planning of vector data. Therefore, it is necessary to perform correction on the planar vector sharp abnormal shape.
[0003] The conventional method for correcting the planar vector sharp abnormal shape is to remove the sharp point by using a Douglas-Peucker graphic generalization smoothing algorithm. After the removal, a small amount of graphic atrophy is formed in the individual patch with the sharp abnormal shape, and the area of the patch is reduced and the individual patch is hollow. This method has two deficiencies: 1. The area reduction of a single patch leads to an increase in overall data error With the increase in data volume, the area reduction error of a single patch may accumulate to a degree that cannot be ignored in the overall data area error; 2. There are gaps in the overall continuous data For continuous and complete coverage of planar vector data such as land use status, the graphic atrophy of the individual patch will cause the gap phenomenon of the overall data.
[0004] The improved method of the present application can effectively compensate for the deficiencies of the conventional method and achieve more ideal planar vector sharp abnormal shape correction results. SUMMARY
[0005] The present application aims to provide a planar vector sharp abnormal shape correction method, system and storage medium, which can solve the problems of area reduction of a single patch leading to an increase in overall data error and gaps in the overall continuous data.
[0006] To achieve the above-mentioned purpose, a planar vector sharp abnormal shape correction method is provided, which comprises: S1. Correcting the sharp abnormal shape by a conventional method The original patch is corrected for sharp abnormal shape by using a conventional method to obtain a difference patch with atrophy; S2. Extracting the reduced patch Superimpose the original polygon and the difference polygon to partially erase the difference polygon, and obtain a reduced polygon of the cusp-shaped part; S3, extracting a common edge line extension of the difference polygon Extracting a common edge line of the difference polygon, extending the common edge line, cutting the extended line of the common edge line with the reduced polygon, and retaining the extended line part of the reduced polygon as an edge line extension; S4, constructing a new reduced polygon Extracting an edge line of the reduced polygon, superimposing the edge line and the edge line extension to enclose a surface, and forming a new reduced polygon; S5, merging the new reduced polygon Based on the longest common edge line principle, taking the new reduced polygon as an operation object, merging it into adjacent polygons to form a modified result; S6, checking iteration Checking whether the modified result reaches a threshold condition; if yes, stopping the modification; if no, cyclically executing S1-S5 until the modified result reaches the threshold condition.
[0007] According to the planar vector cusp-shaped anomaly correction method, the conventional method includes at least one of Douglas-Peucker, Visvalingam-Whyatt, and Zhou-Jones.
[0008] According to the planar vector cusp-shaped anomaly correction method, in each cycle of S1-S5, the same conventional method is used in S1.
[0009] According to the planar vector cusp-shaped anomaly correction method, in S3, extracting the common edge line of the difference polygon includes: extracting adjacent polygons connected with the difference polygon except the reduced polygon; and extracting a boundary line overlapping the reduced polygon and the adjacent polygons as the common edge line of the difference polygon.
[0010] According to the planar vector cusp-shaped anomaly correction method, in S6, the threshold condition includes: an edge line corner of a polygon is greater than 5 degrees.
[0011] According to the planar vector cusp-shaped anomaly correction method, in S5, based on the longest common edge line principle, taking the new reduced polygon as an operation object, and merging it into adjacent polygons include: S51, extracting a common edge line of the new reduced polygon; S52, measuring lengths of each common edge line of the new reduced polygon, extracting a common edge line with the maximum length of the new reduced polygon as a fusion line; S53, finding adjacent polygons with the fusion line as an edge line, extracting an adjacent polygon with the maximum length of the fusion line as a target polygon, and merging the reduced polygon into the target polygon.
[0012] The system is characterized in that it comprises a processor and a memory, the memory stores a plurality of instructions; the processor loads the instructions from the memory to execute the planar vector sharp anomaly correction method.
[0013] A computer readable storage medium having a computer program stored thereon, the computer program being executed by a processor to implement the steps of the planar vector sharp anomaly correction method.
[0014] Beneficial effects: Through the above scheme, the conventional planar vector sharp anomaly correction method is improved to construct new difference graph patches and merge new difference graph patches, which can eliminate the graph patch gaps in the overall continuous data, thereby avoiding the situation that the overall data error increases and the overall continuous data has gaps due to the reduction of the area of a single graph patch, and making up the area error and graph patch gap defects of the conventional planar vector sharp anomaly correction method, and achieving more ideal planar vector sharp anomaly correction results.
[0015] Additional aspects and advantages of the application will be described in part below, will become apparent from the following description, or will be learned by practice of the application. BRIEF DESCRIPTION OF DRAWINGS
[0016] The application will be further described below in combination with the drawings and examples: Figure 1 The figure is a schematic diagram of the planar vector sharp anomaly correction method of the application; Figure 2 The figure is a schematic diagram of the original graph patch with a sharp anomaly; Figure 3 The figure is a schematic diagram of the correction result of the conventional method; Figure 4 The figure is a schematic diagram of the difference graph patch and the new difference graph patch; Figure 5 The figure is a schematic diagram of the correction result of the improved method of the application.
[0017] Figure 4 In the figure, the green color is the common edge line of the difference graph patch, and the red color is the edge line extension section. DETAILED DESCRIPTION
[0018] This part will describe the specific embodiments of the application in detail, the preferred embodiments of the application are shown in the drawings, the role of the drawings is to supplement the description of the text part with figures, so that people can intuitively and visually understand each technical feature and the overall technical scheme of the application, but it cannot be understood as a limitation on the protection scope of the application.
[0019] Reference Figures 1-5 The planar vector sharp anomaly correction method of the embodiment of the application comprises the following steps: S1, Correcting the cusp anomaly by a conventional method The original polygon (i.e., the "difference polygon") is corrected for the cusp anomaly by a conventional method to obtain a difference polygon that has shrunk (a non-ideal result of the cusp anomaly correction); S2, Difference polygon The original polygon and the difference polygon are superimposed and partially erased to obtain a difference polygon of the cusp anomaly part; S3, Extracting an extended segment of a common edge of the difference polygon The common edge of the difference polygon is extracted, the common edge is extended, the extended line of the common edge is cut by the difference polygon, and the extended line part located in the difference polygon is retained and recorded as an extended segment of the common edge; S4, Constructing a new difference polygon The edge of the difference polygon is extracted, and a new difference polygon is formed by superimposing and enclosing the surface with the edge of the difference polygon and the extended segment of the common edge; S5, Merging the new difference polygon Based on the longest common edge principle, the new difference polygon is merged into adjacent polygons to form a correction result; S6, Checking iteration The correction result is checked to see if it meets the threshold condition; if so, the correction is stopped; if not, S1-S5 are executed in a loop until the correction result meets the threshold condition.
[0020] In S1, the conventional method includes at least one of Douglas-Peucker, Visvalingam-Whyatt, and Zhou-Jones. When the correction method is executed, one of the conventional methods can be selected to correct the cusp anomaly of the original polygon.
[0021] In S2, in the step of extracting the difference polygon, the original polygon and the difference polygon are superimposed and partially erased to obtain a difference polygon of the cusp anomaly part. The difference polygon is the part of the original polygon that shrinks based on the execution of the cusp anomaly correction by the conventional method.
[0022] In S3, the step of extracting the common edge of the difference polygon specifically includes: first, extracting adjacent polygons connected to the difference polygon except the difference polygon; extracting the boundary line of the difference polygon overlapping with these adjacent polygons as the common edge of the difference polygon. That is, the extracted common edge does not include the boundary line of the difference polygon overlapping with the difference polygon; among the boundary lines in the difference polygon, some boundary lines have only end points located in the boundary line of the difference polygon, but the boundary line of the difference polygon overlaps with other adjacent polygons, so the boundary line of the difference polygon can be used as the common edge of the difference polygon.
[0023] In S4, when constructing a new reduction map spot, the edge line of the reduction map spot is extracted first; then the edge line and the edge line extension segment of the reduction map spot are superimposed to enclose a face, that is, the edge line and the edge line extension segment of the reduction map spot enclose a new reduction map spot. The set of new reduction map spots can cover the reduction map spot.
[0024] In S5, when merging the new reduction map spot, based on the longest common edge line principle, the new reduction map spot is taken as an operation object, and is merged into an adjacent map spot. The specific execution steps include: S51, extracting the common edge line of the new reduction map spot; S52, measuring the length of each common edge line of the new reduction map spot, extracting the common edge line with the maximum length of the new reduction map spot as a fusion line; S53, searching for an adjacent map spot with the fusion line as an edge line, extracting the map spot with the maximum length of the fusion line in the adjacent map spot of the new reduction map spot as a target map spot, and merging the reduction map spot into the target map spot.
[0025] Specifically, the adjacent map spots and the new reduction map spot are bounded by the common edge line of the new reduction map spot; when the fusion line belongs to the edge line of a certain adjacent map spot as a whole, the adjacent map spot naturally has the maximum length of the fusion line, and the adjacent map spot is taken as the target map spot; when the fusion line belongs to the edge line of more than two adjacent map spots, it is necessary to compare and analyze which map spot among the adjacent map spots has the maximum length of the fusion line, and the adjacent map spot meeting the condition is taken as the target map spot.
[0026] In the first time of sequentially executing S1-S5, the conventional method described above is adopted in S1, and in each subsequent loop of executing S1-S5, S1 of each loop can adopt the same conventional method as before. After each time of sequentially executing S1-S5, it is checked whether the correction result reaches a threshold condition, and after the threshold condition is reached, the execution program is exited and the correction is stopped.
[0027] In S6, the threshold condition includes that the edge line corner of the map spot is greater than 5 degrees. At this time, there is no sharp-shaped special shape in the data, the complexity of the data is reduced, and the subsequent data analysis is facilitated.
[0028] The application also provides a system comprising a processor and a memory, wherein the memory stores a plurality of instructions; the processor loads the instructions from the memory to execute the planar vector sharp-shaped special shape correction method.
[0029] The application also provides a computer readable storage medium, which stores a computer program, and the computer program is executed by a processor to implement the steps of the planar vector sharp-shaped special shape correction method.
[0030] Although the methods are illustrated and described above as a series of actions, it will be appreciated that the methods are not limited by the order of actions, as some actions can occur in different orders or concurrently with other actions from those illustrated and described herein or in other actions not specifically mentioned herein, in accordance with one or more embodiments. It is further recognized that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the embodiments disclosed herein can be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality, without reference to a particular logical arrangement of hardware or software. Such functionality can be implemented in a variety of ways and using computer software in a manner well understood by those having ordinary skill in the art. Those skilled in the art will recognize that the various illustrative logical blocks, modules, and circuits described in connection with the embodiments disclosed herein can be implemented or performed with a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor can be a microprocessor, but in the alternative, the processor can be any conventional processor, controller, microcontroller, or state machine. A processor can also be implemented as a combination of a general purpose processor and a DSP, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration. The steps of a method or algorithm described in connection with the embodiments disclosed herein can be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module can reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium can be integral to the processor. The processor and the storage medium can reside in an ASIC. The ASIC can reside in a user terminal. In the alternative, the processor and the storage medium can reside as discrete components in a user terminal. In one or more exemplary embodiments, the functions described can be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions can be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media include both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another.Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage medium can be any available medium that can be accessed by a computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, include compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk and Blu-ray® disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.
[0031] The above embodiments of the present application have been described in detail, but the present application is not limited to the above embodiments, and various changes can be made within the scope of knowledge of those skilled in the art without departing from the spirit of the present application.
Claims
1. A method for modifying a planar vector spike, characterized in that, The method comprises the following steps: S1, correcting the cusp anomaly by a conventional method; S2, extracting the subtraction map; S3, extracting the common edge line of the subtraction map; S4, constructing a new subtraction map; S5, merging the new subtraction map; S6, checking and iterating. The conventional method comprises at least one of Douglas-Peucker, Visvalingam-Whyatt and Zhou-Jones. In each cycle of S1-S5, the same conventional method is used in S1. In S3, the common edge line of the subtraction map comprises the following steps: In S6, the threshold condition comprises that the corner of the edge line of the map is greater than 5 degrees. In S5, based on the longest common edge line principle, the new subtraction map is merged into the adjacent map, comprising the following steps: S51, extracting the common edge line of the new subtraction map; S52, measuring the length of each common edge line of the new subtraction map, extracting the common edge line with the maximum length as the fusion line; 2. The planar vector spike anomaly correction method according to claim 1, wherein S53, finding the adjacent map with the fusion line as the edge line, extracting the adjacent map with the maximum length of the fusion line as the target map, and merging the subtraction map into the target map.
3. The planar vector spike anomaly correction method according to claim 2, wherein The computer program is executed by the processor to implement the steps of the face vector cusp anomaly correction method in any one of claims 1-6.
4. The planar vector spike anomaly correction method according to claim 1, wherein The computer program is executed by the processor to implement the steps of the face vector cusp anomaly correction method in any one of claims 1-6.
5. The planar vector spike anomaly correction method according to claim 1, wherein 6. The planar vector spike anomaly correction method of claim 1, wherein 7. A system, characterized by 8. A computer readable storage medium having stored thereon a computer program, characterized in that