Common-mode conducted interference modeling and analyzing method for SLLC resonant converter

Abstract

The invention provides a common-mode interference modeling and analysis method for an SLLC resonant converter, and belongs to the technical field of power electronics and electromagnetic compatibility. According to the method, a high-precision common-mode interference propagation path model is constructed by extracting key parasitic parameters of a circuit and combining a transmission line theory and an equivalent circuit modeling technology, and complex high-frequency line parasitic parameters are introduced to describe propagation characteristics of common-mode current; a model simplification strategy is provided for the problem of calculation complexity caused by high-dimensional modeling, and the analysis precision is ensured while the calculation complexity is effectively reduced through equivalent transformation and frequency domain order reduction processing; the method has the advantages of high precision, high efficiency, high universality and the like, and is suitable for common-mode interference modeling analysis and electromagnetic compatibility design of the SLLC resonant converter and other various high-frequency power electronic devices.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of power electronics and electromagnetic compatibility, and particularly relates to a common-mode conducted interference modeling and analysis method for an SLLC resonant converter. BACKGROUND

[0002] The SLLC resonant converter has characteristics of high efficiency, high power density, low switching loss, etc., and is particularly suitable for application occasions with high step-up ratio and large current input, and is widely used in photovoltaic inverters, electric vehicle charging modules and microgrids. However, the switching noise caused by the high voltage rate of change dv / dt and the high current rate of change di / dt caused by high-frequency switching operation will produce significant common-mode conducted electromagnetic interference (EMI) current through the non-ideal factors such as the transformer winding distribution capacitor, the parasitic coupling path of the PCB layout, and the capacitive connection of the heat sink and the shell. Such interference not only causes the conducted electromagnetic emission to exceed the standard, but also may cause the equipment to malfunction, which seriously restricts the reliability of the SLLC topology in a harsh electromagnetic environment.

[0003] Current research on common-mode interference analysis of resonant converters is mostly based on idealized models, such as simplifying the resonant cavity as an ideal inductor and capacitor, ignoring the influence of key parasitic parameters such as PCB line parasitic capacitance, transformer interlayer capacitance, and switching device junction capacitance, resulting in a significant decrease in interference prediction accuracy at high frequencies, especially above 5MHz. The deviation between simulation results and actual measurement is generally more than 30%. Some literature attempts to establish a common-mode voltage transfer function through frequency domain impedance analysis, but does not fully consider the dynamic characteristics of the SLLC topology under multi-modal operation, making it difficult to comprehensively and accurately reveal the generation mechanism and propagation path of the interference in complex electromagnetic environments, and there are certain limitations in signal acquisition, interference source positioning, and real-time analysis, which cannot meet the demand for high-speed and high-precision detection of common-mode interference.

[0004] In engineering practice, to meet the electromagnetic compatibility standards such as CISPR 32 and GJB 151B-2013, developers usually rely on trial and error to repeatedly adjust the common-mode filter parameters or PCB layout. Such an experience-driven method not only takes a long time (more than 5 iterations of PCB for a certain type of SLLC boost charging module), but also leads to a sharp increase in cost due to the lack of theoretical guidance. In addition, traditional time-domain simulation requires microsecond-level steps to solve complex parasitic networks, which takes several hours to calculate, and cannot meet the design requirements of rapid iteration. The limitations of existing technologies show that there is an urgent need for a common-mode conducted interference modeling and analysis method that takes into account model accuracy, computational efficiency, and multi-condition adaptability, to systematically solve the core pain points of SLLC resonant converters in electromagnetic compatibility design. SUMMARY

[0005] In order to overcome the prior art, solve the problems of high-frequency parasitic parameters complex, modeling process cumbersome and high dimension calculation, the present application provides a common-mode conducted interference modeling and analysis method for SLLC resonant converter.

[0006] The common-mode conducted interference modeling and analysis method for SLLC resonant converter comprises the following steps: Step 1: constructing a common-mode conducted interference model of SLLC resonant converter; The common-mode conducted interference model comprises a common-mode interference source and a common-mode propagation network model; the common-mode interference source comprises a high-frequency common-mode voltage source and a common-mode current source; the common-mode interference source is constructed and equivalent according to the working characteristics and high-frequency switching behaviors of the main circuit in the SLLC resonant converter; the voltage fluctuation behaviors of the high-speed switching devices in the SLLC resonant converter in the process of turning on and turning off are equivalent to the common-mode voltage source; the high-speed switching devices comprise MOSFET devices or IGBT devices; the current fluctuation behaviors of the high-speed switching devices in the SLLC resonant converter are equivalent to the common-mode current source according to the interference mechanism of the SLLC resonant converter; any one of the common-mode current source and the common-mode voltage source is selected as an excitation source input into the common-mode conducted interference model; the circuit parasitic parameters are extracted and processed according to the common-mode interference source, and the common-mode propagation network model is established; Step 2: predicting common-mode conducted interference according to the common-mode conducted interference model; Step 2-1: using a star-delta transformation circuit method to reconstruct the topology of the original SLLC resonant converter of the common-mode conducted interference model into an equivalent topology; Step 2-2: using Norton equivalent circuit and Thevenin equivalent theorem to calculate the common-mode current under voltage source excitation and the common-mode current under current source excitation, and then calculating the Laplace transform expression of the common-mode current under voltage source excitation and the Laplace transform expression of the common-mode current under current source excitation based on the common-mode current under voltage source excitation and the common-mode current under current source excitation; finally obtaining the total common-mode current and the total common-mode voltage of the SLLC resonant converter; performing image drawing according to the common-mode current under voltage source excitation, the common-mode current under current source excitation, the Laplace transform expression of the common-mode current under voltage source excitation and the Laplace transform expression of the common-mode current under current source excitation; using the Laplace transform expression of the common-mode current and the Laplace transform expression of the common-mode current under current source excitation to calculate the frequency domain transfer function; the frequency domain transfer function comprises a frequency domain transfer function under voltage source excitation and a frequency domain transfer function under current source excitation; Step 2-3: using a step-by-step simplification strategy to reduce and simplify the frequency domain transfer function; the frequency domain transfer function after reduction and simplification is the prediction result.

[0007] Further, the step of establishing the common-mode propagation network model is: The parameters of the parasitic capacitance and the parasitic inductance existing in the PCB wire and the grounding loop are extracted, and an equivalent common-mode propagation network model is constructed. The PCB wire is modeled as a multi-section transmission line model by using a distributed parameter modeling method, and the multi-section transmission line model introduces equivalent capacitance parameters and inductance parameters to describe the propagation and reflection characteristics of the common-mode interference current in the circuit. According to node analysis and electromagnetic field coupling theory, the parasitic capacitance and the parasitic inductance existing in the grounding loop are constructed as a complete ground loop return model; the ground loop return model describes the complete propagation path and loop closure characteristics of the common-mode current in the system, and accurately describes the propagation and feedback process of the common-mode interference current in the circuit.

[0008] Furthermore, the step-by-step simplification strategy is: by removing high-order terms and coefficients in the frequency domain transfer function, the common-mode interference influencing factors are hierarchically screened; in the target analysis frequency band, according to the common-mode response characteristics of the dominant transmission channel, the common-mode propagation path is identified, and the high-order coupling terms are deleted.

[0009] Furthermore, the common-mode current under voltage source excitation and the common-mode current under current source excitation are calculated, and then the Laplace transform expressions of the common-mode current under voltage source excitation and the common-mode current under current source excitation are calculated based on the common-mode current under voltage source excitation and the common-mode current under current source excitation; finally, the steps of obtaining the total common-mode current and the total common-mode voltage of the SLLC resonant converter are: Step 2-2-1: Obtain the common-mode current under voltage source excitation is:

[0010] wherein i MG represents the Norton equivalent current value of the interference voltage source, Z v represents the Norton equivalent resistance value, Z LISN represents the impedance value of the LISN on the common-mode conducted current path; Step 2-2-2: Obtain the common-mode current under current source excitation :

[0011] wherein V MG represents the Thevenin equivalent voltage value of the interference current source, Z i represents the Thevenin equivalent resistance value, Z LISN represents the impedance value of the LISN on the common-mode conducted current path; Step 2-2-3: Obtain Laplace transform expression of common-mode current under voltage source excitation :

[0012] According to Norton equivalent circuit, , , , and , obtain Laplace transform expression of common-mode current under voltage source excitation :

[0013] Wherein Z L (s) and Z c (s) are impedance expressions of inductive elements and capacitive elements in complex frequency domain, in which Z 5、 Z 41 , Z 44 , Z 45 are impedance values of equivalent impedance elements obtained by transforming and combining parasitic capacitances and parasitic inductances in the original SLLC topology circuit, Z v is an impedance value of a parallel impedance element, i MG is a current value of an equivalent current source, L is an inductance value of an equivalent inductor, C is a capacitance value of an equivalent capacitor, and s is a complex variable in complex frequency domain, V (s) represents a voltage source excitation amplitude, M y represents a denominator coefficient of the yth mode composed of capacitive and inductive parameters in the original SLLC topology circuit, wherein y = 1, 2, 3, …, 12; A x represents a numerator coefficient of the xth mode composed of capacitive and inductive parameters in the original SLLC topology circuit, x = 1, 2, 3, …, 11; wherein A x :

[0014] Wherein M y :

[0015] Wherein, is a capacitance value of the first ground parasitic capacitance; is a capacitance value of the second ground parasitic capacitance; is a capacitance value of the seventh capacitor; is a capacitance value of the eighth capacitor; is a capacitance value of the sixth parasitic capacitance to ground; is a capacitance value of the third parasitic capacitance to ground; is a capacitance value of the fourth parasitic capacitance to ground; is an inductance value of the tenth parasitic inductance; is an inductance value of the ninth parasitic inductance; is an inductance value of the first parasitic inductance; is an inductance value of the second parasitic inductance; is an inductance value of the parasitic inductance on the source side of the first switch NMOS tube; is an inductance value of the parasitic inductance on the source side of the fourth switch NMOS tube, is an inductance value of the parasitic inductance of the first rectifier diode, is an inductance value of the parasitic inductance of the fourth rectifier diode; is a capacitance value of the transformer resonance capacitance; is a fifth parasitic inductance value; is an eighth parasitic inductance value; is a transformer resonance inductance value; is an impedance value of the LISN; The capacitance and inductance parameters include: the first parasitic inductance L1 is the parasitic inductance between the input positive port and a group of bridge arms; the second parasitic inductance L2 is the parasitic inductance between the input negative port and another group of bridge arms; the third parasitic inductance L3 is the parasitic inductance between the two groups of bridge arms; the fourth parasitic inductance L4 is the parasitic inductance between the two groups of bridge arms; the ninth parasitic inductance L t1 is the parasitic inductance between the midpoint of the two groups of bridge arms and the primary side end point of the transformer; the tenth parasitic inductance L t2 is the parasitic inductance between the midpoint of the two groups of bridge arms and the primary side end point of the transformer; the fifth parasitic inductance L5 and the sixth parasitic inductance L6 are the parasitic inductance between the two groups of bridge arms; the seventh parasitic inductance L7 is the parasitic inductance between a group of bridge arms and the output positive port; the eighth parasitic inductance L8 is the parasitic inductance between another group of bridge arms and the output negative port; the first parasitic capacitance C a1 is the parasitic capacitance to ground of the midpoint a1 of the bridge arm; the second parasitic capacitance C a2 is the parasitic capacitance to ground of the midpoint a2 of the primary side bridge arm; the third parasitic capacitance C d1 is the parasitic capacitance to ground of the midpoint d1 of the secondary side bridge arm; the fourth parasitic capacitance C d2 is the parasitic capacitance to ground of the midpoint d2 of the secondary side bridge arm; the fifth parasitic capacitance Cp1 is the parasitic capacitance to ground of the primary side bus; the sixth parasitic capacitance C g1 is the parasitic capacitance to ground of the load end; the seventh capacitance C ps is the common mode port capacitance of the transformer; the eighth capacitance C sp is the common mode port capacitance of the transformer; Qi each power device of the primary side circuit of the original SLLC topology circuit; L pi1 each power device of the primary side circuit of the original SLLC topology circuit Q i the drain side parasitic inductance of L pi2 each power device of the primary side circuit of the original SLLC topology circuit Q i the source side parasitic inductance of i = 1, 2,3, 4; each rectifier diode D j the parasitic inductance of L sj1 and L sj2 , j = 1, 2,3, 4; Step 2-2-4: Obtain the Laplace transform expression of the common-mode current under the current source excitation :

[0016] According to the Thevenin equivalent circuit and Z i , V MG , i CM , Z L (s) and Z c (s), obtain the Laplace transform expression of the common-mode current under the current source excitation :

[0017] wherein Z L (s) and Z c (s) are the impedance expressions of the inductive elements and the capacitive elements in the complex frequency domain, respectively, I Q2 represents the current source excitation amplitude, wherein Z 5、 Z 41 , Z 44 , Z L2 is the impedance value of the equivalent impedance element obtained by transforming and combining the parasitic capacitance and the parasitic inductance in the original SLLC topology circuit, Z i is the impedance value of the series impedance element, L is the inductance value of the equivalent inductive element, C is the capacitance value of the equivalent capacitor, and s is a complex variable in the complex frequency domain, V (s) represents the voltage source excitation amplitude, whereinE z represents the zth mode of the coefficient of the numerator of the common-mode current in the circuit composed of the capacitance and inductance parameters, wherein z {2,4,6,…,12}; N y represents the yth mode of the coefficient of the denominator of the common-mode current in the circuit composed of the capacitance and inductance parameters, wherein y {1,2,3,…,12};s is a complex variable in a complex frequency domain, I (s) represents an excitation amplitude of the current source; Step 2-2-5: obtaining the total common-mode current of the SLLC resonant converter according to the Laplace transform expression of the common-mode current under the voltage source excitation and the Laplace transform expression of the common-mode current under the current source excitation :

[0018] Step 2-2-6: obtaining the total common-mode voltage of the SLLC resonant converter according to the Laplace transform expression of the common-mode current under the voltage source excitation and the Laplace transform expression of the common-mode current under the current source excitation :

[0019] wherein Z LISN represents an impedance value of the LISN on the common-mode conducted current path, and the total common-mode voltage expression is used to express the size of the common-mode interference noise of the SLLC resonant converter.

[0020] The beneficial effects of the present application are: the present application adopts the common-mode conducted interference model scheme based on the complex high-frequency line parasitic parameters of the PCB, and through the simplification of the model, the calculation complexity is greatly reduced while ensuring the calculation accuracy; secondly, the present application realizes the systematic analysis, modeling and prediction of the common-mode interference source and its propagation path in the SLLC resonant converter, provides effective theoretical support and calculation means for the suppression design of the common-mode interference, is suitable for the common-mode conducted interference prediction and control of various power electronic equipment such as photovoltaic inverters, electric vehicle charging modules and micro-grid power electronic converters; finally, the simplified common-mode interference analysis method described in the present application is suitable for the early stage of design, especially in the case where the system parameters are not completely clear, effective interference prediction information can still be provided to assist the designers to make reasonable device selection and structure decision in the early stage, to provide theoretical basis and engineering guidance for suppressing common-mode interference, and has high engineering practicability and application value. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 is a flowchart of the method of the present application; Figure 2 SLLC resonant converter circuit diagram with LISN for the present invention; Figure 3 Common-mode conducted coupling path for SLLC resonant converter of the present invention, where the common-mode current flow path is represented by the dashed line with arrow; Figure 4 Common-mode interference equivalent circuit for SLLC resonant converter of the present invention, (a) is Norton equivalent circuit, (b) is Thevenin equivalent circuit; Figure 5 Different simplified expression error comparison for common-mode interference simplified analysis method of the present invention; Figure 6 Model verification for common-mode interference simplified analysis method of the present invention; Figure 7 Common-mode current expression spectrum diagram for the present invention with different terms of molecule reserved; Q1 - first switch NMOS tube; Q2 - second switch NMOS tube; Q3 - third switch NMOS tube; Q4 - fourth switch NMOS tube; D1 - first rectifier diode; D2 - second rectifier diode; D3 - third rectifier diode; D4 - fourth rectifier diode; Lp11 - first switch NMOS tube drain side parasitic inductance; L p21 - second switch NMOS tube drain side parasitic inductance; L p31 - third switch NMOS tube drain side parasitic inductance; L p41 - fourth switch NMOS tube drain side parasitic inductance; L p12 - first switch NMOS tube source side parasitic inductance; L p22 - second switch NMOS tube source side parasitic inductance; L p32 - third switch NMOS tube source side parasitic inductance; L p42 - fourth switch NMOS tube source side parasitic inductance; L1 - first parasitic inductance; L2 - second parasitic inductance; L3 - third parasitic inductance; L4 - fourth parasitic inductance; L t1 - ninth parasitic inductance; L t2 - tenth parasitic inductance; L s11 - first rectifier diode parasitic inductance; L s21 - second rectifier diode parasitic inductance; L s31 - third rectifier diode parasitic inductance; L s41 - fourth rectifier diode parasitic inductance; L s12 - first rectifier diode parasitic inductance; L s22 - second rectifier diode parasitic inductance; L s32 - third rectifier diode parasitic inductance; L s42- Parasitic inductance of the fourth rectifier diode; L5 - Fifth parasitic inductance; L6 - Sixth parasitic inductance; L7 - Seventh parasitic inductance; L8 - Eighth parasitic inductance; C a1 - First parasitic capacitance to ground; C a2 - Second parasitic capacitance to ground; C d1 - Third parasitic capacitance to ground; C d2 - Fourth parasitic capacitance to ground; Cp1 - Fifth parasitic capacitance to ground; C g1 -Sixth pair of parasitic capacitances to ground; C ps - Seventh capacitor; C sp -Eighth capacitor. Detailed Implementation

[0022] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0023] The technical solution adopted by this invention to solve its technical problem is as follows: Step 1: Construct the common-mode conducted interference model of the SLLC resonant converter; The common-mode conducted interference model includes common-mode interference source and common-mode propagation network models; common-mode interference sources include high-frequency common-mode voltage sources and common-mode current sources; Based on the operating characteristics of the main circuit in the SLLC resonant converter and its high-frequency switching behavior, a common-mode interference source is constructed and equivalently derived. The voltage fluctuation behavior of the high-speed switching devices in the SLLC resonant converter during the turn-on and turn-off processes is equivalent to a common-mode voltage source; the high-speed switching devices include MOSFET devices or IGBT devices; according to the interference mechanism of the SLLC resonant converter, the current fluctuation behavior of the high-speed switching devices in the SLLC resonant converter is equivalent to a common-mode current source. Arbitrarily select one of the common-mode current source and the common-mode voltage source as the excitation source input into the common-mode conducted interference model; Based on the common-mode interference source, the parasitic parameters of the circuit are extracted and processed to establish a common-mode propagation network model; The steps to establish a common-mode propagation network model are as follows: The parasitic capacitance and parasitic inductance existing in the PCB traces and grounding loops are extracted to construct an equivalent common-mode propagation network model. The distributed parameter modeling method is adopted to model the PCB circuit conductors as a multi-segment transmission line model. The multi-segment transmission line model introduces equivalent capacitance and inductance parameters to describe the propagation and reflection characteristics of common-mode interference current in the circuit. According to the node analysis and electromagnetic field coupling theory, the parasitic capacitance and the parasitic inductance existing in the grounding loop are constructed into a complete ground loop return model; the ground loop return model depicts the complete propagation path and loop closure characteristics of the common-mode current in the system, and accurately describes the propagation and feedback process of the common-mode interference current in the circuit; Step 2: predicting the common-mode conducted interference according to the common-mode conducted interference model; Step 2-1: using the star-delta transformation circuit method, the topology of the original SLLC resonant converter of the common-mode conducted interference model is reconstructed into an equivalent topology; the reconstructed equivalent topology is shown in Figure 4 ; Step 2-2: using the Norton equivalent circuit and Thevenin equivalent theorem, the common-mode current under voltage source excitation and the common-mode current under current source excitation are calculated, and then the Laplace transform expression of the common-mode current under voltage source excitation and the Laplace transform expression of the common-mode current under current source excitation are calculated based on the common-mode current under voltage source excitation and the common-mode current under current source excitation; according to the common-mode current under voltage source excitation, the common-mode current under current source excitation, the Laplace transform expression of the common-mode current under voltage source excitation and the Laplace transform expression of the common-mode current under current source excitation, the image is drawn, and at the same time, the high order term is adjusted according to the accuracy requirement of the common-mode conducted interference model, so as to achieve accurate and simple modeling; Step 2-2-1: obtaining the common-mode current under voltage source excitation :

[0024] In the formula, i MG The Norton equivalent current value of the interference voltage source is represented by I, Z v The Norton equivalent resistance value is represented by R, Z LISN The impedance value of the LISN on the common-mode conducted current path is represented by Z, Figure 4 as shown in Step 2-2-2: obtaining the common-mode current under current source excitation :

[0025] In the formula, V MG The Thevenin equivalent voltage value of the interference current source is represented by V, Z i The Thevenin equivalent resistance value is represented by R, Z LISN The impedance value of the LISN on the common-mode conducted current path is represented by Z. Step 2-2-3: obtaining the Laplace transform expression of the common-mode current under voltage source excitation :

[0026] According to Norton equivalent circuit and 、 、 、 and , the Laplace transform expression of common-mode current under voltage source excitation is obtained :

[0027] where Z L (s) and Z c (s) are the impedance expressions of inductive elements and capacitive elements in the complex frequency domain, respectively, in which Z 5、 Z 41 、 Z 44 、 Z 45 is the impedance value of the equivalent impedance element obtained by transforming and combining the parasitic capacitance and parasitic inductance in the original SLLC topology circuit, Z v is the impedance value of the parallel impedance element, i MG is the current value of the equivalent current source, L is the inductance value of the equivalent inductor, C is the capacitance value of the equivalent capacitor, and s is a complex variable in the complex frequency domain, V (s) represents the excitation amplitude of the voltage source, M y represents the denominator coefficient of the yth mode composed of capacitive and inductive parameters in the original SLLC topology circuit, where y = 1, 2, 3, …, 12; A x represents the numerator coefficient of the xth mode composed of capacitive and inductive parameters in the original SLLC topology circuit, where x = 1, 2, 3, …, 11; in which A x :

[0028] in which M y :

[0029] wherein, is the capacitance value of the first ground parasitic capacitance; is the capacitance value of the second ground parasitic capacitance; is the capacitance value of the seventh capacitor; is the capacitance value of the eighth capacitor; is the capacitance value of the sixth ground parasitic capacitance; a capacitance value of a third parasitic capacitance to ground; a capacitance value of a fourth parasitic capacitance to ground; an inductance value of a tenth parasitic inductance; an inductance value of a ninth parasitic inductance; an inductance value of a first parasitic inductance; an inductance value of a second parasitic inductance; an inductance value of a parasitic inductance on a source side of a first switch NMOS tube; an inductance value of a parasitic inductance on a source side of a fourth switch NMOS tube, an inductance value of a parasitic inductance of a first rectifier diode, an inductance value of a parasitic inductance of a fourth rectifier diode; a capacitance value of a transformer resonance capacitance; a fifth parasitic inductance value; an eighth parasitic inductance value; a transformer resonance inductance value; an LISN impedance value; As shown in Figure 2 , the capacitance and inductance parameters include: a first parasitic inductance L1 is a parasitic inductance between an input positive port and a group of bridge arms; a second parasitic inductance L2 is a parasitic inductance between an input negative port and another group of bridge arms; a third parasitic inductance L3 is a parasitic inductance between the two groups of bridge arms; a fourth parasitic inductance L4 is a parasitic inductance between the two groups of bridge arms; a ninth parasitic inductance L t1 is a parasitic inductance between the midpoint of the two groups of bridge arms and the primary side end point of the transformer; a tenth parasitic inductance L t2 is a parasitic inductance between the midpoint of the two groups of bridge arms and the primary side end point of the transformer; a fifth parasitic inductance L5 and a sixth parasitic inductance L6 are parasitic inductances between the two groups of bridge arms; a seventh parasitic inductance L7 is a parasitic inductance between a group of bridge arms and an output positive port; an eighth parasitic inductance L8 is a parasitic inductance between another group of bridge arms and an output negative port; a first parasitic capacitance C a1 is a parasitic capacitance to ground of a side bridge arm midpoint a1; a second parasitic capacitance C a2 is a parasitic capacitance to ground of a primary side bridge arm midpoint a2; a third parasitic capacitance C d1 is a parasitic capacitance to ground of a secondary side bridge arm midpoint d1; a fourth parasitic capacitance C d2 is a parasitic capacitance to ground of a secondary side bridge arm midpoint d2; a fifth parasitic capacitance Cp1 is a parasitic capacitance to ground of a primary side bus; a sixth parasitic capacitance C g1 is a parasitic capacitance to ground of a load end; a seventh capacitance C ps is a transformer common mode port capacitance; an eighth capacitance C sp is a transformer common mode port capacitance; Q iFor each power device of the primary side circuit of the original SLLC topology circuit L pi1 For each power device of the primary side circuit of the original SLLC topology circuit Q i The drain side parasitic inductance of L pi2 For each power device of the primary side circuit of the original SLLC topology circuit Q i The source side parasitic inductance of i = 1, 2,3, 4; each rectifier diode D j The parasitic inductance of L sj1 And L sj2 , j = 1, 2,3, 4; Step 2-2-4: Obtain the Laplace transform expression of the common-mode current under the excitation of the current source :

[0030] According to the Thevenin equivalent circuit and Z i , V MG , i CM , Z L (s) and Z c (s), obtain the Laplace transform expression of the common-mode current under the excitation of the current source :

[0031] Wherein Z L (s) and Z c (s) are the impedance expressions of the inductance elements and the capacitance elements in the complex frequency domain, respectively, I Q2 The current source excitation amplitude is represented by Z 5、 Z 41 , Z 44 , Z L2 The impedance value of the equivalent impedance element obtained by transforming and combining the parasitic capacitance and the parasitic inductance in the original SLLC topology circuit is Z i The impedance value of the series impedance element is L, the inductance value of the equivalent inductance element is C, the capacitance value of the equivalent capacitance, and s is a complex variable in the complex frequency domain, V (s) represents the voltage source excitation amplitude, wherein Ez the zth modal numerator coefficient of the capacitor-inductor parameter in the circuit, where z {2, 4, 6, …, 12}; N y the yth modal denominator coefficient of the capacitor-inductor parameter in the circuit, where y {1, 2, 3, …, 12}; s is a complex variable in the complex frequency domain, I (s) represents the amplitude of the current source excitation; Step 2-2-5: According to the Laplace transform expression of the common-mode current under voltage source excitation and the Laplace transform expression of the common-mode current under current source excitation, the total common-mode current of the SLLC resonant converter is obtained :

[0032] Step 2-2-6: According to the Laplace transform expression of the common-mode current under voltage source excitation and the Laplace transform expression of the common-mode current under current source excitation, the total common-mode voltage of the SLLC resonant converter is obtained :

[0033] wherein Z LISN represents the impedance value of the LISN on the common-mode conducted current path, and the total common-mode voltage expression is used to express the size of the common-mode interference noise of the SLLC resonant converter; Step 2-3: The frequency domain transfer function of is simplified by using a step-by-step simplification strategy; The step-by-step simplification strategy is: By removing high-order terms and coefficients in the frequency domain transfer function, the common-mode interference influencing factors are hierarchically screened; in the target analysis frequency band, the common-mode response characteristics of the dominant transmission channel are identified, and the high-order coupling terms are deleted; The frequency domain transfer function includes the frequency domain transfer function H CM ( s ) under voltage source excitation and the frequency domain transfer function G CM ( s ) under current source excitation.

[0034] The common-mode current transfer function under voltage source excitation H CM ( s ) is simplified as: wherein, a i and bi For each order of frequency domain coefficients, V Q1 (s) is the Laplace transform expression of voltage source excitation under voltage source excitation; the reduced-order model can significantly reduce computational complexity while maintaining computational accuracy within the main frequency band of the system; Step 3: Application of Common-Mode Conducted Interference Analysis Method for SLLC Resonant Converters The common-mode conducted interference analysis method of this invention can be widely applied to common-mode interference analysis and electromagnetic compatibility design in SLLC resonant converters and other typical power electronic devices. Preferably, the method can be applied in the early stages of SLLC resonant converter design, predicting the common-mode current spectrum distribution and conduction intensity through simulation to assist in the design of reasonable filter circuits, grounding structures, and device selection. Furthermore, the method is also applicable to system fault diagnosis and common-mode interference source tracing scenarios; through reverse model derivation, the excitation location and propagation path of common-mode interference can be accurately identified. The accuracy of the model is verified by comparing simulations and actual measurements. The results show that the method can effectively predict the common-mode current distribution under different operating conditions, providing a theoretical basis and engineering guidance for suppressing common-mode interference.

[0035] The method is also applicable to various power electronic devices with high-frequency operating characteristics, such as LLC converters, DAB converters, motor drivers, and photovoltaic inverters.

[0036] In summary, the common-mode conducted interference analysis method provided by this invention not only has the characteristics of high precision and high efficiency, but can also be widely used in a variety of power electronic devices. In particular, in SLLC resonant converters, it can significantly improve the electromagnetic compatibility of the system and ensure that the equipment meets stringent EMC standards.

[0037] The flowchart of the method of this invention is as follows Figure 1 As shown.

[0038] Firstly, the modeling of common-mode interference sources is based on the main circuit topology and high-frequency operating characteristics of the SLLC resonant converter to identify common-mode interference excitation sources in the system. High-speed switching devices, including MOSFETs or IGBTs, generate interference waveforms with high di / dt and high dv / dt at the moment of turn-on and turn-off. This interference signal can form a common-mode interference current through the parasitic capacitance between the device and ground. To characterize the excitation source, this embodiment equates the high-frequency disturbance behavior to: a common-mode voltage source, which is a common-mode voltage source when dv / dt dominates; or a common-mode current source, which is a common-mode current source when di / dt dominates; and injects it as a common-mode excitation into the equivalent system model.

[0039] Secondly, the modeling of the common-mode interference propagation path is based on the high-frequency parasitic parameters of the input cable, output cable, PCB trace, filter and grounding structure of the SLLC resonant converter. The specific steps are as follows: 1. Extracting parasitic parameters: including distributed capacitance and inductance between cables and between cables and ground, using EM modeling tools or analytical method for parameter calculation; EM modeling tools include Ansys Q3D; 2. Constructing a transmission line model: segmenting the PCB trace into a transmission line model, introducing equivalent series inductance and capacitance to ground to represent the reflection and propagation characteristics of the interference current under high-frequency conditions.

[0040] 3. Modeling of the return path: using electromagnetic field coupling theory, the grounding structure is equivalent to an equipotential surface, and a complete ground loop closing path is established to capture the return mechanism of the common-mode current.

[0041] Finally, a complete common-mode interference model from the interference source to the LISN is established.

[0042] Thirdly, the model simplification method based on high-frequency parasitic parameters, in view of the high-dimensional complexity problem existing in modeling, this embodiment introduces a set of step-by-step simplification strategy: 1. Circuit structure simplification: using star-delta transformation and other means to reduce the number of nodes; 2. Equivalent source transformation: using Norton's theorem / Davyne's theorem to convert the excitation source into a lumped parameter form for unified analysis, the Norton equivalent circuit is shown in Figure 4 (a), and the Davyne equivalent circuit is shown in Figure 4 (b); 3. Frequency domain expression extraction: derive the transfer function of the common-mode current in the frequency domain: (1) Common-mode current expression under voltage source excitation:

[0043] wherein i MG represents the Norton equivalent current value of the interference voltage source, Z v represents the Norton equivalent resistance value, Z LISN represents the impedance value of the LISN in the common-mode conducted current path.

[0044] (2) Common-mode current expression under current source excitation:

[0045] wherein V MG represents the Davyne equivalent voltage value of the interference current source, Zi denotes the Thevenin equivalent resistance value, Z LISN denotes the LISN impedance value on the common-mode conducted current path.

[0046] (3) Laplace transform expression of common-mode current under voltage source excitation:

[0047] wherein A x (x = 1, 3, 5, …, 11), M y (y = 1, 2, 3, …, 12) denotes the coefficient composed of the capacitance parameter and the inductance parameter in the circuit, s is a complex variable in the complex frequency domain, V (s) denotes the voltage source excitation amplitude.

[0048] (4) Laplace transform expression of common-mode current under current source excitation:

[0049] wherein E x (x = 2, 4, 6, …, 12), N y (y = 1, 2, 3, …, 12) denotes the coefficient composed of the capacitance parameter and the inductance parameter in the circuit, s is a complex variable in the complex frequency domain, I (s) denotes the current source excitation amplitude.

[0050] (5) Total common-mode current expression of SLLC resonant converter:

[0051] wherein denotes the common-mode current generated by mode 1 of the SLLC resonant converter, denotes the common-mode current generated by mode 2 of the SLLC resonant converter.

[0052] (6) Total common-mode voltage expression of SLLC resonant converter:

[0053] wherein denotes the common-mode current generated by mode 1 of the SLLC resonant converter, denotes the common-mode current generated by mode 2 of the SLLC resonant converter, Z LISN denotes the LISN impedance value on the common-mode conducted current path.

[0054] 4. Order reduction strategy implementation: A step-by-step simplification strategy is introduced, preferably through the optimization of high-order terms and coefficients in the frequency-domain expression, to screen the dominant frequency components that have the greatest impact on the system amplitude-frequency characteristics within the target frequency band; the error tolerance method is used to ignore high-order terms with amplitude contributions less than the set threshold, achieving order reduction and simplification. In order to intuitively compare the deviations between the reduced-order expressions and the original expression, the spectral range of the reduced-order expression is limited when drawing the spectral curve. As the frequency increases, the spectral curve stops drawing when the results of the reduced-order expression begin to deviate significantly from the original expression. Through this processing, the range of influence of different degrees of order reduction on spectral accuracy can be more clearly displayed, as shown in Figure 5 .

[0055] Analysis Figure 5 , as the frequency increases, the separation points of different order-reduced expressions from the original expression gradually appear and show differences: (1) The curve with the first-order term in the numerator starts to separate from the original expression at , showing a large deviation.

[0056] (2) The curve with the first-order and third-order terms in the numerator can better fit the frequency range extending to around, indicating that increasing the third-order term significantly improves the fitting accuracy in the high-frequency band.

[0057] (3) The curve with the first-order, third-order, and fifth-order terms in the numerator further extends the fitting range and can cover to a higher frequency band, about .

[0058] (4) The curves with the first-order, third-order, fifth-order, and seventh-order terms in the numerator and the first-order, third-order, fifth-order, and ninth-order terms in the numerator are highly consistent with the original expression within the full frequency range, only showing slight separation at very high frequencies (close to ), indicating that retaining more high-order terms can significantly improve the fitting accuracy in the high-frequency band.

[0059] Overall, the order-reduced expression with lower-order terms in the numerator can effectively describe the dynamic characteristics in the low-frequency band, and as the frequency increases, ignoring the influence of high-order terms will cause the error between the order-reduced expression and the original expression to gradually increase. Therefore, it is necessary to find an order-reduced expression that meets the accuracy requirements according to actual analysis requirements, and if the accuracy does not meet the requirements, the number of retained high-order terms needs to be further increased to ensure the fitting accuracy.

[0060] 5. Simplified model form: Approximate the complex frequency-domain transfer function H CM (s) as a first-order or second-order transfer function to improve computational efficiency, with typical forms as follows:

[0061] 6. Model validity verification: To verify the accuracy and practicability of the common-mode modeling method proposed in the present application, simulation and measurement comparison tests were carried out. The specific verification process is as follows: (1) Experimental platform construction This embodiment takes a SLLC resonant converter with an output power of 3 kW as the experimental object, and constructs the following common-mode interference test platform: The input end common-mode current is measured by using a line impedance stabilization network LISN; the frequency spectrum is sampled by using an EMI receiver; the EMI receiver is a Rohde & Schwarz ESR; the interference excitation source is generated through a switching device, the measurement frequency band is 10 kHz-10 MHz, and the CE102 power line conducted emission test item standard of GJB 151B-2013 is followed; the PCB wiring, cable layout and grounding mode are consistent with the actual use scene.

[0062] (2) Frequency domain model simulation By using the modeling method proposed in the present application, the common-mode interference equivalent model of the SLLC resonant converter is constructed and reduced, and the frequency domain transfer function is imported into MATLAB. The input excitation signal adopts a typical switching voltage waveform, and 10-100 ns edge time and 100 kHz switching frequency are taken as the simulation input.

[0063] The common-mode current frequency spectrum distribution obtained by the simulation result is shown in Figure 6 , and is compared with the measured data.

[0064] (3) Result comparison and analysis In the frequency band of 10 kHz-10 MHz, the simulation result is in good agreement with the measured data. The specific performance is as follows: The error at the peak frequency is less than 3 dB; the prediction accuracy of the main and secondary harmonic frequency positions is more than 95%; the simulation time of the reduced model is reduced by about 60% under the premise of maintaining the accuracy; under a plurality of groups of parameter samples, the average modeling error is within ±4.1 dB, which meets the engineering prediction accuracy requirement.

[0065] In addition, the common-mode interference variation trend under different grounding wiring schemes is predicted by using the present model, which is consistent with the measured variation trend, further verifying the practicability and accuracy of the model.

[0066] Fourthly, common-mode interference analysis and application, based on the constructed and simplified common-mode interference model, the present application can be applied in the following scenes: 1. Frequency spectrum simulation and prediction: frequency domain analysis is carried out by using MATLAB / Simulink or PSIM platform, and the frequency spectrum distribution diagram of the system common-mode current and common-mode voltage is obtained; 2. EMC evaluation: Evaluate the strength of common-mode interference to meet the EMC standards such as CISPR, GJB 151B or GB / T, and provide reference for filter design; 3. System design optimization in early stage: In the early stage of design, even if some specific parameters are not completely determined, the model can predict the trend of common-mode current to assist the selection of filter, cable layout and grounding structure; 4. Fault diagnosis and interference tracing: Combined with the measured results, the model is reversely analyzed to locate the interference source and its path, and to improve the system debugging efficiency.

[0067] As can be seen from the above specific embodiments, the common-mode interference modeling and simplified analysis method proposed by the application has high precision, high efficiency and good universality, can effectively improve the EMC design level of power electronic system, and has wide application prospect and high engineering value.

Claims

1. A method for modeling and analyzing common-mode conducted interference in SLLC resonant converters, characterized in that, Includes the following steps: Step 1: Construct the common-mode conducted interference model of the SLLC resonant converter; The common-mode conducted interference model includes a common-mode interference source model and a common-mode propagation network model. The common-mode interference source includes a high-frequency common-mode voltage source and a common-mode current source. Based on the operating characteristics of the main circuit in the SLLC resonant converter and its high-frequency switching behavior, a common-mode interference source is constructed and equivalently represented. The voltage fluctuation behavior of the high-speed switching devices in the SLLC resonant converter during the turn-on and turn-off processes is equivalently represented as a common-mode voltage source. The high-speed switching devices include MOSFET devices or IGBT devices. Based on the interference mechanism of the SLLC resonant converter, the current fluctuation behavior of the high-speed switching devices in the SLLC resonant converter is equivalently represented as a common-mode current source. Either the common-mode current source or the common-mode voltage source is arbitrarily selected as the excitation source and input into the common-mode conducted interference model. Based on the common-mode interference source, the circuit parasitic parameters are extracted and processed to establish a common-mode propagation network model. Step 2: Predict common-mode conducted interference based on the common-mode conducted interference model; Step 2-1: Using the star-delta converter method, reconstruct the topology of the original SLLC resonant converter in the common-mode conducted interference model into an equivalent topology; Step 2-2: Using Norton's equivalent circuit and Thevenin's equivalent theorem, calculate the common-mode current under voltage source excitation and the common-mode current under current source excitation. Then, based on the common-mode current under voltage source excitation and the common-mode current under current source excitation, calculate the Laplace transform expressions for the common-mode current under voltage source excitation and the common-mode current under current source excitation. Finally, obtain the total mode current and total mode voltage of the SLLC resonant converter. The graphs are plotted based on the common-mode current under voltage source excitation, the common-mode current under current source excitation, the Laplace transform expression of the common-mode current under voltage source excitation, and the Laplace transform expression of the common-mode current under current source excitation. The frequency domain transfer function is calculated using the common-mode current Laplace transform expression and the common-mode current Laplace transform expression under current source excitation; the frequency domain transfer function includes the frequency domain transfer function under voltage source excitation and the frequency domain transfer function under current source excitation. Steps 2-3: Use a stepwise simplification strategy to reduce the order of the frequency domain transfer function; the reduced-order simplified frequency domain transfer function is the prediction result.

2. The common-mode conducted interference modeling and analysis method for SLLC resonant converters according to claim 1, characterized in that, The steps for establishing the common-mode propagation network model are as follows: The parasitic capacitance and parasitic inductance existing in the PCB traces and grounding loops are extracted to construct an equivalent common-mode propagation network model. The distributed parameter modeling method is adopted to model the PCB circuit conductors as a multi-segment transmission line model. The multi-segment transmission line model introduces equivalent capacitance and inductance parameters to describe the propagation and reflection characteristics of common-mode interference current in the circuit. Based on node analysis and electromagnetic field coupling theory, the parasitic capacitance and parasitic inductance existing in the grounding loop are constructed into a complete grounding loop return current model. The ground loop return current model characterizes the complete propagation path and loop closure characteristics of common-mode current in the system, accurately describing the propagation and feedback process of common-mode interference current in the circuit.

3. The common-mode conducted interference modeling and analysis method for SLLC resonant converters according to claim 1, characterized in that, The stepwise simplification strategy is as follows: within the target frequency band, based on the common-mode response characteristics of the dominant transmission channel, identify the common-mode propagation path and delete higher-order coupling terms.

4. The common-mode conducted interference modeling and analysis method for SLLC resonant converters according to claim 1, characterized in that, The steps for calculating the common-mode current under voltage source excitation and the common-mode current under current source excitation, and then calculating the Laplace transform expressions for the common-mode current under voltage source excitation and the common-mode current under current source excitation based on the common-mode current under voltage source excitation and the common-mode current under current source excitation; finally, obtaining the total mode current and total mode voltage of the SLLC resonant converter are as follows: Step 2-2-1: Obtain the common-mode current under voltage source excitation for: In the formula i MG This represents the Norton equivalent current value of the interference voltage source. Z v This represents the Norton equivalent resistance value. Z LISN This represents the impedance value of the LISN in the common-mode conduction current path; Step 2-2-2: Obtain the common-mode current under current source excitation : In the formula V MG This represents the Thevenin equivalent voltage value of the interference current source. Z i This represents the Thevenin equivalent resistance value. Z LISN This represents the impedance value of the LISN in the common-mode conduction current path; Step 2-2-3: Obtain the Laplace transform expression of the common-mode current under voltage source excitation. : Based on Norton's equivalent circuit and , , , and To obtain the Laplace transform expression of the common-mode current under voltage source excitation. : Z L (s) and Z c (s) are the impedance expressions for the inductor and capacitor in the complex frequency domain, respectively. Z 5. Z 41 , Z 44 , Z 45 Z is the impedance value of the equivalent impedance element obtained by transforming and combining the parasitic capacitance and parasitic inductance in the original SLLC topology circuit. v It is the impedance value of the parallel impedance element. i MG is the current value of the equivalent current source, L is the inductance value of the equivalent inductor, C is the capacitance value of the equivalent capacitance, and s is a complex variable in the complex frequency domain. V (s) represents the voltage source excitation amplitude. M y y represents the denominator coefficient of the y-th mode composed of the capacitor and inductor parameters in the original SLLC topology, where y = 1, 2, 3, ..., 12; A x The x-th mode-molecule coefficient, representing the capacitance and inductance parameters in the original SLLC topology, is given by x = 1, 2, 3, ..., 11; where... A x for: In the formula M y for: in, This is the capacitance value of the first pair of parasitic capacitances to ground; This is the capacitance value of the second pair of parasitic capacitances to ground; This is the capacitance value of the seventh capacitor; This is the capacitance value of the eighth capacitor; This is the capacitance value of the sixth pair of parasitic capacitances to ground; This is the capacitance value of the third pair of parasitic capacitances to ground; This is the capacitance value of the fourth pair of parasitic capacitances to ground; The inductance value of the tenth parasitic inductance; This is the inductance value of the ninth parasitic inductance; The inductance value of the first parasitic inductance; The inductance value of the second parasitic inductance; The inductance value is the parasitic inductance on the source side of the first switching NMOS transistor; The inductance value is the parasitic inductance on the source side of the fourth switching NMOS transistor. Let be the inductance value of the parasitic inductance of the first rectifier diode. The inductance value is the parasitic inductance of the fourth rectifier diode; This is the capacitance value of the transformer resonant capacitor; This is the fifth parasitic inductance value; This is the eighth parasitic inductance value; This is the inductance value of the transformer's resonant inductance; The impedance value of the LISN; The parameters of the capacitor and inductor include: the first parasitic inductance L1 is the parasitic inductance between the positive input port and one set of bridge arms; the second parasitic inductance L2 is the parasitic inductance between the negative input port and another set of bridge arms; the third parasitic inductance L3 is the parasitic inductance between the two sets of bridge arms; the fourth parasitic inductance L4 is the parasitic inductance between the two sets of bridge arms; and the ninth parasitic inductance L... t1 The parasitic inductance between the midpoint of the two bridge arms and the primary terminal of the transformer; the tenth parasitic inductance L t2 The parasitic inductance between the midpoint of the two bridge arms and the primary terminal of the transformer is denoted as L5; the fifth parasitic inductance L5 and the sixth parasitic inductance L6 are the parasitic inductances between the two bridge arms; the seventh parasitic inductance L7 is the parasitic inductance between one bridge arm and the positive output port; the eighth parasitic inductance L8 is the parasitic inductance between the other bridge arm and the negative output port; the first parasitic capacitance to ground is C. a1 The parasitic capacitance to ground at the midpoint a1 of the side bridge arm; the second parasitic capacitance to ground C a2 The parasitic capacitance to ground at the midpoint a2 of the primary side bridge arm; the third parasitic capacitance to ground C d1 The parasitic capacitance to ground at the midpoint d1 of the secondary bridge arm; the fourth parasitic capacitance to ground C d2 The fifth parasitic capacitance to ground is Cp1, which is the parasitic capacitance to ground of the primary busbar; the sixth parasitic capacitance to ground is C... g1 The seventh capacitor C is the parasitic capacitance from the load terminal to ground. ps The common-mode port capacitor of the transformer; the eighth capacitor C sp This refers to the common-mode port capacitance of the transformer. Q i For each power device in the primary-side circuit of the original SLLC topology; L pi1 For each power device in the primary-side circuit of the original SLLC topology Q i The drain-side parasitic inductance; L pi2 Each power device in the primary-side circuit of the original SLLC topology Q i Parasitic inductance on the source side; i = 1, 2, 3, 4; each rectifier diode D j The parasitic inductance is L sj1 and L sj2 , j = 1, 2, 3, 4; Step 2-2-4: Obtain the Laplace transform expression of the common-mode current under current source excitation. : Based on Thevenin equivalent circuit and Z i , V MG , i CM Z L (s) and Z c (s), to obtain the Laplace transform expression of the common-mode current under current source excitation. : Z L (s) and Z c (s) are the impedance expressions for the inductor and capacitor in the complex frequency domain, respectively. I Q2 The value represents the excitation amplitude of the current source, where... Z 5. Z 41 , Z 44 , Z L2 Z is the impedance value of the equivalent impedance element obtained by transforming and combining the parasitic capacitance and parasitic inductance in the original SLLC topology circuit. i L is the impedance value of the series impedance element, C is the inductance value of the equivalent inductance element, s is the capacitance value of the equivalent capacitance element, and s is a complex variable in the complex frequency domain. V (s) represents the voltage source excitation amplitude, where... E z This represents the z-th mode binary coefficient composed of the capacitor and inductor parameters in the circuit, where z {2,4,6,…,12}; N y y represents the denominator coefficient of the y-th mode, which is composed of the capacitance and inductance parameters in the circuit. {1,2,3,…,12}; s is a complex variable in the complex frequency domain. I (s) represents the amplitude of the current source excitation; Step 2-2-5: Based on the Laplace transform expressions for the common-mode current under voltage source excitation and current source excitation, obtain the total common-mode current of the SLLC resonant converter. : Step 2-2-6: Based on the Laplace transform expressions for the common-mode current under voltage source excitation and current source excitation, obtain the total mode voltage of the SLLC resonant converter. for: in Z LISN This represents the impedance value of the LISN in the common-mode conduction current path, and the magnitude of the common-mode interference noise of the SLLC resonant converter is expressed by the total mode voltage expression.

5. A terminal device, comprising a processor, a memory, and a computer program stored in the memory; characterized in that, When the processor executes the computer program, it implements the common-mode conducted interference modeling and analysis method for SLLC resonant converters as described in any one of claims 1-4.

6. A computer-readable storage medium storing a computer program; characterized in that, When the computer program is executed by the processor, it implements the common-mode conducted interference modeling and analysis method for SLLC resonant converters according to any one of claims 1-4.

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