Signal equalization method and device based on sampling clock skew and medium
By constructing a signal equalizer through signal sampling clock offset and cross-correlation operations, the problem of signal impairment in traditional optical fiber communication systems is solved, achieving low-complexity and high-flexibility signal equalization and improving system performance.
Patent Information
- Application Number
- CN202511402174.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-28
- Publication Date
- 2025-12-23
AI Technical Summary
Traditional signal equalization techniques in optical fiber communication systems suffer from high algorithm complexity, complex implementation structure, and limited adaptability to channel changes, making it difficult to effectively improve system performance in resource-constrained or low-power scenarios.
By introducing a signal sampling clock offset, a signal equalizer is constructed using cross-correlation operations and Fourier transforms to achieve digital processing and equalization of the signal.
It achieves simple and low-complexity signal equalization, improves the system's flexibility and reconfigurability, effectively addresses signal impairments, and enhances the transmission capacity and rate of fiber optic communication systems.
Smart Images
Figure CN121193570A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of optical fiber communication technology, and in particular to a signal equalization method, device and medium based on sampling clock offset. Background Technology
[0002] With the development of optical communication technology, fiber optic communication systems, as the core infrastructure of global communication networks, have seen continuous improvements in transmission capacity and speed. However, in specific application scenarios such as short-distance communication, the system is affected by various factors such as device bandwidth limitations, channel dispersion, and nonlinear effects, leading to severe signal distortion and impairment during transmission. These impairments limit further improvements in system performance. Especially under the background of high-speed, high-capacity communication demands, how to effectively compensate for signal impairment and restore signal quality has become a key problem that urgently needs to be solved in the field of optical communication.
[0003] Traditional signal equalization techniques often rely on adaptive filtering algorithms or feedback equalization structures. While these methods can achieve certain equalization effects in some scenarios, their algorithms are highly complex, their implementations are intricate, and they have strict real-time requirements, making them difficult to widely apply in resource-constrained or low-power scenarios. Furthermore, traditional methods have limited adaptability to channel variations, and their equalization performance tends to degrade under dynamic channel conditions, limiting their adoption in flexible and reconfigurable optical communication systems.
[0004] Therefore, how to improve the reliability and transmission performance of optical fiber communication systems through novel equalization technologies that are simple to operate, flexible to implement, low in complexity, and can effectively cope with signal impairments, and provide technical support for the development of future high-speed optical communication and next-generation mobile communication systems, is a technical problem that needs to be solved. Summary of the Invention
[0005] The purpose of this invention is to overcome the defects of the prior art by providing a signal equalization method, device and medium based on sampling clock offset. By introducing a signal sampling clock offset, a signal equalizer is obtained by processing the transmitted and received signals using cross-correlation. Signal equalization can be achieved by processing the signal through this equalizer.
[0006] The objective of this invention can be achieved through the following technical solutions:
[0007] According to one aspect of the present invention, a signal equalization method based on sampling clock offset is provided, the specific steps of which include:
[0008] S1. At the receiving end, a sampling clock offset is introduced into the received signal sequence to obtain the processed signal sequence;
[0009] S2. Perform cross-correlation operation on the processed signal sequence and the transmitted signal sequence to obtain a cross-correlation sequence; obtain cross-correlation values at specific intervals based on the cross-correlation sequence to obtain an equalization vector;
[0010] S3. Perform Fourier transform, reciprocal operation, and inverse Fourier transform on the equalization vector to obtain the equalizer;
[0011] S4. Input the received signal sequence into the equalizer to obtain the equalized signal sequence.
[0012] Furthermore, the specific operation of introducing the sampling clock offset in S1 is as follows:
[0013]
[0014] Where z[n] is the processed signal sequence, y[n] is the received signal sequence, and c q (i) represents the fixed coefficients of the filter, m n and μ n A parameter is introduced for the sampling clock offset, where n is the time series index.
[0015] Furthermore, the sampling clock offset introduces the following parameters:
[0016]
[0017] Where λ is the sampling clock offset, and int[] is the rounding function.
[0018] Furthermore, the fixed coefficient c of the filter q The value of (i) is:
[0019] c q (-3) = [-0.0596, 0.1865, -0.0744, -0.0291, -0.0079],
[0020] c q (-2) = [0.1732, -0.517, 0.1845, 0.1171, 0.0155],
[0021] c q (-1) = [-0.2643, 1.074, -0.419, -0.3206, -0.0266],
[0022] c q (0) = [0.1408, -1.3808, 1.2717, 0.923, 0.0426],
[0023] c q(1) = [0.1408, 0.835, -1.9481, -0.0116, 0.999]
[0024] c q (2) = [-0.2643, -0.0497, 1.2137, -0.9299, 0.0131],
[0025] c q (3) = [0.1732, -0.154, -0.3431, 0.3514, -0.0155],
[0026] c q (4) = [-0.0596, 0.0445, 0.132, -0.1351, 0.0112].
[0027] Furthermore, the cross-correlation operation in S2 is as follows:
[0028]
[0029] Among them, R zx [n] is the cross-correlation sequence, m and n are both time series indices, z[n] is the processed signal sequence, and y[n] is the received signal sequence.
[0030] Furthermore, the cross-correlation sequence is interval-wise selected, with the interval being the length of the transmitted signal sequence, resulting in the following equalization vector:
[0031] w = [R zx [0],R zx [L],…,R zx [(M-1)L]],
[0032] Where w is the equilibrium vector, M is the length of the equilibrium vector, and L is the value interval.
[0033] 7. The signal equalization method based on sampling clock offset according to claim 1, characterized in that the transfer function h of the equalizer in S3 is:
[0034] h = IFFT(1 / FFT(w)),
[0035] Where FFT stands for Fourier Transform and IFFT stands for Inverse Fourier Transform.
[0036] According to another aspect of the present invention, a signal equalization system based on sampling clock offset and a signal equalization method based on sampling clock offset are provided, comprising a receiver module, a sampling clock offset introduction module, an equalizer construction module and a signal equalization module connected in sequence.
[0037] The receiving module is used to receive the signal sequence after transmission through optical fiber, that is, to obtain the received signal sequence y[n].
[0038] The sampling clock offset introduction module is used to introduce a controllable sampling clock offset into the received signal sequence y[n] to obtain the processed signal sequence z[n].
[0039] The equalizer construction module is used to perform cross-correlation operation between the processed signal sequence z[n] and the known transmitted signal sequence x[n], and construct an equalizer based on the operation result;
[0040] The signal equalization module is used to filter the received signal sequence y[n] using the equalizer and output the equalized signal sequence.
[0041] According to a third aspect of the present invention, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the program to implement the method described thereon.
[0042] According to a fourth aspect of the present invention, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the method described thereon.
[0043] Compared with the prior art, the present invention has the following beneficial effects:
[0044] (1) Simple and low complexity: By introducing a fixed sampling clock offset (SCO) and combining the cross-correlation operation of the transmitted and received signals, the equalizer is directly constructed. Compared with the traditional equalization algorithm that requires a complex adaptive feedback structure, the complex iterative update and convergence process is eliminated, thus significantly reducing the computational complexity and implementation difficulty of the algorithm.
[0045] (2) High flexibility and easy integration: Since the entire equalizer construction and signal equalization process of this invention is completed in the digital signal processing domain, it does not rely on specific analog devices or complex hardware feedback circuits. Through digital implementation, this method can flexibly adapt to different system configurations and channel conditions. It only needs to adjust the digital parameters, which improves the reconfigurability and flexibility of the system.
[0046] (3) Laying the foundation for system performance improvement: Transforming the common problem of sampling clock offset into a means of constructing an effective equalizer, it provides a new way of signal impairment compensation that is different from the traditional approach. It can effectively combat the increasingly serious bandwidth limitation and signal impairment problems, and provides a feasible technical solution for further improving the transmission capacity and rate of optical fiber communication systems in limited scenarios such as short distances, and has important application prospects. Attached Figure Description
[0047] Figure 1 The flowchart shows a signal equalization method based on sampling clock offset.
[0048] Figure 2 This is the optical fiber communication system architecture of the present invention. Detailed Implementation
[0049] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0050] This embodiment enables the generation of a signal equalizer in an optical fiber communication system using a sampling clock offset method. Specifically, it involves introducing a signal sampling clock offset and obtaining the cross-correlation peaks of the transmitted and received signals. Specifically, the signal sampling clock offset is introduced, and then the cross-correlation is used to process the transmitted and received signals to obtain the signal equalizer. Finally, this equalizer can be used to achieve signal equalization. This embodiment's method is simple to implement, has low complexity, and is highly flexible. Because it is implemented in digital signal processing, it greatly enhances the system's flexibility.
[0051] like Figure 1 The image shows a signal equalization method based on sampling clock offset, the specific steps of which include:
[0052] S1. At the receiving end, a sampling clock offset is introduced into the received signal sequence to obtain the processed signal sequence;
[0053] S2. Perform cross-correlation operation on the processed signal sequence and the transmitted signal sequence to obtain a cross-correlation sequence; obtain the cross-correlation value at a specific interval based on the cross-correlation sequence to obtain the equilibrium vector;
[0054] S3. Perform Fourier transform, take the reciprocal, and perform inverse Fourier transform on the equalization vector to obtain the equalizer;
[0055] S4. Input the received signal sequence into the equalizer to obtain the equalized signal sequence.
[0056] The specific operation of introducing a sampling clock offset in S1 is as follows:
[0057]
[0058] Where z[n] is the processed signal sequence, y[n] is the received signal sequence, and c q (i) represents the fixed coefficients of the filter, m n and μ nA parameter is introduced for the sampling clock offset, where n is the time series index.
[0059] The sampling clock offset introduces the following parameters:
[0060]
[0061] Where λ is the sampling clock offset, and int[] is the rounding function.
[0062] The fixed coefficient c of the filter q The value of (i) is:
[0063] c q (-3) = [-0.0596, 0.1865, -0.0744, -0.0291, -0.0079],
[0064] c q (-2) = [0.1732, -0.517, 0.1845, 0.1171, 0.0155],
[0065] c q (-1) = [-0.2643, 1.074, -0.419, -0.3206, -0.0266],
[0066] c q (0) = [0.1408, -1.3808, 1.2717, 0.923, 0.0426],
[0067] c q (1) = [0.1408, 0.835, -1.9481, -0.0116, 0.999]
[0068] c q (2) = [-0.2643, -0.0497, 1.2137, -0.9299, 0.0131],
[0069] c q (3) = [0.1732, -0.154, -0.3431, 0.3514, -0.0155],
[0070] c q (4) = [-0.0596, 0.0445, 0.132, -0.1351, 0.0112].
[0071] The cross-correlation operation in S2 is as follows:
[0072]
[0073] Among them, R zx[n] is the cross-correlation sequence, m and n are both time series indices, z[n] is the processed signal sequence, and y[n] is the received signal sequence.
[0074] The equalization vector is obtained by taking values at intervals equal to the length of the transmitted signal sequence from the cross-correlation sequence:
[0075] w = [R zx [0],R zx [L],…,R zx [(M-1)L]],
[0076] Where w is the equilibrium vector, M is the length of the equilibrium vector, and L is the value interval.
[0077] The transfer function h of the equalizer in S3 is:
[0078] h = IFFT(1 / FFT(w)),
[0079] Where FFT stands for Fourier Transform and IFFT stands for Inverse Fourier Transform.
[0080] The received signal sequence y[n] is input into an equalizer for signal equalization. The equalized signal a[n] is then:
[0081] a[n] = y[n] * h,
[0082] Where * represents convolution.
[0083] This embodiment utilizes the sampling clock offset (SCO) issue to achieve signal equalization, resulting in greater flexibility. The innovative channel equalization method proposed in this embodiment is based on introducing signal impairments, which is fundamentally different from the traditional equalization algorithms based on adaptive feedback filtering in previous technologies. It can achieve efficient signal equalization through pre-constructed methods, providing an excellent solution for effective signal recovery, large-scale application, and commercial promotion in future fiber optic communication systems. Because it is implemented in digital signal processing, it enhances system flexibility and lays a solid foundation for further improvements in the capacity and speed of future optical millimeter-wave communication fiber optic systems.
[0084] This embodiment also provides a signal equalization system based on sampling clock offset, comprising a receiver module, a sampling clock offset introduction module, an equalizer construction module, and a signal equalization module connected in sequence.
[0085] Among them, the receiving module is used to receive the signal sequence after transmission through optical fiber, that is, to obtain the received signal sequence y[n];
[0086] The sampling clock offset module is used to introduce a controllable sampling clock offset into the received signal sequence y[n] to obtain the processed signal sequence z[n].
[0087] The equalizer construction module is used to perform cross-correlation operation between the processed signal sequence z[n] and the known transmitted signal sequence x[n], and construct an equalizer based on the operation result;
[0088] The signal equalization module is used to filter the received signal sequence y[n] using an equalizer and output the equalized signal sequence.
[0089] The optical fiber communication architecture using the method of this embodiment is as follows: Figure 2 As shown, the architecture also includes a transmitter and a fiber optic link.
[0090] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the described module can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.
[0091] The electronic device of this invention includes a central processing unit (CPU), which can perform various appropriate actions and processes according to computer program instructions stored in read-only memory (ROM) or loaded from a storage unit into random access memory (RAM). The RAM may also store various programs and data required for device operation. The CPU, ROM, and RAM are interconnected via a bus. Input / output (I / O) interfaces are also connected to the bus.
[0092] Multiple components in the device are connected to an I / O interface, including: input units such as a keyboard, mouse, etc.; output units such as various types of displays, speakers, etc.; storage units such as disks, optical disks, etc.; and communication units such as network interface cards, modems, wireless transceivers, etc. The communication unit allows the device to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks. The processing unit performs the various methods and processes described above, such as the method of the present invention. For example, in some embodiments, the method of the present invention may be implemented as a computer software program tangibly contained in a machine-readable medium, such as a storage unit. In some embodiments, part or all of the computer program may be loaded and / or installed on the device via ROM and / or the communication unit. When the computer program is loaded into RAM and executed by the CPU, one or more steps of the method of the present invention described above may be performed. Alternatively, in other embodiments, the CPU may be configured to execute the method of the present invention by any other suitable means (e.g., by means of firmware).
[0093] The functions described above in this document can be performed, at least in part, by one or more hardware logic components. For example, exemplary types of hardware logic components that can be used, without limitation, include: Field Programmable Gate Arrays (FPGAs), Application-Specific Integrated Circuits (ASICs), Application Standard Products (ASSPs), System-on-Chip (SoCs), Complex Programmable Logic Devices (CPLDs), and so on.
[0094] The program code used to implement the methods of the present invention can be written in any combination of one or more programming languages. This program code can be provided to a processor or controller of a general-purpose computer, special-purpose computer, or other programmable data processing device, such that when executed by the processor or controller, the program code causes the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The program code can be executed entirely on the machine, partially on the machine, as a standalone software package partially on the machine and partially on a remote machine, or entirely on a remote machine or server.
[0095] In the context of this invention, a machine-readable medium can be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. Machine-readable media can include, but are not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.
[0096] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.
Claims
1. A signal equalization method based on sampling clock offset, characterized in that, The specific steps include: S1. At the receiving end, a sampling clock offset is introduced into the received signal sequence to obtain the processed signal sequence; S2. Perform cross-correlation operation on the processed signal sequence and the transmitted signal sequence to obtain a cross-correlation sequence; obtain cross-correlation values at specific intervals based on the cross-correlation sequence to obtain an equalization vector; S3. Perform Fourier transform, reciprocal operation, and inverse Fourier transform on the equalization vector to obtain the equalizer; S4. Input the received signal sequence into the equalizer to obtain the equalized signal sequence.
2. The signal equalization method based on sampling clock offset according to claim 1, characterized in that, The specific operation of introducing the sampling clock offset in S1 is as follows: Where a[n] is the processed signal sequence, y[n] is the received signal sequence, and c q (i) represents the fixed coefficients of the filter, m n and μ n A parameter is introduced for the sampling clock offset, where n is the time series index.
3. The signal equalization method based on sampling clock offset according to claim 2, characterized in that, The sampling clock offset introduces the following parameters: Where λ is the sampling clock offset, and int[] is the rounding function.
4. The signal equalization method based on sampling clock offset according to claim 2, characterized in that, The fixed coefficient c of the filter q The value of (i) is: c q (-3)＝[-0.0596,0.1865,-0.0744,-0.0291,-0.0079]， c q (-2)＝[0.1732,-0.517,0.1845,0.1171,0.0155]， c q (-1)＝[-0.2643,1.074,-0.419,-0.3206,-0.0266]， c q (0)＝[0.1408,-1.3808,1.2717,0.923,0.0426]， c q (1)＝[0.1408,0.835,-1.9481,-0.0116,0.999]， c q (2)＝[-0.2643,-0.0497,1.2137,-0.9299,0.0131]， c q (3)＝[0.1732,-0.154,-0.3431,0.3514,-0.0155]， c q (4)＝[-0.0596,0.0445,0.132,-0.1351,0.0112]。 5. The signal equalization method based on sampling clock offset according to claim 1, characterized in that, The cross-correlation operation in S2 is as follows: Among them, R zx [n] is the cross-correlation sequence, m and n are both time series indices, z[n] is the processed signal sequence, and y[n] is the received signal sequence.
6. The signal equalization method based on sampling clock offset according to claim 5, characterized in that, The cross-correlation sequence is then subjected to intervals equal to the length of the transmitted signal sequence, resulting in the following equalization vector: w=[R zx [0],R zx [L],…,R zx [(M-1)L]], Where w is the equilibrium vector, M is the length of the equilibrium vector, and L is the value interval.
7. The signal equalization method based on sampling clock offset according to claim 1, characterized in that, The transfer function h of the equalizer in S3 is: h = IFFT(1 / FFT(w)), Where FFT stands for Fourier Transform and IFFT stands for Inverse Fourier Transform.
8. A signal equalization system based on sampling clock offset, used in the signal equalization method based on sampling clock offset as described in any one of claims 1 to 7, characterized in that, It includes a receiver module, a sampling clock offset introduction module, an equalizer construction module, and a signal equalization module connected in sequence; The receiving module is used to receive the signal sequence after transmission through optical fiber, that is, to obtain the received signal sequence y[n]. The sampling clock offset introduction module is used to introduce a controllable sampling clock offset into the received signal sequence y[n] to obtain the processed signal sequence z[n]. The equalizer construction module is used to perform cross-correlation operation between the processed signal sequence z[n] and the known transmitted signal sequence x[n], and construct an equalizer based on the operation result; The signal equalization module is used to filter the received signal sequence y[n] using the equalizer and output the equalized signal sequence.
9. An electronic device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the program, it implements the method as described in any one of claims 1 to 7.
10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the method as described in any one of claims 1 to 7.