Voltage sampling methods, source-carrier integrated machines, devices, equipment and media

Abstract

This application discloses a voltage sampling method, a source-carrier integrated unit, an apparatus, equipment, and a medium. The method includes acquiring initial voltage sampling data and sampling circuit parameters of the source-carrier integrated unit; inputting the sampling resistor accuracy deviation value and sampling resistor voltage division ratio of each phase into an interference voltage accuracy deviation model to obtain the interference voltage accuracy coefficient of each phase; calculating the common-mode interference voltage of each phase based on the initial voltage sampling data and the interference voltage accuracy coefficient of each phase; calculating the corresponding voltage compensation amount for each phase based on the common-mode interference voltage of each phase; and compensating the initial voltage sampling data based on the voltage compensation amount of each phase to obtain the first target voltage sampling data. This application can improve the voltage sampling accuracy of the source-carrier integrated unit.

Description

Technical Field

[0001] This application relates to the field of source-carrier integrated machines, and in particular to a voltage sampling method, a source-carrier integrated machine, an apparatus, equipment, and a medium. Background Technology

[0002] A source-carrier integrated instrument is an instrument that simultaneously provides AC / DC power and AC / DC load functions, offering high-precision measurement and a wide range of testing capabilities.

[0003] The integrated source-carrier converter includes a bidirectional AC-DC circuit, a bidirectional resonant converter, and a bidirectional full-bridge inverter circuit. It is mainly used in the new energy field and has high requirements for the quality of the output voltage, especially in terms of accuracy. The integrated source-carrier converter has multiple output phase modes, including three-phase, single-phase, split-phase, and reverse. The output coupling methods include AC, DC, AC+DC, and DC+AC.

[0004] When the source-carrier integrated unit performs different combined outputs, especially when the three-phase unbalanced output is used, the voltage of other phases will affect the voltage sampling of this phase, resulting in low voltage sampling accuracy and causing problems such as difficulty in calibration and exceeding accuracy limits. Summary of the Invention

[0005] This application aims to provide a voltage sampling method, a source-carrier integrated machine, a device, equipment, and a medium that can improve the voltage sampling accuracy of the source-carrier integrated machine.

[0006] In a first aspect, embodiments of this application provide a voltage sampling method for a source-carrier integrated machine, the method comprising the following steps:

[0007] The initial voltage sampling data and sampling circuit parameters of the source-carrier integrated machine are obtained. The sampling circuit parameters are used to indicate the device parameters of each phase sampling circuit of the source-carrier integrated machine. The sampling circuit parameters include the sampling resistor accuracy deviation value and the sampling resistor voltage division ratio of each phase sampling circuit.

[0008] The sampling resistor accuracy deviation value and the sampling resistor voltage division ratio of each phase are input into the interference voltage accuracy deviation model to obtain the interference voltage accuracy coefficient of each phase.

[0009] The common-mode interference voltage of each phase is calculated based on the initial voltage sampling data and the interference voltage accuracy coefficient of each phase. The common-mode interference voltage is used to indicate the coupling voltage formed in this phase by other phases through differential-mode interference.

[0010] The voltage compensation amount for each phase is calculated based on the common-mode interference voltage of each phase.

[0011] The initial voltage sampling data is compensated according to the voltage compensation amount of each phase to obtain the first target voltage sampling data.

[0012] According to some embodiments of this application, the sampling circuit parameters include A-phase sampling circuit parameters, B-phase sampling circuit parameters, and C-phase sampling circuit parameters; the initial voltage sampling data includes A-phase voltage sampling values, B-phase voltage sampling values, and C-phase voltage sampling values; the common-mode interference voltage of each phase includes A-phase common-mode interference voltage, B-phase common-mode interference voltage, and C-phase common-mode interference voltage; and the common-mode interference voltage of each phase is calculated based on the initial voltage sampling data and the sampling circuit parameters, including:

[0013] The first common-mode interference voltage is calculated based on the voltage sampling value of phase A and the parameters of the phase A sampling circuit. The second common-mode interference voltage is calculated based on the voltage sampling value of phase B and the parameters of the phase B sampling circuit. The third common-mode interference voltage is calculated based on the voltage sampling value of phase C and the parameters of the phase C sampling circuit. The first common-mode interference voltage is used to indicate the coupling voltage formed by phase A in other phases through differential-mode interference. The second common-mode interference voltage is used to indicate the coupling voltage formed by phase B in other phases through differential-mode interference. The third common-mode interference voltage is used to indicate the coupling voltage formed by phase C in other phases through differential-mode interference.

[0014] The second common-mode interference voltage and the third common-mode interference voltage are added together to obtain the phase A common-mode interference voltage. The first common-mode interference voltage and the third common-mode interference voltage are added together to obtain the phase B common-mode interference voltage. The first common-mode interference voltage and the second common-mode interference voltage are added together to obtain the phase C common-mode interference voltage.

[0015] According to some embodiments of this application, the parameters of the A-phase sampling circuit include the accuracy deviation value of the A-phase sampling resistor and the voltage division ratio of the A-phase sampling resistor. The calculation of the first common-mode interference voltage based on the A-phase voltage sampling value and the A-phase sampling circuit parameters includes:

[0016] The accuracy deviation value of the sampling resistor of phase A and the voltage division ratio of the sampling resistor of phase A are input into the interference voltage accuracy deviation model to obtain the interference voltage accuracy coefficient of phase A.

[0017] The first common-mode interference voltage is obtained by multiplying the A-phase interference voltage accuracy coefficient by the A-phase voltage sampling value;

[0018] and / or;

[0019] The parameters of the B-phase sampling circuit include the accuracy deviation value of the B-phase sampling resistor and the voltage division ratio of the B-phase sampling resistor. The calculation of the second common-mode interference voltage based on the B-phase voltage sampling value and the B-phase sampling circuit parameters includes:

[0020] The accuracy deviation value of the B-phase sampling resistor and the voltage division ratio of the B-phase sampling resistor are input into the interference voltage accuracy deviation model to obtain the B-phase interference voltage accuracy coefficient.

[0021] The second common-mode interference voltage is obtained by multiplying the B-phase interference voltage accuracy coefficient by the B-phase voltage sampling value.

[0022] and / or;

[0023] The parameters of the C-phase sampling circuit include the accuracy deviation value of the C-phase sampling resistor and the voltage division ratio of the C-phase sampling resistor. The calculation of the second common-mode interference voltage based on the C-phase voltage sampling value and the C-phase sampling circuit parameters includes:

[0024] Based on the C-phase sampling resistor accuracy deviation value and the C-phase sampling resistor voltage division ratio input interference voltage accuracy deviation model, the C-phase interference voltage accuracy coefficient is obtained;

[0025] The third common-mode interference voltage is obtained by multiplying the C-phase interference voltage accuracy coefficient by the C-phase voltage sampling value.

[0026] According to some embodiments of this application, the first target voltage sampling data includes a first target sampling voltage for each phase; after compensating the initial voltage sampling data according to the voltage compensation amount of each phase to obtain the first target voltage sampling data, the method further includes:

[0027] The accuracy deviation coefficient for each phase is calculated based on the sampling circuit parameters.

[0028] Divide the first target sampling voltage of each phase by the accuracy deviation coefficient of the corresponding phase to obtain the second target sampling voltage of each phase;

[0029] The second target voltage sampling data is obtained based on the second target sampling voltage of each phase.

[0030] According to some embodiments of this application, the sampling circuit parameters include the number of phases, the sampling resistor accuracy deviation value for each phase, and the sampling resistor voltage division ratio for each phase. The calculation of the accuracy deviation coefficient for each phase based on the sampling circuit parameters includes:

[0031] The number of phases, the accuracy deviation value of the sampling resistor for each phase, and the voltage division ratio of the sampling resistor for each phase are input into the sampling accuracy deviation model to obtain the accuracy deviation coefficient for each phase.

[0032] Secondly, embodiments of this application provide a source-carrier integrated machine, including a voltage sampling circuit and a controller. The voltage sampling circuit is used to acquire initial voltage sampling data, and the controller performs voltage sampling of the source-carrier integrated machine using the voltage sampling method described in the first aspect embodiment.

[0033] Thirdly, embodiments of this application provide a voltage sampling device, including:

[0034] The data acquisition module is used to acquire the initial voltage sampling data and sampling circuit parameters of the source-carrier integrated machine. The sampling circuit parameters are used to indicate the device parameters of each phase sampling circuit of the source-carrier integrated machine.

[0035] The common-mode interference processing module is used to calculate the common-mode interference voltage of each phase based on the initial voltage sampling data and the sampling circuit parameters. The common-mode interference voltage is used to indicate the coupling voltage formed in this phase by other phases through differential-mode interference.

[0036] The compensation calculation module is used to calculate the voltage compensation amount for each phase based on the common-mode interference voltage of each phase.

[0037] The voltage compensation module is used to compensate the initial voltage sampling data according to the voltage compensation amount of each phase to obtain the first target voltage sampling data.

[0038] Fourthly, embodiments of this application provide an electronic device, the device comprising: a processor and a memory storing computer program instructions;

[0039] When the processor executes the computer program instructions, it implements the voltage sampling method as described in the first aspect.

[0040] Fifthly, embodiments of this application provide a computer-readable storage medium storing computer program instructions that, when executed by a processor, implement the voltage sampling method as described in the first aspect.

[0041] The voltage sampling method, source-carrier integrated machine, device, equipment, and medium of the embodiments of this application have at least the following beneficial effects:

[0042] In this embodiment, the initial voltage sampling data and sampling circuit parameters of the source-carrier integrated machine are first acquired. The sampling circuit parameters include the sampling resistor accuracy deviation value and the sampling resistor voltage division ratio of each phase sampling circuit. The sampling resistor accuracy deviation value and the sampling resistor voltage division ratio of each phase are input into the interference voltage accuracy deviation model to obtain the interference voltage accuracy coefficient of each phase. The common-mode interference voltage of each phase is calculated based on the initial voltage sampling data and the interference voltage accuracy coefficient of each phase. The voltage compensation amount corresponding to each phase is calculated based on the common-mode interference voltage of each phase. The initial voltage sampling data is compensated based on the voltage compensation amount of each phase to obtain the first target voltage sampling data. This application can reduce the influence of other factors relative to the voltage sampling of this phase and improve the voltage sampling accuracy of the source-carrier integrated machine.

[0043] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0044] The present application will be further described below with reference to the accompanying drawings and embodiments, wherein:

[0045] Figure 1 A schematic flowchart illustrating an embodiment of the voltage sampling method provided in this application;

[0046] Figure 2 This is a circuit diagram of the three-phase voltage sampling circuit in the integrated source and load generator;

[0047] Figure 3 for Figure 2 A exploded view of the first part of the phase A voltage sampling circuit;

[0048] Figure 4 for Figure 2 A exploded view of the second part of the phase A voltage sampling circuit;

[0049] Figure 5 for Figure 2 A schematic diagram of the third part of the phase A voltage sampling circuit;

[0050] Figure 6 This is a schematic diagram of the voltage sampling device provided in this application;

[0051] Figure 7 A schematic diagram of the structure of the electronic device provided in this application. Detailed Implementation

[0052] The features and exemplary embodiments of various aspects of this application will be described in detail below. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain this application and not to limit it. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples.

[0053] In this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, without necessarily requiring or implying any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.

[0054] To address the problems of the prior art, embodiments of this application provide a voltage sampling method, a source-carrier integrated device, an apparatus, equipment, and a medium. The voltage sampling method provided in the embodiments of this application will be described first.

[0055] Figure 1 A schematic flowchart of the voltage sampling method provided in this application embodiment is shown. This method is applied to a source-carrier integrated machine and includes the following steps:

[0056] S101. Obtain the initial voltage sampling data and sampling circuit parameters of the source-carrier integrated machine. The sampling circuit parameters are used to indicate the device parameters of each phase sampling circuit of the source-carrier integrated machine. The sampling circuit parameters include the sampling resistor accuracy deviation value and the sampling resistor voltage division ratio of each phase sampling circuit.

[0057] S102. Input the sampling resistor accuracy deviation value and sampling resistor voltage division ratio of each phase into the interference voltage accuracy deviation model to obtain the interference voltage accuracy coefficient of each phase.

[0058] S103. Calculate the common-mode interference voltage of each phase based on the initial voltage sampling data and the interference voltage accuracy coefficient of each phase. The common-mode interference voltage is used to indicate the coupling voltage formed in this phase by other phases through differential-mode interference.

[0059] S104. Calculate the voltage compensation amount corresponding to each phase based on the common-mode interference voltage of each phase.

[0060] S105. Compensate the initial voltage sampling data according to the voltage compensation amount of each phase to obtain the first target voltage sampling data.

[0061] It should be noted that, through in-depth analysis of the sampling circuit, this invention has revealed that the key reason affecting the voltage sampling accuracy of the source-carrier integrated machine is that the differential-mode voltage of other phases is converted into the common-mode voltage of this phase. After passing through the resistor voltage divider circuit, the difference in the accuracy of the resistors causes the positive and negative terminals of the amplifier to exhibit coupled differential-mode voltage. When the differential-mode voltage of other phases changes, this coupled differential-mode voltage will also change accordingly. Moreover, the more phases there are, the more sampling points there are, the more components of the coupled differential-mode voltage there are, and the more complex the changes are.

[0062] Therefore, in this embodiment, the initial voltage sampling data and sampling circuit parameters of the source-carrier integrated machine are first acquired; then, the common-mode interference voltage of each phase is calculated based on the initial voltage sampling data and sampling circuit parameters; then, the corresponding voltage compensation amount is calculated based on the common-mode interference voltage of each phase; finally, the initial voltage sampling data is compensated based on the voltage compensation amount of each phase to obtain the first target voltage sampling data. This application can reduce the influence of other factors relative to the voltage sampling of this phase and improve the voltage sampling accuracy of the source-carrier integrated machine.

[0063] In step S101 above, obtaining the initial voltage sampling data of the source-carrier integrated machine refers to obtaining the voltage sampling value of each phase through the voltage sampling circuit. For example, for a three-phase output mode source-carrier integrated machine, the initial voltage sampling data refers to the voltages of phase A, phase B, and phase C. For another example, for a six-phase system source-carrier integrated machine, the initial voltage sampling data refers to the voltage sampling values ​​of phase A1, phase B1, phase C1, phase A2, phase B2, and phase C2.

[0064] It should be noted that the integrated source-load unit consists of a bidirectional AC-DC circuit, a bidirectional resonant converter, and a full-bridge inverter circuit. When used as an AC / DC source, the AC380V AC power is converted to DC power factor correction and regulated output via the bidirectional AC-DC converter. The resonant converter provides electrical isolation and voltage step-up / step-down functionality. The output of the resonant converter is then converted to DC power via the full-bridge inverter circuit to achieve wide-range voltage regulation and complete the required voltage output. When used as a load, the process is reversed. The AC source voltage is applied to a capacitor, converted to a corresponding DC voltage by the full-bridge inverter circuit, and the resonant converter provides electrical isolation and voltage step-up / step-down functionality. Its output is converted to DC power via the bidirectional AC-DC converter, ultimately feeding energy back to the grid. An example simplified circuit diagram of the three-phase voltage sampling of the integrated source-load unit is shown below. Figure 2 As shown, each phase is fed into an instrumentation amplifier for amplification after passing through a resistor divider circuit, then to an AD sampling chip, and finally to an FPGA for sampling.

[0065] The sampling circuit parameters in step S101 above refer to the component parameters of each phase voltage sampling circuit, including at least the sampling resistor accuracy deviation value and the sampling resistor voltage division ratio of each phase sampling circuit, and may also include the sampling resistor value, the number of phases, etc.

[0066] In step S102 above, the sampling resistor accuracy deviation value and the sampling resistor voltage division ratio of each phase are input into the interference voltage accuracy deviation model to obtain the interference voltage accuracy coefficient of each phase; and in step S103 above, the common-mode interference voltage of each phase is calculated based on the initial voltage sampling data and the interference voltage accuracy coefficient of each phase. The common-mode interference voltage is used to indicate the coupling voltage formed in this phase by other phases through differential-mode interference. This means that the interference voltage accuracy coefficient is first calculated based on the hardware parameters of the sampling circuit of each phase, and then the common-mode interference voltage of each phase is calculated based on the voltage sampling value of each phase and the interference voltage accuracy coefficient. The common-mode interference voltage of each phase refers to the coupled differential-mode voltage presented at the positive and negative terminals of the amplifier corresponding to the voltage acquisition circuit of this phase due to the influence of the differential-mode voltage of other phases. For example, in a three-phase circuit, phase A will experience additional coupled differential-mode voltage due to the differential-mode voltage changes of phases B and C. This affected voltage is the common-mode interference voltage of phase A. Similarly, phase B will also experience additional coupled differential-mode voltage due to the differential-mode voltage changes of phases A and C. This affected voltage is the common-mode interference voltage of phase B. The following will explain the reasoning process for common-mode interference voltage using phase A as an example:

[0067] refer to Figure 2 The diagram shows a simplified circuit diagram of the voltage divider circuit for phases A, B, and C. The sampling voltage of phase A is then calculated using the superposition principle, as follows: Figures 3 to 5 As shown, the sampling voltage of phase A can be divided into three parts, as follows:

[0068] Figure 3 The diagram shows the decomposition of the first part of the differential voltage in the sampled voltage of phase A. The first part of the differential voltage is the actual voltage of phase A, that is, the sampled voltage value of phase A when phases B and C do not interfere with phase A. At this time, the voltage sample value of phase A is the voltage difference between points VA(1+) and VA(1-), that is, the differential mode voltage before the op-amp. Let the actual voltage of phase A be VA(1)dif, then we can get:

[0069] ;

[0070] Figure 4 This is a schematic diagram of the decomposition of the second part of the differential voltage in the sampling voltage of phase A. The second part of the differential voltage is the additional coupled differential voltage generated by the differential mode voltage change of phase B on phase A, which is called the second common mode interference voltage VA(2)dif. VA(2)dif is... Figure 4The voltage difference between points VA(2+) and VA(2-) is the differential-mode voltage before the op-amp. The voltage at VA(2+) is... Figure 4 The common-mode voltage value of VA(2+) relative to GND, and the voltage of VA(2-) are... Figure 4 The common-mode voltage value of point VA(2-) relative to GND, let Vcn_com be... Figure 4 The common-mode voltage between point Un and GND is:

[0071] ;

[0072] The voltage expressions for VA(2+) and VA(2-) can be written as:

[0073] ;

[0074] ;

[0075] Where, Ub is the B-phase voltage, PH is the number of phases, and since it is a three-phase circuit in this embodiment, PH=3, N2 is the voltage divider resistor ratio of the B-phase sampling circuit, that is, the ratio of the upper and lower voltage divider resistors in the B-phase sampling circuit, b is the accuracy deviation value of the B-phase sampling resistor, R1 is the upper voltage divider resistor at the positive input of the instrumentation amplifier, and R2 is the lower voltage divider resistor at the negative input of the instrumentation amplifier in the corresponding sampling circuit. Therefore, the expression for VA(2)dif is:

[0076] ;

[0077] The following derivation yields the following result:

[0078] ;

[0079] ;

[0080] set up ;

[0081] Therefore, we can conclude that:

[0082] .

[0083] A(2)_c is the accuracy coefficient of the interference voltage of phase B. According to the expression of A(2)_c, when the component parameters of the sampling circuit of phase B are selected, A(2)_c is a fixed value. If the sampling resistor of phase B is an ideal resistor, that is, when there is no resistance accuracy deviation, b=0, then A(2)_c=0, that is, VA(2)_dif=0, which means that the voltage change of phase B will not affect the voltage sampling of phase A. However, in practical applications, b cannot be zero. Therefore, when b is not equal to 0, A(2)_c is analyzed, and it can be concluded that:

[0084] When N2>1, it is monotonically increasing; the value of VA(2)_dif decreases as N2 increases.

[0085] When b>0, it is monotonically decreasing; VA(2)_dif decreases as b decreases;

[0086] When pH>1, 1 / pH decreases monotonically, and the value of VA(2)_dif decreases as pH increases;

[0087] Therefore, we can conclude that VA(2)_dif is simultaneously affected by the phase B voltage Ub, the accuracy deviation value b, the voltage divider resistor ratio N2, and the number of phases PH; and when b>0, the voltage change of Ub will affect the voltage sampling of Ua; it is negatively correlated with N2 and PH, and decreases as N2 and PH increase; it is positively correlated with Ub and b, and decreases as Ub and b decrease. When the hardware of the source-carrier integrated machine is determined, the values ​​of N2, PH and b are fixed, so A(2)_c can be calculated, and the second common-mode interference voltage VA(2)dif can be obtained.

[0088] Figure 5 This is a schematic diagram of the decomposition of the third part of the differential voltage in the sampling voltage of phase A. The third part of the differential voltage is the additional coupled differential voltage generated by the differential mode voltage change of phase C in phase A, which is called the third common mode interference voltage VA(3)dif. VA(3)dif is... Figure 5 The voltage difference between points VA(3+) and VA(3-) is the differential-mode voltage before the op-amp. The voltage at VA(3+) is... Figure 5 The common-mode voltage value of VA(3+) relative to GND, and the voltage of VA(3-) are... Figure 5 Let Ucn_com be the common-mode voltage value of point VA(3-) relative to GND. Figure 5 The common-mode voltage between point Un and GND is:

[0089] ;

[0090] The voltage expressions for VA(3+) and VA(3-) can be written as:

[0091] ;

[0092] ;

[0093] Where Uc is the C-phase voltage, N3 is the voltage divider resistor ratio of the C-phase sampling circuit, that is, the ratio of the upper resistor to the lower resistor in the C-phase sampling circuit, and c is the accuracy deviation value of the C-phase sampling resistor. Therefore, the expression for VA(3)dif is:

[0094] ;

[0095] The following derivation yields the following result:

[0096] ;

[0097] ;

[0098] set up ;

[0099] Therefore, we can conclude that:

[0100] .

[0101] A(3)_c is the C-phase interference voltage accuracy coefficient.

[0102] The derivation process of phase C is similar to that of phase B, and the following conclusions can be drawn: VA (3) _dif is simultaneously affected by phase voltage Uc, voltage accuracy deviation c, voltage divider resistance ratio N3, and phase number PH; when a=0, the voltage change of phase Uc will not affect the voltage sampling of Ua; when a>0, the voltage change of phase Uc will affect the voltage sampling of Ua; it is negatively correlated with N3 and PH, and decreases as N3 and PH increase; it is positively correlated with Uc and c, and decreases as Uc and c decrease.

[0103] In summary, let the sampled voltage of phase A be VA_dif. Therefore, according to the superposition principle, the expression for VA_dif is:

[0104] ;

[0105] Therefore, VA(2)_dif+VA(3)_dif is the common-mode interference voltage of phase A.

[0106] In summary, the expression for the interference voltage accuracy deviation model is:

[0107] ;

[0108] Where A(x)_c is the interference voltage accuracy coefficient of any phase, N is the voltage division ratio of the phase, and y is the sampling resistor accuracy deviation of the phase.

[0109] In step S104 above, the voltage compensation amount of each phase is calculated based on the common-mode interference voltage of each phase; this refers to calculating the compensation amount of each phase based on the common-mode interference voltage in step S103. For example, taking phase A as an example, let the compensation amount of the sampling voltage of phase A be VA_c, so VA_c = VA (2) _dif + VA (3) _dif. The compensation amount of other phases is calculated in the same way.

[0110] In step S105 above, the initial voltage sampling data is compensated according to the voltage compensation amount of each phase to obtain the first target voltage sampling data. This means that in the actual calculation of the sampling program, the actual voltage value of the current phase can be obtained by subtracting the corresponding compensation amount from the current phase sampling voltage value, thereby eliminating the influence of common-mode interference voltage and obtaining the actual voltage value of each phase. For example, the actual voltage of phase A is obtained by subtracting the compensation amount VA_c from the sampling voltage value VA_dif of phase A. Similarly, the actual voltage of each phase can be obtained, thereby obtaining the first target voltage sampling data.

[0111] In some implementations, the sampling circuit parameters include A-phase sampling circuit parameters, B-phase sampling circuit parameters, and C-phase sampling circuit parameters; the initial voltage sampling data includes A-phase voltage sampling values, B-phase voltage sampling values, and C-phase voltage sampling values; the common-mode interference voltage of each phase includes A-phase common-mode interference voltage, B-phase common-mode interference voltage, and C-phase common-mode interference voltage; and the common-mode interference voltage of each phase is calculated based on the initial voltage sampling data and the sampling circuit parameters, which may include:

[0112] The first common-mode interference voltage is calculated based on the voltage sampling value of phase A and the parameters of the phase A sampling circuit. The second common-mode interference voltage is calculated based on the voltage sampling value of phase B and the parameters of the phase B sampling circuit. The third common-mode interference voltage is calculated based on the voltage sampling value of phase C and the parameters of the phase C sampling circuit. The first common-mode interference voltage is used to indicate the coupling voltage formed by phase A in other phases through differential-mode interference. The second common-mode interference voltage is used to indicate the coupling voltage formed by phase B in other phases through differential-mode interference. The third common-mode interference voltage is used to indicate the coupling voltage formed by phase C in other phases through differential-mode interference.

[0113] The second common-mode interference voltage and the third common-mode interference voltage are added together to obtain the phase A common-mode interference voltage. The first common-mode interference voltage and the third common-mode interference voltage are added together to obtain the phase B common-mode interference voltage. The first common-mode interference voltage and the second common-mode interference voltage are added together to obtain the phase C common-mode interference voltage.

[0114] In this embodiment, the first common-mode interference voltage is calculated based on the A-phase voltage sampling value and the A-phase sampling circuit parameters. The second common-mode interference voltage is calculated based on the B-phase voltage sampling value and the B-phase sampling circuit parameters. The third common-mode interference voltage is calculated based on the C-phase voltage sampling value and the C-phase sampling circuit parameters. Then, the second and third common-mode interference voltages are added to obtain the A-phase common-mode interference voltage. The first and third common-mode interference voltages are added to obtain the B-phase common-mode interference voltage. Finally, the first and second common-mode interference voltages are added to obtain the C-phase common-mode interference voltage. This method allows for the rapid and accurate acquisition of the three-phase common-mode interference voltages.

[0115] The above-mentioned A-phase sampling circuit parameters, B-phase sampling circuit parameters, and C-phase sampling circuit parameters refer to the sampling resistance value, sampling resistance accuracy deviation value, and voltage divider resistance ratio for each phase.

[0116] The first common-mode interference voltage is calculated based on the A-phase voltage sampling value and the A-phase sampling circuit parameters. This means that the first common-mode interference voltage is calculated by taking the A-phase voltage sampling value from the initial voltage sampling data, the A-phase sampling resistor value, the sampling resistor accuracy deviation value, and the voltage divider resistor ratio. The second and third common-mode interference voltages are calculated in the same way.

[0117] The calculation process for common-mode interference voltage has been described in detail in the above embodiments and will not be repeated here.

[0118] It should be understood that the coupled common-mode voltage generated by the influence of other phases on phase A is the second common-mode interference voltage plus the third common-mode interference voltage; similarly, the coupled common-mode voltage generated by the influence of other phases on phase B is the first common-mode interference voltage plus the third common-mode interference voltage; and the coupled common-mode voltage generated by the influence of other phases on phase C is the first common-mode interference voltage plus the second common-mode interference voltage.

[0119] When calculating the compensation for the actual voltage values ​​of each phase, simply subtract the compensation amount corresponding to the common-mode interference voltage of other phases from the voltage sample value.

[0120] In some implementations, the parameters of the A-phase sampling circuit include the accuracy deviation value of the A-phase sampling resistor and the voltage division ratio of the A-phase sampling resistor. The first common-mode interference voltage is calculated based on the A-phase voltage sampling value and the A-phase sampling circuit parameters, and may include:

[0121] Input the accuracy deviation value of the sampling resistor of phase A and the voltage division ratio of the sampling resistor of phase A into the interference voltage accuracy deviation model to obtain the interference voltage accuracy coefficient of phase A;

[0122] The first common-mode interference voltage is obtained by multiplying the phase A interference voltage accuracy coefficient by the phase A voltage sampling value;

[0123] and / or;

[0124] The parameters of the B-phase sampling circuit include the accuracy deviation of the B-phase sampling resistor and the voltage division ratio of the B-phase sampling resistor. Based on the B-phase voltage sampling value and the B-phase sampling circuit parameters, the second common-mode interference voltage is calculated, including:

[0125] Input the accuracy deviation value of the B-phase sampling resistor and the voltage division ratio of the B-phase sampling resistor into the interference voltage accuracy deviation model to obtain the B-phase interference voltage accuracy coefficient;

[0126] The second common-mode interference voltage is obtained by multiplying the B-phase interference voltage accuracy coefficient by the B-phase voltage sampling value.

[0127] and / or;

[0128] The parameters of the C-phase sampling circuit include the accuracy deviation of the C-phase sampling resistor and the voltage division ratio of the C-phase sampling resistor. The second common-mode interference voltage is calculated based on the C-phase voltage sampling value and the C-phase sampling circuit parameters, including:

[0129] Based on the C-phase sampling resistor accuracy deviation value and the C-phase sampling resistor voltage division ratio input interference voltage accuracy deviation model, the C-phase interference voltage accuracy coefficient is obtained;

[0130] The third common-mode interference voltage is obtained by multiplying the C-phase interference voltage accuracy coefficient by the C-phase voltage sampling value.

[0131] In this embodiment, the accuracy deviation value of the A-phase sampling resistor and the voltage division ratio of the A-phase sampling resistor are input into the interference voltage accuracy deviation model to obtain the A-phase interference voltage accuracy coefficient; the first common-mode interference voltage is obtained by multiplying the A-phase interference voltage accuracy coefficient by the A-phase voltage sampling value; and / or;

[0132] The accuracy deviation value of the B-phase sampling resistor and the voltage division ratio of the B-phase sampling resistor are input into the interference voltage accuracy deviation model to obtain the B-phase interference voltage accuracy coefficient; the second common-mode interference voltage is obtained by multiplying the B-phase interference voltage accuracy coefficient by the B-phase voltage sampling value.

[0133] and / or;

[0134] Based on the C-phase sampling resistor accuracy deviation value and the C-phase sampling resistor voltage division ratio input interference voltage accuracy deviation model, the C-phase interference voltage accuracy coefficient is obtained; by multiplying the C-phase interference voltage accuracy coefficient by the C-phase voltage sampling value, the third common-mode interference voltage is obtained.

[0135] The corresponding common-mode interference voltages can be quickly calculated using the interference voltage accuracy deviation model.

[0136] Based on the foregoing analysis, the expression for the interference voltage accuracy deviation model is as follows:

[0137] ;

[0138] Specifically, taking the second common-mode interference voltage corresponding to B as an example, by inputting the accuracy deviation value b of the sampling resistor of phase B and the voltage division ratio N2 of the sampling resistor of phase B into the interference voltage accuracy deviation model, the expression of the accuracy coefficient A(2)_c of the interference voltage of phase B can be obtained as follows:

[0139] ;

[0140] Then, by multiplying the B-phase interference voltage accuracy coefficient A(2)_c by the B-phase voltage sampling value Ub, the expression for the second common-mode interference voltage VA(2)_dif can be obtained as follows:

[0141] .

[0142] The calculation methods for the first and third common-mode interference voltages corresponding to A and C are similar and will not be described in detail here.

[0143] In some implementations, the first target voltage sampling data includes the first target sampling voltage of each phase; after compensating the initial voltage sampling data according to the voltage compensation amount of each phase to obtain the first target voltage sampling data, it may further include:

[0144] Calculate the accuracy deviation coefficient for each phase based on the sampling circuit parameters;

[0145] Divide the first target sampling voltage of each phase by the accuracy deviation coefficient of the corresponding phase to obtain the second target sampling voltage of each phase;

[0146] The second target voltage sampling data is obtained based on the second target sampling voltage of each phase.

[0147] In this embodiment, the accuracy deviation coefficient of each phase is first calculated based on the sampling circuit parameters. Then, the first target sampling voltage of each phase is divided by the accuracy deviation coefficient of the corresponding phase to obtain the second target sampling voltage of each phase. Finally, the second target voltage sampling data is obtained based on the second target sampling voltage of each phase. This can further improve the sampling accuracy.

[0148] It should be noted that, according to the first target voltage sampling data obtained in step S104, although the common-mode interference voltage caused by other phases is removed and the sampling accuracy is improved, the voltage sampling accuracy of this phase is still affected by the accuracy deviation of the sampling circuit of this phase. Therefore, in order to further improve the sampling accuracy, this embodiment calculates the accuracy deviation coefficient of each phase according to the sampling circuit parameters, and then divides the first target sampling voltage of each phase by the accuracy deviation coefficient of the corresponding phase, which can improve the sampling accuracy of the phase voltage, thereby further improving the overall sampling accuracy.

[0149] The following is a detailed analysis: (Reference) Figure 3 As shown, the first part of the differential voltage in the A-phase sampling voltage is further decomposed. According to the above, the first part of the differential voltage is the true voltage of A-phase, that is, the sampling voltage value of A-phase when there is no interference between B-phase and C-phase. At this time, the voltage sampling value of A-phase is the voltage difference between points VA(1+) and VA(1-). Then the expressions for the voltage at point VA(1+) and the voltage at point VA(1-) are as follows:

[0150] ; ;

[0151] Therefore, we can conclude that:

[0152] ;

[0153] The following derivation yields the following result:

[0154] ;

[0155] ;

[0156] ;

[0157] Wherein, PH is the number of phases. In this embodiment, since it is a three-phase circuit, PH=3. N1 is the voltage divider resistor ratio of the A-phase sampling circuit, that is, the ratio of the upper resistor to the lower resistor in the A-phase sampling circuit. a is the accuracy deviation value of the A-phase sampling resistor. For example, when the accuracy of the sampling resistor is 0.1%, a=0.001. The accuracy deviation value of the sampling resistor can be obtained by measurement through verification. Ua is the true value of the A-phase voltage sampling.

[0158] set up Define it as the accuracy deviation coefficient A_c, and we can get: VA(1)_dif=Ua*A_c. Once the circuit device parameters are selected, A_c is a fixed value.

[0159] Therefore, the true value of the phase A voltage sample is Ua = VA (1) _dif / A_c. Ua is the voltage sample value after eliminating the sampling accuracy deviation of this phase.

[0160] In some implementations, the sampling circuit parameters include the number of phases, the sampling resistor accuracy deviation value for each phase, and the sampling resistor voltage division ratio for each phase. Obtaining the accuracy deviation coefficient for each phase based on the sampling circuit parameters may include:

[0161] By inputting the number of phases, the sampling resistor accuracy deviation value for each phase, and the sampling resistor voltage division ratio for each phase into the sampling accuracy deviation model, the accuracy deviation coefficient for each phase is obtained.

[0162] In this embodiment, the number of phases, the sampling resistor accuracy deviation value of each phase, and the sampling resistor voltage division ratio of each phase are first input into the sampling accuracy deviation model to obtain the accuracy deviation coefficient of each phase.

[0163] Specifically, the expression for the sampling accuracy deviation model mentioned above is:

[0164] ;

[0165] Where X is any phase, N is the voltage division ratio of any phase, and y is the sampling resistor accuracy deviation value of any phase.

[0166] It should be noted that although both the sampling accuracy deviation model and the interference voltage accuracy deviation model are calculated based on the resistor voltage division ratio, the sampling resistor accuracy deviation value, and the number of phases, the sampling accuracy deviation model is used to calculate the accuracy deviation coefficient of the current phase, while the interference voltage accuracy deviation model is used to calculate the interference voltage accuracy deviation of the current phase to other phases. Therefore, the expressions of the two are different, and the calculated results are also different.

[0167] For example, taking phase A as an example, substituting the voltage divider resistor ratio N1 of the phase A sampling circuit, the number of phases PH=3, and the accuracy deviation value a of the phase A sampling resistor into the sampling accuracy deviation model, we can obtain:

[0168] .

[0169] In summary, this application, through in-depth analysis of the sampling circuit of the source-carrier integrated machine, found that the key reason affecting accuracy is that the differential-mode voltage of other phases is converted into the common-mode voltage of this phase. After passing through the resistor voltage divider circuit, the difference in the accuracy of the resistors causes the positive and negative terminals of the amplifier to exhibit coupled differential-mode voltage. When the differential-mode voltage of other phases changes, this coupled differential-mode voltage will also change. Moreover, the more phases and the more sampling points there are, the more components of the coupled differential-mode voltage are, and the more complex the changes are.

[0170] Therefore, this application calculates the coupled common-mode voltage of other phases acting on this phase, removes the coupled common-mode voltage, and then divides it by the accuracy deviation coefficient of this phase. This allows for real-time compensation of accuracy deviation and improves the accuracy of voltage sampling by the source-carrier integrated machine.

[0171] This application also relates to a source-carrier integrated machine, including a voltage sampling circuit and a controller. The voltage sampling circuit is used to acquire initial voltage sampling data, and the controller performs voltage sampling of the source-carrier integrated machine using the voltage sampling method described above.

[0172] Specifically, the integrated source and load unit also includes a bidirectional AC-DC circuit, a bidirectional resonant converter, and a bidirectional full-bridge inverter circuit.

[0173] Based on the voltage sampling method provided in the above embodiments, this application also provides a specific implementation of the voltage sampling device.

[0174] like Figure 6 As shown, the voltage sampling device 200 provided in this application embodiment may include:

[0175] The data acquisition module 201 is used to acquire the initial voltage sampling data and sampling circuit parameters of the source-carrier integrated machine. The sampling circuit parameters are used to indicate the device parameters of each phase sampling circuit of the source-carrier integrated machine.

[0176] The common-mode interference processing module 202 is used to calculate the common-mode interference voltage of each phase based on the initial voltage sampling data and sampling circuit parameters. The common-mode interference voltage is used to indicate the coupling voltage formed in this phase by other phases through differential-mode interference.

[0177] The compensation calculation module 203 is used to calculate the voltage compensation amount for each phase based on the common-mode interference voltage of each phase.

[0178] The voltage compensation module 204 is used to compensate the initial voltage sampling data according to the voltage compensation amount of each phase to obtain the first target voltage sampling data.

[0179] The voltage sampling device 200 of this application embodiment is used to execute the voltage sampling method in the above embodiment. Its specific processing procedure is the same as that of the voltage sampling method in the above embodiment, and will not be described in detail here.

[0180] Figure 7 A schematic diagram of the hardware structure of the electronic device provided in an embodiment of this application is shown.

[0181] The electronic device may include a processor 301 and a memory 302 storing computer program instructions.

[0182] Specifically, the processor 301 may include a central processing unit (CPU), an application-specific integrated circuit (ASIC), or one or more integrated circuits that can be configured to implement the embodiments of this application.

[0183] Memory 302 may include mass storage for data or instructions. For example, and not limitingly, memory 302 may include a hard disk drive (HDD), floppy disk drive, flash memory, optical disk, magneto-optical disk, magnetic tape, or Universal Serial Bus (USB) drive, or a combination of two or more of these. Where appropriate, memory 302 may include removable or non-removable (or fixed) media. Where appropriate, memory 302 may be internal or external to the integrated gateway disaster recovery device. In a particular embodiment, memory 302 is non-volatile solid-state memory.

[0184] In some embodiments, memory 302 may include read-only memory (ROM), random access memory (RAM), disk storage media device, optical storage media device, flash memory device, electrical, optical, or other physical / tangible memory storage device. Thus, generally, memory includes one or more tangible (non-transitory) computer-readable storage media (e.g., memory devices) encoded with software including computer-executable instructions, and when the software is executed (e.g., by one or more processors), it is operable to perform the operations described with reference to the method according to one aspect of this disclosure.

[0185] The processor 301 implements any of the voltage sampling methods described in the above embodiments by reading and executing computer program instructions stored in the memory 302.

[0186] In one example, the electronic device may also include a communication interface 303 and a bus 310. For example, Figure 3 As shown, the processor 301, memory 302, and communication interface 303 are connected through bus 310 and complete communication with each other.

[0187] The communication interface 303 is mainly used to realize communication between various modules, devices, units and / or equipment in the embodiments of this application.

[0188] Bus 310 includes hardware, software, or both, that couples components of an online data traffic metering device together. For example, and not limitingly, the bus may include an Accelerated Graphics Port (AGP) or other graphics bus, an Enhanced Industry Standard Architecture (EISA) bus, a Front Side Bus (FSB), HyperTransport (HT) interconnect, an Industry Standard Architecture (ISA) bus, an Infinite Bandwidth Interconnect, a Low Pin Count (LPC) bus, a memory bus, a Microchannel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association Local (VLB) bus, or other suitable buses, or combinations of two or more of these. Where appropriate, bus 310 may include one or more buses. Although specific buses are described and illustrated in embodiments of this application, any suitable bus or interconnect is contemplated herein.

[0189] Furthermore, in conjunction with the voltage sampling methods in the above embodiments, this application embodiment can provide a computer storage medium for implementation. This computer storage medium stores computer program instructions; when these computer program instructions are executed by a processor, they implement any of the voltage sampling methods in the above embodiments.

[0190] It should be clarified that this application is not limited to the specific configurations and processes described above and shown in the figures. For the sake of brevity, detailed descriptions of known methods are omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of this application is not limited to the specific steps described and shown. Those skilled in the art can make various changes, modifications, and additions, or change the order of steps, after understanding the spirit of this application.

[0191] The functional blocks shown in the above-described structural diagram can be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, they can be, for example, electronic circuits, application-specific integrated circuits (ASICs), appropriate firmware, plug-ins, function cards, etc. When implemented in software, the elements of this application are programs or code segments used to perform the required tasks. Programs or code segments can be stored on a machine-readable medium or transmitted over a transmission medium or communication link via data signals carried on a carrier wave. "Machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, fiber optic media, radio frequency (RF) links, etc. Code segments can be downloaded via computer networks such as the Internet, intranets, etc.

[0192] It should also be noted that the exemplary embodiments mentioned in this application describe methods or systems based on a series of steps or apparatus. However, this application is not limited to the order of the above steps; that is, the steps can be performed in the order mentioned in the embodiments, or in a different order, or several steps can be performed simultaneously.

[0193] The aspects of this disclosure have been described above with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this disclosure. It should be understood that each block in the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that these instructions, executable via the processor of the computer or other programmable data processing apparatus, enable the implementation of the functions / actions specified in one or more blocks of the flowchart illustrations and / or block diagrams. Such a processor can be, but is not limited to, a general-purpose processor, a special-purpose processor, a special application processor, or a field-programmable logic circuit. It is also understood that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can also be implemented by special-purpose hardware performing the specified functions or actions, or can be implemented by a combination of special-purpose hardware and computer instructions.

[0194] The above description is merely a specific implementation of this application. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, modules, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here. It should be understood that the protection scope of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the protection scope of this application.

Claims

1. A voltage sampling method, characterized by, The method comprises the following steps: Obtaining initial voltage sampling data of a source-carrying integrated machine and sampling circuit parameters, the sampling circuit parameters being used to indicate device parameters of sampling circuits of each phase of the source-carrying integrated machine; the sampling circuit parameters comprise sampling resistance precision deviation values and sampling resistance voltage division ratios of the sampling circuits of each phase; Inputting the sampling resistance precision deviation value and the sampling resistance voltage division ratio of each phase into an interference voltage precision deviation model to obtain an interference voltage precision coefficient of each phase; According to the initial voltage sampling data and the interference voltage precision coefficient of each phase, a common-mode interference voltage of each phase is calculated, the common-mode interference voltage being used to indicate a coupling voltage formed in the phase by differential-mode interference of other phases; According to the common-mode interference voltage of each phase, a corresponding voltage compensation amount of each phase is calculated; According to the voltage compensation amount of each phase, the initial voltage sampling data is compensated to obtain first target voltage sampling data. The expression of the interference voltage precision deviation model is as follows: ； Wherein, A(x)_c is the interference voltage precision coefficient of any phase, PH is the number of phases, N is the resistance voltage division ratio of the phase, and y is the sampling resistance precision deviation value of the phase.

2. The voltage sampling method of claim 1, wherein, The sampling circuit parameters comprise A-phase sampling circuit parameters, B-phase sampling circuit parameters and C-phase sampling circuit parameters, the initial voltage sampling data comprises A-phase voltage sampling values, B-phase voltage sampling values and C-phase voltage sampling values, and the common-mode interference voltage of each phase comprises A-phase common-mode interference voltage, B-phase common-mode interference voltage and C-phase common-mode interference voltage; according to the initial voltage sampling data and the sampling circuit parameters, the common-mode interference voltage of each phase is calculated, comprising: A first common-mode interference voltage is calculated according to the A-phase voltage sampling value and the A-phase sampling circuit parameters, a second common-mode interference voltage is calculated according to the B-phase voltage sampling value and the B-phase sampling circuit parameters, and a third common-mode interference voltage is calculated according to the C-phase voltage sampling value and the C-phase sampling circuit parameters; the first common-mode interference voltage is used to indicate the coupling voltage formed in other phases by differential-mode interference of the A phase, the second common-mode interference voltage is used to indicate the coupling voltage formed in other phases by differential-mode interference of the B phase, and the third common-mode interference voltage is used to indicate the coupling voltage formed in other phases by differential-mode interference of the C phase; The second common-mode interference voltage and the third common-mode interference voltage are added to obtain the A-phase common-mode interference voltage, the first common-mode interference voltage and the third common-mode interference voltage are added to obtain the B-phase common-mode interference voltage, and the first common-mode interference voltage and the second common-mode interference voltage are added to obtain the C-phase common-mode interference voltage.

3. The voltage sampling method of claim 2, wherein, The A-phase sampling circuit parameters comprise an A-phase sampling resistance precision deviation value and an A-phase sampling resistance voltage division ratio, and the first common-mode interference voltage is calculated according to the A-phase voltage sampling value and the A-phase sampling circuit parameters, comprising: The A-phase sampling resistance precision deviation value and the A-phase sampling resistance voltage division ratio are inputted into an interference voltage precision deviation model to obtain an A-phase interference voltage precision coefficient; multiplying the A-phase interference voltage precision coefficient and the A-phase voltage sampling value, to obtain a first common-mode interference voltage; and / or; the B-phase sampling circuit parameters include a B-phase sampling resistance precision deviation value and a B-phase sampling resistance voltage division ratio, and the second common-mode interference voltage is calculated according to the B-phase voltage sampling value and the B-phase sampling circuit parameters, including: inputting the B-phase sampling resistance precision deviation value and the B-phase sampling resistance voltage division ratio into an interference voltage precision deviation model, to obtain a B-phase interference voltage precision coefficient; multiplying the B-phase interference voltage precision coefficient and the B-phase voltage sampling value, to obtain a second common-mode interference voltage; and / or; the C-phase sampling circuit parameters include a C-phase sampling resistance precision deviation value and a C-phase sampling resistance voltage division ratio, and the second common-mode interference voltage is calculated according to the C-phase voltage sampling value and the C-phase sampling circuit parameters, including: inputting the C-phase sampling resistance precision deviation value and the C-phase sampling resistance voltage division ratio into an interference voltage precision deviation model, to obtain a C-phase interference voltage precision coefficient; multiplying the C-phase interference voltage precision coefficient and the C-phase voltage sampling value, to obtain a third common-mode interference voltage.

4. The voltage sampling method of claim 1, wherein, the first target voltage sampling data includes a first target sampling voltage of each phase; after the initial voltage sampling data is compensated according to the voltage compensation amount of each phase to obtain the first target voltage sampling data, the method further includes: calculating a precision deviation coefficient of each phase according to the sampling circuit parameters; dividing the first target sampling voltage of each phase by the precision deviation coefficient of the corresponding phase, to obtain a second target sampling voltage of each phase; obtaining second target voltage sampling data according to the second target sampling voltage of each phase.

5. The voltage sampling method of claim 4, wherein, the sampling circuit parameters include a phase number, a sampling resistance precision deviation value of each phase, and a sampling resistance voltage division ratio of each phase, and the precision deviation coefficient of each phase is calculated according to the sampling circuit parameters, including: inputting the phase number, the sampling resistance precision deviation value of each phase, and the sampling resistance voltage division ratio of each phase into a sampling precision deviation model, to obtain the precision deviation coefficient of each phase.

6. A source-on-receiver all-in-one machine characterized by, including a voltage sampling circuit and a controller, the voltage sampling circuit is used to obtain initial voltage sampling data, and the controller performs voltage sampling of the source-carrying all-in-one machine through the voltage sampling method in any one of claims 1 to 5.

7. A voltage sampling device, characterized by including: a data acquisition module, configured to acquire initial voltage sampling data and sampling circuit parameters of the source-carrying all-in-one machine, the sampling circuit parameters are used to indicate device parameters of each phase sampling circuit of the source-carrying all-in-one machine, and the sampling circuit parameters include a sampling resistance precision deviation value and a sampling resistance voltage division ratio of each phase sampling circuit; a common-mode interference processing module, configured to calculate each phase common-mode interference voltage according to the initial voltage sampling data and the sampling circuit parameters, the common-mode interference voltage is used to indicate a coupling voltage formed in the phase by differential-mode interference of other phases; a compensation amount calculation module, configured to calculate a voltage compensation amount corresponding to each phase according to the common-mode interference voltage of each phase. A voltage compensation module is configured to compensate the initial voltage sampling data according to a voltage compensation amount of each phase to obtain first target voltage sampling data. The calculation according to the initial voltage sampling data and the sampling circuit parameters to obtain the common-mode interference voltage of each phase comprises: inputting the sampling resistance precision deviation value of each phase and the sampling resistance voltage division ratio into an interference voltage precision deviation model to obtain an interference voltage precision coefficient of each phase; an expression of the interference voltage precision deviation model is: ； wherein A(x)_c is the interference voltage precision coefficient of any phase, PH is the number of phases, N is the resistance voltage division ratio of the phase, and y is the sampling resistance precision deviation value of the phase; the calculation according to the initial voltage sampling data and the interference voltage precision coefficient of each phase to obtain the common-mode interference voltage of each phase.

8. An electronic device, comprising: The device comprises a processor and a memory storing computer program instructions; The processor executes the computer program instructions to implement the voltage sampling method according to any one of claims 1-5.

9. A computer-readable storage medium, characterized in that, The computer readable storage medium stores computer program instructions, and the computer program instructions are executed by the processor to implement the voltage sampling method according to any one of claims 1-5.

Images