Design method, device and equipment of non-harmonic parameter of superconducting quantum bit and medium

Abstract

The invention discloses a design method and device for non-harmonic parameters of superconducting quantum bits, equipment and a medium, and belongs to the field of quantum computing. The design method comprises the following steps: simulating a simulation model of the superconducting quantum bit to obtain impedance associated with a Josephson junction in the superconducting quantum bit; and obtaining a non-harmonic parameter according to the frequency and the impedance of the superconducting quantum bit. Through the design method, the non-harmonic parameter value of the superconducting quantum bit can be calculated more accurately.

Description

Technical Field

[0001] This application belongs to the field of quantum information, especially the field of quantum computing. In particular, this application relates to a method, apparatus, device and medium for designing the anharmonic parameters of a superconducting quantum bit. Background Technology

[0002] The anharmonic parameters of superconducting qubits are crucial for their readout and control operations, thus requiring a precise method for anharmonic parameter design. Summary of the Invention

[0003] This application provides an example of a method, apparatus, device, and medium for designing the anharmonic parameters of a superconducting quantum bit. This approach enables more accurate and convenient calculation of the anharmonic parameters of a superconducting quantum bit, thereby helping to reduce the design complexity of superconducting quantum chips.

[0004] The solution presented in this application is implemented through the following steps.

[0005] In a first aspect, examples of this application disclose a method for designing the anharmonic parameters of a superconducting quantum bit. The design method includes:

[0006] Simulations were performed on a superconducting quantum bit model to obtain the impedance associated with the Josephson junction in the superconducting quantum bit; and

[0007] The anharmonic parameters are obtained from the frequency and impedance of the superconducting quantum bit.

[0008] According to some examples in this application, the simulation model is a physical simulation model, which is obtained based on the three-dimensional physical model of the superconducting quantum bit.

[0009] Optionally, the method for obtaining a physical simulation model based on a three-dimensional physical model of a superconducting quantum bit includes: obtaining a three-dimensional physical model of a superconducting quantum bit; and replacing the Josephson junction in the three-dimensional physical model of the superconducting quantum bit with a signal port.

[0010] Optionally, the method for simulating the simulation model includes the step of configuring the material parameters of the superconducting quantum bit.

[0011] According to some examples in this application, obtaining anharmonic parameters based on the frequency and impedance of a superconducting quantum bit includes:

[0012] Rules for determining anharmonic parameters;

[0013] The rule parameters associated with the determined rule are obtained based on the frequency and impedance; and

[0014] The anharmonic parameters are obtained by calculating the defined rules and rule parameters.

[0015] Based on some examples in this application, the rule for determining the anharmonic parameter is η = -E. C Where η represents the anharmonic parameter, E C =e 2 / 2C, E c denoted by , e represents the charging energy of the superconducting quantum bit, e is the amount of charge of the elementary charge, and C represents the self-capacitance of the bit capacitor of the superconducting quantum bit.

[0016] According to some examples in this application, the superconducting qubit is an independent qubit that is not coupled to other superconducting qubits;

[0017] Alternatively, the superconducting qubit is coupled with multiple other superconducting qubits.

[0018] According to some examples in this application, the superconducting quantum bit is a Transmon quantum bit and includes:

[0019] Substrate;

[0020] The first superconducting metal layer is formed on the substrate surface as a ground plane;

[0021] A second superconducting metal layer, separated from the first superconducting metal layer by gaps, the gaps exposing the surface of the substrate; and

[0022] The Josephson junction is located in the void and formed on the surface of the substrate. The two superconducting electrodes of the Josephson junction are electrically connected to the first superconducting metal layer and the second superconducting metal layer, respectively.

[0023] In a second aspect, examples of this application disclose a design apparatus for the anharmonic parameters of a superconducting quantum bit. The design apparatus includes:

[0024] The simulation module is used to simulate a model of a superconducting quantum bit to obtain the impedance associated with the Josephson junction in the superconducting quantum bit; and

[0025] The calculation module is used to obtain the anharmonic parameters based on the frequency and impedance of the superconducting quantum bit.

[0026] According to some examples of this application, the design device also includes:

[0027] The simulation model acquisition module is used to obtain the simulation model, which is based on the three-dimensional physical model of the superconducting quantum bit.

[0028] In a third aspect, an example of this application discloses an electronic device with anharmonic parameters for a superconducting quantum bit. The electronic device includes:

[0029] At least one processor; and

[0030] Memory that is communicatively connected to at least one processor;

[0031] The memory stores a computer program that can be executed by at least one processor, such that the at least one processor is able to execute the aforementioned method for designing the anharmonic parameters of the superconducting quantum bit.

[0032] In a fourth aspect, an example of this application discloses a computer-readable storage medium. This computer-readable storage medium stores computer instructions for causing a processor to execute a design method for the anharmonic parameters of the superconducting quantum bit described above.

[0033] Beneficial effects:

[0034] Previously, in the design process of superconducting qubits, in order to design the anharmonic parameters of the qubit, the equivalent circuit diagram of the qubit was often established, and the characteristics of the structure and circuit components were analyzed based on this diagram, and then the anharmonic parameters of the qubit were calculated.

[0035] However, this scheme is difficult to design effectively and accurately for bits with large physical structures or with more complex surrounding environments (coupling with other bits, multi-bit layout, etc.).

[0036] However, the scheme in this application establishes a simulation model of the superconducting quantum bit, obtains the corresponding impedance data through simulation of the model, and then uses this impedance data to obtain the anharmonic parameters. This scheme can more accurately, conveniently, and quickly calculate the anharmonic parameters, thereby significantly optimizing the design process of the superconducting quantum bit. Attached Figure Description

[0037] To illustrate this more clearly, the accompanying drawings used in the description will be briefly introduced below.

[0038] Figure 1 This is a schematic diagram of the structure of a transmon-type superconducting quantum bit in the example of this application;

[0039] Figure 2 for Figure 1 Equivalent circuit diagram of superconducting quantum bits;

[0040] Figure 3 This is an equivalent circuit diagram of another mutually coupled two-bit structure in the example of this application;

[0041] Figure 4 It was made public. Figure 3 The equivalent form of the bit capacitance in the superconducting quantum bit corresponding to the bit self-capacitance C1 in the equivalent circuit diagram.

[0042] Figure 5 A flowchart illustrating the design method of the anharmonic parameters of the superconducting quantum bit in this application example;

[0043] Figure 6 This is a schematic diagram of the process for obtaining the anharmonic parameter based on the frequency of the superconducting quantum bit and the impedance in an example of this application;

[0044] Figure 7 This is a schematic block diagram of the design device for the anharmonic parameters of the superconducting quantum bit in the example of this application;

[0045] Figure 8 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application.

[0046] Explanation of reference numerals in the attached figures:

[0047] 101 - Ground plane; 1021 - Capacitor plate; 103 - Gap; 104 - Josephson junction; 105 - Equivalent capacitance;

[0048] 300 - Electronic device; 310 - Memory; 320 - Processor; 330 - Bus;

[0049] 340 - RAM; 350 - Cache; 360 - Storage system;

[0050] 370 - Program Modules; 380 - Tools;

[0051] 390 - External devices; 391 - Display devices;

[0052] 392 - I / O interface; 393 - Network adapter. Detailed Implementation

[0053] A Josephson junction (JJ) is a structure consisting of two layers of superconductor sandwiching a thin insulator. By replacing the inductor in an LC oscillator circuit with a JJ, a nonlinear LC oscillator circuit is formed. Quantizing this nonlinear LC oscillator circuit allows the construction of a transmon qubit structure, also known as a transport qubit.

[0054] The total energy of the above nonlinear LC oscillating circuit can be represented by equation (1).

[0055]

[0056] In equation (1) E C It is called Charge Energy; Ej represents Josephson junction energy, which is the tunneling energy of a single electron through the junction region.

[0057] This nonlinear LC oscillator circuit has multiple energy levels, and the Transmon qubit is defined on the two lowest energy levels.

[0058] Since the energy level of Transmon qubit can be represented by equation (2).

[0059]

[0060] Therefore, the energy level spacing (transition energy) of the transmon qubit can be obtained as described by equation (3).

[0061]

[0062] thus, Thus, the anharmonicity η = E of transmon qubit can be calculated. 12 -E 01 ≈-E C

[0063] The applicant learned through practice that Ec = e 2 / 2C. Here, e represents the amount of elementary charge, and C represents the capacitance of the transmonqubit. Therefore, the magnitude of the applicant's anharmonicity is directly related to and determined by the bit capacitance C.

[0064] Therefore, the key to determining the anharmonicity of a bit lies in determining the bit capacitance of that bit.

[0065] In previous practice, the applicant chose to analyze the structure of the bit to establish its equivalent circuit diagram, and then determine the corresponding bit capacitance through analysis of the circuit diagram, and then apply the previous formula (η=E) to the calculation. 12 -E 01 ≈-E C Determine the nonharmonicity of the bit.

[0066] The following explanation uses qubits, which have a simple, individual structure.

[0067] The bit structure is as follows Figure 1 As shown.

[0068] The qubit includes a ground plane 101 on the substrate surface. The ground plane 101 has a via, thereby exposing the substrate surface through the via. The qubit also includes a capacitor plate 102 disposed within the via, and a gap 103 exists between the capacitor plate 102 and the ground plane 101. The qubit also includes a Josephson junction 104. Figure 1 There are two qubits (forming a squid), and the two superconducting electrodes of the Josephson junction 104 are electrically connected to the ground plane 101 and the capacitor plate 102, respectively. The equivalent circuit diagram of this qubit is shown below. Figure 2 As shown, it includes a Josephson junction in parallel and an equivalent capacitance of 105.

[0069] Therefore, by using circuit analysis software commonly used in circuit analysis to build a model according to the specific dimensions shown in the figure, setting the materials used for each part, and running the solution to obtain the capacitance between the ground plane and the bit capacitor, the anharmonicity of the quantum bit was determined.

[0070] However, as the number of qubits increases, in some cases, mutual coupling between qubits is required. Considering the influence of various components' layout and performance within the chip, the physical structures of qubits will gradually become more diverse. Furthermore, other qubits surrounding the target qubit, as well as the coupling structures between qubits, will contribute to the target qubit's charge energy, thus altering its anharmonicity.

[0071] For example, taking a two-bit coupled structure as an example, see [reference]. Figure 3 (Only the equivalent circuit diagram is shown).

[0072] In this structure, the two bits are coupled through capacitor C12. The self-capacitances of the two bits are C1 and C2, respectively. That is, the first bit (corresponding to self-capacitance C1) and the second bit (corresponding to self-capacitance C2) are interconnected using coupling capacitor C12.

[0073] Therefore, as Figure 2 When bits exist independently, the anharmonicity of bit 1 or bit 2 is contributed only by C1 or C2. However, Figure 3 Under the given structure, based on circuit analysis, the equivalent circuit structure of bit 1 (as the target bit) becomes... Figure 4 The structure shown.

[0074] Therefore, for simple equivalent circuit diagrams, traditional circuit analysis software can still be used to collect the values ​​of each capacitor and then calculate the total capacitance based on the series and parallel relationships. However, as the circuit size increases, analyzing it using series and parallel relationships becomes increasingly complex.

[0075] Furthermore, for a bit structure of a specific physical size, when that physical size is large, an equivalent inductance will exist at a specific frequency. This means that the original bit capacitor will also have an equivalent inductance connected in parallel or series. Generally, the contribution of this equivalent inductance is included in the bit capacitor, similar to the description above, to make a correction to the bit capacitor. All of these factors make the aforementioned method difficult to use effectively.

[0076] In view of this, in the example of this application, the applicant proposes a new scheme for calculating the anharmonicity of superconducting qubits.

[0077] In general, the methods in some examples of this application can be implemented in the following ways:

[0078] A 3D model is created in electromagnetic simulation software, and the materials corresponding to each structure in the model are set. Then, a signal port is used to replace the Josephson junction at its location. After performing simulation model calculations, the port impedance (complex form: R + jX) can be obtained—which can be obtained through S-parameters. For example, this can be achieved using various software such as Ansys HFSS, CST, ADS, XFDTD, and Sonnet, or other electromagnetic simulation software authorized by the applicant.

[0079] The imaginary part jX of the impedance is the equivalent reactance in the circuit corresponding to that bit, and can also be used as the equivalent capacitance of the inductance and capacitance of a specific physical structure. Furthermore, since X = 1 / (wc), where w is the bit frequency and C is the equivalent bit capacitance, the equivalent bit capacitance of that bit can be obtained based on the impedance obtained from the simulation and the bit frequency that has been predetermined, calculated, or designed.

[0080] In some examples of this application, a method for designing the anharmonic parameters of a superconducting quantum bit is disclosed.

[0081] See Figure 5 The design method includes:

[0082] Step S301: Perform electromagnetic simulation on the simulation model of the superconducting quantum bit to obtain the impedance associated with the Josephson junction in the superconducting quantum bit; and

[0083] Step S302: Obtain the anharmonic parameters based on the frequency and impedance of the superconducting quantum bit.

[0084] Unlike previous methods that involved establishing precise equivalent circuits through circuit analysis to calculate the equivalent bit capacitance of the target bit and thus determine anharmonicity, this example demonstrates how the applicant can obtain impedance data for the circuit corresponding to the model structure by building a simulation model and performing electromagnetic simulations. Based on this, the equivalent bit capacitance of the corresponding bit can then be calculated. This equivalent bit capacitance can then be used to calculate the corresponding anharmonicity.

[0085] For step S301, the simulation model is, for example, a physical simulation model, and the physical simulation model is obtained based on a three-dimensional physical model of a superconducting quantum bit.

[0086] In the example, the method for obtaining a physical simulation model based on a three-dimensional physical model of a superconducting quantum bit includes: obtaining a three-dimensional physical model of the superconducting quantum bit; and replacing the Josephson junction in the three-dimensional physical model of the superconducting quantum bit with a signal port. Furthermore, in the example, the material parameters of the superconducting quantum bit can also be configured during the simulation of the simulation model.

[0087] See Figure 6 For step S302, according to the aforementioned formula for calculating anharmonicity (η = E) 12 -E 01 ≈-E C The method for obtaining anharmonic parameters based on the frequency and impedance of superconducting qubits can be implemented by including the following steps.

[0088] S301, Rules for determining nonharmonic parameters.

[0089] S302. Obtain the rule parameters associated with the determined rule based on the frequency and impedance.

[0090] S303. Obtain the anharmonic parameters based on the determined rules and rule parameters.

[0091] In the above steps, the rule is determined, for example, as an anharmonic calculation formula, and can be specifically η = -E. c E c =e 2 / 2C.

[0092] The rule parameter is C, which is the equivalent bit capacitance of a bit.

[0093] The frequency is the frequency of a bit and can be represented as ω. The impedance can be represented in complex form as R + jX. The imaginary part X of the impedance is calculated as 1 / ωc.

[0094] Therefore, c can be calculated using the frequency ω and the impedance (the imaginary part X), and thus the formula E can be derived. c =e 2 The charging energy of the superconducting quantum bit is calculated using / 2C, and thus the values ​​of the anharmonic parameters are obtained. Here, e represents the elementary charge, and C represents the self-capacitance of the superconducting quantum bit's bit capacitor.

[0095] It should be noted that the above methods can be applied to superconducting qubits with various layout configurations.

[0096] For example, superconducting qubits can be independent bits, such as... Figure 1 , Figure 2 The structure of a single superconducting qubit is shown. Therefore, this independent qubit is a qubit structure that is not coupled to other superconducting qubits.

[0097] For example, a superconducting qubit is coupled with multiple other superconducting qubits. For example... Figure 4 Two bits are disclosed, and they are capacitively coupled. The anharmonic parameter being calculated can be any other bit.

[0098] The specific structure of a superconducting quantum bit can be chosen as a Transmon quantum bit. This bit structure includes a substrate, a first superconducting metal layer, a second metal layer, and a Josephson junction.

[0099] The first superconducting metal layer is formed on the substrate surface and can serve as the ground plane and reference ground (zero potential point) of the chip constructed using this bit.

[0100] A void (exposing the surface of the substrate) can be formed inside the first superconducting metal layer, and a second superconducting metal layer (a capacitor plate of a bit) can be disposed within the void, separated from the first superconducting metal layer by the void.

[0101] The Josephson junction is formed on the substrate surface and located within the voids. The Josephson junction can be optionally implemented as an aluminum junction (Al-AlOx-Al). The two superconducting electrodes of the Josephson junction (the Al layer in the aluminum junction) are electrically connected to the first and second superconducting metal layers, respectively. That is, one electrode of the Josephson junction is connected to ground, and the other end is connected to the capacitor plate of the bit.

[0102] See Figure 7 Examples of this application also disclose a design device for the anharmonic parameters of a superconducting quantum bit.

[0103] The design device includes a simulation module and a calculation module.

[0104] The simulation module is used to simulate the superconducting qubit model to obtain the impedance associated with the Josephson junction in the superconducting qubit. The calculation module is used to obtain the anharmonic parameters based on the frequency and impedance of the superconducting qubit.

[0105] Furthermore, in some examples, the design device may also include a simulation model acquisition module. This simulation model acquisition module is used to obtain a simulation model, which is obtained based on a three-dimensional physical model of the superconducting quantum bit.

[0106] To implement the design method for the anharmonic parameters of the superconducting quantum bits in the above embodiments, an electronic device is also proposed in the examples of this application.

[0107] Figure 8 This is a schematic diagram of the structure of an electronic device in some embodiments of this application.

[0108] like Figure 8 As shown, the above-mentioned electronic device 300 includes a memory 310, a processor 320, and a bus 330 connecting different components (including at least the memory 310 and the processor 320).

[0109] The following sections will describe in detail the various structures in electronic devices.

[0110] The memory 310 stores a computer program, which, when executed by the processor 320, enables the design method of the anharmonic parameters of the superconducting quantum bit according to the embodiments of this application.

[0111] The bus 330 can be a variety of buses, and there can be one or more of them. For example, the bus 330 can be a memory bus, a memory controller, a peripheral bus, or a graphics acceleration port.

[0112] More specifically, the bus can be an Industry Standard Architecture (ISA) bus, a Microchannel Architecture (MAC) bus, a Controller Area Network (CAN) bus, an enhanced ISA bus, or a Peripheral Component Interconnect (PCI) bus, etc.

[0113] Electronic device 300 may also include various readable media.

[0114] In one classification, these media can be volatile and non-volatile media; in another classification, they can be removable and non-removable media. Alternatively, the readable medium can be any combination of media from the two classifications mentioned above. In a specific example, the memory is random access memory (RAM340) or cache 350, or a combination of both.

[0115] By way of example only, storage system 360 can be used to read and write non-removable, non-volatile magnetic media (not shown, often described as a "hard disk drive"). Although Figure 8 As not shown, a disk drive for reading and writing to a removable non-volatile disk (e.g., a "floppy disk") and an optical disc drive for reading and writing to a removable non-volatile optical disc (e.g., a CD-ROM, DVD-ROM, or other optical media) may be provided.

[0116] In these cases, each driver may be connected to bus 330 via one or more data media interfaces. Memory 310 may include at least one program product having a set (e.g., at least one) of program modules configured to perform the functions of the embodiments of this application.

[0117] A program / tool ​​380 having a set (at least one of the set) of program modules 370 can be stored, for example, in a memory 310.

[0118] Such program module 370 includes, but is not limited to, an operating system, one or more applications, other program modules, and program data. Each or some combination of these examples may include an implementation of a network environment. Program module 370 is at least capable of performing the functions and / or methods described in the embodiments of this application.

[0119] Electronic device 300 can also communicate with one or more external devices 390 (e.g., keyboard), display device 391, etc., and can also communicate with one or more devices that enable users to interact with electronic device 300, and / or with any device that enables electronic device 300 to communicate with one or more other computing devices (e.g., network card, modem, etc.).

[0120] This communication can be performed through the input / output interface, i.e., I / O interface 392. Furthermore, the electronic device 300 can also communicate with one or more networks (e.g., local area networks (LANs), wide area networks (WANs), and / or public networks, such as the Internet) via network adapter 393.

[0121] like Figure 8 As shown, network adapter 393 communicates with other modules of electronic device 300 via bus 330. It should be understood that, although not shown in the figure, other hardware and / or software modules can be used in conjunction with electronic device 300, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.

[0122] The processor 320 executes various functional applications and data processing by running programs stored in the memory 310.

[0123] It should be noted that the implementation process and technical principles of the electronic device in this embodiment are explained in the foregoing description of the design method of the embodiment of this application, and will not be repeated here.

[0124] The electronic device provided in this application embodiment can perform the design method described above, obtain the impedance associated with the Josephson junction in the superconducting quantum bit by performing electromagnetic simulation on the 3D simulation model of the superconducting quantum bit; and obtain the anharmonic parameters based on the frequency and impedance of the superconducting quantum bit, thereby greatly improving the design difficulty of the superconducting quantum bit and improving the design accuracy, efficiency and precision of the bit anharmonic parameters.

[0125] In other examples, this application also proposes a computer-readable storage medium.

[0126] The computer-readable storage medium stores a computer program that, when executed by a processor, implements the power performance testing method of the embodiments of this application.

[0127] To implement the above embodiments, another aspect of this application provides a computer program that, when executed by a processor, implements the method for designing the anharmonic parameters of the delayed superconducting quantum bit according to the embodiments of this application.

[0128] In some alternative implementations, this embodiment may employ any combination of one or more computer-readable media. The computer-readable media may be a computer-readable signal medium or a computer-readable storage medium.

[0129] Computer-readable storage media may be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof.

[0130] More specific examples (a non-exhaustive list) of computer-readable storage media include: electrical connections having one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0131] In this disclosure, a computer-readable storage medium can be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0132] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take many forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof.

[0133] A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium, which can send, propagate or transmit a program for use by or in connection with an instruction execution system, apparatus or device.

[0134] Program code contained on a computer-readable medium may be transmitted using any suitable medium, including but not limited to wireless, wire, optical fiber, RF, etc., or any suitable combination thereof.

[0135] Computer program code for performing the operations of this application may be written using one or more programming languages ​​or a combination thereof. The programming languages ​​referred to include object-oriented programming languages—such as Java, Smalltalk, and C++—as well as procedural programming languages—such as the "C" language or similar programming languages.

[0136] Such program code can be executed entirely on the user's electronic device, partially on the user's electronic device, as a standalone software package, partially on the user's electronic device and partially on a remote electronic device, or entirely on a remote electronic device or server.

[0137] In cases involving remote electronic devices, the remote electronic devices can be connected to the user's electronic devices via any type of network—including local area networks (LANs) or wide area networks (WANs), or they can be connected to external electronic devices (e.g., via the Internet using an Internet service provider).

[0138] The embodiments described above with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0139] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, one or more embodiments have been described above with reference to the accompanying drawings. Throughout the description, similar reference numerals are used to denote similar components. In the foregoing description, numerous specific details have been set forth for illustrative purposes in order to provide a more thorough understanding of one or more embodiments. However, it will be apparent that one or more embodiments may be practiced in various circumstances without these specific details, and the embodiments may be combined with and referenced to each other without contradiction.

[0140] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in sequences other than those illustrated or described herein.

[0141] Furthermore, the terms “comprising” and “having”, and any variations thereof, are intended to cover non-exclusive inclusion, such that a process, method, system, product, or apparatus that includes a series of steps or units is not necessarily limited to those steps or units that are explicitly listed, but may include other steps or units that are not explicitly listed or that are inherent to such process, method, product, or apparatus.

[0142] The above description of the structure, features and effects of this application is based on the embodiments shown in the drawings. The above are only preferred embodiments of this application. However, this application does not limit the scope of implementation to what is shown in the drawings. Any changes made in accordance with the concept of this application, or modifications to equivalent embodiments, that do not exceed the spirit covered by the specification and drawings, should be within the protection scope of this application.

Claims

1. A method of designing a non-harmonic parameter of a superconducting qubit, characterized by, The design method comprises: performing electromagnetic simulation on a simulation model of the superconducting quantum bit to obtain an impedance associated with a Josephson junction in the superconducting quantum bit; and obtaining the anharmonic parameter according to a frequency of the superconducting quantum bit and the impedance.

2. The method of designing non-harmonic parameters of a superconducting qubit according to claim 1, wherein, The simulation model is a physical simulation model, and the physical simulation model is obtained according to a three-dimensional physical model of the superconducting quantum bit. Optionally, the method for obtaining the physical simulation model according to the three-dimensional physical model of the superconducting quantum bit comprises: obtaining a three-dimensional physical model of the superconducting quantum bit; and replacing a Josephson junction in the three-dimensional physical model of the superconducting quantum bit with a signal port. Optionally, the method for performing simulation on the simulation model comprises a step of configuring a material parameter of the superconducting quantum bit.

3. The method of designing non-harmonic parameters of a superconducting qubit according to claim 1, wherein, Obtaining the anharmonic parameter according to the frequency of the superconducting quantum bit and the impedance comprises: obtaining a determination rule of the anharmonic parameter; obtaining a rule parameter associated with the determination rule according to the frequency and the impedance; and calculating the anharmonic parameter according to the determination rule and the rule parameter.

4. The method of designing non-harmonic parameters of a superconducting qubit according to claim 3, wherein, The non-harmonic parameter is determined according to the rule of η = -E C , wherein η represents a non-harmonic parameter, E C = e 2 / 2C, E c represents a charging energy of a superconducting quantum bit, e represents a charge amount of an elementary charge, and C represents a self-capacitance of a bit capacitor of the superconducting quantum bit.

5. The method of designing non-harmonic parameters of a superconducting qubit according to claim 1, wherein, The superconducting quantum bit is an independent bit which is not coupled with other superconducting quantum bits. Alternatively, the superconducting quantum bit is coupled with a plurality of other superconducting quantum bits.

6. The method of designing non-harmonic parameters of a superconducting qubit according to claim 1 or 5, wherein The superconducting quantum bit is a Transmon quantum bit and comprises: a substrate; a first superconducting metal layer formed on a surface of the substrate as a ground plane; a second superconducting metal layer spaced apart from the first superconducting metal layer by a gap, the gap exposing the surface of the substrate; and a Josephson junction located in the gap and formed on the surface of the substrate, two superconducting electrodes of the Josephson junction being electrically connected with the first superconducting metal layer and the second superconducting metal layer respectively.

7. An apparatus for designing non-harmonic parameters of a superconducting qubit, comprising: The design device comprises: a simulation module configured to perform simulation on a simulation model of the superconducting quantum bit to obtain an impedance associated with a Josephson junction in the superconducting quantum bit; and a calculation module configured to obtain the anharmonic parameter according to a frequency of the superconducting quantum bit and the impedance.

8. The apparatus for designing non-harmonic parameters of a superconducting qubit of claim 7, wherein, The design device further comprises: a simulation model obtaining module configured to obtain the simulation model, and the simulation model is obtained according to a three-dimensional physical model of the superconducting quantum bit.

9. A non-harmonic parametric electronic device of a superconducting qubit, characterized in that, The electronic device comprises: at least one processor; and a memory connected with the at least one processor in communication; the memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor to enable the at least one processor to perform the design method of the anharmonic parameter of the superconducting quantum bit according to any one of claims 1-6.

10. A computer-readable storage medium, characterized in that, The computer readable storage medium stores computer instructions for enabling the processor to perform the design method of the anharmonic parameter of the superconducting quantum bit according to any one of claims 1-6 when executed.

Images