A communication method and system of wireless detonator
By employing dynamic frequency adjustment, ternary frame structure encapsulation, and pulse modulation technology, the anti-interference and reliability of wireless detonator communication have been improved, achieving high-precision detonation control and solving the problem of traditional detonator systems being susceptible to interference.
Patent Information
- Application Number
- CN202511864982.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-11
- Publication Date
- 2026-02-27
- Estimated Expiration
- 2045-12-11
AI Technical Summary
Traditional detonator systems are susceptible to interference and have low communication reliability, failing to meet the high precision and stability requirements of blasting projects.
The system employs a dynamic frequency adjustment algorithm to acquire hardware timing resources, generates a standardized time-coded pulse sequence through ternary frame structure encapsulation and pulse modulation, captures and verifies signals through interrupt handling and message queue mechanisms at the receiving end, and finally achieves safe detonation by timer control technology.
It significantly improves the anti-interference capability, data transmission reliability, and detonation control accuracy of wireless detonator communication, meeting the application requirements of blasting engineering for high stability and high safety.
Smart Images

Figure CN121310177B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the communication technology field of wireless detonators, in particular to a wireless detonator communication method and system. BACKGROUND
[0002] In the field of blasting engineering, as an important detonating device, the stability and accuracy of the communication of detonators are crucial. The traditional detonator system communication method has many drawbacks, such as complex wiring and susceptibility to interference. With the development of wireless communication technology, wireless detonators have emerged, but the current wireless detonator communication method still has deficiencies in frequency selection, protocol design, and each layer architecture design, resulting in low communication reliability and low efficiency, which cannot meet the high precision and high stability requirements in actual applications. SUMMARY
[0003] The main purpose of the present application is to provide a wireless detonator communication method and system to solve the problem of susceptibility to interference and low reliability of the traditional detonator system communication method.
[0004] To achieve the above purpose, the first aspect of the present application provides a wireless detonator communication method, including a transmitting end and a receiving end,
[0005] The transmitting end is configured to:
[0006] Configure the system clock and the target frequency parameter, and obtain the ready hardware timing resource through a dynamic frequency adjustment algorithm;
[0007] Obtain the user detonation command parameter, and obtain the standardized data frame instruction through a ternary frame structure packaging method;
[0008] Convert the standardized data frame instruction and the ready hardware timing resource, and obtain the time encoding pulse sequence through a ternary pulse modulation method;
[0009] The receiving end is configured to:
[0010] Receive the time encoding pulse sequence propagated through the space channel, and obtain the receiving end induction signal through electromagnetic induction;
[0011] Capture the receiving end induction signal, and obtain the detonation parameter that passes the verification through an interrupt processing and message queue mechanism;
[0012] Process the detonation parameter that passes the verification, and obtain the safe detonation action through a timer control technology.
[0013] In some implementable manners, the step of configuring the system clock and the target frequency parameter, and obtaining the ready hardware timing resource through a dynamic frequency adjustment algorithm, includes:
[0014] determine a frequency PWM generation task index according to a system clock frequency and a target PWM frequency;
[0015] perform calculation of an ARR value in a preset range of a PSC value by using a dynamic frequency adjustment algorithm according to the frequency PWM generation task index, and obtain optimal PSC and ARR values according to an actual frequency, wherein a calculation formula of the actual frequency is:
[0016] ;
[0017] wherein PSC represents a pre-divider, and ARR represents an automatic reload register;
[0018] write the optimal PSC and ARR values into corresponding hardware registers to obtain a ready hardware timing resource.
[0019] In some implementable manners, the step of obtaining a user initiation command parameter by using a ternary frame structure encapsulation method to obtain a standardized data frame instruction includes:
[0020] obtain a user initiation command original parameter, check and standardize a target address and a timing requirement contained in the original parameter to obtain a standardized command parameter containing a valid address identifier and an ordered cycle count;
[0021] construct a communication frame structure containing a start bit, an address field, a cycle count field, a check sum and a stop bit according to the standardized command parameter, and convert values of the address field and the cycle count field into ternary codes to obtain a ternary communication frame;
[0022] map each ternary value in the ternary communication frame to a pulse signal of a specified width by using a pulse width modulation technology to obtain a standardized pulse sequence composed of different width pulses, so as to form the standardized data frame instruction.
[0023] In some implementable manners, the step of converting the standardized data frame instruction and the ready hardware timing resource by using a ternary pulse modulation method to obtain a time encoding pulse sequence includes:
[0024] analyze the standardized data frame instruction to extract a ternary code pulse sequence composed of different width pulses;
[0025] convert each ternary value in the ternary code pulse sequence into a corresponding standard pulse width parameter according to a predefined mapping relationship between ternary states and pulse widths;
[0026] Call the ready hardware timing resource, and according to the standard pulse width parameter, generate a standard width pulse signal corresponding to each ternary value by configuring the comparison matching register of the timer;
[0027] According to the original order of the ternary coded pulse sequence, time sequence combination is performed on the standard width pulse signal to form the final time coded pulse sequence.
[0028] In some implementable manners, the step of receiving the time coded pulse sequence propagated through the space channel through electromagnetic induction to obtain a receiver induction signal includes:
[0029] Receiving an electromagnetic wave signal formed after the time coded pulse sequence is propagated through the space channel, and converting the electromagnetic wave signal through a receiving antenna to obtain an initial induction electric signal;
[0030] Amplifying and filtering the initial induction electric signal to obtain a conditioned electric signal;
[0031] Adjusting the level of the conditioned electric signal to form an electric signal that meets the trigger condition of the receiver interrupt processing circuit to obtain the receiver induction signal.
[0032] In some implementable manners, the step of capturing the receiver induction signal through an interrupt processing and message queue mechanism to obtain a verified initiation parameter includes:
[0033] According to the pin level change formed by capturing the receiver induction signal, triggering an interrupt processing function, calculating and packaging pulse time data to obtain a pulse data structure;
[0034] Through a message queue transmission mechanism, sending the pulse data structure from an interrupt context to an analysis thread to obtain pulse data to be analyzed;
[0035] Using the analysis thread to perform validity screening and ternary value identification on the pulse data to be analyzed, and storing to a receiver frame structure to obtain a complete data frame;
[0036] Analyzing the complete data frame to verify the accuracy of the address, serial number and checksum to obtain the verified initiation parameter.
[0037] In some implementable manners, the step of processing the verified initiation parameter through a timer control technology to obtain a safe initiation action includes:
[0038] According to the serial number in the verified initiation parameter, calculating an execution time to obtain the execution time;
[0039] According to the execution time, a hardware timer is set and started to realize a timing initiation function, and the safe initiation action is obtained.
[0040] In a second aspect, the application provides a communication system of a wireless detonator, applied to the communication method of the wireless detonator, and the system comprises a transmitting end and a receiving end.
[0041] The transmitting end comprises:
[0042] A configuration unit is configured to configure a system clock and a target frequency parameter, and obtain a ready hardware timer resource through a dynamic frequency adjustment algorithm.
[0043] An acquisition unit is configured to acquire a user initiation command parameter, and obtain a standardized data frame instruction through a ternary frame structure encapsulation method.
[0044] A conversion unit is configured to convert the standardized data frame instruction and the ready hardware timer resource, and obtain a time encoding pulse sequence through a ternary pulse modulation method.
[0045] The receiving end comprises:
[0046] A receiving unit is configured to receive the time encoding pulse sequence propagated through a space channel, and obtain a receiving end induction signal through electromagnetic induction.
[0047] A verification unit is configured to capture the receiving end induction signal, and obtain a verified initiation parameter through an interrupt processing and a message queue mechanism.
[0048] A result unit is configured to process the verified initiation parameter, and obtain a safe initiation action through a timer control technology.
[0049] In a third aspect, the application provides a computer device, comprising a memory and a processor, the memory stores a computer program, and the processor realizes the steps of the communication method of the wireless detonator when executing the computer program.
[0050] In a fourth aspect, the application provides a computer program, which realizes the steps of the communication method of the wireless detonator when executed by a processor.
[0051] The technical scheme provided by the embodiments of the application can have the following beneficial effects:
[0052] In the communication method of the wireless detonator, the dynamic frequency adjustment algorithm is used to obtain the hardware timing resource at the transmitting end, and the ternary frame structure encapsulation and pulse modulation method are used to generate the standardized time coding pulse sequence, then the signal is accurately captured and verified by the interrupt processing and message queue mechanism at the receiving end, and finally the safe detonation action is realized by the timer control technology; this complete technical path effectively solves the drawbacks of complex wiring and easy interference of the traditional wired mode, and through the synergistic effect of each step, the anti-interference, data transmission reliability and detonation control precision of the wireless detonator communication are significantly improved, so as to fully meet the application requirements of high stability and high safety of the blasting engineering. BRIEF DESCRIPTION OF DRAWINGS
[0053] The accompanying drawings, which form a part of this application, are included to provide a further understanding of the application and are incorporated in and constitute a part of this application. The illustrative embodiments of the application, and their description, do not limit the application. In the drawings:
[0054] Figure 1 A flow chart of the communication method of the wireless detonator provided by the application.
[0055] Figure 2 A frequency adjustment algorithm flow chart of the communication method of the wireless detonator provided by the application.
[0056] Figure 3 A protocol data frame structure diagram of the communication method of the wireless detonator provided by the application.
[0057] Figure 4 An interrupt processing flow chart of the communication method of the wireless detonator provided by the application. DETAILED DESCRIPTION
[0058] In order to make the personnel in the technical field better understand the application scheme, the technical solutions in the embodiments of the application will be described clearly and completely below in conjunction with the drawings in the embodiments of the application. Obviously, the described embodiments are only a part of the embodiments of the application, not all the embodiments. Based on the embodiments in the application, all other embodiments obtained by those skilled in the art without creative labor should be within the scope of protection of the application.
[0059] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products or devices.
[0060] In the present application, the terms "upper", "lower", "left", "right", "front", "back", "top", "bottom", "inner", "outer", "middle", "vertical", "horizontal", "lateral", "longitudinal" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. These terms are mainly used to better describe the present application and its embodiments, and are not intended to limit the indicated devices, elements or components to have a specific orientation, or to be constructed and operated in a specific orientation.
[0061] In addition, in addition to indicating the orientation or positional relationship, the above-mentioned partial terms can also be used to indicate other meanings, for example, the term "upper" can also be used to indicate a certain dependent relationship or connection relationship in some cases. For those skilled in the art, the specific meaning of these terms in the present application can be understood according to the specific circumstances.
[0062] In addition, the terms "mount", "set", "provided with", "connected", "connected", "sleeved" should be broadly understood. For example, "connected" can be fixedly connected, detachably connected, or integrally constructed; can be mechanically connected, or electrically connected; can be directly connected, or indirectly connected through an intermediate medium, or internal communication between two devices, elements or components. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.
[0063] As Figure 1 shown, the first aspect of the present application provides a communication method of a wireless detonator, the method comprising:
[0064] S100, configure system clock and target frequency parameters, and obtain ready hardware timing resources through a dynamic frequency adjustment algorithm.
[0065] Among them, the purpose of S100 step is to convert the macroscopic system clock and the target frequency demand into the configuration executable by the hardware timer, and finally obtain a stable and reliable PWM signal source.
[0066] Specifically, obtaining the ready hardware timing resource can include the following steps:
[0067] S101, determining a frequency PWM generation task index according to a system clock frequency and a target PWM frequency.
[0068] Specifically, the system clock frequency is a reference working frequency determined by a microcontroller hardware crystal oscillator and a clock tree, which is a fixed high-frequency signal (such as 125 MHz).
[0069] The target PWM frequency is a carrier frequency (such as PULSE_FREQ = 32768 Hz) preset according to a wireless communication protocol requirement.
[0070] It should be noted that the core target is to make the actual frequency of the generated PWM as close as possible to the target frequency to meet the accuracy requirement. The constraint of the hardware is that the bit number (such as 16 bits) of the prescaler (PSC) and the auto-reload register (ARR) of the timer determines the settable range (such as 0-65535). Then the frequency generation task index is obtained, which not only contains the target frequency value, but also contains the accuracy requirement and the hardware limitation to guide all subsequent calculations.
[0071] S102, according to the frequency PWM generation task index, using a dynamic frequency adjustment algorithm, calculating the ARR value in the preset range of the PSC value, and obtaining the optimal PSC value and ARR value according to the actual frequency.
[0072] The calculation formula of the actual frequency is:
[0073] ;
[0074] Wherein, PSC represents the prescaler, and ARR represents the auto-reload register.
[0075] Specifically, the frequency generation task indicators output by the previous step S101 are used to find the best configuration combination through exhaustive search and evaluation. For example, the system tries every possible PSC value in the legal range of PSC values (e.g., from 0 to the maximum value). The role of PSC is to "slow down" the high-speed system clock to obtain a lower timer clock. Next, the ARR value is calculated and rounded, that is, for each PSC value tried, the system calculates a theoretical ARR value based on the target frequency. Since ARR must be an integer, the system rounds the theoretical value to obtain the actual, settable ARR value. Then, the actual output frequency is evaluated, and the system calculates the actual frequency that the timer can actually produce under the current PSC value and rounded ARR value. Finally, the system compares all the (PSC, ARR) combinations tried and selects the one with the smallest error between the actual frequency and the target frequency as the optimal parameters. This ensures that the most accurate frequency output is obtained under hardware limitations. Further, a set of optimal PSC values and ARR values calculated by optimization are obtained.
[0076] S103, write the optimal PSC value and ARR value into the corresponding hardware register to obtain a ready hardware timing resource.
[0077] Specifically, the optimal PSC value and ARR value calculated by the previous step S102 are written into the pre-division register of the timer by the underlying driver program, and the optimal ARR value is written into the automatic reload register. This is equivalent to setting the rhythm of the timer, with PSC determining how many blocks to jump each time and ARR determining how many times to count as a period.
[0078] It should be noted that the initial value of the capture / compare register is set according to the needs of the communication protocol (e.g., the default duty cycle) to define the duration of the high level in the PWM signal. When the timer is started, it starts counting from 0 and automatically reloads to 0 when it reaches the ARR value, and the process repeats to generate a continuous and stable PWM waveform. Thus, a ready hardware timing resource is obtained. At this point, the hardware timer is already in working condition and is continuously outputting a PWM signal with accurate frequency and stable waveform, preparing for subsequent data modulation onto the carrier.
[0079] S200, obtain user initiation command parameters and obtain standardized data frame instructions through a ternary frame structure packaging method.
[0080] In step S200, the user initiation command parameters are converted into a set of standardized pulse instruction sequences that follow a predetermined communication protocol and can be directly sent by hardware.
[0081] In particular, obtaining the standardized data frame instruction can include the following steps:
[0082] S201, obtaining the user initiation command original parameter, checking and standardizing the target address and timing requirement contained therein to obtain the standardized command parameter containing the valid address identifier and the ordered cycle count.
[0083] In particular, the user's initiation command parameter is received and verified, and the main parameters include:
[0084] Target address: used to identify a specific detonator device in the network. For example, 0x03 (hexadecimal 3), corresponding to a 3-bit address field. The system will check whether the address is within the valid range (such as 0 to 7, because 3-bit binary can represent 8 addresses).
[0085] Timing requirement: related to the timing arrangement of initiation.
[0086] The transmitting end performs validity check on the original parameter. For example, ensure that the target address value is valid, and map the timing requirement to the output of the protocol specified cycle count field after standardization. The output is a structured command object containing a valid target address identifier and an ordered cycle count, which is ready for building a data frame.
[0087] S202, according to the standardized command parameter, build a communication frame structure containing start bit, address field, cycle count field, checksum and stop bit, and convert the values of the address field and the cycle count field into ternary encoding to obtain ternary communication frame.
[0088] In particular, according to the standardized command parameter, build the complete data frame structure and perform ternary encoding.
[0089] Build frame structure: the data frame follows the defined FrameData structure, for example, contains the following parts:
[0090] Start bit: marks the beginning of a data frame.
[0091] Address field: 3 bits long, filled with the standardized target address.
[0092] Cycle count field: 4 bits long, filled with the standardized cycle count value.
[0093] Checksum: 1 bit long, used to verify the accuracy of data transmission.
[0094] Stop bit: marks the end of a data frame.
[0095] In the ternary encoding process, the values of each field in the frame are converted into ternary digits. This conversion is achieved, for example, by the value_to_trits function. Ternary can use 0, 1, 2 three states, compared with binary, can carry more information at the same number of bits, help to improve the efficiency or reliability of communication. The values of the address (3 bits) and the cycle count (4 bits) are converted into a series of ternary trits, respectively. To ensure data integrity, a ternary checksum needs to be calculated for the key information in the frame. Using the calculate_ternary_checksum function, a 1-bit ternary checksum value is calculated based on the address and cycle count data, and filled into the frame. The receiving end will perform the same calculation to verify whether the data is correct. Further, a ternary communication frame to be sent, composed of a sequence of ternary digits, has been generated.
[0096] S203, using pulse width modulation technology, each ternary value in the ternary communication frame is mapped to a pulse signal of specified width, obtaining a standardized pulse sequence composed of different width pulses, to form the standardized data frame instruction.
[0097] Specifically, the transmitting end modulates the digitized ternary communication frame into a physical layer pulse signal. That is, each ternary value is mapped to a pulse of a specific width.
[0098] Exemplarily, three pulse widths represent the three states of ternary:
[0099] TRIT_STATE0 is mapped to a 200ms pulse.
[0100] TRIT_STATE1 is mapped to a 400ms pulse.
[0101] TRIT_STATE2 is mapped to a 600ms pulse.
[0102] The transmitting end sequentially converts each ternary trit into the corresponding pulse width according to the frame structure order (start bit -> address trit -> cycle count trit -> checksum trit -> stop bit). For example, the start bit and the stop bit are defined as a 1-second pulse and no pulse, respectively. Finally, the entire ternary communication frame is converted into a standardized pulse sequence composed of different width pulses, i.e. the final standardized data frame instruction, waiting to be sent out through a wireless carrier.
[0103] S300, convert the standardized data frame instruction and the ready hardware timing resource, get the time encoding pulse sequence by ternary pulse modulation method.
[0104] S300, modulating the logical data frame (output of S200) into a sequence of time-featured pulses on the physical wire, using the configured hardware timer (output of S100).
[0105] In particular, obtaining the time-encoded pulse sequence can comprise the following steps:
[0106] S301, parsing the standardized data frame instruction to extract a ternary-coded pulse sequence composed of pulses of different widths.
[0107] In particular, the encapsulated standardized data frame instruction is parsed and converted into a list of ternary symbols (trits) that can be sequentially sent by hardware.
[0108] By way of example, the transmitter reads the fields (start bit, address, loop count, checksum, stop bit) in the FrameData structure. The values of these fields have been converted into ternary digits (trits) in the S202 step. Next, a list of ternary-coded pulse sequences is generated. The list of ternary-coded pulse sequences follows the frame format order specified by the communication protocol, for example: [start bit trit, address trit1, address trit2,..., loop count trit1,..., checksum trit, stop bit trit]. This list specifies the content and order of the transmission.
[0109] S302, converting each ternary value in the ternary-coded pulse sequence into a corresponding standard pulse width parameter according to a predefined mapping of ternary states to pulse widths.
[0110] In particular, a lookup table is established for pulse modulation in the S302 step, converting abstract mathematical symbols (0, 1, 2) into concrete and measurable time parameters.
[0111] By way of example, a predefined mapping is established between ternary states and pulse widths. This mapping includes:
[0112] TRIT_STATE0 -> 200ms high-level pulse;
[0113] TRIT_STATE1 -> 400ms high-level pulse;
[0114] TRIT_STATE2 -> 600ms high-level pulse.
[0115] Conversion process: the sending program traverses the ternary sequence list obtained in S301, and converts each ternary value into a corresponding standard pulse width parameter according to the mapping relationship described above.
[0116] S303, call the ready hardware timing resource, and generate a standard width pulse signal corresponding to each ternary value by configuring the comparison match register of the timer according to the standard pulse width parameter.
[0117] Specifically, the S303 step utilizes the hardware timing resource ready in the S100 step to generate a pulse signal.
[0118] Exemplarily, a ready PWM (Pulse Width Modulation) timer is started and configured, and the base frequency of the timer in this action has been set in the S100 step, for example, the carrier frequency is 32.768 kHz.
[0119] Generating a pulse of a specified width is achieved by configuring the comparison match register of the timer, that is, the timer cyclically counts in a period (determined by ARR). The value of the comparison register sets a threshold, and when the count value of the timer reaches this threshold, the output level flips.
[0120] Subsequently, for each pulse width (such as 400 ms) that needs to be sent, the value of the comparison register is calculated and set so that the comparison register controls the duration of the high level of the output to be equal to the target pulse width. In combination with the control of the frequency by the prescaler (PSC) and the automatic reload register (ARR) of the timer, a standard width pulse signal is automatically generated by the hardware.
[0121] S304, sequentially combine the standard width pulse signals in the original order of the ternary coded pulse sequence to form the final time coded pulse sequence.
[0122] Specifically, in the S304 step, individual standard width pulse signals are combined into complete frame signals according to the communication protocol.
[0123] Exemplarily, the principle of sequentially combining standard width pulse signals: according to the order of the ternary coded sequence parsed in the S301 step, each standard width pulse signal generated in the S303 step is arranged in turn.
[0124] Forming a sequence: between pulses, a low-level interval (such as a stop bit of "1 second without pulse") specified by the protocol is inserted. Through this orderly sequential combination, a complete time coded pulse sequence containing a start bit, an address field, a cycle count field, a checksum, and a stop bit is finally formed. It should be noted that the protocol includes all timing parameters including the "low-level interval":
[0125] Bit and segment definition: The protocol specifies BIT_SEGMENTS = 1, i.e. 1 segment per bit data is transmitted. The protocol specifies SEG_DURATION = 1000, i.e. the duration of each segment is 1000 ms. This duration of the "segment" is the basic time unit to define all pulses and intervals.
[0126] Trit state pulse width: TRIT_STATE0 is a 200 ms pulse; TRIT_STATE1 is a 400 ms pulse; TRIT_STATE2 is a 600 ms pulse; these are the pulse widths of the protocol. Start and stop bits (i.e. "low level intervals"): Start bit: the protocol specifies a "1 second pulse" (i.e. 1000 ms high level), stop bit: the protocol specifies explicitly a "1 second no pulse". This "1 second no pulse" is what is meant by "low level interval as specified by the protocol".
[0127] Overall flow: The time-encoded pulse sequence is the final wireless signal baseband waveform, which can be modulated by a carrier wave and transmitted. Its generation process is the complete conversion from digital instructions to analog signals, which ensures that the receiving end can accurately parse according to the same time rules.
[0128] S400, transmit the time-encoded pulse sequence, and obtain a receiving end induced signal through a spatial electromagnetic wave transmission method.
[0129] The receiving end process of the wireless communication link is described in the S400 step of the receiving end, and the core purpose is to reliably convert the electromagnetic wave signal in space into a digital system that can be processed, and the electrical signal that meets the interrupt trigger condition.
[0130] Specifically, obtaining a receiving end induced signal can include the following steps:
[0131] S401, receiving the electromagnetic wave signal formed after the time-encoded pulse sequence is transmitted through the spatial channel, and converting the electromagnetic wave signal through a receiving antenna to obtain an initial induced electrical signal.
[0132] Specifically, the electromagnetic wave carrying the time-encoded pulse sequence transmitted by the transmitting end is captured by the receiving antenna of the receiving end after propagating in the spatial channel in the S401 step. The antenna converts the changing electromagnetic field energy into a weak alternating voltage signal corresponding to the frequency and intensity, i.e. the initial induced electrical signal, through electromagnetic induction principle.
[0133] S402, amplifying and filtering the initial induced electrical signal to obtain a conditioned electrical signal.
[0134] Specifically, in step S402, the initial induced electrical signal is processed by an amplification and filtering method, which can effectively improve the signal quality and facilitate the accurate identification in the subsequent steps.
[0135] Illustratively, due to the signal attenuation through space propagation, the initial induced electrical signal generated in step S401 is usually very weak. Therefore, it is necessary to first linearly amplify it through an operational amplifier or other analog circuit, significantly increasing the amplitude of the signal to a level range that can be effectively processed by the subsequent circuit.
[0136] Further, while amplifying the signal, it is necessary to suppress out-of-band noise and interference. This will use a filter (such as a band-pass filter) to process the amplified signal. The center frequency of the filter is set to be consistent with the transmission carrier frequency (such as 32.768 kHz), thereby allowing the effective signal to pass through and significantly attenuating the noise outside the frequency band. After amplification and filtering, the conditioned electrical signal is obtained. This signal retains the timing characteristics of the original pulse sequence, but the signal-to-noise ratio is significantly improved, and the amplitude meets the requirements of the subsequent circuit.
[0137] S403, the conditioned electrical signal is adjusted in level to form an electrical signal that meets the triggering conditions of the interrupt processing circuit of the receiving end, and the receiving end induced signal is obtained.
[0138] Specifically, in step S403, the conditioned electrical signal (analog signal) is converted into a digital signal (high or low level) with regular waveform by a level adjustment circuit.
[0139] Further, the level adjustment circuit will set a trigger threshold. When the input conditioned electrical signal voltage is higher than the threshold, the output is a digital high level (for example, corresponding to the logic '1' of the microcontroller or a specific voltage such as 3.3V); when it is lower than the threshold, the output is a digital low level (logic '0', 0V). In this way, the analog pulse waveform is converted into a standard digital pulse waveform, i.e. the receiving end induced signal. Next, this receiving end induced signal is sent to the GPIO pin of the microcontroller. The pin has been configured as an input mode and enabled interrupt. Thereafter, every time the pin level jumps, it will trigger an interrupt and enter the pin_irq_handler1 interrupt processing function, starting to calculate the high level time (high_ms) and low level time (low_ms) of the pulse, thereby starting the analysis process of the original time-encoding pulse sequence.
[0140] S500, capture the receiving end induced signal, and obtain the verified initiation parameters through the interrupt processing and message queue mechanism.
[0141] In the step S500, the processing flow of the wireless communication link at the receiving end, through the interrupt processing and the message queue cooperation, to ensure real-time and reliability.
[0142] Specifically, the detonation parameter passed the verification can include the following steps:
[0143] S501, according to the pin level change formed by capturing the receiving end induction signal, trigger the interrupt processing function, calculate and package the pulse time data, get the pulse data structure.
[0144] Specifically, the receiving end induction signal (regular digital level signal) output in the step S400 is connected to the specified pin (such as CAPTURE_PIN1) of the microcontroller. When the level of this pin occurs a jump (rising edge or falling edge), the corresponding interrupt processing function (such as pin_irq_handler1) is triggered immediately.
[0145] Exemplarily, the interrupt processing function first carries out the de-bouncing processing, ignores the level change in a very short time caused by hardware jitter, and ensures the accuracy of the capture. The interrupt processing function calculates the time interval between adjacent jumps by recording the time stamp of the jump. Specifically, the high level time (high_ms) (pulse duration) and the low level time (low_ms) (pulse interval time) are calculated. The calculated high level time and low level time are packaged into a pulse data (pulse_data) structure. This pulse data structure is used as the output of this interrupt processing, which contains the time information of the original pulse.
[0146] S502, through the message queue transmission mechanism, send the pulse data structure from the interrupt context to the analysis thread, to get the pulse data to be analyzed.
[0147] Specifically, since the interrupt processing function requires fast execution, it cannot perform complex analysis operations. Therefore, during system initialization, a message queue (pulse_mq) is created. In the interrupt processing function of S501, the packaged pulse data (pulse_data) structure is sent to the message queue through the rt_mq_send function.
[0148] Next, the analysis thread (parse_thread_entry) is continuously running in the background, and receives (reads) these pulse data from the message queue (pulse_mq) through the rt_mq_recv function. This mechanism realizes the decoupling and asynchronous communication between the interrupt processing function and the analysis thread. The interrupt function focuses on fast capture and timing, and the analysis thread focuses on complex data processing, which improves the system efficiency and stability. The pulse data to be analyzed obtained by the analysis thread from the queue is.
[0149] S503, the pulse data to be parsed is screened for validity and identified for ternary value by the parsing thread, and stored in a received frame structure, obtaining a complete data frame.
[0150] Specifically, the parsing thread processes each received pulse data to be parsed as follows:
[0151] Validity screening: check whether the high level time (high ms) and low level time (low ms) of the pulse are within a reasonable range specified by the protocol (e.g., close to 200ms, 400ms, 600ms, etc.) to filter out noise interference.
[0152] Ternary value identification: through the recognize_trit function, the valid pulse is identified as the corresponding ternary value (0, 1 or 2) according to the high level time (high ms).
[0153] Data frame assembly: the identified ternary values are stored in a received frame (RxFrame) structure in order. When the number of ternary values received in the received frame structure reaches the frame length (TRIT_COUNT) specified by the protocol, it is considered that a complete data frame has been received, forming a complete data frame.
[0154] S504, parse the complete data frame to verify the accuracy of the address and sequence number and checksum, and obtain the detonation parameter that passes the verification.
[0155] Specifically, the complete data frame obtained in S503 is parsed and verified by the parse_ternary_frame function (the ternary data frame received and initially identified is finally parsed and verified, and the corresponding detonation control logic is triggered):
[0156] 1. Parsing fields: extract the address (addr), sequence number (i.e. cycle count) and checksum (checksum) fields from the ternary sequence.
[0157] 2. Verify accuracy:
[0158] Address verification: check whether the received address is the expected address (e.g., whether it is 0x03).
[0159] Sequence number verification: check whether the sequence number is within a valid range (e.g., 1-3).
[0160] Checksum verification: recalculate the checksum according to the received address and sequence number, and compare it with the received checksum. All three are verified to be valid, and the data frame is considered valid.
[0161] 3, output result: after verification, the system obtains the verified initiation parameter, mainly including the target address and initiation sequence number. Subsequently, the system calculates the specific execution time (such as (seq_num - 1) * 10 + 5 seconds) according to the sequence number and sets the execution timer (exec_timer), finally realizing safe and accurate timing initiation.
[0162] S600, processing the verified initiation parameter, obtaining safe initiation action through timer control technology.
[0163] Specifically, the S600 step is located in the application layer, and the target is to realize the final initiation control according to the reliable instruction parsed by the communication link.
[0164] Specifically, obtaining safe initiation action can include the following steps:
[0165] S601, calculating the execution time according to the sequence number in the verified initiation parameter, obtaining the execution time.
[0166] Specifically, the receiving end receives the verified initiation parameter from the S500 step, and one of the most important information in the verified initiation parameter package is the sequence number (i.e. the cycle_count field in the data frame). The system maps the sequence number to a specific delay value, i.e. the execution time, according to the preset and fixed time calculation rule.
[0167] Exemplarily, the calculation formula example is: execution time = (seq_num - 1) * 10 + 5 (seconds), wherein seq_num represents the received sequence number, i.e. the value of cycle_count.
[0168] The formula realizes a linear mapping. For example, when the sequence number is 1, the execution time is 5 seconds; when the sequence number is 2, the execution time is 15 seconds; and when the sequence number is 3, the execution time is 25 seconds. This design allows the initiation delay time of different detonators to be set flexibly through the communication protocol, and is the basis for realizing millisecond-level precision delay initiation. After calculation, the accurate execution time parameter is obtained.
[0169] S602, setting and starting the execution timer according to the execution time, realizing the timing initiation function, and obtaining the safe initiation action.
[0170] Specifically, the system calls the timer control module, configures and starts a special execution timer according to the execution time calculated by S601.
[0171] Need to be explained, in the setting of new timing parameters, the system will first stop before the start of the (if there are) execution timer, prevent multiple detonation signal is set, to ensure the uniqueness of control. The system will calculate the execution time parameters set to the relevant registers of the execution timer, and then start the timer. Timer starts independent of the main program countdown.
[0172] When the execution timer count value reaches the preset execution time, the timer will generate a hardware interrupt. The interrupt will trigger a predefined interrupt service program, in which the system will perform the final safety detonation action, for example, to the detonation circuit sends a high level signal or start the ignition current. This hardware timer triggered, tamper-evident action as the safety detonation action. Embodiments
[0173] As Figures 2 to 4 The communication method of the wireless detonator of the application, including frequency selection, protocol layer, network layer and application layer.
[0174] Frequency selection implementation:
[0175] In practical applications, when the system is initialized, first according to the hardware environment and application requirements to determine the appropriate frequency range. For example, in the initialization of the relevant PWM module, according to the definition of PWM_FREQ_MIN and PWM_FREQ_MAX, and the actual carrier frequency requirements, such as PULSE_FREQ, set the corresponding frequency parameters. In the process of running, if you need to adjust the frequency, such as in the set_pwm_freq function, input the new frequency value, the system will call pwm_set_frequency function. The pwm_set_frequency function first gets the clock frequency of TIM1, and then according to the target frequency, through the calculation of dynamic adjustment of PSC and ARR value. In the calculation process, through multiple loop tries different PSC value, and combined with rounding algorithm to calculate the best ARR value, to ensure that the output of the PWM frequency as close as possible to the target frequency. After the calculation is completed, through the setting of TIM1 related registers, such as HAL_TIM_SET_PRESCALER and HAL_TIM_SET_AUTORELOAD, as well as the setting of pulse width HAL_TIM_SET_COMPARE, to realize the adjustment of frequency.
[0176] Protocol layer implementation:
[0177] Sending end implementation: At the sending end, when data such as a detonation command needs to be sent, first construct the FrameData structure in the det_cmd_blast function. Set the fields in the structure, such as the address (addr) to 0x03, and the cycle count to 3, 2, and 1 according to the number of times of repeated sending. Then, send the data frame through the send_data_frame function. In the send_data_frame function, first convert the address and cycle count to trits through the value_to_trits function. Next, calculate the checksum through the calculate_ternary_checksum function. Then, according to the order specified in the protocol, first send the start bit (1 second pulse) through the send_pulse_segment function, then send the converted trits one by one, each trit is sent through the send_trit function, and finally send the stop bit (1 second no pulse).
[0178] Receiving end implementation:
[0179] At the receiving end, when the pin state changes, an interrupt handling function (e.g. pin_irq_handler1, pin_irq_handler2, pin_irq_handler3) is triggered. These functions first perform a debouncing process to avoid false triggering due to pin jitter. Then, according to the change of pin level, the high and low time of the pulse is calculated and the data is encapsulated into a pulse_data structure. The pulse_data structure is sent to the message queue pulse_mq through the rt_mq_send function. The parse_thread_entry thread gets the pulse_data structure from the message queue, first performs a level validity check, such as checking whether the high and low time is within a reasonable range. Then, the ternary value is recognized through the recognize_trit function. If the recognition is successful, the recognized ternary value is stored in the RxFrame structure according to the current receiving state (STATE_IDLE or STATE_DATA). When a complete data frame is received, it is parsed through the parse_ternary_frame function. In the parsing process, the address, sequence number and checksum are extracted, and the accuracy of the data frame is verified by calculating the checksum and comparing it with the received checksum. If the verification is passed, further check whether the address and sequence number meet the expectations, such as whether the address is the expected 3 and whether the sequence number is within the range of 1-3. Finally, according to the received sequence number, the execution timer is calculated and set to realize the timing detonation function.
[0180] Network layer implementation:
[0181] Interrupt handling implementation: At system initialization, the mode of the pins is set to input pull-up by the rt_pin_mode function, such as the setting of CAPTURE_PIN1, CAPTURE_PIN2, and CAPTURE_PIN3. Then, the interrupt handling functions (such as pin_irq_handler1, pin_irq_handler2, and pin_irq_handler3) are bound to the corresponding pins by the rt_pin_attach_irq function, and the pin interrupt is enabled by the rt_pin_irq_enable function. When the state of the pin changes, the interrupt handling function is triggered. In the interrupt handling function, the interrupt is first closed by the rt_hw_interrupt_disable function to prevent interference by other interrupts during processing. Then, according to the change of the pin level, the relevant fields in the interrupt state structure body irq_state are updated, such as last_edge_time, high_duration, and waiting_for_falling. When processing the rising edge, if the waiting for falling flag is true, the low-level time is calculated, and the high-level time and low-level time are packaged into the pulse_data structure body, which is sent to the message queue by the rt_mq_send function. When processing the falling edge, the high-level time is updated, and the waiting for falling flag is set to true. Finally, the interrupt is re-enabled by the rt_hw_interrupt_enable function.
[0182] Message queue implementation: At system initialization, the message queue pulse_mq is initialized by the rt_mq_init function, setting parameters such as the name of the message queue, the buffer, the size of each message, and the size of the buffer. In the interrupt handling function, when there is new pulse data, the data is sent to the message queue by the rt_mq_send function. The parse_thread_entry parsing thread receives data from the message queue by the rt_mq_recv function. When receiving, a timeout time is set, and if no data is received within the timeout time, corresponding timeout processing is performed, such as checking whether all channels are timed out, and if timed out, resetting the channel state and receiving frame structure body. If data is received, subsequent parsing and processing of the data are performed.
[0183] Application layer implementation:
[0184] Blast function implementation: When the user sends a blast command, the system calls the det_cmd_blast function. In this function, first record the start time, then according to the repeat sending mechanism, build and send data frames. After sending is completed, calculate the total sending time, and issue an alarm prompt through the alarm_short_sound function. For example, in the repeat sending mechanism, loop 3 times (REPEAT_COUNT is 3), and set different cycle counts (cycle_count) for each sending, which are 3, 2, and 1 respectively. After sending each data frame, wait for 5 seconds through the rt_thread_mdelay function, and then call the alarm_short_sound function to issue an alarm prompt that the blast command has been sent.
[0185] Receive and parse function implementation: The parse_thread_entry parsing thread continuously obtains pulse data from the message queue for parsing during operation. In the parsing process, through validity check and logical judgment, identify the ternary value and store it in the RxFrame structure. When a complete data frame is received, parse it through the parse_ternary_frame function. In the parsing process, verify the accuracy of information such as address, sequence number, and checksum. If the verification is passed, calculate the execution time according to the received sequence number and set the execution timer. For example, in the parse_ternary_frame function, after extracting the address and sequence number, first verify whether the address is the expected 3 and whether the sequence number is within the range of 1-3. Then, calculate the checksum and compare it with the received checksum. If both are verified, calculate the execution time according to the sequence number, such as (seq_num - 1) * 10 + 5 seconds. After calculation is completed, stop the previous execution timer, set the new timer parameters, and start the timer. Throughout the process, output relevant debugging information through the DEBUG_PRINTF function, such as the received raw pulse data, identified ternary value, parsed address and sequence number, calculated execution time, etc., for debugging and problem troubleshooting.
[0186] Control console command processing implementation: when the user inputs a relevant command in the control console, such as the command corresponding to the pulse_debug_cmd function, the system calls the function for processing. In the function, first, the number of input parameters and the parameter values are checked for legality. If the parameters are legal, corresponding operations are performed according to the parameter values. For example, if the user inputs “pulse_debuginvalid on”, the debug_invalid_enabled flag is set to true, and the debugging output of invalid pulses is enabled. If the user inputs “pulse_debug status”, the current debugging state information, such as the enabled state of invalid pulse debugging and unknown logic level debugging, and the current sequence state information are output. In this way, the user can conveniently debug and monitor the system.
[0187] Through the above detailed embodiments, the wireless detonator communication method of the present application can realize efficient, stable and accurate communication, and meet various requirements in actual applications.
[0188] In the embodiments, the meanings of functions and the like can be referred to the following contents:
[0189] TIM1, a timer peripheral in the microcontroller for generating PWM.
[0190] PSC (pre-scaler), a timer pre-scaler, whose value is dynamically adjusted in the pwm_set_frequency function to accurately output the frequency.
[0191] ARR (automatic reload register), a timer automatic reload register, whose value is dynamically adjusted in the pwm_set_frequency function to accurately output the frequency.
[0192] HAL_TIM_SET_PRESCALER, a register operation function for setting the TIM1 pre-scaler (PSC).
[0193] HAL_TIM_SET_AUTORELOAD, a register operation function for setting the TIM1 automatic reload register (ARR).
[0194] HAL_TIM_SET_COMPARE, a register operation function for setting the TIM1 pulse width (comparison match register).
[0195] CAPTURE_PIN1, CAPTURE_PIN2, CAPTURE_PIN3, input pins for capturing changes in pin levels at the receiving end.
[0196] pwm_set_frequency, core function to dynamically adjust the values of PSC and ARR to achieve precise frequency output according to target frequency.
[0197] set_pwm_freq, function to input new frequency value when adjusting frequency during runtime, which will call pwm_set_frequency.
[0198] FrameData, data frame structure built by sender, containing fields such as address (addr), cycle count (cycle_count), etc.
[0199] pulse_data, structure encapsulating pulse high / low level time data in interrupt handling function.
[0200] irq_state, interrupt state structure, containing fields such as last_edge_time, high_duration, waiting_for_falling, etc.
[0201] RxFrame, receive frame structure used to store identified ternary values in parsing thread.
[0202] det_cmd_blast, application layer detonation function, builds FrameData structure and triggers sending process.
[0203] send_data_frame, top-level function to send complete data frame.
[0204] value_to_trits, function to convert address and cycle count into ternary trits.
[0205] calculate_ternary_checksum, function to calculate ternary checksum.
[0206] send_pulse_segment, function to send pulse segment (such as for sending start bit).
[0207] send_trit, function to send a single ternary trit.
[0208] rt_pin_mode, function to set pin mode (such as input pull-up) during system initialization.
[0209] rt_pin_attach_irq, function to bind interrupt handling function to corresponding pin.
[0210] rt_pin_irq_enable, function to enable pin interrupt.
[0211] pin_irq_handler1, pin_irq_handler2, pin_irq_handler3, interrupt handling callback functions bound to specific pins.
[0212] rt_hw_interrupt_disable, function to disable interrupts during interrupt handling to prevent the process from being interrupted.
[0213] rt_hw_interrupt_enable, function to re-enable interrupts after interrupt handling is complete.
[0214] rt_mq_init, function to initialize the message queue (pulse_mq).
[0215] rt_mq_send, function to send pulse_data to the message queue in the interrupt handling function.
[0216] rt_mq_recv, function for the parsing thread to receive data from the message queue.
[0217] parse_thread_entry, parsing thread entry function that continuously obtains pulse data from the message queue for parsing.
[0218] recognize_trit, function to recognize ternary values based on high-level time.
[0219] parse_ternary_frame, function to parse complete data frames, verify address, sequence number, and checksum.
[0220] DEBUG_PRINTF, function to handle related commands input from the console.
[0221] pulse_debug_cmd, function to handle related commands input from the console.
[0222] pulse_debug invalid on, specific command example to turn on debug output for invalid pulses.
[0223] pulse_debug status, specific command example to output current debug status information.
[0224] PWM_FREQ_MIN / PWM_FREQ_MAX, defined PWM frequency minimum / maximum value range.
[0225] PULSE_FREQ, actual carrier frequency requirement parameter.
[0226] Addr, example value of the address field set in the data frame.
[0227] cycle_count (3,2,1), example value of the cycle count field set in the data frame, which varies according to the number of repeated transmissions.
[0228] REPEAT_COUNT (3), the number of repetitions in the repeated transmission mechanism.
[0229] STATE_IDLE / STATE_DATA, the current receiving state of the parsing thread.
[0230] seq_num, the received sequence number, used to calculate the execution time ((seq_num - 1) * 10 + 5 seconds).
[0231] debug_invalid_enabled, a flag that controls whether to enable the debug output for invalid pulses.
[0232] Need to be explained, in addition to the above-mentioned embodiments in the application function meaning, not shown, the function should be understood in the manner of the conventional understanding of the skilled in the art, such as the meaning of the word itself and so on.
[0233] In summary, the application provides a wireless detonator communication method, which has the following beneficial effects:
[0234] Excellent anti-interference capability, in the selection of physical layer frequency, fully consider the actual application environment interference, accurate setting frequency range, such as PULSE_FREQ set to 32.768kHz carrier frequency, effectively avoid common interference source frequency overlap, at the same time optimize the frequency adjustment algorithm, in complex environment still can guarantee the stable transmission of signal, compared with the traditional detonator communication method, significantly improve the anti-interference performance, ensure the stability of communication.
[0235] Highly reliable data transmission, unique ternary coding protocol and fine pulse protocol design, data frame structure covers the start bit, address, cycle count, check and stop bit and other key information, from the encoding of the sending end to the checking of the receiving end, each link is closely linked, the accurate pulse width definition greatly reduces the bit error rate, so that the reliability and integrity of data transmission far exceed similar technology.
[0236] Efficient system operation mechanism, network layer through the interrupt processing and message queue mechanism cooperative operation, multi-channel interrupt real-time monitoring pin level change, message queue orderly delivery data, reduce the data processing delay, improve the overall operation efficiency of the system, guarantee the stable and efficient operation of detonator communication system in complex operation scene.
[0237] Safe and accurate initiation control, application layer initiation function transmits specific data frame repeatedly, combined with alarm prompt to ensure accurate initiation command transmission. Receiving and analyzing function verifies data frame information strictly, accurately calculates execution timer to realize safe, reliable and accurate timing initiation operation, meeting strict requirements of high precision and high stability in blasting engineering.
[0238] In a second aspect, the application provides a communication system of wireless detonator, applied to the communication method of wireless detonator, the system comprises a transmitting end and a receiving end;
[0239] The transmitting end comprises:
[0240] A configuration unit is configured to configure a system clock and a target frequency parameter, and obtain a ready hardware timing resource through a dynamic frequency adjustment algorithm;
[0241] An acquisition unit is configured to acquire a user initiation command parameter, and obtain a standardized data frame instruction through a ternary frame structure encapsulation method;
[0242] A conversion unit is configured to convert the standardized data frame instruction and the ready hardware timing resource, and obtain a time encoding pulse sequence through a ternary pulse modulation method;
[0243] The receiving end comprises:
[0244] A receiving unit is configured to receive the time encoding pulse sequence propagated through a space channel, and obtain a receiving end induction signal through electromagnetic induction;
[0245] A verification unit is configured to capture the receiving end induction signal, and obtain a verified initiation parameter through an interrupt processing and message queue mechanism;
[0246] A result unit is configured to process the verified initiation parameter, and obtain a safe initiation action through a timer control technology.
[0247] In a third aspect, the application provides a computer device comprising a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the communication method of wireless detonator when executing the computer program.
[0248] In a fourth aspect, the application provides a computer program, which, when executed by a processor, implements the steps of the communication method of wireless detonator.
[0249] It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a group of computer executable instructions, and although the logical order is shown in the flowchart, in some cases, the steps shown or described herein can be executed in an order different from that shown herein.
[0250] It is apparent that those skilled in the art should understand that the units or steps of the present application described above can be realized by using a universal computing device, which can be centralized on a single computing device or distributed on a network composed of multiple computing devices, and optionally, they can be realized by using program codes executable by a computing device, so that they can be stored in a storage device and executed by a computing device, or they can be respectively manufactured into individual integrated circuit modules, or multiple modules or steps among them can be manufactured into a single integrated circuit module to realize. Thus, the present application is not limited to any specific combination of hardware and software.
[0251] The above only describes the preferred embodiments of the present application and is not intended to limit the present application. For those skilled in the art, the present application can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A communication method of a wireless detonator, characterized by, The transmitting end and the receiving end are included, The transmitting end is configured to: configure a system clock with a target frequency parameter, and obtain a ready hardware timing resource through a dynamic frequency adjustment algorithm; obtain a user detonation command parameter, and obtain a standardized data frame instruction through a ternary frame structure packaging method; convert the standardized data frame instruction and the ready hardware timing resource, and obtain a time-encoding pulse sequence through a ternary pulse modulation method; The receiving end is configured to: receive the time-encoding pulse sequence propagated through a space channel, and obtain a receiving end induction signal through electromagnetic induction; capture the receiving end induction signal, and obtain a verified detonation parameter through an interrupt processing and message queue mechanism; process the verified detonation parameter, and obtain a safe detonation action through a timer control technology; the step of configuring a system clock with a target frequency parameter, and obtaining a ready hardware timing resource through a dynamic frequency adjustment algorithm, includes: determining a frequency PWM generation task index according to a system clock frequency and a target PWM frequency; calculating an ARR value in a preset range of a PSC value according to the frequency PWM generation task index by using a dynamic frequency adjustment algorithm, and obtaining optimal PSC and ARR values according to an actual frequency, wherein a calculation formula of the actual frequency is: ; wherein PSC represents a pre-divider, and ARR represents an automatic reload register; writing the optimal PSC and ARR values into corresponding hardware registers to obtain a ready hardware timing resource; the step of capturing the receiving end induction signal, and obtaining a verified detonation parameter through an interrupt processing and message queue mechanism, includes: triggering an interrupt processing function according to a pin level change formed by capturing the receiving end induction signal, calculating and packaging pulse time data to obtain a pulse data structure body; sending the pulse data structure body from an interrupt context to an analysis thread through a message queue transmission mechanism to obtain pulse data to be analyzed; using the analysis thread to perform effectiveness screening and ternary value identification on the pulse data to be analyzed, and storing to a receiving frame structure body to obtain a complete data frame; analyzing the complete data frame to verify the accuracy of an address and a serial number and a checksum to obtain the verified detonation parameter.
2. The communication method for wireless detonators as described in claim 1, characterized in that, the step of obtaining a user detonation command parameter, and obtaining a standardized data frame instruction through a ternary frame structure packaging method, includes: obtaining a user detonation command original parameter, verifying and standardizing a target address and a timing requirement contained therein to obtain a standardized command parameter containing a valid address identifier and an ordered cycle count; constructing a communication frame structure containing a start bit, an address field, a cycle count field, a checksum and a stop bit according to the standardized command parameter, and converting the values of the address field and the cycle count field into ternary encoding to obtain a ternary communication frame; using a pulse width modulation technology, mapping each ternary value in the ternary communication frame into a pulse signal of a specified width to obtain a standardized pulse sequence composed of different width pulses to form the standardized data frame instruction.
3. The communication method for wireless detonators as described in claim 1, characterized in that, The step of converting the standardized data frame instruction and the ready hardware timing resource into a time-encoding pulse sequence by a ternary pulse modulation method comprises: parsing the standardized data frame instruction to extract a ternary encoding pulse sequence composed of pulses of different widths; converting each ternary value in the ternary encoding pulse sequence into a corresponding standard pulse width parameter according to a predefined mapping relationship between ternary states and pulse widths; calling the ready hardware timing resource and generating a standard width pulse signal corresponding to each ternary value by configuring a comparison matching register of a timer according to the standard pulse width parameter; sequentially combining the standard width pulse signals to form the final time-encoding pulse sequence in the original order of the ternary encoding pulse sequence.
4. The method of claim 1, wherein the wireless communication method is a method of transmitting a signal to a wireless detonator, and the signal is a signal for transmitting a command to the wireless detonator. The step of receiving the time-encoding pulse sequence propagated through a space channel and obtaining a receiver induction signal through electromagnetic induction comprises: receiving an electromagnetic wave signal formed after the time-encoding pulse sequence is propagated through a space channel, and converting the electromagnetic wave signal through a receiving antenna to obtain an initial induction electric signal; amplifying and filtering the initial induction electric signal to obtain a conditioned electric signal; adjusting the level of the conditioned electric signal to form an electric signal satisfying the triggering condition of a receiver interrupt processing circuit to obtain the receiver induction signal.
5. The method of claim 1, wherein the wireless communication method is a method of communicating with a wireless detonator, characterized by, The step of processing the verified initiation parameter to obtain a safe initiation action through timer control technology comprises: calculating an execution time according to the serial number in the verified initiation parameter to obtain the execution time; setting and starting an execution timer according to the execution time to realize a timed initiation function and obtain the safe initiation action.
6. A communication system for wireless detonators, characterized in that The communication method of the wireless detonator of any one of claims 1-5, the system comprising a transmitting end and a receiving end; the transmitting end comprising: a configuration unit configured to configure a system clock and a target frequency parameter, and obtain a ready hardware timing resource through a dynamic frequency adjustment algorithm; an acquisition unit configured to acquire a user initiation command parameter, and obtain a standardized data frame instruction through a ternary frame structure packaging method; a conversion unit configured to convert the standardized data frame instruction and the ready hardware timing resource into a time-encoding pulse sequence through a ternary pulse modulation method; the receiving end comprising: a receiving unit configured to receive the time-encoding pulse sequence propagated through a space channel, and obtain a receiver induction signal through electromagnetic induction; a verification unit configured to capture the receiver induction signal, and obtain a verified initiation parameter through an interrupt processing and message queue mechanism; a result unit configured to process the verified initiation parameter, and obtain a safe initiation action through timer control technology. 7.A computer device, comprising a memory and a processor, wherein the memory stores a computer program, and the computer device is configured to perform the method according to any one of claims 1-6 when the computer program is executed by the processor. The processor executes the computer program to realize the steps of the communication method of the wireless detonator of any one of claims 1-5.
8. A computer program product, characterised in that, The computer program product comprises a computer program, and the computer program is executed by the processor to realize the steps of the communication method of the wireless detonator of any one of claims 1-5.
Citation Information
Patent Citations
Microcontroller circuit, corresponding device, system and method of operation
US20220286319A1
Improved communications in electronic detonators
WO2021263116A1